re PR target/8340 (ICE on x86 inline asm w/ -fPIC)

gcc/
	PR target/8340
	PR middle-end/47602
	PR rtl-optimization/55458
	* config/i386/i386.c (ix86_use_pseudo_pic_reg): New.
	(ix86_init_pic_reg): New.
	(ix86_select_alt_pic_regnum): Add check on pseudo register.
	(ix86_save_reg): Likewise.
	(ix86_expand_prologue): Remove PIC register initialization
	now performed in ix86_init_pic_reg.
	(ix86_output_function_epilogue): Add check on pseudo register.
	(set_pic_reg_ever_alive): New.
	(legitimize_pic_address): Replace df_set_regs_ever_live with new
	set_pic_reg_ever_alive.
	(legitimize_tls_address): Likewise.
	(ix86_pic_register_p): New check.
	(ix86_delegitimize_address): Add check on pseudo register.
	(ix86_expand_call): Insert move from pseudo PIC register to ABI
	defined REAL_PIC_OFFSET_TABLE_REGNUM.
	(TARGET_INIT_PIC_REG): New.
	(TARGET_USE_PSEUDO_PIC_REG): New.
	* config/i386/i386.h (PIC_OFFSET_TABLE_REGNUM): Return INVALID_REGNUM
	if pic_offset_table_rtx exists.
	* doc/tm.texi.in (TARGET_USE_PSEUDO_PIC_REG, TARGET_INIT_PIC_REG):
	Document.
	* doc/tm.texi: Regenerate.
	* function.c (assign_parms): Generate pseudo register for PIC.
	* init-regs.c (initialize_uninitialized_regs): Ignor pseudo PIC
	register.
	* ira-color.c (color_pass): Add check on pseudo register.
	* ira-emit.c (change_loop): Don't create copies for PIC pseudo
	register.
	* ira.c (split_live_ranges_for_shrink_wrap): Add check on pseudo
	register.
	(ira): Add target specific PIC register initialization.
	(do_reload): Keep PIC pseudo register.
	* lra-assigns.c (spill_for): Add checks on pseudo register.
	* lra-constraints.c (contains_symbol_ref_p): New.
	(lra_constraints): Enable lra risky transformations when PIC is pseudo
	register.
	* shrink-wrap.c (try_shrink_wrapping): Add check on pseudo register.
	* target.def (use_pseudo_pic_reg): New.
	(init_pic_reg): New.

gcc/testsuite/
	PR target/8340
	PR middle-end/47602
	PR rtl-optimization/55458
	* gcc.target/i386/pic-1.c: Remove dg-error as test should pass now.
	* gcc.target/i386/pr55458.c: Likewise.
	* gcc.target/i386/pr47602.c: New.
	* gcc.target/i386/pr23098.c: Move to XFAIL.

From-SVN: r216154

1 files changed, 15 insertions, 1 deletions

diff --git a/gcc/ira.c b/gcc/ira.c
index d057ea6ddfe..6194d3480a4 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -4896,7 +4896,7 @@ split_live_ranges_for_shrink_wrap (void)
   FOR_BB_INSNS (first, insn)
     {
       rtx dest = interesting_dest_for_shprep (insn, call_dom);
-      if (!dest)
+      if (!dest || dest == pic_offset_table_rtx)
 	continue;
 
       rtx newreg = NULL_RTX;
@@ -5048,6 +5048,9 @@ ira (FILE *f)
   bool saved_flag_caller_saves = flag_caller_saves;
   enum ira_region saved_flag_ira_region = flag_ira_region;
 
+  /* Perform target specific PIC register initialization.  */
+  targetm.init_pic_reg ();
+
   ira_conflicts_p = optimize > 0;
 
   ira_use_lra_p = targetm.lra_p ();
@@ -5299,10 +5302,18 @@ do_reload (void)
 {
   basic_block bb;
   bool need_dce;
+  unsigned pic_offset_table_regno = INVALID_REGNUM;
 
   if (flag_ira_verbose < 10)
     ira_dump_file = dump_file;
 
+  /* If pic_offset_table_rtx is a pseudo register, then keep it so
+     after reload to avoid possible wrong usages of hard reg assigned
+     to it.  */
+  if (pic_offset_table_rtx
+      && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
+    pic_offset_table_regno = REGNO (pic_offset_table_rtx);
+
   timevar_push (TV_RELOAD);
   if (ira_use_lra_p)
     {
@@ -5407,6 +5418,9 @@ do_reload (void)
       inform (DECL_SOURCE_LOCATION (decl), "for %qD", decl);
     }
 
+  if (pic_offset_table_regno != INVALID_REGNUM)
+    pic_offset_table_rtx = gen_rtx_REG (Pmode, pic_offset_table_regno);
+
   timevar_pop (TV_IRA);
 }