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author | krebbel <krebbel@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-04-13 09:04:31 +0000 |
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committer | krebbel <krebbel@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-04-13 09:04:31 +0000 |
commit | b5fdc4165e8de441e2714b810ec65686136ad661 (patch) | |
tree | 374b7f6023d6c98f017b4c6b7e2f6508841d2326 /gcc/longlong.h | |
parent | b15b8239fdab2bdd0b5718361792d997c8985546 (diff) | |
download | gcc-b5fdc4165e8de441e2714b810ec65686136ad661.tar.gz |
2010-04-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
* gcc/config/s390/s390.md: Replace TARGET_64BIT with TARGET_ZARCH.
* gcc/config/s390/s390.c: Replace UNTIS_PER_WORD with
UNITS_PER_LONG where it is ABI relevant.
(s390_return_addr_rtx): Likewise.
(s390_back_chain_rtx): Likewise.
(s390_frame_area): Likewise.
(s390_frame_info): Likewise.
(s390_initial_elimination_offset): Likewise.
(save_gprs): Likewise.
(s390_emit_prologue): Likewise.
(s390_emit_epilogue): Likewise.
(s390_function_arg_advance): Likewise.
(s390_function_arg): Likewise.
(s390_va_start): Likewise.
(s390_gimplify_va_arg): Likewise.
(s390_function_profiler): Likewise.
(s390_optimize_prologue): Likewise.
(s390_rtx_costs): Likewise.
(s390_secondary_reload): Likewise.
(s390_promote_function_mode): Likewise.
(s390_hard_regno_mode_ok): Replace TARGET_64BIT with TARGET_ZARCH.
(s390_scalar_mode_supported_p): Disallow TImode if no 64 bit
registers available.
(s390_unwind_word_mode): New function.
(s390_function_value): Split 64 bit values into register pair if
used as return value.
(s390_call_saved_register_used): Don't use HARD_REGNO_NREGS for
function call parameters. Handle parallels.
(TARGET_SCALAR_MODE_SUPPORTED_P): New macro.
(HARD_REGNO_CALL_PART_CLOBBERED): New macro.
(DWARF_CIE_DATA_ALIGNMENT): New macro.
(s390_expand_setmem): Remove unused variable src_addr.
* gcc/longlong.h: Make smul_ppmm and sdiv_qrnnd inline asms to
deal with 64 bit registers.
* gcc/config/s390/s390.h: Define __zarch__ predefined macro.
Replace UNITS_PER_WORD with UNITS_PER_LONG where it is ABI relevant.
(UNITS_PER_LONG): New macro.
* libjava/include/s390-signal.h: Define extended ucontext
structure containing the upper halfs of the 64 bit registers.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@158257 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/longlong.h')
-rw-r--r-- | gcc/longlong.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/gcc/longlong.h b/gcc/longlong.h index 5470f9bb7b0..49daa6e4255 100644 --- a/gcc/longlong.h +++ b/gcc/longlong.h @@ -318,6 +318,7 @@ UDItype __umulsidi3 (USItype, USItype); #endif #if (defined (__i370__) || defined (__s390__) || defined (__mvs__)) && W_TYPE_SIZE == 32 +#if !defined (__zarch__) #define smul_ppmm(xh, xl, m0, m1) \ do { \ union {DItype __ll; \ @@ -339,6 +340,28 @@ UDItype __umulsidi3 (USItype, USItype); : "0" (__x.__ll), "r" (d)); \ (q) = __x.__i.__l; (r) = __x.__i.__h; \ } while (0) +#else +#define smul_ppmm(xh, xl, m0, m1) \ + do { \ + register SItype r0 __asm__ ("0"); \ + register SItype r1 __asm__ ("1") = m0; \ + \ + __asm__ ("mr\t%%r0,%3" \ + : "=r" (r0), "=r" (r1) \ + : "r" (r1), "r" (m1)); \ + (xh) = r1; (xl) = r0; \ + } while (0) +#define sdiv_qrnnd(q, r, n1, n0, d) \ + do { \ + register SItype r0 __asm__ ("0") = n0; \ + register SItype r1 __asm__ ("1") = n1; \ + \ + __asm__ ("dr\t%%r0,%3" \ + : "=r" (r0), "=r" (r1) \ + : "r" (r0), "r" (r1), "r" (d)); \ + (q) = r0; (r) = r1; \ + } while (0) +#endif /* __zarch__ */ #endif #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32 |