diff options
| author | mrs <mrs@138bc75d-0d04-0410-961f-82ee72b054a4> | 1996-07-03 18:43:21 +0000 |
|---|---|---|
| committer | mrs <mrs@138bc75d-0d04-0410-961f-82ee72b054a4> | 1996-07-03 18:43:21 +0000 |
| commit | 3c5bf26973f7cdebbcbac9c9b3e23ef9daf26c60 (patch) | |
| tree | d4ef5545062dcc3680216535a75f70f921f372ac /gcc/longlong.h | |
| parent | 7114d4cb5e4a5f8f287dba8c096066050abc3e6e (diff) | |
| download | gcc-3c5bf26973f7cdebbcbac9c9b3e23ef9daf26c60.tar.gz | |
formatting tweaks
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@12387 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/longlong.h')
| -rw-r--r-- | gcc/longlong.h | 66 |
1 files changed, 33 insertions, 33 deletions
diff --git a/gcc/longlong.h b/gcc/longlong.h index f824b5fcd88..8cf39d1aea8 100644 --- a/gcc/longlong.h +++ b/gcc/longlong.h @@ -91,65 +91,65 @@ #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ __asm__ ("add %1,%4,%5 addc %0,%2,%3" \ - : "=r" ((USItype)(sh)), \ - "=&r" ((USItype)(sl)) \ - : "%r" ((USItype)(ah)), \ - "rI" ((USItype)(bh)), \ - "%r" ((USItype)(al)), \ - "rI" ((USItype)(bl))) + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "%r" ((USItype) (ah)), \ + "rI" ((USItype) (bh)), \ + "%r" ((USItype) (al)), \ + "rI" ((USItype) (bl))) #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ __asm__ ("sub %1,%4,%5 subc %0,%2,%3" \ - : "=r" ((USItype)(sh)), \ - "=&r" ((USItype)(sl)) \ - : "r" ((USItype)(ah)), \ - "rI" ((USItype)(bh)), \ - "r" ((USItype)(al)), \ - "rI" ((USItype)(bl))) + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "r" ((USItype) (ah)), \ + "rI" ((USItype) (bh)), \ + "r" ((USItype) (al)), \ + "rI" ((USItype) (bl))) #define umul_ppmm(xh, xl, m0, m1) \ do { \ USItype __m0 = (m0), __m1 = (m1); \ __asm__ ("multiplu %0,%1,%2" \ - : "=r" ((USItype)(xl)) \ + : "=r" ((USItype) (xl)) \ : "r" (__m0), \ "r" (__m1)); \ __asm__ ("multmu %0,%1,%2" \ - : "=r" ((USItype)(xh)) \ + : "=r" ((USItype) (xh)) \ : "r" (__m0), \ "r" (__m1)); \ } while (0) #define udiv_qrnnd(q, r, n1, n0, d) \ __asm__ ("dividu %0,%3,%4" \ - : "=r" ((USItype)(q)), \ - "=q" ((USItype)(r)) \ - : "1" ((USItype)(n1)), \ - "r" ((USItype)(n0)), \ - "r" ((USItype)(d))) + : "=r" ((USItype) (q)), \ + "=q" ((USItype) (r)) \ + : "1" ((USItype) (n1)), \ + "r" ((USItype) (n0)), \ + "r" ((USItype) (d))) #define count_leading_zeros(count, x) \ __asm__ ("clz %0,%1" \ - : "=r" ((USItype)(count)) \ - : "r" ((USItype)(x))) + : "=r" ((USItype) (count)) \ + : "r" ((USItype) (x))) #endif /* __a29k__ */ #if defined (__arm__) #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ __asm__ ("adds %1, %4, %5 adc %0, %2, %3" \ - : "=r" ((USItype)(sh)), \ - "=&r" ((USItype)(sl)) \ - : "%r" ((USItype)(ah)), \ - "rI" ((USItype)(bh)), \ - "%r" ((USItype)(al)), \ - "rI" ((USItype)(bl))) + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "%r" ((USItype) (ah)), \ + "rI" ((USItype) (bh)), \ + "%r" ((USItype) (al)), \ + "rI" ((USItype) (bl))) #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ __asm__ ("subs %1, %4, %5 sbc %0, %2, %3" \ - : "=r" ((USItype)(sh)), \ - "=&r" ((USItype)(sl)) \ - : "r" ((USItype)(ah)), \ - "rI" ((USItype)(bh)), \ - "r" ((USItype)(al)), \ - "rI" ((USItype)(bl))) + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "r" ((USItype) (ah)), \ + "rI" ((USItype) (bh)), \ + "r" ((USItype) (al)), \ + "rI" ((USItype) (bl))) #define umul_ppmm(xh, xl, a, b) \ {register USItype __t0, __t1, __t2; \ __asm__ ("%@ Inlined umul_ppmm |