Remove trailing white spaces

	* lra-assigns.c: Remove trailing white spaces.
	* lra-coalesce.c: Likewise.
	* lra-constraints.c: Likewise.
	* lra-eliminations.c: Likewise.
	* lra-int.h: Likewise.
	* lra-spills.c: Likewise.
	* lra.c: Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@192966 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 94 insertions, 94 deletions

diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index c9a8cd48330..3eabab88019 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -87,7 +87,7 @@
 
        r <- ... or ... <- r		 r <- ... or ... <- r
        ...				 s <- r (new insn -- save)
-       ...			  => 
+       ...			  =>
        ...				 r <- s (new insn -- restore)
        ... <- r				 ... <- r
 
@@ -250,14 +250,14 @@ in_class_p (rtx reg, enum reg_class cl, enum reg_class *new_class)
   enum machine_mode reg_mode;
   int class_size, hard_regno, nregs, i, j;
   int regno = REGNO (reg);
-  
+
   if (new_class != NULL)
     *new_class = NO_REGS;
   if (regno < FIRST_PSEUDO_REGISTER)
     {
       rtx final_reg = reg;
       rtx *final_loc = &final_reg;
-      
+
       lra_eliminate_reg_if_possible (final_loc);
       return TEST_HARD_REG_BIT (reg_class_contents[cl], REGNO (*final_loc));
     }
@@ -447,7 +447,7 @@ static inline bool
 ok_for_index_p_nonstrict (rtx reg)
 {
   unsigned regno = REGNO (reg);
-  
+
   return regno >= FIRST_PSEUDO_REGISTER || REGNO_OK_FOR_INDEX_P (regno);
 }
 
@@ -510,7 +510,7 @@ operands_match_p (rtx x, rtx y, int y_hard_regno)
       && (REG_P (y) || (GET_CODE (y) == SUBREG && REG_P (SUBREG_REG (y)))))
     {
       int j;
-      
+
       i = get_hard_regno (x);
       if (i < 0)
 	goto slow;
@@ -538,7 +538,7 @@ operands_match_p (rtx x, rtx y, int y_hard_regno)
   if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
       || GET_CODE (y) == PRE_MODIFY)
     return operands_match_p (x, XEXP (y, 0), -1);
-  
+
  slow:
 
   if (code == REG && GET_CODE (y) == SUBREG && REG_P (SUBREG_REG (y))
@@ -711,13 +711,13 @@ match_reload (signed char out, signed char *ins, enum reg_class goal_class,
 	 pseudo which is wrong when the input pseudo lives after the
 	 insn and as the new pseudo value is changed by the insn
 	 output.  Therefore we create the new pseudo from the output.
-	 
+
 	 We cannot reuse the current output register because we might
 	 have a situation like "a <- a op b", where the constraints
 	 force the second input operand ("b") to match the output
 	 operand ("a").  "b" must then be copied into a new register
 	 so that it doesn't clobber the current value of "a".  */
-	 
+
       new_in_reg = new_out_reg
 	= lra_create_new_reg_with_unique_value (outmode, out_rtx,
 						goal_class, "");
@@ -773,12 +773,12 @@ reg_class_from_constraints (const char *p)
 		    [op_class][base_reg_class (VOIDmode, ADDR_SPACE_GENERIC,
 					       ADDRESS, SCRATCH)]);
 	break;
-	
+
       case 'g':
       case 'r':
 	op_class = reg_class_subunion[op_class][GENERAL_REGS];
 	break;
-	
+
       default:
 	if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
 	  {
@@ -791,7 +791,7 @@ reg_class_from_constraints (const char *p)
 #endif
 	    break;
 	  }
-	
+
 	op_class
 	  = reg_class_subunion[op_class][REG_CLASS_FROM_CONSTRAINT (c, p)];
 	break;
@@ -1127,7 +1127,7 @@ simplify_operand_subreg (int nop, enum machine_mode reg_mode)
 
   if (GET_CODE (operand) != SUBREG)
     return false;
-  
+
   mode = GET_MODE (operand);
   reg = SUBREG_REG (operand);
   /* If we change address for paradoxical subreg of memory, the
@@ -1219,7 +1219,7 @@ uses_hard_regs_p (rtx x, HARD_REG_SET set)
       if (GET_MODE_SIZE (GET_MODE (x)) > GET_MODE_SIZE (mode))
 	mode = GET_MODE (x);
     }
-  
+
   if (REG_P (x))
     {
       x_hard_regno = get_hard_regno (x);
@@ -1329,7 +1329,7 @@ process_alt_operands (int only_alternative)
       op = no_subreg_reg_operand[nop] = *curr_id->operand_loc[nop];
       /* The real hard regno of the operand after the allocation.  */
       hard_regno[nop] = get_hard_regno (op);
-      
+
       operand_reg[nop] = op;
       biggest_mode[nop] = GET_MODE (operand_reg[nop]);
       if (GET_CODE (operand_reg[nop]) == SUBREG)
@@ -1402,16 +1402,16 @@ process_alt_operands (int only_alternative)
 	      curr_alt_matches[nop] = -1;
 	      continue;
 	    }
-      
+
 	  op = no_subreg_reg_operand[nop];
 	  mode = curr_operand_mode[nop];
 
 	  win = did_match = winreg = offmemok = constmemok = false;
 	  badop = true;
-      
+
 	  early_clobber_p = false;
 	  p = curr_static_id->operand_alternative[opalt_num].constraint;
-      
+
 	  this_costly_alternative = this_alternative = NO_REGS;
 	  /* We update set of possible hard regs besides its class
 	     because reg class might be inaccurate.  For example,
@@ -1424,11 +1424,11 @@ process_alt_operands (int only_alternative)
 	  this_alternative_match_win = false;
 	  this_alternative_offmemok = false;
 	  this_alternative_matches = -1;
-  
+
 	  /* An empty constraint should be excluded by the fast
 	     track.  */
 	  lra_assert (*p != 0 && *p != ',');
-  
+
 	  /* Scan this alternative's specs for this operand; set WIN
 	     if the operand fits any letter in this alternative.
 	     Otherwise, clear BADOP if this operand could fit some
@@ -1446,36 +1446,36 @@ process_alt_operands (int only_alternative)
 		case ',':
 		  c = '\0';
 		  break;
-	
+
 		case '=':  case '+': case '?': case '*': case '!':
 		case ' ': case '\t':
 		  break;
-		  
+
 		case '%':
 		  /* We only support one commutative marker, the first
 		     one.  We already set commutative above.  */
 		  break;
-		  
+
 		case '&':
 		  early_clobber_p = true;
 		  break;
-		  
+
 		case '#':
 		  /* Ignore rest of this alternative.  */
 		  c = '\0';
 		  break;
-		  
+
 		case '0':  case '1':  case '2':	 case '3':  case '4':
 		case '5':  case '6':  case '7':	 case '8':  case '9':
 		  {
 		    int m_hregno;
 		    bool match_p;
-		    
+
 		    m = strtoul (p, &end, 10);
 		    p = end;
 		    len = 0;
 		    lra_assert (nop > m);
-		    
+
 		    this_alternative_matches = m;
 		    m_hregno = get_hard_regno (*curr_id->operand_loc[m]);
 		    /* We are supposed to match a previous operand.
@@ -1511,7 +1511,7 @@ process_alt_operands (int only_alternative)
 			    && MEM_P (*curr_id->operand_loc[m])
 			    && curr_alt[m] == NO_REGS && ! curr_alt_win[m])
 			  continue;
-			
+
 		      }
 		    else
 		      {
@@ -1533,7 +1533,7 @@ process_alt_operands (int only_alternative)
 			      += (ira_reg_class_max_nregs[curr_alt[m]]
 				  [GET_MODE (*curr_id->operand_loc[m])]);
 			  }
-			
+
 			/* We prefer no matching alternatives because
 			   it gives more freedom in RA.	 */
 			if (operand_reg[nop] == NULL_RTX
@@ -1556,7 +1556,7 @@ process_alt_operands (int only_alternative)
 		      }
 		    else
 		      did_match = true;
-		    
+
 		    /* This can be fixed with reloads if the operand
 		       we are supposed to match can be fixed with
 		       reloads. */
@@ -1565,7 +1565,7 @@ process_alt_operands (int only_alternative)
 		    COPY_HARD_REG_SET (this_alternative_set, curr_alt_set[m]);
 		    break;
 		  }
-		  
+
 		case 'p':
 		  cl = base_reg_class (VOIDmode, ADDR_SPACE_GENERIC,
 				       ADDRESS, SCRATCH);
@@ -1582,7 +1582,7 @@ process_alt_operands (int only_alternative)
 		  win = true;
 		  badop = false;
 		  break;
-		  
+
 		case TARGET_MEM_CONSTRAINT:
 		  if (MEM_P (op) || spilled_pseudo_p (op))
 		    win = true;
@@ -1590,28 +1590,28 @@ process_alt_operands (int only_alternative)
 		    badop = false;
 		  constmemok = true;
 		  break;
-		  
+
 		case '<':
 		  if (MEM_P (op)
 		      && (GET_CODE (XEXP (op, 0)) == PRE_DEC
 			  || GET_CODE (XEXP (op, 0)) == POST_DEC))
 		    win = true;
 		  break;
-		  
+
 		case '>':
 		  if (MEM_P (op)
 		      && (GET_CODE (XEXP (op, 0)) == PRE_INC
 			  || GET_CODE (XEXP (op, 0)) == POST_INC))
 		    win = true;
 		  break;
-		  
+
 		  /* Memory op whose address is not offsettable.  */
 		case 'V':
 		  if (MEM_P (op)
 		      && ! offsettable_nonstrict_memref_p (op))
 		    win = true;
 		  break;
-		  
+
 		  /* Memory operand whose address is offsettable.  */
 		case 'o':
 		  if ((MEM_P (op)
@@ -1623,7 +1623,7 @@ process_alt_operands (int only_alternative)
 		  constmemok = true;
 		  offmemok = true;
 		  break;
-		  
+
 		case 'E':
 		case 'F':
 		  if (GET_CODE (op) == CONST_DOUBLE
@@ -1631,14 +1631,14 @@ process_alt_operands (int only_alternative)
 			  && (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)))
 		    win = true;
 		  break;
-		  
+
 		case 'G':
 		case 'H':
 		  if (GET_CODE (op) == CONST_DOUBLE
 		      && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, c, p))
 		    win = true;
 		  break;
-		  
+
 		case 's':
 		  if (CONST_INT_P (op)
 		      || (GET_CODE (op) == CONST_DOUBLE && mode == VOIDmode))
@@ -1647,13 +1647,13 @@ process_alt_operands (int only_alternative)
 		  if (general_constant_p (op))
 		    win = true;
 		  break;
-		  
+
 		case 'n':
 		  if (CONST_INT_P (op)
 		      || (GET_CODE (op) == CONST_DOUBLE && mode == VOIDmode))
 		    win = true;
 		  break;
-	
+
 		case 'I':
 		case 'J':
 		case 'K':
@@ -1666,20 +1666,20 @@ process_alt_operands (int only_alternative)
 		      && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), c, p))
 		    win = true;
 		  break;
-		  
+
 		case 'X':
 		  /* This constraint should be excluded by the fast
 		     track.  */
 		  gcc_unreachable ();
 		  break;
-		  
+
 		case 'g':
 		  if (MEM_P (op)
 		      || general_constant_p (op)
 		      || spilled_pseudo_p (op))
 		    win = true;
 		  /* Drop through into 'r' case.  */
-		  
+
 		case 'r':
 		  this_alternative
 		    = reg_class_subunion[this_alternative][GENERAL_REGS];
@@ -1694,7 +1694,7 @@ process_alt_operands (int only_alternative)
 					reg_class_contents[GENERAL_REGS]);
 		    }
 		  goto reg;
-		  
+
 		default:
 		  if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
 		    {
@@ -1705,7 +1705,7 @@ process_alt_operands (int only_alternative)
 			    win = true;
 			  else if (spilled_pseudo_p (op))
 			    win = true;
-			  
+
 			  /* If we didn't already win, we can reload
 			     constants via force_const_mem, and other
 			     MEMs by reloading the address like for
@@ -1720,7 +1720,7 @@ process_alt_operands (int only_alternative)
 			{
 			  if (EXTRA_CONSTRAINT_STR (op, c, p))
 			    win = true;
-			  
+
 			  /* If we didn't already win, we can reload
 			     the address into a base register.	*/
 			  cl = base_reg_class (VOIDmode, ADDR_SPACE_GENERIC,
@@ -1740,13 +1740,13 @@ process_alt_operands (int only_alternative)
 			  badop = false;
 			  break;
 			}
-		      
+
 		      if (EXTRA_CONSTRAINT_STR (op, c, p))
 			win = true;
 #endif
 		      break;
 		    }
-		  
+
 		  cl = REG_CLASS_FROM_CONSTRAINT (c, p);
 		  this_alternative = reg_class_subunion[this_alternative][cl];
 		  IOR_HARD_REG_SET (this_alternative_set,
@@ -1778,7 +1778,7 @@ process_alt_operands (int only_alternative)
 		costly_p = c == '*';
 	    }
 	  while ((p += len), c);
-  
+
 	  /* Record which operands fit this alternative.  */
 	  if (win)
 	    {
@@ -1827,7 +1827,7 @@ process_alt_operands (int only_alternative)
 		 then this operand can be reloaded.  */
 	      if (winreg && !no_regs_p)
 		badop = false;
-	      
+
 	      if (badop)
 		goto fail;
 
@@ -1880,7 +1880,7 @@ process_alt_operands (int only_alternative)
 		  if (! no_regs_p)
 		    losers++;
 		}
-      
+
 	      /* Alternative loses if it requires a type of reload not
 		 permitted for this insn.  We can always reload
 		 objects with a REG_UNUSED note.  */
@@ -1890,7 +1890,7 @@ process_alt_operands (int only_alternative)
 		  || (curr_static_id->operand[nop].type != OP_OUT
 		      && no_input_reloads_p && ! const_to_mem))
 		goto fail;
-      
+
 	      /* If we can't reload this value at all, reject this
 		 alternative.  Note that we could also lose due to
 		 LIMIT_RELOAD_CLASS, but we don't check that here.  */
@@ -1899,13 +1899,13 @@ process_alt_operands (int only_alternative)
 		  if (targetm.preferred_reload_class
 		      (op, this_alternative) == NO_REGS)
 		    reject = MAX_OVERALL_COST_BOUND;
-	  
+
 		  if (curr_static_id->operand[nop].type == OP_OUT
 		      && (targetm.preferred_output_reload_class
 			  (op, this_alternative) == NO_REGS))
 		    reject = MAX_OVERALL_COST_BOUND;
 		}
-      
+
 	      if (! ((const_to_mem && constmemok)
 		     || (MEM_P (op) && offmemok)))
 		{
@@ -1918,7 +1918,7 @@ process_alt_operands (int only_alternative)
 		     match then.  */
 		  if (! (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER))
 		    reject += 2;
-		  
+
 		  if (! no_regs_p)
 		    reload_nregs
 		      += ira_reg_class_max_nregs[this_alternative][mode];
@@ -1930,7 +1930,7 @@ process_alt_operands (int only_alternative)
 	      if (!REG_P (op) || curr_static_id->operand[nop].type != OP_IN)
 		reject++;
 	    }
-  
+
 	  if (early_clobber_p)
 	    reject++;
 	  /* ??? We check early clobbers after processing all operands
@@ -1948,11 +1948,11 @@ process_alt_operands (int only_alternative)
 	  curr_alt_match_win[nop] = this_alternative_match_win;
 	  curr_alt_offmemok[nop] = this_alternative_offmemok;
 	  curr_alt_matches[nop] = this_alternative_matches;
-  
+
 	  if (this_alternative_matches >= 0
 	      && !did_match && !this_alternative_win)
 	    curr_alt_win[this_alternative_matches] = false;
-  
+
 	  if (early_clobber_p && operand_reg[nop] != NULL_RTX)
 	    early_clobbered_nops[early_clobbered_regs_num++] = nop;
 	}
@@ -2054,7 +2054,7 @@ process_alt_operands (int only_alternative)
 	}
       if (losers == 0)
 	/* Everything is satisfied.  Do not process alternatives
-	   anymore.  */ 
+	   anymore.  */
 	break;
     fail:
       ;
@@ -2073,7 +2073,7 @@ valid_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
   lra_assert (ADDR_SPACE_GENERIC_P (as));
   GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
   return 0;
-  
+
  win:
   return 1;
 #else
@@ -2660,7 +2660,7 @@ curr_insn_transform (void)
 	change_p = true;
 	lra_update_dup (curr_id, i);
       }
-  
+
   if (change_p)
     /* If we've changed the instruction then any alternative that
        we chose previously may no longer be valid.  */
@@ -2798,7 +2798,7 @@ curr_insn_transform (void)
   /* Right now, for any pair of operands I and J that are required to
      match, with J < I, goal_alt_matches[I] is J.  Add I to
      goal_alt_matched[J].  */
-  
+
   for (i = 0; i < n_operands; i++)
     if ((j = goal_alt_matches[i]) >= 0)
       {
@@ -2814,10 +2814,10 @@ curr_insn_transform (void)
 	goal_alt_matched[j][k] = i;
 	goal_alt_matched[j][k + 1] = -1;
       }
-  
+
   for (i = 0; i < n_operands; i++)
     goal_alt_win[i] |= goal_alt_match_win[i];
-  
+
   /* Any constants that aren't allowed and can't be reloaded into
      registers are here changed into memory references.	 */
   for (i = 0; i < n_operands; i++)
@@ -2829,7 +2829,7 @@ curr_insn_transform (void)
 
 	if (GET_CODE (reg) == SUBREG)
 	  reg = SUBREG_REG (reg);
-	    
+
 	if (REG_P (reg) && (regno = REGNO (reg)) >= FIRST_PSEUDO_REGISTER)
 	  {
 	    bool ok_p = in_class_p (reg, goal_alt[i], &new_class);
@@ -2848,29 +2848,29 @@ curr_insn_transform (void)
 	rtx op = *curr_id->operand_loc[i];
 	rtx subreg = NULL_RTX;
 	enum machine_mode mode = curr_operand_mode[i];
-	
+
 	if (GET_CODE (op) == SUBREG)
 	  {
 	    subreg = op;
 	    op = SUBREG_REG (op);
 	    mode = GET_MODE (op);
 	  }
-	
+
 	if (CONST_POOL_OK_P (mode, op)
 	    && ((targetm.preferred_reload_class
 		 (op, (enum reg_class) goal_alt[i]) == NO_REGS)
 		|| no_input_reloads_p))
 	  {
 	    rtx tem = force_const_mem (mode, op);
-	    
+
 	    change_p = true;
 	    if (subreg != NULL_RTX)
 	      tem = gen_rtx_SUBREG (mode, tem, SUBREG_BYTE (subreg));
-	    
+
 	    *curr_id->operand_loc[i] = tem;
 	    lra_update_dup (curr_id, i);
 	    process_address (i, &before, &after);
-	    
+
 	    /* If the alternative accepts constant pool refs directly
 	       there will be no reload needed at all.  */
 	    if (subreg != NULL_RTX)
@@ -2892,11 +2892,11 @@ curr_insn_transform (void)
 	      }
 	    if (c == '\0' || c == ',' || c == '#')
 	      continue;
-	    
+
 	    goal_alt_win[i] = true;
 	  }
       }
-  
+
   for (i = 0; i < n_operands; i++)
     {
       rtx old, new_reg;
@@ -2915,7 +2915,7 @@ curr_insn_transform (void)
 	    change_class (REGNO (op), NO_REGS, "      Change", true);
 	  continue;
 	}
-      
+
       /* Operands that match previous ones have already been handled.  */
       if (goal_alt_matches[i] >= 0)
 	continue;
@@ -3172,10 +3172,10 @@ multi_block_pseudo_p (int regno)
   basic_block bb = NULL;
   unsigned int uid;
   bitmap_iterator bi;
-  
+
   if (regno < FIRST_PSEUDO_REGISTER)
     return false;
-  
+
     EXECUTE_IF_SET_IN_BITMAP (&lra_reg_info[regno].insn_bitmap, 0, uid, bi)
       if (bb == NULL)
 	bb = BLOCK_FOR_INSN (lra_insn_recog_data[uid]->insn);
@@ -3273,7 +3273,7 @@ lra_constraints (bool first_p)
 	if ((hard_regno = lra_get_regno_hard_regno (i)) >= 0)
 	  {
 	    int j, nregs = hard_regno_nregs[hard_regno][PSEUDO_REGNO_MODE (i)];
-	    
+
 	    for (j = 0; j < nregs; j++)
 	      df_set_regs_ever_live (hard_regno + j, true);
 	  }
@@ -3326,7 +3326,7 @@ lra_constraints (bool first_p)
     {
       curr_insn = lra_pop_insn ();
       --new_min_len;
-      curr_bb = BLOCK_FOR_INSN (curr_insn); 
+      curr_bb = BLOCK_FOR_INSN (curr_insn);
       if (curr_bb != last_bb)
 	{
 	  last_bb = curr_bb;
@@ -3366,7 +3366,7 @@ lra_constraints (bool first_p)
 		      can not be changed.  Such insns might be not in
 		      init_insns because we don't update equiv data
 		      during insn transformations.
-			  
+
 		      As an example, let suppose that a pseudo got
 		      hard register and on the 1st pass was not
 		      changed to equivalent constant.  We generate an
@@ -3420,7 +3420,7 @@ lra_constraints (bool first_p)
 	    && (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
 	  {
 	    int j, nregs = hard_regno_nregs[hard_regno][PSEUDO_REGNO_MODE (i)];
-	    
+
 	    for (j = 0; j < nregs; j++)
 	      lra_assert (df_regs_ever_live_p (hard_regno + j));
 	  }
@@ -3504,7 +3504,7 @@ static void
 add_next_usage_insn (int regno, rtx insn, int reloads_num)
 {
   rtx next_usage_insns;
-  
+
   if (usage_insns[regno].check == curr_usage_insns_check
       && (next_usage_insns = usage_insns[regno].insns) != NULL_RTX
       && DEBUG_INSN_P (insn))
@@ -3521,7 +3521,7 @@ add_next_usage_insn (int regno, rtx insn, int reloads_num)
   else
     usage_insns[regno].check = 0;
 }
-  
+
 /* Replace all references to register OLD_REGNO in *LOC with pseudo
    register NEW_REG.  Return true if any change was made.  */
 static bool
@@ -3637,8 +3637,8 @@ static bitmap_head check_only_regs;
      ...	     =>
      <- ... p ...	  <- ... i ...
    where p is a spilled original pseudo and i is a new inheritance pseudo.
-   
-   
+
+
    The inheritance pseudo has the smallest class of two classes CL and
    class of ORIGINAL REGNO.  */
 static bool
@@ -3677,7 +3677,7 @@ inherit_reload_reg (bool def_p, int original_regno,
       if (lra_dump_file != NULL)
 	fprintf (lra_dump_file, "    Use smallest class of %s and %s\n",
 		 reg_class_names[cl], reg_class_names[rclass]);
-      
+
       rclass = cl;
     }
   if (check_secondary_memory_needed_p (cl, next_usage_insns))
@@ -3857,7 +3857,7 @@ choose_split_class (enum reg_class allocno_class,
   int i;
   enum reg_class cl, best_cl = NO_REGS;
   enum reg_class hard_reg_class = REGNO_REG_CLASS (hard_regno);
-  
+
   if (! SECONDARY_MEMORY_NEEDED (allocno_class, allocno_class, mode)
       && TEST_HARD_REG_BIT (reg_class_contents[allocno_class], hard_regno))
     return allocno_class;
@@ -3928,7 +3928,7 @@ split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
   if (call_save_p)
     {
       enum machine_mode sec_mode;
-      
+
 #ifdef SECONDARY_MEMORY_NEEDED_MODE
       sec_mode = SECONDARY_MEMORY_NEEDED_MODE (GET_MODE (original_reg));
 #else
@@ -4088,7 +4088,7 @@ update_ebb_live_info (rtx head, rtx tail)
   edge e;
   edge_iterator ei;
 
-  last_bb = BLOCK_FOR_INSN (tail); 
+  last_bb = BLOCK_FOR_INSN (tail);
   prev_bb = NULL;
   for (curr_insn = tail;
        curr_insn != PREV_INSN (head);
@@ -4236,7 +4236,7 @@ get_live_on_other_edges (basic_block from, basic_block to, bitmap res)
     if (reg->type != OP_IN)
       bitmap_set_bit (res, reg->regno);
 }
-	
+
 /* Used as a temporary results of some bitmap calculations.  */
 static bitmap_head temp_bitmap;
 
@@ -4287,7 +4287,7 @@ inherit_in_ebb (rtx head, rtx tail)
 	     pseudos for potential splitting.  */
 	  to_process = df_get_live_out (curr_bb);
 	  if (last_processed_bb != NULL)
-	    {	
+	    {
 	      /* We are somewhere in the middle of EBB.	 */
 	      get_live_on_other_edges (curr_bb, last_processed_bb,
 				       &temp_bitmap);
@@ -4388,7 +4388,7 @@ inherit_in_ebb (rtx head, rtx tail)
 			= usage_insns[dst_regno].insns) != NULL_RTX)
 		  {
 		    struct lra_insn_reg *r;
-		    
+
 		    for (r = curr_id->regs; r != NULL; r = r->next)
 		      if (r->type != OP_OUT && r->regno == dst_regno)
 			break;
@@ -4407,7 +4407,7 @@ inherit_in_ebb (rtx head, rtx tail)
 		    && ! reg->subreg_p && reg->type == OP_OUT)
 		  {
 		    HARD_REG_SET s;
-		    
+
 		    if (split_if_necessary (dst_regno, reg->biggest_mode,
 					    potential_reload_hard_regs,
 					    false, curr_insn, max_uid))
@@ -4554,7 +4554,7 @@ inherit_in_ebb (rtx head, rtx tail)
 	     rest of spliting in the current BB.  */
 	  to_process = df_get_live_in (curr_bb);
 	  if (BLOCK_FOR_INSN (head) != curr_bb)
-	    {	
+	    {
 	      /* We are somewhere in the middle of EBB.	 */
 	      get_live_on_other_edges (EDGE_PRED (curr_bb, 0)->src,
 				       curr_bb, &temp_bitmap);
@@ -4591,7 +4591,7 @@ inherit_in_ebb (rtx head, rtx tail)
 
 /* This value affects EBB forming.  If probability of edge from EBB to
    a BB is not greater than the following value, we don't add the BB
-   to EBB.  */ 
+   to EBB.  */
 #define EBB_PROBABILITY_CUTOFF (REG_BR_PROB_BASE / 2)
 
 /* Current number of inheritance/split iteration.  */
@@ -4734,7 +4734,7 @@ remove_inheritance_pseudos (bitmap remove_pseudos)
 	      dregno = get_regno (SET_DEST (set));
 	      sregno = get_regno (SET_SRC (set));
 	    }
-	  
+
 	  if (sregno >= 0 && dregno >= 0)
 	    {
 	      if ((bitmap_bit_p (remove_pseudos, sregno)