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authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2007-04-24 05:51:57 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2007-04-24 05:51:57 +0000
commit7e564f7304a4050ea56fed5b6d3158e48b6d0389 (patch)
tree414ebf4e011654eddd3531c3e652690d778992c9 /gcc/optabs.h
parent32201e9aeb52a4eef9ba61c156399f0090a98023 (diff)
downloadgcc-7e564f7304a4050ea56fed5b6d3158e48b6d0389.tar.gz
gcc/
2007-xx-xx Chao-ying Fu <fu@mips.com> Richard Sandiford <richard@nildram.co.uk> * doc/md.texi (madd@var{m}@var{n}4, umadd@var{m}@var{n}4): Document. * optabs.h (OTI_smadd_widen, OTI_umadd_widen): New optab_indexes. (smadd_widen_optab, umadd_widen_optab): Define. * optabs.c (init_optabs): Initialize smadd_widen_optab and umadd_widen_optab. * genopinit.c (optabs): Fill in smadd_widen_optab and umadd_widen_optab. * expr.c (expand_expr_real_1): Try to use smadd_widen_optab and umadd_widen_optab to implement multiply-add sequences. * config/mips/mips.md (*<su>mul_acc_di): Rename to... (<u>maddsidi4): ...this. Extend condition to include GENERATE_MADD_MSUB and TARGET_DSPR2. Change the constraint of operand 0 to "ka" and use the three-operand form of madd<u> for TARGET_DSPR2. * config/mips/mips-dspr2.md (mips_madd, mips_maddu): Convert to define_expands. * config/mips/constraints.md (ka): New register constraint. gcc/testsuite/ 2007-xx-xx Richard Sandiford <richard@nildram.co.uk> * gcc.target/mips/madd-1.c, gcc.target/mips/madd-2.c, * gcc.target/mips/madd-3.c, gcc.target/mips/madd-4.c, * gcc.target/mips/maddu-1.c, gcc.target/mips/maddu-2.c, * gcc.target/mips/maddu-3.c, gcc.target/mips/maddu-4.c: New tests. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@124095 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/optabs.h')
-rw-r--r--gcc/optabs.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/gcc/optabs.h b/gcc/optabs.h
index 62a69c742fb..e5bbef89e4c 100644
--- a/gcc/optabs.h
+++ b/gcc/optabs.h
@@ -86,6 +86,12 @@ enum optab_index
OTI_umul_widen,
/* Widening multiply of one unsigned and one signed operand. */
OTI_usmul_widen,
+ /* Signed multiply and add with the result and addend one machine mode
+ wider than the multiplicand and multiplier. */
+ OTI_smadd_widen,
+ /* Unigned multiply and add with the result and addend one machine mode
+ wider than the multiplicand and multiplier. */
+ OTI_umadd_widen,
/* Signed divide */
OTI_sdiv,
@@ -309,6 +315,8 @@ extern GTY(()) optab optab_table[OTI_MAX];
#define smul_widen_optab (optab_table[OTI_smul_widen])
#define umul_widen_optab (optab_table[OTI_umul_widen])
#define usmul_widen_optab (optab_table[OTI_usmul_widen])
+#define smadd_widen_optab (optab_table[OTI_smadd_widen])
+#define umadd_widen_optab (optab_table[OTI_umadd_widen])
#define sdiv_optab (optab_table[OTI_sdiv])
#define smulv_optab (optab_table[OTI_smulv])
#define sdivv_optab (optab_table[OTI_sdivv])