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author | aesok <aesok@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-09-02 14:29:37 +0000 |
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committer | aesok <aesok@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-09-02 14:29:37 +0000 |
commit | 24dd066854c04dc78c5624f8097da0816d6b532c (patch) | |
tree | 8800ae6420f6689c40bea9995085ad6bf47c0f65 /gcc/regmove.c | |
parent | dbd6de328ae1bdb74aa9ad274035c2e5a25ff99c (diff) | |
download | gcc-24dd066854c04dc78c5624f8097da0816d6b532c.tar.gz |
* target.def (class_likely_spilled_p): New hook.
* doc/tm.texi.in (TARGET_CLASS_LIKELY_SPILLED_P): Document.
* doc/tm.texi: Regenerate.
* targhooks.c (default_class_likely_spilled_p): New function.
* targhooks.h (default_class_likely_spilled_p): Declare.
* regs.h (CLASS_LIKELY_SPILLED_P): Remove.
* combine.c: (cant_combine_insn_p, likely_spilled_retval_p): Use
TARGET_CLASS_LIKELY_SPILLED_P target hook. Use HARD_REGISTER_P macro.
Use fixed_reg_set instead of fixed_regs.
* cse.c (hash_rtx_cb): Use TARGET_CLASS_LIKELY_SPILLED_P target hook.
* calls.c (avoid_likely_spilled_reg): Ditto.
* ira-conflicts.c: (ira_build_conflicts): Ditto.
* ira.c (update_equiv_regs): Ditto.
* mode-switching.c (create_pre_exit): Ditto.
* regmove.c (find_matches): Ditto.
(regclass_compatible_p): Use TARGET_CLASS_LIKELY_SPILLED_P target
hook.
* reload.c (SMALL_REGISTER_CLASS_P): Remove macro.
(small_register_class_p): New inline function.
(push_secondary_reload, find_reusable_reload, find_reloads): Use
small_register_class_p instead of SMALL_REGISTER_CLASS_P.
* config/i386/i386.h (CLASS_LIKELY_SPILLED_P): Remove.
* config/i386/i386.c (ix86_class_likely_spilled_p): New.
(TARGET_CLASS_LIKELY_SPILLED_P): Define.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@163779 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/regmove.c')
-rw-r--r-- | gcc/regmove.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/regmove.c b/gcc/regmove.c index eb205f89ee9..f869403c7ab 100644 --- a/gcc/regmove.c +++ b/gcc/regmove.c @@ -73,13 +73,13 @@ static int fixup_match_2 (rtx, rtx, rtx, rtx); /* Return nonzero if registers with CLASS1 and CLASS2 can be merged without causing too much register allocation problems. */ static int -regclass_compatible_p (enum reg_class class0, enum reg_class class1) +regclass_compatible_p (reg_class_t class0, reg_class_t class1) { return (class0 == class1 || (reg_class_subset_p (class0, class1) - && ! CLASS_LIKELY_SPILLED_P (class0)) + && ! targetm.class_likely_spilled_p (class0)) || (reg_class_subset_p (class1, class0) - && ! CLASS_LIKELY_SPILLED_P (class1))); + && ! targetm.class_likely_spilled_p (class1))); } @@ -1337,7 +1337,7 @@ find_matches (rtx insn, struct match *matchp) case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u': case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B': case 'C': case 'D': case 'W': case 'Y': case 'Z': - if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_CONSTRAINT ((unsigned char) c, p) )) + if (targetm.class_likely_spilled_p (REG_CLASS_FROM_CONSTRAINT ((unsigned char) c, p))) likely_spilled[op_no] = 1; break; } |