diff options
| author | amylaar <amylaar@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-06-30 18:47:43 +0000 |
|---|---|---|
| committer | amylaar <amylaar@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-06-30 18:47:43 +0000 |
| commit | 964229b79f27a511c58e7907288a2dbc7c5afef3 (patch) | |
| tree | 684be6242471aff6286aab4d1043e3360a5902af /gcc/reload.c | |
| parent | 3ebac17a3e0668c5ddff7c1a4cf9d8d9613d3946 (diff) | |
| download | gcc-964229b79f27a511c58e7907288a2dbc7c5afef3.tar.gz | |
PR other/44566
* coretypes.h [!USED_FOR_TARGET] (reg_class_t): Define.
* target.def (struct gcc_target): Replace enum reg_class with
reg_class_t in hook argument / return types.
* doc/tm.texi.in (TARGET_SECONDARY_RELOAD): Likewise.
(TARGET_IRA_COVER_CLASSES, TARGET_MEMORY_MOVE_COST): Likewise.
(TARGET_BRANCH_TARGET_REGISTER_CLASS): Likewise.
* targhooks.h (default_branch_target_register_class): Likewise.
(default_ira_cover_classes, default_secondary_reload): Likewise.
(default_memory_move_cost, default_register_move_cost): Likewise.
* targhooks.c (default_branch_target_register_class): Likewise.
(default_ira_cover_classes, default_secondary_reload): Likewise.
(default_memory_move_cost, default_register_move_cost): Likewise.
* reload.c (push_secondary_reload, secondary_reload_class): Likewise.
* bt-load.c (branch_target_load_optimize): Likewise.
* ira.c (setup_cover_and_important_classes): Likewise.
* ira-costs.c (copy_cost): Likewise.
* reload1.c (emit_input_reload_insns): Likewise.
* config/alpha/alpha.c (alpha_secondary_reload): Likewise.
* config/frv/frv.c (frv_secondary_reload): Likewise.
* config/s390/s390.c (s390_secondary_reload): Likewise.
* config/i386/i386.c (i386_ira_cover_classes): Likewise.
(ix86_secondary_reload, ix86_memory_move_cost): Likewise.
(ix86_register_move_cost): Likewise.
* config/sh/sh-protos.h (sh_secondary_reload): Likewise.
* config/sh/sh.c (sh_target_reg_class, sh_secondary_reload): Likewise.
* config/xtensa/xtensa.c (xtensa_secondary_reload): Likewise.
* config/xtensa/xtensa-protos.h (xtensa_secondary_reload): Likewise.
* config/rs6000/rs6000.c (rs6000_secondary_reload): Likewise.
(rs6000_ira_cover_classes): Likewise.
* config/picochip/picochip.c (picochip_secondary_reload): Likewise.
* config/picochip/picochip-protos.h (picochip_secondary_reload):
Likewise.
* config/pa/pa.c (pa_secondary_reload): Likewise.
* config/mips/mips.c (mips_ira_cover_classes): Likewise.
* config/bfin/bfin.c (bfin_secondary_reload): Likewise.
* config/ia64/ia64.c (ia64_register_move_cost): Likewise.
* doc/tm.texi: Regenerate.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@161633 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/reload.c')
| -rw-r--r-- | gcc/reload.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/gcc/reload.c b/gcc/reload.c index c670dcf0000..ea552e6695c 100644 --- a/gcc/reload.c +++ b/gcc/reload.c @@ -362,7 +362,8 @@ push_secondary_reload (int in_p, rtx x, int opnum, int optional, sri.icode = CODE_FOR_nothing; sri.prev_sri = prev_sri; - rclass = targetm.secondary_reload (in_p, x, reload_class, reload_mode, &sri); + rclass = (enum reg_class) targetm.secondary_reload (in_p, x, reload_class, + reload_mode, &sri); icode = (enum insn_code) sri.icode; /* If we don't need any secondary registers, done. */ @@ -525,7 +526,8 @@ secondary_reload_class (bool in_p, enum reg_class rclass, sri.icode = CODE_FOR_nothing; sri.prev_sri = NULL; - rclass = targetm.secondary_reload (in_p, x, rclass, mode, &sri); + rclass + = (enum reg_class) targetm.secondary_reload (in_p, x, rclass, mode, &sri); icode = (enum insn_code) sri.icode; /* If there are no secondary reloads at all, we return NO_REGS. |