diff options
| author | aesok <aesok@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-09-02 14:29:37 +0000 |
|---|---|---|
| committer | aesok <aesok@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-09-02 14:29:37 +0000 |
| commit | 24dd066854c04dc78c5624f8097da0816d6b532c (patch) | |
| tree | 8800ae6420f6689c40bea9995085ad6bf47c0f65 /gcc/sched-rgn.c | |
| parent | dbd6de328ae1bdb74aa9ad274035c2e5a25ff99c (diff) | |
| download | gcc-24dd066854c04dc78c5624f8097da0816d6b532c.tar.gz | |
* target.def (class_likely_spilled_p): New hook.
* doc/tm.texi.in (TARGET_CLASS_LIKELY_SPILLED_P): Document.
* doc/tm.texi: Regenerate.
* targhooks.c (default_class_likely_spilled_p): New function.
* targhooks.h (default_class_likely_spilled_p): Declare.
* regs.h (CLASS_LIKELY_SPILLED_P): Remove.
* combine.c: (cant_combine_insn_p, likely_spilled_retval_p): Use
TARGET_CLASS_LIKELY_SPILLED_P target hook. Use HARD_REGISTER_P macro.
Use fixed_reg_set instead of fixed_regs.
* cse.c (hash_rtx_cb): Use TARGET_CLASS_LIKELY_SPILLED_P target hook.
* calls.c (avoid_likely_spilled_reg): Ditto.
* ira-conflicts.c: (ira_build_conflicts): Ditto.
* ira.c (update_equiv_regs): Ditto.
* mode-switching.c (create_pre_exit): Ditto.
* regmove.c (find_matches): Ditto.
(regclass_compatible_p): Use TARGET_CLASS_LIKELY_SPILLED_P target
hook.
* reload.c (SMALL_REGISTER_CLASS_P): Remove macro.
(small_register_class_p): New inline function.
(push_secondary_reload, find_reusable_reload, find_reloads): Use
small_register_class_p instead of SMALL_REGISTER_CLASS_P.
* config/i386/i386.h (CLASS_LIKELY_SPILLED_P): Remove.
* config/i386/i386.c (ix86_class_likely_spilled_p): New.
(TARGET_CLASS_LIKELY_SPILLED_P): Define.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@163779 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/sched-rgn.c')
| -rw-r--r-- | gcc/sched-rgn.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/gcc/sched-rgn.c b/gcc/sched-rgn.c index 4a0ae511be0..adae839930b 100644 --- a/gcc/sched-rgn.c +++ b/gcc/sched-rgn.c @@ -2401,7 +2401,7 @@ get_rgn_sched_max_insns_priority (void) return rgn_sched_info.sched_max_insns_priority; } -/* Determine if PAT sets a CLASS_LIKELY_SPILLED_P register. */ +/* Determine if PAT sets a TARGET_CLASS_LIKELY_SPILLED_P register. */ static bool sets_likely_spilled (rtx pat) @@ -2418,8 +2418,8 @@ sets_likely_spilled_1 (rtx x, const_rtx pat, void *data) if (GET_CODE (pat) == SET && REG_P (x) - && REGNO (x) < FIRST_PSEUDO_REGISTER - && CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (REGNO (x)))) + && HARD_REGISTER_P (x) + && targetm.class_likely_spilled_p (REGNO_REG_CLASS (REGNO (x)))) *ret = true; } @@ -2448,8 +2448,8 @@ add_branch_dependences (rtx head, rtx tail) COND_EXEC insns cannot be moved past a branch (see e.g. PR17808). - Insns setting CLASS_LIKELY_SPILLED_P registers (usually return values) - are not moved before reload because we can wind up with register + Insns setting TARGET_CLASS_LIKELY_SPILLED_P registers (usually return + values) are not moved before reload because we can wind up with register allocation failures. */ while (tail != head && DEBUG_INSN_P (tail)) |