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authorwilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4>1993-10-05 23:22:04 +0000
committerwilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4>1993-10-05 23:22:04 +0000
commit381c75b47e25123319ca3fbfe04512c100a53d7a (patch)
tree551127c5c736e073b2526982560a9af56214bc1d /gcc/sched.c
parentf18756961cb6016d6e9273365ae781d43e248937 (diff)
downloadgcc-381c75b47e25123319ca3fbfe04512c100a53d7a.tar.gz
(sched_analyze_2): Make volatile asms depend on all
pseudo registers. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@5621 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/sched.c')
-rw-r--r--gcc/sched.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/gcc/sched.c b/gcc/sched.c
index 7f9c831f662..ac0b7a576fd 100644
--- a/gcc/sched.c
+++ b/gcc/sched.c
@@ -1940,11 +1940,16 @@ sched_analyze_2 (x, insn)
rtx u;
/* Traditional and volatile asm instructions must be considered to use
- and clobber all hard registers and all of memory. So must
- TRAP_IF and UNSPEC_VOLATILE operations. */
+ and clobber all hard registers, all pseudo-registers and all of
+ memory. So must TRAP_IF and UNSPEC_VOLATILE operations.
+
+ Consider for instance a volatile asm that changes the fpu rounding
+ mode. An insn should not be moved across this even if it only uses
+ pseudo-regs because it might give an incorrectly rounded result. */
if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
{
- for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+ int max_reg = max_reg_num ();
+ for (i = 0; i < max_reg; i++)
{
for (u = reg_last_uses[i]; u; u = XEXP (u, 1))
add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);