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authorbernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4>2000-11-28 16:19:55 +0000
committerbernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4>2000-11-28 16:19:55 +0000
commit2c0977d319e3b07e414a3fd331c31ba85e3f471c (patch)
tree61257981c2e19cb4db6927691be50326872840a7 /gcc/simplify-rtx.c
parent7d3bd8c09e25f815213b50e8869134d7d52de2cc (diff)
downloadgcc-2c0977d319e3b07e414a3fd331c31ba85e3f471c.tar.gz
Ignore SETs that are anything except REG or MEM, but look inside STRICT_LOW_PART.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@37819 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/simplify-rtx.c')
-rw-r--r--gcc/simplify-rtx.c29
1 files changed, 21 insertions, 8 deletions
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index d7b43d1ac91..08ceaf7fc10 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -3198,13 +3198,22 @@ cselib_record_sets (insn)
locations that are written. */
for (i = 0; i < n_sets; i++)
{
- sets[i].src_elt = cselib_lookup (sets[i].src, GET_MODE (sets[i].dest),
- 1);
- if (GET_CODE (sets[i].dest) == MEM)
- sets[i].dest_addr_elt = cselib_lookup (XEXP (sets[i].dest, 0), Pmode,
- 1);
- else
- sets[i].dest_addr_elt = 0;
+ rtx dest = sets[i].dest;
+
+ /* A STRICT_LOW_PART can be ignored; we'll record the equivalence for
+ the low part after invalidating any knowledge about larger modes. */
+ if (GET_CODE (sets[i].dest) == STRICT_LOW_PART)
+ sets[i].dest = dest = XEXP (dest, 0);
+
+ /* We don't know how to record anything but REG or MEM. */
+ if (GET_CODE (dest) == REG || GET_CODE (dest) == MEM)
+ {
+ sets[i].src_elt = cselib_lookup (sets[i].src, GET_MODE (dest), 1);
+ if (GET_CODE (dest) == MEM)
+ sets[i].dest_addr_elt = cselib_lookup (XEXP (dest, 0), Pmode, 1);
+ else
+ sets[i].dest_addr_elt = 0;
+ }
}
/* Invalidate all locations written by this insn. Note that the elts we
@@ -3214,7 +3223,11 @@ cselib_record_sets (insn)
/* Now enter the equivalences in our tables. */
for (i = 0; i < n_sets; i++)
- cselib_record_set (sets[i].dest, sets[i].src_elt, sets[i].dest_addr_elt);
+ {
+ rtx dest = sets[i].dest;
+ if (GET_CODE (dest) == REG || GET_CODE (dest) == MEM)
+ cselib_record_set (dest, sets[i].src_elt, sets[i].dest_addr_elt);
+ }
}
/* Record the effects of INSN. */