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author | Richard Sandiford <rdsandiford@googlemail.com> | 2013-09-09 13:07:02 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2013-09-09 13:07:02 +0000 |
commit | 69a59f0fa9b65198e4c1f87265105d396a598ea5 (patch) | |
tree | a5201ad7e75918350ccb6467b3fc9ff8b667c680 /gcc/simplify-rtx.c | |
parent | 2f1cd2ebd65eae6d87332c0bcd5d0e840c886cf3 (diff) | |
download | gcc-69a59f0fa9b65198e4c1f87265105d396a598ea5.tar.gz |
gcc/
* combine.c (simplify_set, expand_field_assignment, extract_left_shift)
(force_to_mode, simplify_shift_const_1, simplify_comparison):
Use gen_int_mode with the mode of the associated simplify_* call.
* explow.c (probe_stack_range, anti_adjust_stack_and_probe): Likewise.
* expmed.c (expand_shift_1): Likewise.
* function.c (instantiate_virtual_regs_in_insn): Likewise.
* loop-iv.c (iv_number_of_iterations): Likewise.
* loop-unroll.c (unroll_loop_runtime_iterations): Likewise.
* simplify-rtx.c (simplify_binary_operation_1): Likewise.
From-SVN: r202393
Diffstat (limited to 'gcc/simplify-rtx.c')
-rw-r--r-- | gcc/simplify-rtx.c | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 65a59062a48..9ec41a5dbd4 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -2818,12 +2818,13 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, && CONST_INT_P (XEXP (op0, 1)) && CONST_INT_P (op1) && (UINTVAL (XEXP (op0, 1)) & UINTVAL (op1)) != 0) - return simplify_gen_binary (IOR, mode, - simplify_gen_binary - (AND, mode, XEXP (op0, 0), - GEN_INT (UINTVAL (XEXP (op0, 1)) - & ~UINTVAL (op1))), - op1); + { + rtx tmp = simplify_gen_binary (AND, mode, XEXP (op0, 0), + gen_int_mode (UINTVAL (XEXP (op0, 1)) + & ~UINTVAL (op1), + mode)); + return simplify_gen_binary (IOR, mode, tmp, op1); + } /* If OP0 is (ashiftrt (plus ...) C), it might actually be a (sign_extend (plus ...)). Then check if OP1 is a CONST_INT and @@ -2953,7 +2954,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, /* Try to simplify ~A&C | ~B&C. */ if (na_c != NULL_RTX) return simplify_gen_binary (IOR, mode, na_c, - GEN_INT (~bval & cval)); + gen_int_mode (~bval & cval, mode)); } else { @@ -2961,9 +2962,11 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, if (na_c == const0_rtx) { rtx a_nc_b = simplify_gen_binary (AND, mode, a, - GEN_INT (~cval & bval)); + gen_int_mode (~cval & bval, + mode)); return simplify_gen_binary (IOR, mode, a_nc_b, - GEN_INT (~bval & cval)); + gen_int_mode (~bval & cval, + mode)); } } } @@ -3297,7 +3300,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, if (CONST_INT_P (trueop1) && exact_log2 (UINTVAL (trueop1)) > 0) return simplify_gen_binary (AND, mode, op0, - GEN_INT (INTVAL (op1) - 1)); + gen_int_mode (INTVAL (op1) - 1, mode)); break; case MOD: |