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author | jsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-03-02 01:55:06 +0000 |
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committer | jsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-03-02 01:55:06 +0000 |
commit | 114a8a4bd9b29f256ead5b126dff3f11b151fd4b (patch) | |
tree | c1e2ef7127a2f1f85055feb6b8c5cb896632aad0 /gcc/target.h | |
parent | 130effcad254850ce1a672d7a36aac3278671458 (diff) | |
download | gcc-114a8a4bd9b29f256ead5b126dff3f11b151fd4b.tar.gz |
* target.h (init_dwarf_reg_sizes_extra): New target hook.
* target-def.h (TARGET_INIT_DWARF_REG_SIZES_EXTRA): New default.
* doc/tm.texi (TARGET_INIT_DWARF_REG_SIZES_EXTRA): Document.
* dwarf2out.c (expand_builtin_init_dwarf_reg_sizes): Call this
hook.
* config/rs6000/rs6000.c (TARGET_INIT_DWARF_REG_SIZES_EXTRA,
rs6000_init_dwarf_reg_sizes_extra): New.
* config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Support
SPE register high parts.
testsuite:
* gcc.target/powerpc/spe-unwind-1.c, g++.dg/eh/simd-5.C: New
tests.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@122468 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/target.h')
-rw-r--r-- | gcc/target.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/gcc/target.h b/gcc/target.h index 80f5a5acef2..d312c9f88f1 100644 --- a/gcc/target.h +++ b/gcc/target.h @@ -601,6 +601,12 @@ struct gcc_target hook should return NULL_RTX. */ rtx (* dwarf_register_span) (rtx); + /* If expand_builtin_init_dwarf_reg_sizes needs to fill in table + entries not corresponding directly to registers below + FIRST_PSEUDO_REGISTER, this hook should generate the necessary + code, given the address of the table. */ + void (* init_dwarf_reg_sizes_extra) (tree); + /* Fetch the fixed register(s) which hold condition codes, for targets where it makes sense to look for duplicate assignments to the condition codes. This should return true if there is such a |