gcc:

	* config/i386/i386.c (ix86_function_arg_boundary): Fix warning
	message.

	gcc/testsuite:
	* gcc.dg/pr35442.c: Adapt warning.

	PR target/46280
	* g++.dg/eh/simd-2.C: Add -msse to dg-options, add
	dg-require-effective-target sse_runtime for for i?86-*-*, x86_64-*-*.
	* g++.dg/torture/pr36444.C: Add dg-options -msse for
	i?86-*-* x86_64-*-*.
	* g++.dg/torture/pr36445.C: Likewise.
	* gcc.c-torture/compile/pr34856.c: Likewise.
	* gcc.c-torture/compile/pr39928-1.c: Likewise.
	* gcc.c-torture/compile/vector-1.c: Likewise.
	* gcc.c-torture/compile/vector-2.c: Likewise.
	* gcc.dg/pr32912-1.c: Likewise.
	* gcc.c-torture/execute/va-arg-25.c: Move ...
	* gcc.dg/torture/va-arg-25.c: ... here.
	Add dg-do run.
	Add dg-options -msse, dg-require-effective-target sse_runtime for
	for i?86-*-*, x86_64-*-*.
	* gcc.c-torture/execute/vector-1.c: Likewise.
	* gcc.c-torture/execute/vector-2.c: Likewise.
	* gcc.dg/tree-ssa/forwprop-5.c: Add -msse to dg-options for
	i?86-*-*, x86_64-*-*.
	* gcc.dg/tree-ssa/fre-vce-1.c: Likewise.
	* gcc.dg/tree-ssa/sra-4.c: Likewise.
	* gcc.dg/tree-ssa/vector-1.c: Likewise.
	* gcc.dg/tree-ssa/vector-2.c: Likewise.
	* gcc.target/i386/vect-args.c: Add -Wno-psabi to dg-options.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@166444 138bc75d-0d04-0410-961f-82ee72b054a4

10 files changed, 141 insertions, 2 deletions

diff --git a/gcc/testsuite/gcc.dg/pr32912-1.c b/gcc/testsuite/gcc.dg/pr32912-1.c
index 1ceb77ad43c..4fcc29a9cc8 100644
--- a/gcc/testsuite/gcc.dg/pr32912-1.c
+++ b/gcc/testsuite/gcc.dg/pr32912-1.c
@@ -2,6 +2,8 @@
 /* { dg-do run } */
 /* { dg-options "-O2 -w" } */
 /* { dg-options "-O2 -w -fno-common" { target hppa*-*-hpux* } } */
+/* { dg-options "-O2 -w -msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
 
 extern void abort (void);
 
diff --git a/gcc/testsuite/gcc.dg/pr35442.c b/gcc/testsuite/gcc.dg/pr35442.c
index 875cb0b31b6..206853b9ef0 100644
--- a/gcc/testsuite/gcc.dg/pr35442.c
+++ b/gcc/testsuite/gcc.dg/pr35442.c
@@ -11,4 +11,4 @@ foo (A a)
 }
 
 /* Ignore a warning that is irrelevant to the purpose of this test.  */
-/* { dg-prune-output "(.*GCC vector passed by reference.*|.*ABI of * passing parameter with.*)" } */
+/* { dg-prune-output "(.*GCC vector passed by reference.*|.*ABI for * passing parameters with.*)" } */
diff --git a/gcc/testsuite/gcc.dg/torture/va-arg-25.c b/gcc/testsuite/gcc.dg/torture/va-arg-25.c
new file mode 100644
index 00000000000..8496460d28c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/va-arg-25.c
@@ -0,0 +1,42 @@
+/* Varargs and vectors!  */
+
+/* { dg-do run } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+
+#include <stdarg.h>
+#include <stdlib.h>
+#include <limits.h>
+
+#define vector __attribute__((vector_size(16)))
+
+const vector unsigned int v1 = {10,11,12,13};
+const vector unsigned int v2 = {20,21,22,23};
+
+void foo(int a, ...)
+{
+  va_list args;
+  vector unsigned int v;
+
+  va_start (args, a);
+  v = va_arg (args, vector unsigned int);
+  if (a != 1 || memcmp (&v, &v1, sizeof (v)) != 0)
+    abort ();
+  a = va_arg (args, int);
+  if (a != 2)
+    abort ();
+  v = va_arg (args, vector unsigned int);
+  if (memcmp (&v, &v2, sizeof (v)) != 0)
+    abort ();
+  va_end (args);
+}
+
+int main(void)
+{
+#if INT_MAX == 2147483647
+  foo (1, (vector unsigned int){10,11,12,13}, 2,
+       (vector unsigned int){20,21,22,23});
+#endif
+  return 0;
+}
+
diff --git a/gcc/testsuite/gcc.dg/torture/vector-1.c b/gcc/testsuite/gcc.dg/torture/vector-1.c
new file mode 100644
index 00000000000..9ab78aaf53e
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/vector-1.c
@@ -0,0 +1,40 @@
+/* Check that vector extraction works correctly. */
+
+/* { dg-do run } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+
+#define vector __attribute__((vector_size(16) ))
+
+int f0(vector int t)
+{
+  return ((int*)&t)[0];
+}
+int f1(vector int t)
+{
+  return ((int*)&t)[1];
+}
+int f2(vector int t)
+{
+  return ((int*)&t)[2];
+}
+int f3(vector int t)
+{
+  return ((int*)&t)[3];
+}
+int main(void)
+{
+  vector int a = {0, 1, 2, 3};
+  /* Make sure that we have the correct size for the vectors. */
+  if (sizeof(int) != 4)
+    __builtin_exit (0);
+  if (f0(a) != 0)
+    __builtin_abort ();
+  if (f1(a) != 1)
+    __builtin_abort ();
+  if (f2(a) != 2)
+    __builtin_abort ();
+  if (f3(a) != 3)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/vector-2.c b/gcc/testsuite/gcc.dg/torture/vector-2.c
new file mode 100644
index 00000000000..bff9f82cdad
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/vector-2.c
@@ -0,0 +1,50 @@
+/* Check that vector insertion works correctly. */
+
+/* { dg-do run } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+
+#define vector __attribute__((vector_size(16) ))
+
+vector int f0(vector int t, int a)
+{
+ ((int*)&t)[0] = a;
+ return t;
+}
+vector int f1(vector int t, int a)
+{
+ ((int*)&t)[1] = a;
+ return t;
+}
+vector int f2(vector int t, int a)
+{
+ ((int*)&t)[2] = a;
+ return t;
+}
+vector int f3(vector int t, int a)
+{
+ ((int*)&t)[3] = a;
+ return t;
+}
+int main(void)
+{
+  vector int a = {0, 0, 0, 0};
+  vector int b = {1, 0, 0, 0};
+  vector int c = {0, 1, 0, 0};
+  vector int d = {0, 0, 1, 0};
+  vector int e = {0, 0, 0, 1};
+  vector int a0;
+  a0 = f0(a, 1);
+  if (memcmp (&a0, &b, sizeof(a0)))
+    __builtin_abort ();
+  a0 = f1(a, 1);
+  if (memcmp (&a0, &c, sizeof(a0)))
+    __builtin_abort ();
+  a0 = f2(a, 1);
+  if (memcmp (&a0, &d, sizeof(a0)))
+    __builtin_abort ();
+  a0 = f3(a, 1);
+  if (memcmp (&a0, &e, sizeof(a0)))
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c
index f2ddab2535b..033c60dae0a 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-tree-optimized -w" } */
+/* { dg-options "-O1 -fdump-tree-optimized -w -msse" { target { i?86-*-* x86_64-*-* } } } */
 
 #define vector __attribute__((vector_size(16) ))
 struct VecClass
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c b/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c
index 2442b93231a..599d1f1efd5 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c
@@ -1,4 +1,5 @@
 /* { dg-options "-O2 -fdump-tree-fre -w" } */
+/* { dg-options "-O2 -fdump-tree-fre -w -msse" { target { i?86-*-* x86_64-*-* } } } */
 /* { dg-do compile } */
 #define vector __attribute__((vector_size(sizeof(int)*4) ))
 struct s { vector int i; };
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c b/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c
index 73a68f90043..e6ca7561f7f 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-tree-optimized -w" } */
-/* Check that SRA replaces strucutres containing vectors. */
+/* { dg-options "-O1 -fdump-tree-optimized -w -msse" { target { i?86-*-* x86_64-*-* } } } */
+/* Check that SRA replaces structures containing vectors. */
 
 #define vector __attribute__((vector_size(16)))
 
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c b/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c
index 5b07c67a2c6..6fe0e872bb9 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-w -O1 -fdump-tree-gimple" } */
+/* { dg-options "-w -O1 -fdump-tree-gimple -msse" { target { i?86-*-* x86_64-*-* } } } */
 
 
 /* We should be able to produce a BIT_FIELD_REF for each of these vector access. */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c b/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c
index cb680937a2f..e34532d3faa 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-w -O1 -fdump-tree-optimized" } */
+/* { dg-options "-w -O1 -fdump-tree-optimized -msse" { target { i?86-*-* x86_64-*-* } } } */
 
 #define vector __attribute__(( vector_size(16) ))