diff options
author | sandra <sandra@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-07-02 14:48:04 +0000 |
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committer | sandra <sandra@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-07-02 14:48:04 +0000 |
commit | 79a8350398717c09d021cbd1a7fe91a44962111c (patch) | |
tree | 496d9999349fb60c99c98dfea93f7718bb2efaa4 /gcc/testsuite/gcc.target/arm/neon | |
parent | d0f1d3d4892d96cfe930993141f7ef113ecbbff4 (diff) | |
download | gcc-79a8350398717c09d021cbd1a7fe91a44962111c.tar.gz |
2010-07-02 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config/arm/arm.c (neon_vdup_constant): Expand into canonical RTL
instead of an unspec.
(neon_expand_vector_init): Likewise.
* config/arm/neon.md (UNSPEC_VCOMBINE): Delete.
(UNSPEC_VDUP_LANE): Delete.
(UNSPEC VDUP_N): Delete.
(UNSPEC_VGET_HIGH): Delete.
(UNSPEC_VGET_LANE): Delete.
(UNSPEC_VGET_LOW): Delete.
(UNSPEC_VMVN): Delete.
(UNSPEC_VSET_LANE): Delete.
(V_double_vector_mode): New.
(vec_set<mode>_internal): Make code emitted match that for the
corresponding intrinsics.
(vec_setv2di_internal): Likewise.
(neon_vget_lanedi): Rewrite to expand into emit_move_insn.
(neon_vget_lanev2di): Rewrite to expand into vec_extractv2di.
(neon_vset_lane<mode>): Combine double and quad patterns and
expand into vec_set<mode>_internal instead of UNSPEC_VSET_LANE.
(neon_vset_lanedi): Rewrite to expand into emit_move_insn.
(neon_vdup_n<mode>): Rewrite RTL without unspec.
(neon_vdup_ndi): Rewrite as define_expand and use emit_move_insn.
(neon_vdup_nv2di): Rewrite RTL without unspec and merge with
with neon_vdup_lanev2di, adjusting the pattern from the latter
to be predicable for consistency.
(neon_vdup_lane<mode>_internal): New.
(neon_vdup_lane<mode>): Turn into a define_expand and rewrite
to avoid using an unspec.
(neon_vdup_lanedi): Rewrite RTL pattern to avoid unspec.
(neon_vdup_lanev2di): Turn into a define_expand.
(neon_vcombine): Rewrite pattern to eliminate UNPSEC_VCOMBINE.
(neon_vget_high<mode>): Replace with....
(neon_vget_highv16qi): New pattern using canonical RTL.
(neon_vget_highv8hi): Likewise.
(neon_vget_highv4si): Likewise.
(neon_vget_highv4sf): Likewise.
(neon_vget_highv2di): Likewise.
(neon_vget_low<mode>): Replace with....
(neon_vget_lowv16qi): New pattern using canonical RTL.
(neon_vget_lowv8hi): Likewise.
(neon_vget_lowv4si): Likewise.
(neon_vget_lowv4sf): Likewise.
(neon_vget_lowv2di): Likewise.
* config/arm/neon.ml (Vget_lane): Add No_op attribute to suppress
test for this emitting vmov.
(Vset_lane): Likewise.
(Vdup_n): Likewise.
(Vmov_n): Likewise.
* doc/arm-neon-intrinsics.texi: Regenerated.
gcc/testsuite/
* gcc.target/arm/neon/vdup_ns64.c: Regenerated.
* gcc.target/arm/neon/vdup_nu64.c: Regenerated.
* gcc.target/arm/neon/vdupQ_ns64.c: Regenerated.
* gcc.target/arm/neon/vdupQ_nu64.c: Regenerated.
* gcc.target/arm/neon/vmov_ns64.c: Regenerated.
* gcc.target/arm/neon/vmov_nu64.c: Regenerated.
* gcc.target/arm/neon/vmovQ_ns64.c: Regenerated.
* gcc.target/arm/neon/vmovQ_nu64.c: Regenerated.
* gcc.target/arm/neon/vget_lanes64.c: Regenerated.
* gcc.target/arm/neon/vget_laneu64.c: Regenerated.
* gcc.target/arm/neon/vset_lanes64.c: Regenerated.
* gcc.target/arm/neon/vset_laneu64.c: Regenerated.
* gcc.target/arm/neon-vdup_ns64.c: New.
* gcc.target/arm/neon-vdup_nu64.c: New.
* gcc.target/arm/neon-vdupQ_ns64.c: New.
* gcc.target/arm/neon-vdupQ_nu64.c: New.
* gcc.target/arm/neon-vdupQ_lanes64.c: New.
* gcc.target/arm/neon-vdupQ_laneu64.c: New.
* gcc.target/arm/neon-vmov_ns64.c: New.
* gcc.target/arm/neon-vmov_nu64.c: New.
* gcc.target/arm/neon-vmovQ_ns64.c: New.
* gcc.target/arm/neon-vmovQ_nu64.c: New.
* gcc.target/arm/neon-vget_lanes64.c: New.
* gcc.target/arm/neon-vget_laneu64.c: New.
* gcc.target/arm/neon-vset_lanes64.c: New.
* gcc.target/arm/neon-vset_laneu64.c: New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@161720 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite/gcc.target/arm/neon')
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c | 1 |
12 files changed, 0 insertions, 16 deletions
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c index 987a4d3f63f..ab749a7bbad 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c @@ -16,6 +16,4 @@ void test_vdupQ_ns64 (void) out_int64x2_t = vdupq_n_s64 (arg0_int64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c index c2e5d481a3d..0ddb72decc8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c @@ -16,6 +16,4 @@ void test_vdupQ_nu64 (void) out_uint64x2_t = vdupq_n_u64 (arg0_uint64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c index 720cc0452d2..033f1b4744c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c @@ -16,5 +16,4 @@ void test_vdup_ns64 (void) out_int64x1_t = vdup_n_s64 (arg0_int64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c index 4033e4757dc..6888125c638 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c @@ -16,5 +16,4 @@ void test_vdup_nu64 (void) out_uint64x1_t = vdup_n_u64 (arg0_uint64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c index 136242900a7..5dc99424fa5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c @@ -16,5 +16,4 @@ void test_vget_lanes64 (void) out_int64_t = vget_lane_s64 (arg0_int64x1_t, 0); } -/* { dg-final { scan-assembler "vmov\[ \]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c index 4b44a1e8c37..496a057fc73 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c @@ -16,5 +16,4 @@ void test_vget_laneu64 (void) out_uint64_t = vget_lane_u64 (arg0_uint64x1_t, 0); } -/* { dg-final { scan-assembler "vmov\[ \]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c index 89fe2c150fd..35936cbd43a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c @@ -16,6 +16,4 @@ void test_vmovQ_ns64 (void) out_int64x2_t = vmovq_n_s64 (arg0_int64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c index d7d3e365ecd..e373a121865 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c @@ -16,6 +16,4 @@ void test_vmovQ_nu64 (void) out_uint64x2_t = vmovq_n_u64 (arg0_uint64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c index 6d2d61678b9..7b011282832 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c @@ -16,5 +16,4 @@ void test_vmov_ns64 (void) out_int64x1_t = vmov_n_s64 (arg0_int64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c index 9434377d2ff..b9613e06ff1 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c @@ -16,5 +16,4 @@ void test_vmov_nu64 (void) out_uint64x1_t = vmov_n_u64 (arg0_uint64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c index 2c4bede7796..5c5454f9807 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c @@ -17,5 +17,4 @@ void test_vset_lanes64 (void) out_int64x1_t = vset_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c index 22ba53c20a9..3bff5d232c7 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c @@ -17,5 +17,4 @@ void test_vset_laneu64 (void) out_uint64x1_t = vset_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ |