summaryrefslogtreecommitdiff
path: root/gcc/testsuite/gcc.target/arm
diff options
context:
space:
mode:
authorrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>2012-08-20 10:57:45 +0000
committerrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>2012-08-20 10:57:45 +0000
commitc91260ab962c4cc93e09d08ebcbe9ee0ab36e161 (patch)
tree9aa1b75ab16300342b60ebc65ea916b8db8c7223 /gcc/testsuite/gcc.target/arm
parent74c9bbb8180f4f0cb0fe72ff8ad6e6ff50650f98 (diff)
downloadgcc-c91260ab962c4cc93e09d08ebcbe9ee0ab36e161.tar.gz
* gcc.target/arm/thumb-16bit-ops.c (f): This test uses a 16-bit
add instruction. (f2): New test that really does need adds. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@190530 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite/gcc.target/arm')
-rw-r--r--gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c b/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c
index bd4f4897f35..90407eb6872 100644
--- a/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c
+++ b/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c
@@ -4,14 +4,21 @@
/* { dg-options "-Os -fno-builtin -mthumb" } */
int
-f (int a, int b )
+f (int a, int b)
{
return a + b;
}
-/* { dg-final { scan-assembler "adds r0, r0, r1" } } */
+/* { dg-final { scan-assembler "add r0, r0, r1" } } */
int
+f2 (int a, int b, int c)
+{
+ return b + c;
+}
+
+/* { dg-final { scan-assembler "adds r0, r1, r2" } } */
+int
g1 (int a)
{
return a + 255;