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authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2011-11-27 10:09:32 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2011-11-27 10:09:32 +0000
commita4cfded48bdace16aff7c15be1f2a6d20a616db5 (patch)
treefc4988c84b4e820e462f8c7da4e0ef7622326369 /gcc/testsuite/gcc.target/mips/fix-r4000-2.c
parent9fbe215970e0761ad1caa16657085dbb4ddb8a6d (diff)
downloadgcc-a4cfded48bdace16aff7c15be1f2a6d20a616db5.tar.gz
gcc/
* config/mips/mips-protos.h (mips_emit_binary): Declare. * config/mips/mips.c (mips_emit_binary): Make global. (mips_set_mips16_mode): Turn off -mfix-r4000 in MIPS16 mode. (mips_conditional_register_usage): Don't treat LO and HI as register operands in MIPS16 mode. (mips_mulsidi3_gen_fn): Use {u,}mulsidi3_{32,64}bit_mips16 for MIPS16 code. * config/mips/predicates.md (muldiv_target_operand): New predicate. (move_operand): Allow hilo_operand. * config/mips/mips.md (mul<mode>3): Explicitly specify LO as the target of MIPS16 multiplies, then move it into the target register. (mul<mode>3_internal, *macc2, *msac2): Use muldiv_target_operand. (<u>mulsidi3_32bit_mips16): New expander. (<u>mulsidi3_32bit): Use muldiv_target_operand. (<u>mulsidi3_32bit_r4000): Disable for ISA_HAS_DSP. (<u>mulsidi3_64bit): Require !TARGET_MIPS16. Split into <u>mulsidi3_64bit_split. (<u>mulsidi3_64bit_mips16): New expander. (<u>mulsidi3_64bit_split): Likewise, using expansions from two previous define_splits. (<u>mulsidi3_64bit_hilo, *muls<u>_di, <u>msubsidi4): Use muldiv_target_operand. (<su>mulsi3_highpart): Use <su>mulsi3_highpart_split for MIPS16 code. (<su>mulsi3_highpart_internal): Require !TARGET_MIPS16. Split into <su>mulsi3_highpart_split. (<su>mulsi3_highpart_split): New expander. (<su>muldi3_highpart): Turn into a define_expand. Use <su>muldi3_highpart_split for MIPS16 code. (<su>muldi3_highpart_internal): Renamed from <su>muldi3_highpart. Require !TARGET_MIPS16. Split into <su>muldi3_highpart_split. (<su>muldi3_highpart_split): New expander. (<u>mulditi3): Explicitly specify LO as the target of MIPS16 multiplies, then move it into the target register. (<u>mulditi3_internal, <u>maddsidi4): Use muldiv_target_operand. (divmod<mode>4, udivmod<mode>4): Turn into define_expands. Use <u>divmod<mode>4_split for MIPS16 code, then explicitly move LO into operand 0. (divmod<mode>4_internal, udivmod<mode>4_internal): Renamed from <u>divmod<mode>4. Use muldiv_target_operand. Require !TARGET_MIPS16. Split into <u>divmod<mode>4_split. (<u>divmod<mode>4_split): New expander. (<u>divmod<GPR:mode>4_hilo_<HILO:mode>): Use muldiv_target_operand. (mfhi<GPR:mode>_<HILO:mode>): Use hilo_operand. gcc/testsuite/ * gcc.target/mips/mult-2.c, gcc.target/mips/mult-3.c, gcc.target/mips/mult-4.c, gcc.target/mips/mult-5.c, gcc.target/mips/mult-6.c, gcc.target/mips/mult-7.c, gcc.target/mips/mult-8.c, gcc.target/mips/mult-9.c, gcc.target/mips/mult-10.c, gcc.target/mips/mult-11.c, gcc.target/mips/mult-12.c, gcc.target/mips/mult-13.c, gcc.target/mips/mult-14.c, gcc.target/mips/mult-15.c, gcc.target/mips/mult-16.c, gcc.target/mips/mult-17.c, gcc.target/mips/mult-18.c, gcc.target/mips/mult-19.c, gcc.target/mips/div-1.c, gcc.target/mips/div-2.c, gcc.target/mips/div-3.c, gcc.target/mips/div-4.c, gcc.target/mips/div-5.c, gcc.target/mips/div-6.c, gcc.target/mips/div-7.c, gcc.target/mips/div-8.c, gcc.target/mips/div-9.c, gcc.target/mips/div-10.c, gcc.target/mips/div-11.c, gcc.target/mips/div-12.c: New tests. * gcc.target/mips/fix-r4000-1.c (foo, bar): Add NOMIPS16. * gcc.target/mips/fix-r4000-2.c (foo): Likewise. * gcc.target/mips/fix-r4000-3.c (foo): Likewise. * gcc.target/mips/fix-r4000-4.c (foo): Likewise. * gcc.target/mips/fix-r4000-5.c (foo): Likewise. * gcc.target/mips/fix-r4000-6.c (foo): Likewise. * gcc.target/mips/fix-r4000-7.c (foo): Likewise. * gcc.target/mips/fix-r4000-8.c (foo): Likewise. * gcc.target/mips/fix-r4000-9.c (foo): Likewise. * gcc.target/mips/fix-r4000-10.c (foo): Likewise. * gcc.target/mips/fix-r4000-11.c (foo): Likewise. * gcc.target/mips/fix-r4000-12.c (foo): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181761 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite/gcc.target/mips/fix-r4000-2.c')
-rw-r--r--gcc/testsuite/gcc.target/mips/fix-r4000-2.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-2.c b/gcc/testsuite/gcc.target/mips/fix-r4000-2.c
index 4f27041bedb..6cb7d3594e0 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-2.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-2.c
@@ -1,7 +1,7 @@
/* { dg-options "-mips1 -mfix-r4000 -O2 -dp -EB" } */
typedef int int32_t;
typedef long long int64_t;
-int32_t foo (int32_t x, int32_t y) { return ((int64_t) x * y) >> 32; }
+NOMIPS16 int32_t foo (int32_t x, int32_t y) { return ((int64_t) x * y) >> 32; }
/* ??? A highpart pattern would be a better choice, but we currently
don't use them. */
/* { dg-final { scan-assembler "[concat {\tmult\t\$[45],\$[45][^\n]+mulsidi3_32bit_r4000[^\n]+\n\tmflo\t\$3\n\tmfhi\t\$2\n}]" } } */