Merge in trunk.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@206327 138bc75d-0d04-0410-961f-82ee72b054a4

972 files changed, 33774 insertions, 57 deletions

diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp b/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp
index b069c0a4554..195f977c2dc 100644
--- a/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp
+++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp
@@ -1,4 +1,4 @@
-#  Copyright (C) 2009-2013 Free Software Foundation, Inc.
+#  Copyright (C) 2009-2014 Free Software Foundation, Inc.
 #  Contributed by ARM Ltd.
 #
 #  This file is part of GCC.
diff --git a/gcc/testsuite/gcc.target/aarch64/aarch64.exp b/gcc/testsuite/gcc.target/aarch64/aarch64.exp
index 52031d414ff..2cd3b805b75 100644
--- a/gcc/testsuite/gcc.target/aarch64/aarch64.exp
+++ b/gcc/testsuite/gcc.target/aarch64/aarch64.exp
@@ -1,5 +1,5 @@
 #  Specific regression driver for AArch64.
-#  Copyright (C) 2009-2013 Free Software Foundation, Inc.
+#  Copyright (C) 2009-2014 Free Software Foundation, Inc.
 #  Contributed by ARM Ltd.
 #
 #  This file is part of GCC.
diff --git a/gcc/testsuite/gcc.target/aarch64/aes_1.c b/gcc/testsuite/gcc.target/aarch64/aes_1.c
new file mode 100644
index 00000000000..5fa61379ea6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/aes_1.c
@@ -0,0 +1,40 @@
+
+/* { dg-do compile } */
+/* { dg-options "-march=armv8-a+crypto" } */
+
+#include "arm_neon.h"
+
+uint8x16_t
+test_vaeseq_u8 (uint8x16_t data, uint8x16_t key)
+{
+  return vaeseq_u8 (data, key);
+}
+
+/* { dg-final { scan-assembler-times "aese\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */
+
+uint8x16_t
+test_vaesdq_u8 (uint8x16_t data, uint8x16_t key)
+{
+  return vaesdq_u8 (data, key);
+}
+
+/* { dg-final { scan-assembler-times "aesd\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */
+
+uint8x16_t
+test_vaesmcq_u8 (uint8x16_t data)
+{
+  return vaesmcq_u8 (data);
+}
+
+/* { dg-final { scan-assembler-times "aesmc\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */
+
+uint8x16_t
+test_vaesimcq_u8 (uint8x16_t data)
+{
+  return vaesimcq_u8 (data);
+}
+
+/* { dg-final { scan-assembler-times "aesimc\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */
+
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/pmull_1.c b/gcc/testsuite/gcc.target/aarch64/pmull_1.c
new file mode 100644
index 00000000000..bccaec1750e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pmull_1.c
@@ -0,0 +1,23 @@
+
+/* { dg-do compile } */
+/* { dg-options "-march=armv8-a+crypto" } */
+
+#include "arm_neon.h"
+
+poly128_t
+test_vmull_p64 (poly64_t a, poly64_t b)
+{
+  return vmull_p64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "pmull\\tv" 1 } } */
+
+poly128_t
+test_vmull_high_p64 (poly64x2_t a, poly64x2_t b)
+{
+  return vmull_high_p64 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "pmull2\\tv" 1 } } */
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sha1_1.c b/gcc/testsuite/gcc.target/aarch64/sha1_1.c
new file mode 100644
index 00000000000..776753dcd5f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sha1_1.c
@@ -0,0 +1,55 @@
+
+/* { dg-do compile } */
+/* { dg-options "-march=armv8-a+crypto" } */
+
+#include "arm_neon.h"
+
+uint32x4_t
+test_vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
+{
+  return vsha1cq_u32 (hash_abcd, hash_e, wk);
+}
+
+/* { dg-final { scan-assembler-times "sha1c\\tq" 1 } } */
+
+uint32x4_t
+test_vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
+{
+  return vsha1mq_u32 (hash_abcd, hash_e, wk);
+}
+
+/* { dg-final { scan-assembler-times "sha1m\\tq" 1 } } */
+
+uint32x4_t
+test_vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
+{
+  return vsha1pq_u32 (hash_abcd, hash_e, wk);
+}
+
+/* { dg-final { scan-assembler-times "sha1p\\tq" 1 } } */
+
+uint32_t
+test_vsha1h_u32 (uint32_t hash_e)
+{
+  return vsha1h_u32 (hash_e);
+}
+
+/* { dg-final { scan-assembler-times "sha1h\\ts" 1 } } */
+
+uint32x4_t
+test_vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11)
+{
+  return vsha1su0q_u32 (w0_3, w4_7, w8_11);
+}
+
+/* { dg-final { scan-assembler-times "sha1su0\\tv" 1 } } */
+
+uint32x4_t
+test_vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15)
+{
+  return vsha1su1q_u32 (tw0_3, w12_15);
+}
+
+/* { dg-final { scan-assembler-times "sha1su1\\tv" 1 } } */
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sha256_1.c b/gcc/testsuite/gcc.target/aarch64/sha256_1.c
new file mode 100644
index 00000000000..569817eb083
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sha256_1.c
@@ -0,0 +1,40 @@
+
+/* { dg-do compile } */
+/* { dg-options "-march=armv8-a+crypto" } */
+
+#include "arm_neon.h"
+
+uint32x4_t
+test_vsha256hq_u32 (uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk)
+{
+  return vsha256hq_u32 (hash_abcd, hash_efgh, wk);
+}
+
+/* { dg-final { scan-assembler-times "sha256h\\tq" 1 } } */
+
+uint32x4_t
+test_vsha256h2q_u32 (uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk)
+{
+  return vsha256h2q_u32 (hash_efgh, hash_abcd, wk);
+}
+
+/* { dg-final { scan-assembler-times "sha256h2\\tq" 1 } } */
+
+uint32x4_t
+test_vsha256su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7)
+{
+  return vsha256su0q_u32 (w0_3, w4_7);
+}
+
+/* { dg-final { scan-assembler-times "sha256su0\\tv" 1 } } */
+
+uint32x4_t
+test_vsha256su1q_u32 (uint32x4_t tw0_3, uint32x4_t w8_11, uint32x4_t w12_15)
+{
+  return vsha256su1q_u32 (tw0_3, w8_11, w12_15);
+}
+
+/* { dg-final { scan-assembler-times "sha256su1\\tv" 1 } } */
+
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/alpha/alpha.exp b/gcc/testsuite/gcc.target/alpha/alpha.exp
index dcbc23c4135..bd107c8df48 100644
--- a/gcc/testsuite/gcc.target/alpha/alpha.exp
+++ b/gcc/testsuite/gcc.target/alpha/alpha.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2005-2013 Free Software Foundation, Inc.
+#   Copyright (C) 2005-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/arc/arc.exp b/gcc/testsuite/gcc.target/arc/arc.exp
index 83e2762e64a..ec7c7381ca3 100644
--- a/gcc/testsuite/gcc.target/arc/arc.exp
+++ b/gcc/testsuite/gcc.target/arc/arc.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2007, 2011, 2012 Free Software Foundation, Inc.
+# Copyright (C) 2007-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/aapcs.exp b/gcc/testsuite/gcc.target/arm/aapcs/aapcs.exp
index 4c04b301cc2..746429dadf6 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/aapcs.exp
+++ b/gcc/testsuite/gcc.target/arm/aapcs/aapcs.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 1997-2013 Free Software Foundation, Inc.
+# Copyright (C) 1997-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/arm/acle/acle.exp b/gcc/testsuite/gcc.target/arm/acle/acle.exp
new file mode 100644
index 00000000000..c8622697ee3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/acle/acle.exp
@@ -0,0 +1,35 @@
+# Copyright (C) 2013-2014 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't an ARM target.
+if ![istarget arm*-*-*] then {
+  return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \
+	"" ""
+
+# All done.
+dg-finish
diff --git a/gcc/testsuite/gcc.target/arm/acle/crc32b.c b/gcc/testsuite/gcc.target/arm/acle/crc32b.c
new file mode 100644
index 00000000000..d6f35e9fd8f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/acle/crc32b.c
@@ -0,0 +1,20 @@
+/* Test the crc32b ACLE intrinsic.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crc_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crc } */
+
+#include "arm_acle.h"
+
+void test_crc32b (void)
+{
+  uint32_t out_uint32_t;
+  uint32_t arg0_uint32_t;
+  uint8_t arg1_uint8_t;
+
+  out_uint32_t = __crc32b (arg0_uint32_t, arg1_uint8_t);
+}
+
+/* { dg-final { scan-assembler "crc32b\t...?, ...?, ...?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/acle/crc32cb.c b/gcc/testsuite/gcc.target/arm/acle/crc32cb.c
new file mode 100644
index 00000000000..44aea21fcf9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/acle/crc32cb.c
@@ -0,0 +1,20 @@
+/* Test the crc32cb ACLE intrinsic.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crc_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crc } */
+
+#include "arm_acle.h"
+
+void test_crc32cb (void)
+{
+  uint32_t out_uint32_t;
+  uint32_t arg0_uint32_t;
+  uint8_t arg1_uint8_t;
+
+  out_uint32_t = __crc32cb (arg0_uint32_t, arg1_uint8_t);
+}
+
+/* { dg-final { scan-assembler "crc32cb\t...?, ...?, ...?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/acle/crc32cd.c b/gcc/testsuite/gcc.target/arm/acle/crc32cd.c
new file mode 100644
index 00000000000..cb7ee0df0a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/acle/crc32cd.c
@@ -0,0 +1,20 @@
+/* Test the crc32cd ACLE intrinsic.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crc_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crc } */
+
+#include "arm_acle.h"
+
+void test_crc32cd (void)
+{
+  uint32_t out_uint32_t;
+  uint32_t arg0_uint32_t;
+  uint64_t arg1_uint64_t;
+
+  out_uint32_t = __crc32cd (arg0_uint32_t, arg1_uint64_t);
+}
+
+/* { dg-final { scan-assembler-times "crc32cw\t...?, ...?, ...?\n" 2 } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/acle/crc32ch.c b/gcc/testsuite/gcc.target/arm/acle/crc32ch.c
new file mode 100644
index 00000000000..d8e73389433
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/acle/crc32ch.c
@@ -0,0 +1,20 @@
+/* Test the crc32ch ACLE intrinsic.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crc_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crc } */
+
+#include "arm_acle.h"
+
+void test_crc32ch (void)
+{
+  uint32_t out_uint32_t;
+  uint32_t arg0_uint32_t;
+  uint16_t arg1_uint16_t;
+
+  out_uint32_t = __crc32ch (arg0_uint32_t, arg1_uint16_t);
+}
+
+/* { dg-final { scan-assembler "crc32ch\t...?, ...?, ...?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/acle/crc32cw.c b/gcc/testsuite/gcc.target/arm/acle/crc32cw.c
new file mode 100644
index 00000000000..84384c5d540
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/acle/crc32cw.c
@@ -0,0 +1,20 @@
+/* Test the crc32cw ACLE intrinsic.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crc_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crc } */
+
+#include "arm_acle.h"
+
+void test_crc32cw (void)
+{
+  uint32_t out_uint32_t;
+  uint32_t arg0_uint32_t;
+  uint32_t arg1_uint32_t;
+
+  out_uint32_t = __crc32cw (arg0_uint32_t, arg1_uint32_t);
+}
+
+/* { dg-final { scan-assembler "crc32cw\t...?, ...?, ...?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/acle/crc32d.c b/gcc/testsuite/gcc.target/arm/acle/crc32d.c
new file mode 100644
index 00000000000..c90fad9a7a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/acle/crc32d.c
@@ -0,0 +1,20 @@
+/* Test the crc32d ACLE intrinsic.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crc_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crc } */
+
+#include "arm_acle.h"
+
+void test_crc32d (void)
+{
+  uint32_t out_uint32_t;
+  uint32_t arg0_uint32_t;
+  uint64_t arg1_uint64_t;
+
+  out_uint32_t = __crc32d (arg0_uint32_t, arg1_uint64_t);
+}
+
+/* { dg-final { scan-assembler-times "crc32w\t...?, ...?, ...?\n" 2 } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/acle/crc32h.c b/gcc/testsuite/gcc.target/arm/acle/crc32h.c
new file mode 100644
index 00000000000..c21a4ae3e31
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/acle/crc32h.c
@@ -0,0 +1,20 @@
+/* Test the crc32h ACLE intrinsic.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crc_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crc } */
+
+#include "arm_acle.h"
+
+void test_crc32h (void)
+{
+  uint32_t out_uint32_t;
+  uint32_t arg0_uint32_t;
+  uint16_t arg1_uint16_t;
+
+  out_uint32_t = __crc32h (arg0_uint32_t, arg1_uint16_t);
+}
+
+/* { dg-final { scan-assembler "crc32h\t...?, ...?, ...?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/acle/crc32w.c b/gcc/testsuite/gcc.target/arm/acle/crc32w.c
new file mode 100644
index 00000000000..60cd09e4be5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/acle/crc32w.c
@@ -0,0 +1,20 @@
+/* Test the crc32w ACLE intrinsic.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crc_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crc } */
+
+#include "arm_acle.h"
+
+void test_crc32w (void)
+{
+  uint32_t out_uint32_t;
+  uint32_t arg0_uint32_t;
+  uint32_t arg1_uint32_t;
+
+  out_uint32_t = __crc32w (arg0_uint32_t, arg1_uint32_t);
+}
+
+/* { dg-final { scan-assembler "crc32w\t...?, ...?, ...?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/arm.exp b/gcc/testsuite/gcc.target/arm/arm.exp
index fa7ce036253..54ff2370ab0 100644
--- a/gcc/testsuite/gcc.target/arm/arm.exp
+++ b/gcc/testsuite/gcc.target/arm/arm.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 1997-2013 Free Software Foundation, Inc.
+# Copyright (C) 1997-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vaesdq_u8.c b/gcc/testsuite/gcc.target/arm/crypto-vaesdq_u8.c
new file mode 100644
index 00000000000..e0b25b93cf8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vaesdq_u8.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint8x16_t a, b, c;
+  int i = 0;
+
+  for (i = 0; i < 16; ++i)
+    {
+      a[i] = i;
+      b[i] = 15 - i;
+    }
+  c = vaesdq_u8 (a, b);
+  return c[0];
+}
+
+/* { dg-final { scan-assembler "aesd.8\tq\[0-9\]+, q\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vaeseq_u8.c b/gcc/testsuite/gcc.target/arm/crypto-vaeseq_u8.c
new file mode 100644
index 00000000000..f47864662eb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vaeseq_u8.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint8x16_t a, b, c;
+  int i = 0;
+
+  for (i = 0; i < 16; ++i)
+    {
+      a[i] = i;
+      b[i] = 15 - i;
+    }
+  c = vaeseq_u8 (a, b);
+  return c[0];
+}
+
+/* { dg-final { scan-assembler "aese.8\tq\[0-9\]+, q\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vaesimcq_u8.c b/gcc/testsuite/gcc.target/arm/crypto-vaesimcq_u8.c
new file mode 100644
index 00000000000..fbbfda609fc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vaesimcq_u8.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint8x16_t a, b;
+  int i = 0;
+
+  for (i = 0; i < 16; ++i)
+    a[i] = i;
+
+  b = vaesimcq_u8 (a);
+  return b[0];
+}
+
+/* { dg-final { scan-assembler "aesimc.8\tq\[0-9\]+, q\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vaesmcq_u8.c b/gcc/testsuite/gcc.target/arm/crypto-vaesmcq_u8.c
new file mode 100644
index 00000000000..cae8bd096b8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vaesmcq_u8.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint8x16_t a, b;
+  int i = 0;
+
+  for (i = 0; i < 16; ++i)
+    a[i] = i;
+
+  b = vaesmcq_u8 (a);
+  return b[0];
+}
+
+/* { dg-final { scan-assembler "aesmc.8\tq\[0-9\]+, q\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vldrq_p128.c b/gcc/testsuite/gcc.target/arm/crypto-vldrq_p128.c
new file mode 100644
index 00000000000..96c0e9a755a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vldrq_p128.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+poly128_t
+foo (poly128_t* ptr)
+{
+  return vldrq_p128 (ptr);
+}
+
+/* { dg-final { scan-assembler "vld1.64\t{d\[0-9\]+-d\[0-9\]+}.*" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vmull_high_p64.c b/gcc/testsuite/gcc.target/arm/crypto-vmull_high_p64.c
new file mode 100644
index 00000000000..1290f31a6a7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vmull_high_p64.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+poly128_t
+foo (void)
+{
+  poly64x2_t a = { 0xdeadbeef, 0xadabcaca };
+  poly64x2_t b = { 0xdcdcdcdc, 0xbdbdbdbd };
+  return vmull_high_p64 (a, b);
+}
+
+/* { dg-final { scan-assembler "vmull.p64.*" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vmullp64.c b/gcc/testsuite/gcc.target/arm/crypto-vmullp64.c
new file mode 100644
index 00000000000..b788dca52ff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vmullp64.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+poly128_t
+foo (void)
+{
+  poly64_t a = 0xdeadbeef;
+  poly64_t b = 0xadadadad;
+  return vmull_p64 (a, b);
+}
+
+/* { dg-final { scan-assembler "vmull.p64.*" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c
new file mode 100644
index 00000000000..4dc9dee6617
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint32_t hash = 0xdeadbeef;
+  uint32x4_t a = {0, 1, 2, 3};
+  uint32x4_t b = {3, 2, 1, 0};
+
+  uint32x4_t res = vsha1cq_u32 (a, hash, b);
+  return res[0];
+}
+
+/* { dg-final { scan-assembler "sha1c.32\tq\[0-9\]+, q\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c
new file mode 100644
index 00000000000..dee27748524
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint32_t val = 0xdeadbeef;
+  return vsha1h_u32 (val);
+}
+
+/* { dg-final { scan-assembler "sha1h.32\tq\[0-9\]+, q\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c
new file mode 100644
index 00000000000..672b93a9747
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint32_t hash = 0xdeadbeef;
+  uint32x4_t a = {0, 1, 2, 3};
+  uint32x4_t b = {3, 2, 1, 0};
+
+  uint32x4_t res = vsha1mq_u32 (a, hash, b);
+  return res[0];
+}
+
+/* { dg-final { scan-assembler "sha1m.32\tq\[0-9\]+, q\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c
new file mode 100644
index 00000000000..ff508e0dc7f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint32_t hash = 0xdeadbeef;
+  uint32x4_t a = {0, 1, 2, 3};
+  uint32x4_t b = {3, 2, 1, 0};
+
+  uint32x4_t res = vsha1pq_u32 (a, hash, b);
+  return res[0];
+}
+
+/* { dg-final { scan-assembler "sha1p.32\tq\[0-9\]+, q\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1su0q_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha1su0q_u32.c
new file mode 100644
index 00000000000..4435d1800b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1su0q_u32.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint32x4_t a = {0xd, 0xe, 0xa, 0xd};
+  uint32x4_t b = {0, 1, 2, 3};
+  uint32x4_t c = {3, 2, 1, 0};
+
+  uint32x4_t res = vsha1su0q_u32 (a, b, c);
+  return res[0];
+}
+
+/* { dg-final { scan-assembler "sha1su0.32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha1su1q_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha1su1q_u32.c
new file mode 100644
index 00000000000..8610c4de269
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vsha1su1q_u32.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint32x4_t a = {0xd, 0xe, 0xa, 0xd};
+  uint32x4_t b = {0, 1, 2, 3};
+
+  uint32x4_t res = vsha1su1q_u32 (a, b);
+  return res[0];
+}
+
+/* { dg-final { scan-assembler "sha1su1.32\tq\[0-9\]+, q\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha256h2q_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha256h2q_u32.c
new file mode 100644
index 00000000000..4a3e2e15835
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vsha256h2q_u32.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint32x4_t a = {0xd, 0xe, 0xa, 0xd};
+  uint32x4_t b = {0, 1, 2, 3};
+  uint32x4_t c = {3, 2, 1, 0};
+
+  uint32x4_t res = vsha256h2q_u32 (a, b, c);
+  return res[0];
+}
+
+/* { dg-final { scan-assembler "sha256h2.32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha256hq_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha256hq_u32.c
new file mode 100644
index 00000000000..49577f2b724
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vsha256hq_u32.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint32x4_t a = {0xd, 0xe, 0xa, 0xd};
+  uint32x4_t b = {0, 1, 2, 3};
+  uint32x4_t c = {3, 2, 1, 0};
+
+  uint32x4_t res = vsha256hq_u32 (a, b, c);
+  return res[0];
+}
+
+/* { dg-final { scan-assembler "sha256h.32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha256su0q_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha256su0q_u32.c
new file mode 100644
index 00000000000..cc4305d38b5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vsha256su0q_u32.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint32x4_t a = {0xd, 0xe, 0xa, 0xd};
+  uint32x4_t b = {0, 1, 2, 3};
+
+  uint32x4_t res = vsha256su0q_u32 (a, b);
+  return res[0];
+}
+
+/* { dg-final { scan-assembler "sha256su0.32\tq\[0-9\]+, q\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vsha256su1q_u32.c b/gcc/testsuite/gcc.target/arm/crypto-vsha256su1q_u32.c
new file mode 100644
index 00000000000..430f38adc0f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vsha256su1q_u32.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+int
+foo (void)
+{
+  uint32x4_t a = {0xd, 0xe, 0xa, 0xd};
+  uint32x4_t b = {0, 1, 2, 3};
+  uint32x4_t c = {3, 2, 1, 0};
+
+  uint32x4_t res = vsha256su1q_u32 (a, b, c);
+  return res[0];
+}
+
+/* { dg-final { scan-assembler "sha256su1.32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]" } } */
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vstrq_p128.c b/gcc/testsuite/gcc.target/arm/crypto-vstrq_p128.c
new file mode 100644
index 00000000000..acd8af34f66
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vstrq_p128.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void
+foo (poly128_t* ptr, poly128_t val)
+{
+  vstrq_p128 (ptr, val);
+}
+
+/* { dg-final { scan-assembler "vst1.64\t{d\[0-9\]+-d\[0-9\]+}.*" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fixed_float_conversion.c b/gcc/testsuite/gcc.target/arm/fixed_float_conversion.c
new file mode 100644
index 00000000000..a8befd0fba7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fixed_float_conversion.c
@@ -0,0 +1,19 @@
+/* Check that vcvt is used for fixed and float data conversions.  */
+/* { dg-do compile } */
+/* { dg-options "-O1 -mfpu=vfp3" } */
+/* { dg-require-effective-target arm_vfp_ok } */
+
+float
+fixed_to_float (int i)
+{
+  return ((float) i / (1 << 16));
+}
+
+int
+float_to_fixed (float f)
+{
+  return ((int) (f * (1 << 16)));
+}
+
+/* { dg-final { scan-assembler "vcvt.f32.s32" } } */
+/* { dg-final { scan-assembler "vcvt.s32.f32" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon-vceq_p64.c b/gcc/testsuite/gcc.target/arm/neon-vceq_p64.c
new file mode 100644
index 00000000000..21a6a78a221
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon-vceq_p64.c
@@ -0,0 +1,38 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-require-effective-target arm_neon_hw } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+#include <stdio.h>
+
+extern void abort (void);
+
+int
+main (void)
+{
+  uint64_t args[] = { 0x0, 0xdeadbeef, ~0xdeadbeef, 0xffff,
+                      ~0xffff, 0xffffffff, ~0xffffffff, ~0x0 };
+  int i, j;
+
+  for (i = 0; i < sizeof (args) / sizeof (args[0]); ++i)
+    {
+       for (j = 0; j < sizeof (args) / sizeof (args[0]); ++j)
+         {
+           uint64_t a1 = args[i];
+           uint64_t a2 = args[j];
+           uint64_t res = vceq_p64 (vreinterpret_p64_u64 (a1),
+                                    vreinterpret_p64_u64 (a2));
+           uint64_t exp = (a1 == a2) ? ~0x0 : 0x0;
+
+           if (res != exp)
+             {
+               fprintf (stderr, "vceq_p64 (a1= %lx, a2= %lx)"
+                                " returned %lx, expected %lx\n",
+                                 a1, a2, res, exp);
+               abort ();
+             }
+         }
+    }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/neon-vtst_p64.c b/gcc/testsuite/gcc.target/arm/neon-vtst_p64.c
new file mode 100644
index 00000000000..3a0b117c261
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon-vtst_p64.c
@@ -0,0 +1,38 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-require-effective-target arm_neon_hw } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+#include <stdio.h>
+
+extern void abort (void);
+
+int
+main (void)
+{
+  uint64_t args[] = { 0x0, 0xdeadbeef, ~0xdeadbeef, 0xffff,
+                      ~0xffff, 0xffffffff, ~0xffffffff, ~0x0 };
+  int i, j;
+
+  for (i = 0; i < sizeof (args) / sizeof (args[0]); ++i)
+    {
+       for (j = 0; j < sizeof (args) / sizeof (args[0]); ++j)
+         {
+           uint64_t a1 = args[i];
+           uint64_t a2 = args[j];
+           uint64_t res = vtst_p64 (vreinterpret_p64_u64 (a1),
+                                    vreinterpret_p64_u64 (a2));
+           uint64_t exp = (a1 & a2) ? ~0x0 : 0x0;
+
+           if (res != exp)
+             {
+               fprintf (stderr, "vtst_p64 (a1= %lx, a2= %lx)"
+                                " returned %lx, expected %lx\n",
+                                 a1, a2, res, exp);
+               abort ();
+             }
+         }
+    }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/neon/neon.exp b/gcc/testsuite/gcc.target/arm/neon/neon.exp
index 4c04b301cc2..746429dadf6 100644
--- a/gcc/testsuite/gcc.target/arm/neon/neon.exp
+++ b/gcc/testsuite/gcc.target/arm/neon/neon.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 1997-2013 Free Software Foundation, Inc.
+# Copyright (C) 1997-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c b/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c
new file mode 100644
index 00000000000..519ee370d1f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c
@@ -0,0 +1,22 @@
+/* Test the `vbslQp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vbslQp64 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  uint64x2_t arg0_uint64x2_t;
+  poly64x2_t arg1_poly64x2_t;
+  poly64x2_t arg2_poly64x2_t;
+
+  out_poly64x2_t = vbslq_p64 (arg0_uint64x2_t, arg1_poly64x2_t, arg2_poly64x2_t);
+}
+
+/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslp64.c b/gcc/testsuite/gcc.target/arm/neon/vbslp64.c
new file mode 100644
index 00000000000..51929274dbb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vbslp64.c
@@ -0,0 +1,22 @@
+/* Test the `vbslp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vbslp64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  uint64x1_t arg0_uint64x1_t;
+  poly64x1_t arg1_poly64x1_t;
+  poly64x1_t arg2_poly64x1_t;
+
+  out_poly64x1_t = vbsl_p64 (arg0_uint64x1_t, arg1_poly64x1_t, arg2_poly64x1_t);
+}
+
+/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c b/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c
new file mode 100644
index 00000000000..d5e156bdf34
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c
@@ -0,0 +1,20 @@
+/* Test the `vcombinep64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vcombinep64 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  poly64x1_t arg0_poly64x1_t;
+  poly64x1_t arg1_poly64x1_t;
+
+  out_poly64x2_t = vcombine_p64 (arg0_poly64x1_t, arg1_poly64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c b/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c
new file mode 100644
index 00000000000..7aedb73fcc7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c
@@ -0,0 +1,19 @@
+/* Test the `vcreatep64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vcreatep64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  uint64_t arg0_uint64_t;
+
+  out_poly64x1_t = vcreate_p64 (arg0_uint64_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c
new file mode 100644
index 00000000000..6211413c76c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c
@@ -0,0 +1,19 @@
+/* Test the `vdupQ_lanep64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vdupQ_lanep64 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_poly64x2_t = vdupq_lane_p64 (arg0_poly64x1_t, 0);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c
new file mode 100644
index 00000000000..68a1d746bcc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c
@@ -0,0 +1,19 @@
+/* Test the `vdupQ_np64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vdupQ_np64 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  poly64_t arg0_poly64_t;
+
+  out_poly64x2_t = vdupq_n_p64 (arg0_poly64_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c
new file mode 100644
index 00000000000..ab263f17080
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c
@@ -0,0 +1,19 @@
+/* Test the `vdup_lanep64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vdup_lanep64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_poly64x1_t = vdup_lane_p64 (arg0_poly64x1_t, 0);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c
new file mode 100644
index 00000000000..3b6b7ec312c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c
@@ -0,0 +1,19 @@
+/* Test the `vdup_np64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vdup_np64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  poly64_t arg0_poly64_t;
+
+  out_poly64x1_t = vdup_n_p64 (arg0_poly64_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQp64.c b/gcc/testsuite/gcc.target/arm/neon/vextQp64.c
new file mode 100644
index 00000000000..bc5e08aa783
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vextQp64.c
@@ -0,0 +1,21 @@
+/* Test the `vextQp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vextQp64 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  poly64x2_t arg0_poly64x2_t;
+  poly64x2_t arg1_poly64x2_t;
+
+  out_poly64x2_t = vextq_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 0);
+}
+
+/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextp64.c b/gcc/testsuite/gcc.target/arm/neon/vextp64.c
new file mode 100644
index 00000000000..aa1e91f59bb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vextp64.c
@@ -0,0 +1,21 @@
+/* Test the `vextp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vextp64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  poly64x1_t arg0_poly64x1_t;
+  poly64x1_t arg1_poly64x1_t;
+
+  out_poly64x1_t = vext_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 0);
+}
+
+/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c b/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c
new file mode 100644
index 00000000000..f2b1b7a9e38
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c
@@ -0,0 +1,19 @@
+/* Test the `vget_highp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vget_highp64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_poly64x1_t = vget_high_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c
new file mode 100644
index 00000000000..94cd3a8ab75
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c
@@ -0,0 +1,19 @@
+/* Test the `vget_lowp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vget_lowp64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_poly64x1_t = vget_low_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c
new file mode 100644
index 00000000000..2d504c163ac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c
@@ -0,0 +1,19 @@
+/* Test the `vld1Q_dupp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vld1Q_dupp64 (void)
+{
+  poly64x2_t out_poly64x2_t;
+
+  out_poly64x2_t = vld1q_dup_p64 (0);
+}
+
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c
new file mode 100644
index 00000000000..d19267a4ff8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c
@@ -0,0 +1,20 @@
+/* Test the `vld1Q_lanep64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vld1Q_lanep64 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  poly64x2_t arg1_poly64x2_t;
+
+  out_poly64x2_t = vld1q_lane_p64 (0, arg1_poly64x2_t, 1);
+}
+
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c
new file mode 100644
index 00000000000..99ef8767321
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c
@@ -0,0 +1,19 @@
+/* Test the `vld1Qp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vld1Qp64 (void)
+{
+  poly64x2_t out_poly64x2_t;
+
+  out_poly64x2_t = vld1q_p64 (0);
+}
+
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c
new file mode 100644
index 00000000000..f2b05c5d1e3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c
@@ -0,0 +1,19 @@
+/* Test the `vld1_dupp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vld1_dupp64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+
+  out_poly64x1_t = vld1_dup_p64 (0);
+}
+
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c
new file mode 100644
index 00000000000..cf09f6cd641
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c
@@ -0,0 +1,20 @@
+/* Test the `vld1_lanep64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vld1_lanep64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  poly64x1_t arg1_poly64x1_t;
+
+  out_poly64x1_t = vld1_lane_p64 (0, arg1_poly64x1_t, 0);
+}
+
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p64.c b/gcc/testsuite/gcc.target/arm/neon/vld1p64.c
new file mode 100644
index 00000000000..9f182d4419f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vld1p64.c
@@ -0,0 +1,19 @@
+/* Test the `vld1p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vld1p64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+
+  out_poly64x1_t = vld1_p64 (0);
+}
+
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c
new file mode 100644
index 00000000000..0531a732dea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c
@@ -0,0 +1,19 @@
+/* Test the `vld2_dupp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vld2_dupp64 (void)
+{
+  poly64x1x2_t out_poly64x1x2_t;
+
+  out_poly64x1x2_t = vld2_dup_p64 (0);
+}
+
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p64.c b/gcc/testsuite/gcc.target/arm/neon/vld2p64.c
new file mode 100644
index 00000000000..0a39b37f01a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vld2p64.c
@@ -0,0 +1,19 @@
+/* Test the `vld2p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vld2p64 (void)
+{
+  poly64x1x2_t out_poly64x1x2_t;
+
+  out_poly64x1x2_t = vld2_p64 (0);
+}
+
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c
new file mode 100644
index 00000000000..23bf88aa6d7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c
@@ -0,0 +1,19 @@
+/* Test the `vld3_dupp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vld3_dupp64 (void)
+{
+  poly64x1x3_t out_poly64x1x3_t;
+
+  out_poly64x1x3_t = vld3_dup_p64 (0);
+}
+
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p64.c b/gcc/testsuite/gcc.target/arm/neon/vld3p64.c
new file mode 100644
index 00000000000..cc799289246
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vld3p64.c
@@ -0,0 +1,19 @@
+/* Test the `vld3p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vld3p64 (void)
+{
+  poly64x1x3_t out_poly64x1x3_t;
+
+  out_poly64x1x3_t = vld3_p64 (0);
+}
+
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c
new file mode 100644
index 00000000000..bb15964af0a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c
@@ -0,0 +1,19 @@
+/* Test the `vld4_dupp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vld4_dupp64 (void)
+{
+  poly64x1x4_t out_poly64x1x4_t;
+
+  out_poly64x1x4_t = vld4_dup_p64 (0);
+}
+
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p64.c b/gcc/testsuite/gcc.target/arm/neon/vld4p64.c
new file mode 100644
index 00000000000..b11fb938432
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vld4p64.c
@@ -0,0 +1,19 @@
+/* Test the `vld4p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vld4p64 (void)
+{
+  poly64x1x4_t out_poly64x1x4_t;
+
+  out_poly64x1x4_t = vld4_p64 (0);
+}
+
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c
new file mode 100644
index 00000000000..91cac4df5c5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQf32_p128' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQf32_p128 (void)
+{
+  float32x4_t out_float32x4_t;
+  poly128_t arg0_poly128_t;
+
+  out_float32x4_t = vreinterpretq_f32_p128 (arg0_poly128_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c
new file mode 100644
index 00000000000..96909f677d7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQf32_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQf32_p64 (void)
+{
+  float32x4_t out_float32x4_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_float32x4_t = vreinterpretq_f32_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c
new file mode 100644
index 00000000000..aa7d2e7e7de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp128_f32' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp128_f32 (void)
+{
+  poly128_t out_poly128_t;
+  float32x4_t arg0_float32x4_t;
+
+  out_poly128_t = vreinterpretq_p128_f32 (arg0_float32x4_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c
new file mode 100644
index 00000000000..94f2e9b4afa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp128_p16' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp128_p16 (void)
+{
+  poly128_t out_poly128_t;
+  poly16x8_t arg0_poly16x8_t;
+
+  out_poly128_t = vreinterpretq_p128_p16 (arg0_poly16x8_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c
new file mode 100644
index 00000000000..d32007547e0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp128_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp128_p64 (void)
+{
+  poly128_t out_poly128_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_poly128_t = vreinterpretq_p128_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c
new file mode 100644
index 00000000000..112b0c6e3cc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp128_p8' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp128_p8 (void)
+{
+  poly128_t out_poly128_t;
+  poly8x16_t arg0_poly8x16_t;
+
+  out_poly128_t = vreinterpretq_p128_p8 (arg0_poly8x16_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c
new file mode 100644
index 00000000000..4fa06b2382b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp128_s16' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp128_s16 (void)
+{
+  poly128_t out_poly128_t;
+  int16x8_t arg0_int16x8_t;
+
+  out_poly128_t = vreinterpretq_p128_s16 (arg0_int16x8_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c
new file mode 100644
index 00000000000..5f17cb81309
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp128_s32' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp128_s32 (void)
+{
+  poly128_t out_poly128_t;
+  int32x4_t arg0_int32x4_t;
+
+  out_poly128_t = vreinterpretq_p128_s32 (arg0_int32x4_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c
new file mode 100644
index 00000000000..9b83912b979
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp128_s64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp128_s64 (void)
+{
+  poly128_t out_poly128_t;
+  int64x2_t arg0_int64x2_t;
+
+  out_poly128_t = vreinterpretq_p128_s64 (arg0_int64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c
new file mode 100644
index 00000000000..49e8b74b45a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp128_s8' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp128_s8 (void)
+{
+  poly128_t out_poly128_t;
+  int8x16_t arg0_int8x16_t;
+
+  out_poly128_t = vreinterpretq_p128_s8 (arg0_int8x16_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c
new file mode 100644
index 00000000000..d47429aeb5d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp128_u16' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp128_u16 (void)
+{
+  poly128_t out_poly128_t;
+  uint16x8_t arg0_uint16x8_t;
+
+  out_poly128_t = vreinterpretq_p128_u16 (arg0_uint16x8_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c
new file mode 100644
index 00000000000..57abf79a92e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp128_u32' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp128_u32 (void)
+{
+  poly128_t out_poly128_t;
+  uint32x4_t arg0_uint32x4_t;
+
+  out_poly128_t = vreinterpretq_p128_u32 (arg0_uint32x4_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c
new file mode 100644
index 00000000000..4d04daaaa11
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp128_u64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp128_u64 (void)
+{
+  poly128_t out_poly128_t;
+  uint64x2_t arg0_uint64x2_t;
+
+  out_poly128_t = vreinterpretq_p128_u64 (arg0_uint64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c
new file mode 100644
index 00000000000..ba07bbc8ac3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp128_u8' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp128_u8 (void)
+{
+  poly128_t out_poly128_t;
+  uint8x16_t arg0_uint8x16_t;
+
+  out_poly128_t = vreinterpretq_p128_u8 (arg0_uint8x16_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c
new file mode 100644
index 00000000000..27d0d0afb51
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp16_p128' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp16_p128 (void)
+{
+  poly16x8_t out_poly16x8_t;
+  poly128_t arg0_poly128_t;
+
+  out_poly16x8_t = vreinterpretq_p16_p128 (arg0_poly128_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c
new file mode 100644
index 00000000000..a0a3aaff49e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp16_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp16_p64 (void)
+{
+  poly16x8_t out_poly16x8_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_poly16x8_t = vreinterpretq_p16_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c
new file mode 100644
index 00000000000..9f9b1a4ea1f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp64_f32' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp64_f32 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  float32x4_t arg0_float32x4_t;
+
+  out_poly64x2_t = vreinterpretq_p64_f32 (arg0_float32x4_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c
new file mode 100644
index 00000000000..3f712951359
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp64_p128' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp64_p128 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  poly128_t arg0_poly128_t;
+
+  out_poly64x2_t = vreinterpretq_p64_p128 (arg0_poly128_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c
new file mode 100644
index 00000000000..897b7cd9d00
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp64_p16' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp64_p16 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  poly16x8_t arg0_poly16x8_t;
+
+  out_poly64x2_t = vreinterpretq_p64_p16 (arg0_poly16x8_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c
new file mode 100644
index 00000000000..772b268bf8a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp64_p8' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp64_p8 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  poly8x16_t arg0_poly8x16_t;
+
+  out_poly64x2_t = vreinterpretq_p64_p8 (arg0_poly8x16_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c
new file mode 100644
index 00000000000..29f3f6c1cdf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp64_s16' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp64_s16 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  int16x8_t arg0_int16x8_t;
+
+  out_poly64x2_t = vreinterpretq_p64_s16 (arg0_int16x8_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c
new file mode 100644
index 00000000000..fae22f65ef2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp64_s32' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp64_s32 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  int32x4_t arg0_int32x4_t;
+
+  out_poly64x2_t = vreinterpretq_p64_s32 (arg0_int32x4_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c
new file mode 100644
index 00000000000..8769bc8e6b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp64_s64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp64_s64 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  int64x2_t arg0_int64x2_t;
+
+  out_poly64x2_t = vreinterpretq_p64_s64 (arg0_int64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c
new file mode 100644
index 00000000000..1163cc2b7c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp64_s8' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp64_s8 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  int8x16_t arg0_int8x16_t;
+
+  out_poly64x2_t = vreinterpretq_p64_s8 (arg0_int8x16_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c
new file mode 100644
index 00000000000..f2b53260e03
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp64_u16' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp64_u16 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  uint16x8_t arg0_uint16x8_t;
+
+  out_poly64x2_t = vreinterpretq_p64_u16 (arg0_uint16x8_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c
new file mode 100644
index 00000000000..6b6179ba41f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp64_u32' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp64_u32 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  uint32x4_t arg0_uint32x4_t;
+
+  out_poly64x2_t = vreinterpretq_p64_u32 (arg0_uint32x4_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c
new file mode 100644
index 00000000000..655ffd4fafb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp64_u64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp64_u64 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  uint64x2_t arg0_uint64x2_t;
+
+  out_poly64x2_t = vreinterpretq_p64_u64 (arg0_uint64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c
new file mode 100644
index 00000000000..40b40dd11dd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp64_u8' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp64_u8 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  uint8x16_t arg0_uint8x16_t;
+
+  out_poly64x2_t = vreinterpretq_p64_u8 (arg0_uint8x16_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c
new file mode 100644
index 00000000000..b517a6fdfa6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp8_p128' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp8_p128 (void)
+{
+  poly8x16_t out_poly8x16_t;
+  poly128_t arg0_poly128_t;
+
+  out_poly8x16_t = vreinterpretq_p8_p128 (arg0_poly128_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c
new file mode 100644
index 00000000000..9e70b8a0756
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQp8_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQp8_p64 (void)
+{
+  poly8x16_t out_poly8x16_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_poly8x16_t = vreinterpretq_p8_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c
new file mode 100644
index 00000000000..77bfe3882ad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQs16_p128' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQs16_p128 (void)
+{
+  int16x8_t out_int16x8_t;
+  poly128_t arg0_poly128_t;
+
+  out_int16x8_t = vreinterpretq_s16_p128 (arg0_poly128_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c
new file mode 100644
index 00000000000..41890f32aad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQs16_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQs16_p64 (void)
+{
+  int16x8_t out_int16x8_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_int16x8_t = vreinterpretq_s16_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c
new file mode 100644
index 00000000000..9a179ae3beb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQs32_p128' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQs32_p128 (void)
+{
+  int32x4_t out_int32x4_t;
+  poly128_t arg0_poly128_t;
+
+  out_int32x4_t = vreinterpretq_s32_p128 (arg0_poly128_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c
new file mode 100644
index 00000000000..cc7ad95ea9d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQs32_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQs32_p64 (void)
+{
+  int32x4_t out_int32x4_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_int32x4_t = vreinterpretq_s32_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c
new file mode 100644
index 00000000000..adc1b9bbf0c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQs64_p128' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQs64_p128 (void)
+{
+  int64x2_t out_int64x2_t;
+  poly128_t arg0_poly128_t;
+
+  out_int64x2_t = vreinterpretq_s64_p128 (arg0_poly128_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c
new file mode 100644
index 00000000000..89ab9ccb4b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQs64_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQs64_p64 (void)
+{
+  int64x2_t out_int64x2_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_int64x2_t = vreinterpretq_s64_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c
new file mode 100644
index 00000000000..d94090068e3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQs8_p128' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQs8_p128 (void)
+{
+  int8x16_t out_int8x16_t;
+  poly128_t arg0_poly128_t;
+
+  out_int8x16_t = vreinterpretq_s8_p128 (arg0_poly128_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c
new file mode 100644
index 00000000000..a9adec38704
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQs8_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQs8_p64 (void)
+{
+  int8x16_t out_int8x16_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_int8x16_t = vreinterpretq_s8_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c
new file mode 100644
index 00000000000..792609246c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQu16_p128' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQu16_p128 (void)
+{
+  uint16x8_t out_uint16x8_t;
+  poly128_t arg0_poly128_t;
+
+  out_uint16x8_t = vreinterpretq_u16_p128 (arg0_poly128_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c
new file mode 100644
index 00000000000..7a9b538f232
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQu16_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQu16_p64 (void)
+{
+  uint16x8_t out_uint16x8_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_uint16x8_t = vreinterpretq_u16_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c
new file mode 100644
index 00000000000..ce716b0ab1c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQu32_p128' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQu32_p128 (void)
+{
+  uint32x4_t out_uint32x4_t;
+  poly128_t arg0_poly128_t;
+
+  out_uint32x4_t = vreinterpretq_u32_p128 (arg0_poly128_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c
new file mode 100644
index 00000000000..a8b709e0298
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQu32_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQu32_p64 (void)
+{
+  uint32x4_t out_uint32x4_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_uint32x4_t = vreinterpretq_u32_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c
new file mode 100644
index 00000000000..789973e0a27
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQu64_p128' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQu64_p128 (void)
+{
+  uint64x2_t out_uint64x2_t;
+  poly128_t arg0_poly128_t;
+
+  out_uint64x2_t = vreinterpretq_u64_p128 (arg0_poly128_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c
new file mode 100644
index 00000000000..38071503eaa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQu64_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQu64_p64 (void)
+{
+  uint64x2_t out_uint64x2_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_uint64x2_t = vreinterpretq_u64_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c
new file mode 100644
index 00000000000..54a832cf41c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQu8_p128' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQu8_p128 (void)
+{
+  uint8x16_t out_uint8x16_t;
+  poly128_t arg0_poly128_t;
+
+  out_uint8x16_t = vreinterpretq_u8_p128 (arg0_poly128_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c
new file mode 100644
index 00000000000..3336e6c24e8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretQu8_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretQu8_p64 (void)
+{
+  uint8x16_t out_uint8x16_t;
+  poly64x2_t arg0_poly64x2_t;
+
+  out_uint8x16_t = vreinterpretq_u8_p64 (arg0_poly64x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c
new file mode 100644
index 00000000000..e9714658fc3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretf32_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretf32_p64 (void)
+{
+  float32x2_t out_float32x2_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_float32x2_t = vreinterpret_f32_p64 (arg0_poly64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c
new file mode 100644
index 00000000000..4cd6818db83
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp16_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp16_p64 (void)
+{
+  poly16x4_t out_poly16x4_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_poly16x4_t = vreinterpret_p16_p64 (arg0_poly64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c
new file mode 100644
index 00000000000..d9ecd6f88c8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp64_f32' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp64_f32 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  float32x2_t arg0_float32x2_t;
+
+  out_poly64x1_t = vreinterpret_p64_f32 (arg0_float32x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c
new file mode 100644
index 00000000000..db437279b5b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp64_p16' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp64_p16 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  poly16x4_t arg0_poly16x4_t;
+
+  out_poly64x1_t = vreinterpret_p64_p16 (arg0_poly16x4_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c
new file mode 100644
index 00000000000..1fb0131d8d3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp64_p8' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp64_p8 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  poly8x8_t arg0_poly8x8_t;
+
+  out_poly64x1_t = vreinterpret_p64_p8 (arg0_poly8x8_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c
new file mode 100644
index 00000000000..528db2d57fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp64_s16' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp64_s16 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  int16x4_t arg0_int16x4_t;
+
+  out_poly64x1_t = vreinterpret_p64_s16 (arg0_int16x4_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c
new file mode 100644
index 00000000000..c6887d7e089
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp64_s32' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp64_s32 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  int32x2_t arg0_int32x2_t;
+
+  out_poly64x1_t = vreinterpret_p64_s32 (arg0_int32x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c
new file mode 100644
index 00000000000..f2b04164903
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp64_s64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp64_s64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  int64x1_t arg0_int64x1_t;
+
+  out_poly64x1_t = vreinterpret_p64_s64 (arg0_int64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c
new file mode 100644
index 00000000000..1866d19fb69
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp64_s8' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp64_s8 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  int8x8_t arg0_int8x8_t;
+
+  out_poly64x1_t = vreinterpret_p64_s8 (arg0_int8x8_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c
new file mode 100644
index 00000000000..7903ec26f38
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp64_u16' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp64_u16 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  uint16x4_t arg0_uint16x4_t;
+
+  out_poly64x1_t = vreinterpret_p64_u16 (arg0_uint16x4_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c
new file mode 100644
index 00000000000..3d8e9e40f3e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp64_u32' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp64_u32 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  uint32x2_t arg0_uint32x2_t;
+
+  out_poly64x1_t = vreinterpret_p64_u32 (arg0_uint32x2_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c
new file mode 100644
index 00000000000..caa0464aac1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp64_u64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp64_u64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  uint64x1_t arg0_uint64x1_t;
+
+  out_poly64x1_t = vreinterpret_p64_u64 (arg0_uint64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c
new file mode 100644
index 00000000000..47e1dfa5f4a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp64_u8' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp64_u8 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  uint8x8_t arg0_uint8x8_t;
+
+  out_poly64x1_t = vreinterpret_p64_u8 (arg0_uint8x8_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c
new file mode 100644
index 00000000000..f5eff21abb9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretp8_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretp8_p64 (void)
+{
+  poly8x8_t out_poly8x8_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_poly8x8_t = vreinterpret_p8_p64 (arg0_poly64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c
new file mode 100644
index 00000000000..127865d169b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterprets16_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterprets16_p64 (void)
+{
+  int16x4_t out_int16x4_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_int16x4_t = vreinterpret_s16_p64 (arg0_poly64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c
new file mode 100644
index 00000000000..f8be30b9246
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterprets32_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterprets32_p64 (void)
+{
+  int32x2_t out_int32x2_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_int32x2_t = vreinterpret_s32_p64 (arg0_poly64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c
new file mode 100644
index 00000000000..5f7c17bd33e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterprets64_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterprets64_p64 (void)
+{
+  int64x1_t out_int64x1_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_int64x1_t = vreinterpret_s64_p64 (arg0_poly64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c
new file mode 100644
index 00000000000..8345963ef3a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterprets8_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterprets8_p64 (void)
+{
+  int8x8_t out_int8x8_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_int8x8_t = vreinterpret_s8_p64 (arg0_poly64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c
new file mode 100644
index 00000000000..34f920bbd7a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretu16_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretu16_p64 (void)
+{
+  uint16x4_t out_uint16x4_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_uint16x4_t = vreinterpret_u16_p64 (arg0_poly64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c
new file mode 100644
index 00000000000..b5f24fbc4b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretu32_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretu32_p64 (void)
+{
+  uint32x2_t out_uint32x2_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_uint32x2_t = vreinterpret_u32_p64 (arg0_poly64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c
new file mode 100644
index 00000000000..741912a4ebc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretu64_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretu64_p64 (void)
+{
+  uint64x1_t out_uint64x1_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_uint64x1_t = vreinterpret_u64_p64 (arg0_poly64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c
new file mode 100644
index 00000000000..907b67c157d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c
@@ -0,0 +1,19 @@
+/* Test the `vreinterpretu8_p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vreinterpretu8_p64 (void)
+{
+  uint8x8_t out_uint8x8_t;
+  poly64x1_t arg0_poly64x1_t;
+
+  out_uint8x8_t = vreinterpret_u8_p64 (arg0_poly64x1_t);
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c
new file mode 100644
index 00000000000..cbb47285e46
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c
@@ -0,0 +1,21 @@
+/* Test the `vsliQ_np64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vsliQ_np64 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  poly64x2_t arg0_poly64x2_t;
+  poly64x2_t arg1_poly64x2_t;
+
+  out_poly64x2_t = vsliq_n_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 1);
+}
+
+/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c
new file mode 100644
index 00000000000..801add49be1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c
@@ -0,0 +1,21 @@
+/* Test the `vsli_np64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vsli_np64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  poly64x1_t arg0_poly64x1_t;
+  poly64x1_t arg1_poly64x1_t;
+
+  out_poly64x1_t = vsli_n_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 1);
+}
+
+/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c
new file mode 100644
index 00000000000..d2e48165aa3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c
@@ -0,0 +1,21 @@
+/* Test the `vsriQ_np64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vsriQ_np64 (void)
+{
+  poly64x2_t out_poly64x2_t;
+  poly64x2_t arg0_poly64x2_t;
+  poly64x2_t arg1_poly64x2_t;
+
+  out_poly64x2_t = vsriq_n_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 1);
+}
+
+/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c
new file mode 100644
index 00000000000..0abffc2e0e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c
@@ -0,0 +1,21 @@
+/* Test the `vsri_np64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vsri_np64 (void)
+{
+  poly64x1_t out_poly64x1_t;
+  poly64x1_t arg0_poly64x1_t;
+  poly64x1_t arg1_poly64x1_t;
+
+  out_poly64x1_t = vsri_n_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 1);
+}
+
+/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c
new file mode 100644
index 00000000000..74a198baf81
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c
@@ -0,0 +1,20 @@
+/* Test the `vst1Q_lanep64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vst1Q_lanep64 (void)
+{
+  poly64_t *arg0_poly64_t;
+  poly64x2_t arg1_poly64x2_t;
+
+  vst1q_lane_p64 (arg0_poly64_t, arg1_poly64x2_t, 1);
+}
+
+/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c
new file mode 100644
index 00000000000..7d1e020f111
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c
@@ -0,0 +1,20 @@
+/* Test the `vst1Qp64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vst1Qp64 (void)
+{
+  poly64_t *arg0_poly64_t;
+  poly64x2_t arg1_poly64x2_t;
+
+  vst1q_p64 (arg0_poly64_t, arg1_poly64x2_t);
+}
+
+/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c
new file mode 100644
index 00000000000..f8c70c35952
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c
@@ -0,0 +1,20 @@
+/* Test the `vst1_lanep64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vst1_lanep64 (void)
+{
+  poly64_t *arg0_poly64_t;
+  poly64x1_t arg1_poly64x1_t;
+
+  vst1_lane_p64 (arg0_poly64_t, arg1_poly64x1_t, 0);
+}
+
+/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p64.c b/gcc/testsuite/gcc.target/arm/neon/vst1p64.c
new file mode 100644
index 00000000000..7329fba9d0c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vst1p64.c
@@ -0,0 +1,20 @@
+/* Test the `vst1p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vst1p64 (void)
+{
+  poly64_t *arg0_poly64_t;
+  poly64x1_t arg1_poly64x1_t;
+
+  vst1_p64 (arg0_poly64_t, arg1_poly64x1_t);
+}
+
+/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p64.c b/gcc/testsuite/gcc.target/arm/neon/vst2p64.c
new file mode 100644
index 00000000000..3ccaa5464f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vst2p64.c
@@ -0,0 +1,20 @@
+/* Test the `vst2p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vst2p64 (void)
+{
+  poly64_t *arg0_poly64_t;
+  poly64x1x2_t arg1_poly64x1x2_t;
+
+  vst2_p64 (arg0_poly64_t, arg1_poly64x1x2_t);
+}
+
+/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p64.c b/gcc/testsuite/gcc.target/arm/neon/vst3p64.c
new file mode 100644
index 00000000000..73ced95448f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vst3p64.c
@@ -0,0 +1,20 @@
+/* Test the `vst3p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vst3p64 (void)
+{
+  poly64_t *arg0_poly64_t;
+  poly64x1x3_t arg1_poly64x1x3_t;
+
+  vst3_p64 (arg0_poly64_t, arg1_poly64x1x3_t);
+}
+
+/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p64.c b/gcc/testsuite/gcc.target/arm/neon/vst4p64.c
new file mode 100644
index 00000000000..b9f7b168d2e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon/vst4p64.c
@@ -0,0 +1,20 @@
+/* Test the `vst4p64' ARM Neon intrinsic.  */
+/* This file was autogenerated by neon-testgen.  */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+void test_vst4p64 (void)
+{
+  poly64_t *arg0_poly64_t;
+  poly64x1x4_t arg1_poly64x1x4_t;
+
+  vst4_p64 (arg0_poly64_t, arg1_poly64x1x4_t);
+}
+
+/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/arm/nested-apcs.c b/gcc/testsuite/gcc.target/arm/nested-apcs.c
new file mode 100644
index 00000000000..9dac3043e27
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/nested-apcs.c
@@ -0,0 +1,34 @@
+/* { dg-do run } */
+/* { dg-options "-fno-omit-frame-pointer -mapcs-frame -O" } */
+
+extern void abort (void);
+
+struct x
+{
+  int y;
+  int z;
+};
+
+int __attribute__((noinline)) f (int c, int d, int e, int h, int i)
+{
+  int a;
+  struct x b;
+
+  int __attribute__((noinline)) g (int p, int q, int r, struct x s)
+  {
+    return a + p + q + r + s.y + s.z;
+  }
+
+  a = 5;
+  b.y = h;
+  b.z = i;
+
+  return g(c, d, e, b);
+}
+
+int main(void)
+{
+  if (f (1, 2, 3, 4, 5) != 20)
+    abort();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/avr/avr.exp b/gcc/testsuite/gcc.target/avr/avr.exp
index 5bd182e652b..86a541a0993 100644
--- a/gcc/testsuite/gcc.target/avr/avr.exp
+++ b/gcc/testsuite/gcc.target/avr/avr.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2008-2013 Free Software Foundation, Inc.
+# Copyright (C) 2008-2014 Free Software Foundation, Inc.
 

 # This program is free software; you can redistribute it and/or modify

 # it under the terms of the GNU General Public License as published by

diff --git a/gcc/testsuite/gcc.target/avr/torture/avr-torture.exp b/gcc/testsuite/gcc.target/avr/torture/avr-torture.exp
index c9329879d58..3e5fdfbd426 100644
--- a/gcc/testsuite/gcc.target/avr/torture/avr-torture.exp
+++ b/gcc/testsuite/gcc.target/avr/torture/avr-torture.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2008-2013 Free Software Foundation, Inc.
+#   Copyright (C) 2008-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/bfin/bfin.exp b/gcc/testsuite/gcc.target/bfin/bfin.exp
index 919c66b83c7..a1b6707e299 100644
--- a/gcc/testsuite/gcc.target/bfin/bfin.exp
+++ b/gcc/testsuite/gcc.target/bfin/bfin.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2007-2013 Free Software Foundation, Inc.
+# Copyright (C) 2007-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/bfin/builtins/bfin-builtins.exp b/gcc/testsuite/gcc.target/bfin/builtins/bfin-builtins.exp
index e12ac909cab..6ab9929e484 100644
--- a/gcc/testsuite/gcc.target/bfin/builtins/bfin-builtins.exp
+++ b/gcc/testsuite/gcc.target/bfin/builtins/bfin-builtins.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2009-2013 Free Software Foundation, Inc.
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/cris/cris.exp b/gcc/testsuite/gcc.target/cris/cris.exp
index deb57d14ff2..4a04d1920c8 100644
--- a/gcc/testsuite/gcc.target/cris/cris.exp
+++ b/gcc/testsuite/gcc.target/cris/cris.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2005-2013 Free Software Foundation, Inc.
+#   Copyright (C) 2005-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/cris/torture/cris-torture.exp b/gcc/testsuite/gcc.target/cris/torture/cris-torture.exp
index 4eec2eb829e..cf517fcaf3a 100644
--- a/gcc/testsuite/gcc.target/cris/torture/cris-torture.exp
+++ b/gcc/testsuite/gcc.target/cris/torture/cris-torture.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2005-2013 Free Software Foundation, Inc.
+#   Copyright (C) 2005-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/epiphany/epiphany.exp b/gcc/testsuite/gcc.target/epiphany/epiphany.exp
index b2e4295c4b7..59226ae158e 100644
--- a/gcc/testsuite/gcc.target/epiphany/epiphany.exp
+++ b/gcc/testsuite/gcc.target/epiphany/epiphany.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2007-2013 Free Software Foundation, Inc.
+# Copyright (C) 2007-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/frv/frv.exp b/gcc/testsuite/gcc.target/frv/frv.exp
index 5410b72ea92..b3dcc25915a 100644
--- a/gcc/testsuite/gcc.target/frv/frv.exp
+++ b/gcc/testsuite/gcc.target/frv/frv.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2004-2013 Free Software Foundation, Inc.
+# Copyright (C) 2004-2014 Free Software Foundation, Inc.
 #
 # This file is part of GCC.
 #
diff --git a/gcc/testsuite/gcc.target/h8300/h8300.exp b/gcc/testsuite/gcc.target/h8300/h8300.exp
index 474fc454ce3..8523a128572 100644
--- a/gcc/testsuite/gcc.target/h8300/h8300.exp
+++ b/gcc/testsuite/gcc.target/h8300/h8300.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2013 Free Software Foundation, Inc.
+# Copyright (C) 2013-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
@@ -39,7 +39,7 @@ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \
 
 # All done.
 dg-finish
-# Copyright (C) 2013 Free Software Foundation, Inc.
+# Copyright (C) 2013-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/i386/andor-2.c b/gcc/testsuite/gcc.target/i386/andor-2.c
index 88118aab575..eacc7b1e449 100644
--- a/gcc/testsuite/gcc.target/i386/andor-2.c
+++ b/gcc/testsuite/gcc.target/i386/andor-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -mtune=i686" } */
+/* { dg-options "-O2 -mtune=generic" } */
 
 int h(int x, int y)
 {
diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c b/gcc/testsuite/gcc.target/i386/avx-1.c
index 7496746aec8..72015925b28 100644
--- a/gcc/testsuite/gcc.target/i386/avx-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx-1.c
@@ -166,6 +166,198 @@
 /* rtmintrin.h */
 #define __builtin_ia32_xabort(I) __builtin_ia32_xabort(0)
 
+/* avx512fintrin.h */
+#define __builtin_ia32_addpd512_mask(A, B, C, D, E) __builtin_ia32_addpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_addps512_mask(A, B, C, D, E) __builtin_ia32_addps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_addsd_round(A, B, C) __builtin_ia32_addsd_round(A, B, 1)
+#define __builtin_ia32_addss_round(A, B, C) __builtin_ia32_addss_round(A, B, 1)
+#define __builtin_ia32_alignd512_mask(A, B, F, D, E) __builtin_ia32_alignd512_mask(A, B, 1, D, E)
+#define __builtin_ia32_alignq512_mask(A, B, F, D, E) __builtin_ia32_alignq512_mask(A, B, 1, D, E)
+#define __builtin_ia32_cmpd512_mask(A, B, E, D) __builtin_ia32_cmpd512_mask(A, B, 1, D)
+#define __builtin_ia32_cmppd512_mask(A, B, F, D, E) __builtin_ia32_cmppd512_mask(A, B, 1, D, 5)
+#define __builtin_ia32_cmpps512_mask(A, B, F, D, E) __builtin_ia32_cmpps512_mask(A, B, 1, D, 5)
+#define __builtin_ia32_cmpq512_mask(A, B, E, D) __builtin_ia32_cmpq512_mask(A, B, 1, D)
+#define __builtin_ia32_cmpsd_mask(A, B, F, D, E) __builtin_ia32_cmpsd_mask(A, B, 1, D, 5)
+#define __builtin_ia32_cmpss_mask(A, B, F, D, E) __builtin_ia32_cmpss_mask(A, B, 1, D, 5)
+#define __builtin_ia32_cvtdq2ps512_mask(A, B, C, D) __builtin_ia32_cvtdq2ps512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtpd2dq512_mask(A, B, C, D) __builtin_ia32_cvtpd2dq512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtpd2ps512_mask(A, B, C, D) __builtin_ia32_cvtpd2ps512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtpd2udq512_mask(A, B, C, D) __builtin_ia32_cvtpd2udq512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtps2dq512_mask(A, B, C, D) __builtin_ia32_cvtps2dq512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtps2pd512_mask(A, B, C, D) __builtin_ia32_cvtps2pd512_mask(A, B, C, 5)
+#define __builtin_ia32_cvtps2udq512_mask(A, B, C, D) __builtin_ia32_cvtps2udq512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtsd2ss_round(A, B, C) __builtin_ia32_cvtsd2ss_round(A, B, 1)
+#define __builtin_ia32_cvtss2sd_round(A, B, C) __builtin_ia32_cvtss2sd_round(A, B, 4)
+#define __builtin_ia32_cvtsi2sd64(A, B, C) __builtin_ia32_cvtsi2sd64(A, B, 1)
+#define __builtin_ia32_cvtsi2ss32(A, B, C) __builtin_ia32_cvtsi2ss32(A, B, 1)
+#define __builtin_ia32_cvtsi2ss64(A, B, C) __builtin_ia32_cvtsi2ss64(A, B, 1)
+#define __builtin_ia32_cvttpd2dq512_mask(A, B, C, D) __builtin_ia32_cvttpd2dq512_mask(A, B, C, 5)
+#define __builtin_ia32_cvttpd2udq512_mask(A, B, C, D) __builtin_ia32_cvttpd2udq512_mask(A, B, C, 5)
+#define __builtin_ia32_cvttps2dq512_mask(A, B, C, D) __builtin_ia32_cvttps2dq512_mask(A, B, C, 5)
+#define __builtin_ia32_cvttps2udq512_mask(A, B, C, D) __builtin_ia32_cvttps2udq512_mask(A, B, C, 5)
+#define __builtin_ia32_cvtudq2ps512_mask(A, B, C, D) __builtin_ia32_cvtudq2ps512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtusi2sd64(A, B, C) __builtin_ia32_cvtusi2sd64(A, B, 1)
+#define __builtin_ia32_cvtusi2ss32(A, B, C) __builtin_ia32_cvtusi2ss32(A, B, 1)
+#define __builtin_ia32_cvtusi2ss64(A, B, C) __builtin_ia32_cvtusi2ss64(A, B, 1)
+#define __builtin_ia32_divpd512_mask(A, B, C, D, E) __builtin_ia32_divpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_divps512_mask(A, B, C, D, E) __builtin_ia32_divps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_divsd_round(A, B, C) __builtin_ia32_divsd_round(A, B, 1)
+#define __builtin_ia32_divss_round(A, B, C) __builtin_ia32_divss_round(A, B, 1)
+#define __builtin_ia32_extractf32x4_mask(A, E, C, D) __builtin_ia32_extractf32x4_mask(A, 1, C, D)
+#define __builtin_ia32_extractf64x4_mask(A, E, C, D) __builtin_ia32_extractf64x4_mask(A, 1, C, D)
+#define __builtin_ia32_extracti32x4_mask(A, E, C, D) __builtin_ia32_extracti32x4_mask(A, 1, C, D)
+#define __builtin_ia32_extracti64x4_mask(A, E, C, D) __builtin_ia32_extracti64x4_mask(A, 1, C, D)
+#define __builtin_ia32_fixupimmpd512_mask(A, B, C, I, E, F) __builtin_ia32_fixupimmpd512_mask(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmpd512_maskz(A, B, C, I, E, F) __builtin_ia32_fixupimmpd512_maskz(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmps512_mask(A, B, C, I, E, F) __builtin_ia32_fixupimmps512_mask(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmps512_maskz(A, B, C, I, E, F) __builtin_ia32_fixupimmps512_maskz(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmsd_mask(A, B, C, I, E, F) __builtin_ia32_fixupimmsd_mask(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmsd_maskz(A, B, C, I, E, F) __builtin_ia32_fixupimmsd_maskz(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmss_mask(A, B, C, I, E, F) __builtin_ia32_fixupimmss_mask(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmss_maskz(A, B, C, I, E, F) __builtin_ia32_fixupimmss_maskz(A, B, C, 1, E, 5)
+#define __builtin_ia32_gatherdiv8df(A, B, C, D, F) __builtin_ia32_gatherdiv8df(A, B, C, D, 1)
+#define __builtin_ia32_gatherdiv8di(A, B, C, D, F) __builtin_ia32_gatherdiv8di(A, B, C, D, 1)
+#define __builtin_ia32_gatherdiv16sf(A, B, C, D, F) __builtin_ia32_gatherdiv16sf(A, B, C, D, 1)
+#define __builtin_ia32_gatherdiv16si(A, B, C, D, F) __builtin_ia32_gatherdiv16si(A, B, C, D, 1)
+#define __builtin_ia32_gathersiv16sf(A, B, C, D, F) __builtin_ia32_gathersiv16sf(A, B, C, D, 1)
+#define __builtin_ia32_gathersiv16si(A, B, C, D, F) __builtin_ia32_gathersiv16si(A, B, C, D, 1)
+#define __builtin_ia32_gathersiv8df(A, B, C, D, F) __builtin_ia32_gathersiv8df(A, B, C, D, 1)
+#define __builtin_ia32_gathersiv8di(A, B, C, D, F) __builtin_ia32_gathersiv8di(A, B, C, D, 1)
+#define __builtin_ia32_getexppd512_mask(A, B, C, D) __builtin_ia32_getexppd512_mask(A, B, C, 5)
+#define __builtin_ia32_getexpps512_mask(A, B, C, D) __builtin_ia32_getexpps512_mask(A, B, C, 5)
+#define __builtin_ia32_getexpsd128_round(A, B, C) __builtin_ia32_getexpsd128_round(A, B, 4)
+#define __builtin_ia32_getexpss128_round(A, B, C) __builtin_ia32_getexpss128_round(A, B, 4)
+#define __builtin_ia32_getmantpd512_mask(A, F, C, D, E) __builtin_ia32_getmantpd512_mask(A, 1, C, D, 5)
+#define __builtin_ia32_getmantps512_mask(A, F, C, D, E) __builtin_ia32_getmantps512_mask(A, 1, C, D, 5)
+#define __builtin_ia32_getmantsd_round(A, B, C, D) __builtin_ia32_getmantsd_round(A, B, 1, 4)
+#define __builtin_ia32_getmantss_round(A, B, C, D) __builtin_ia32_getmantss_round(A, B, 1, 4)
+#define __builtin_ia32_insertf32x4_mask(A, B, F, D, E) __builtin_ia32_insertf32x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_insertf64x4_mask(A, B, F, D, E) __builtin_ia32_insertf64x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_inserti32x4_mask(A, B, F, D, E) __builtin_ia32_inserti32x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_inserti64x4_mask(A, B, F, D, E) __builtin_ia32_inserti64x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_maxpd512_mask(A, B, C, D, E) __builtin_ia32_maxpd512_mask(A, B, C, D, 5)
+#define __builtin_ia32_maxps512_mask(A, B, C, D, E) __builtin_ia32_maxps512_mask(A, B, C, D, 5)
+#define __builtin_ia32_maxsd_round(A, B, C) __builtin_ia32_maxsd_round(A, B, 4)
+#define __builtin_ia32_maxss_round(A, B, C) __builtin_ia32_maxss_round(A, B, 4)
+#define __builtin_ia32_minpd512_mask(A, B, C, D, E) __builtin_ia32_minpd512_mask(A, B, C, D, 5)
+#define __builtin_ia32_minps512_mask(A, B, C, D, E) __builtin_ia32_minps512_mask(A, B, C, D, 5)
+#define __builtin_ia32_minsd_round(A, B, C) __builtin_ia32_minsd_round(A, B, 4)
+#define __builtin_ia32_minss_round(A, B, C) __builtin_ia32_minss_round(A, B, 4)
+#define __builtin_ia32_mulpd512_mask(A, B, C, D, E) __builtin_ia32_mulpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_mulps512_mask(A, B, C, D, E) __builtin_ia32_mulps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_mulsd_round(A, B, C) __builtin_ia32_mulsd_round(A, B, 1)
+#define __builtin_ia32_mulss_round(A, B, C) __builtin_ia32_mulss_round(A, B, 1)
+#define __builtin_ia32_permdf512_mask(A, E, C, D) __builtin_ia32_permdf512_mask(A, 1, C, D)
+#define __builtin_ia32_permdi512_mask(A, E, C, D) __builtin_ia32_permdi512_mask(A, 1, C, D)
+#define __builtin_ia32_prold512_mask(A, E, C, D) __builtin_ia32_prold512_mask(A, 1, C, D)
+#define __builtin_ia32_prolq512_mask(A, E, C, D) __builtin_ia32_prolq512_mask(A, 1, C, D)
+#define __builtin_ia32_prord512_mask(A, E, C, D) __builtin_ia32_prord512_mask(A, 1, C, D)
+#define __builtin_ia32_prorq512_mask(A, E, C, D) __builtin_ia32_prorq512_mask(A, 1, C, D)
+#define __builtin_ia32_pshufd512_mask(A, E, C, D) __builtin_ia32_pshufd512_mask(A, 1, C, D)
+#define __builtin_ia32_pslldi512_mask(A, E, C, D) __builtin_ia32_pslldi512_mask(A, 1, C, D)
+#define __builtin_ia32_psllqi512_mask(A, E, C, D) __builtin_ia32_psllqi512_mask(A, 1, C, D)
+#define __builtin_ia32_psradi512_mask(A, E, C, D) __builtin_ia32_psradi512_mask(A, 1, C, D)
+#define __builtin_ia32_psraqi512_mask(A, E, C, D) __builtin_ia32_psraqi512_mask(A, 1, C, D)
+#define __builtin_ia32_psrldi512_mask(A, E, C, D) __builtin_ia32_psrldi512_mask(A, 1, C, D)
+#define __builtin_ia32_psrlqi512_mask(A, E, C, D) __builtin_ia32_psrlqi512_mask(A, 1, C, D)
+#define __builtin_ia32_pternlogd512_mask(A, B, C, F, E) __builtin_ia32_pternlogd512_mask(A, B, C, 1, E)
+#define __builtin_ia32_pternlogd512_maskz(A, B, C, F, E) __builtin_ia32_pternlogd512_maskz(A, B, C, 1, E)
+#define __builtin_ia32_pternlogq512_mask(A, B, C, F, E) __builtin_ia32_pternlogq512_mask(A, B, C, 1, E)
+#define __builtin_ia32_pternlogq512_maskz(A, B, C, F, E) __builtin_ia32_pternlogq512_maskz(A, B, C, 1, E)
+#define __builtin_ia32_rndscalepd_mask(A, F, C, D, E) __builtin_ia32_rndscalepd_mask(A, 1, C, D, 5)
+#define __builtin_ia32_rndscaleps_mask(A, F, C, D, E) __builtin_ia32_rndscaleps_mask(A, 1, C, D, 5)
+#define __builtin_ia32_rndscalesd_round(A, B, C, D) __builtin_ia32_rndscalesd_round(A, B, 1, 4)
+#define __builtin_ia32_rndscaless_round(A, B, C, D) __builtin_ia32_rndscaless_round(A, B, 1, 4)
+#define __builtin_ia32_scalefpd512_mask(A, B, C, D, E) __builtin_ia32_scalefpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_scalefps512_mask(A, B, C, D, E) __builtin_ia32_scalefps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_scalefsd_round(A, B, C) __builtin_ia32_scalefsd_round(A, B, 1)
+#define __builtin_ia32_scalefss_round(A, B, C) __builtin_ia32_scalefss_round(A, B, 1)
+#define __builtin_ia32_scatterdiv8df(A, B, C, D, F) __builtin_ia32_scatterdiv8df(A, B, C, D, 1)
+#define __builtin_ia32_scatterdiv8di(A, B, C, D, F) __builtin_ia32_scatterdiv8di(A, B, C, D, 1)
+#define __builtin_ia32_scatterdiv16sf(A, B, C, D, F) __builtin_ia32_scatterdiv16sf(A, B, C, D, 1)
+#define __builtin_ia32_scatterdiv16si(A, B, C, D, F) __builtin_ia32_scatterdiv16si(A, B, C, D, 1)
+#define __builtin_ia32_scattersiv16sf(A, B, C, D, F) __builtin_ia32_scattersiv16sf(A, B, C, D, 1)
+#define __builtin_ia32_scattersiv16si(A, B, C, D, F) __builtin_ia32_scattersiv16si(A, B, C, D, 1)
+#define __builtin_ia32_scattersiv8df(A, B, C, D, F) __builtin_ia32_scattersiv8df(A, B, C, D, 1)
+#define __builtin_ia32_scattersiv8di(A, B, C, D, F) __builtin_ia32_scattersiv8di(A, B, C, D, 1)
+#define __builtin_ia32_shuf_f32x4_mask(A, B, F, D, E) __builtin_ia32_shuf_f32x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_shuf_f64x2_mask(A, B, F, D, E) __builtin_ia32_shuf_f64x2_mask(A, B, 1, D, E)
+#define __builtin_ia32_shuf_i32x4_mask(A, B, F, D, E) __builtin_ia32_shuf_i32x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_shuf_i64x2_mask(A, B, F, D, E) __builtin_ia32_shuf_i64x2_mask(A, B, 1, D, E)
+#define __builtin_ia32_shufpd512_mask(A, B, F, D, E) __builtin_ia32_shufpd512_mask(A, B, 1, D, E)
+#define __builtin_ia32_shufps512_mask(A, B, F, D, E) __builtin_ia32_shufps512_mask(A, B, 1, D, E)
+#define __builtin_ia32_sqrtpd512_mask(A, B, C, D) __builtin_ia32_sqrtpd512_mask(A, B, C, 1)
+#define __builtin_ia32_sqrtps512_mask(A, B, C, D) __builtin_ia32_sqrtps512_mask(A, B, C, 1)
+#define __builtin_ia32_sqrtss_round(A, B, C) __builtin_ia32_sqrtss_round(A, B, 1)
+#define __builtin_ia32_sqrtsd_round(A, B, C) __builtin_ia32_sqrtsd_round(A, B, 1)
+#define __builtin_ia32_subpd512_mask(A, B, C, D, E) __builtin_ia32_subpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_subps512_mask(A, B, C, D, E) __builtin_ia32_subps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_subsd_round(A, B, C) __builtin_ia32_subsd_round(A, B, 1)
+#define __builtin_ia32_subss_round(A, B, C) __builtin_ia32_subss_round(A, B, 1)
+#define __builtin_ia32_ucmpd512_mask(A, B, E, D) __builtin_ia32_ucmpd512_mask(A, B, 1, D)
+#define __builtin_ia32_ucmpq512_mask(A, B, E, D) __builtin_ia32_ucmpq512_mask(A, B, 1, D)
+#define __builtin_ia32_vcomisd(A, B, C, D) __builtin_ia32_vcomisd(A, B, 1, 5)
+#define __builtin_ia32_vcomiss(A, B, C, D) __builtin_ia32_vcomiss(A, B, 1, 5)
+#define __builtin_ia32_vcvtph2ps512_mask(A, B, C, D) __builtin_ia32_vcvtph2ps512_mask(A, B, C, 5)
+#define __builtin_ia32_vcvtps2ph512_mask(A, E, C, D) __builtin_ia32_vcvtps2ph512_mask(A, 1, C, D)
+#define __builtin_ia32_vcvtsd2si32(A, B) __builtin_ia32_vcvtsd2si32(A, 1)
+#define __builtin_ia32_vcvtsd2si64(A, B) __builtin_ia32_vcvtsd2si64(A, 1)
+#define __builtin_ia32_vcvtsd2usi32(A, B) __builtin_ia32_vcvtsd2usi32(A, 1)
+#define __builtin_ia32_vcvtsd2usi64(A, B) __builtin_ia32_vcvtsd2usi64(A, 1)
+#define __builtin_ia32_vcvtss2si32(A, B) __builtin_ia32_vcvtss2si32(A, 1)
+#define __builtin_ia32_vcvtss2si64(A, B) __builtin_ia32_vcvtss2si64(A, 1)
+#define __builtin_ia32_vcvtss2usi32(A, B) __builtin_ia32_vcvtss2usi32(A, 1)
+#define __builtin_ia32_vcvtss2usi64(A, B) __builtin_ia32_vcvtss2usi64(A, 1)
+#define __builtin_ia32_vcvttsd2si32(A, B) __builtin_ia32_vcvttsd2si32(A, 5)
+#define __builtin_ia32_vcvttsd2si64(A, B) __builtin_ia32_vcvttsd2si64(A, 5)
+#define __builtin_ia32_vcvttsd2usi32(A, B) __builtin_ia32_vcvttsd2usi32(A, 5)
+#define __builtin_ia32_vcvttsd2usi64(A, B) __builtin_ia32_vcvttsd2usi64(A, 5)
+#define __builtin_ia32_vcvttss2si32(A, B) __builtin_ia32_vcvttss2si32(A, 5)
+#define __builtin_ia32_vcvttss2si64(A, B) __builtin_ia32_vcvttss2si64(A, 5)
+#define __builtin_ia32_vcvttss2usi32(A, B) __builtin_ia32_vcvttss2usi32(A, 5)
+#define __builtin_ia32_vcvttss2usi64(A, B) __builtin_ia32_vcvttss2usi64(A, 5)
+#define __builtin_ia32_vfmaddpd512_mask(A, B, C, D, E) __builtin_ia32_vfmaddpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddpd512_mask3(A, B, C, D, E) __builtin_ia32_vfmaddpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddpd512_maskz(A, B, C, D, E) __builtin_ia32_vfmaddpd512_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddps512_mask(A, B, C, D, E) __builtin_ia32_vfmaddps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddps512_mask3(A, B, C, D, E) __builtin_ia32_vfmaddps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddps512_maskz(A, B, C, D, E) __builtin_ia32_vfmaddps512_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsd3_round(A, B, C, D) __builtin_ia32_vfmaddsd3_round(A, B, C, 1)
+#define __builtin_ia32_vfmaddss3_round(A, B, C, D) __builtin_ia32_vfmaddss3_round(A, B, C, 1)
+#define __builtin_ia32_vfmaddsubpd512_mask(A, B, C, D, E) __builtin_ia32_vfmaddsubpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubpd512_mask3(A, B, C, D, E) __builtin_ia32_vfmaddsubpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubpd512_maskz(A, B, C, D, E) __builtin_ia32_vfmaddsubpd512_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubps512_mask(A, B, C, D, E) __builtin_ia32_vfmaddsubps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubps512_mask3(A, B, C, D, E) __builtin_ia32_vfmaddsubps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubps512_maskz(A, B, C, D, E) __builtin_ia32_vfmaddsubps512_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubaddpd512_mask3(A, B, C, D, E) __builtin_ia32_vfmsubaddpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubaddps512_mask3(A, B, C, D, E) __builtin_ia32_vfmsubaddps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubpd512_mask3(A, B, C, D, E) __builtin_ia32_vfmsubpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubps512_mask3(A, B, C, D, E) __builtin_ia32_vfmsubps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubsd3_mask3(A, B, C, D, E) __builtin_ia32_vfmsubsd3_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubss3_mask3(A, B, C, D, E) __builtin_ia32_vfmsubss3_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfnmaddpd512_mask(A, B, C, D, E) __builtin_ia32_vfnmaddpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfnmaddps512_mask(A, B, C, D, E) __builtin_ia32_vfnmaddps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfnmsubpd512_mask(A, B, C, D, E) __builtin_ia32_vfnmsubpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfnmsubpd512_mask3(A, B, C, D, E) __builtin_ia32_vfnmsubpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfnmsubps512_mask(A, B, C, D, E) __builtin_ia32_vfnmsubps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfnmsubps512_mask3(A, B, C, D, E) __builtin_ia32_vfnmsubps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vpermilpd512_mask(A, E, C, D) __builtin_ia32_vpermilpd512_mask(A, 1, C, D)
+#define __builtin_ia32_vpermilps512_mask(A, E, C, D) __builtin_ia32_vpermilps512_mask(A, 1, C, D)
+#define __builtin_ia32_exp2ps_mask(A, B, C, D) __builtin_ia32_exp2ps_mask(A, B, C, 1)
+#define __builtin_ia32_exp2pd_mask(A, B, C, D) __builtin_ia32_exp2pd_mask(A, B, C, 1)
+#define __builtin_ia32_rcp28ps_mask(A, B, C, D) __builtin_ia32_exp2ps_mask(A, B, C, 1)
+#define __builtin_ia32_rcp28pd_mask(A, B, C, D) __builtin_ia32_exp2pd_mask(A, B, C, 1)
+#define __builtin_ia32_rsqrt28ps_mask(A, B, C, D) __builtin_ia32_rsqrt28ps_mask(A, B, C, 1)
+#define __builtin_ia32_rsqrt28pd_mask(A, B, C, D) __builtin_ia32_rsqrt28pd_mask(A, B, C, 1)
+#define __builtin_ia32_gatherpfdps(A, B, C, D, E) __builtin_ia32_gatherpfdps(A, B, C, 1, 1)
+#define __builtin_ia32_gatherpfqps(A, B, C, D, E) __builtin_ia32_gatherpfqps(A, B, C, 1, 1)
+#define __builtin_ia32_scatterpfdps(A, B, C, D, E) __builtin_ia32_scatterpfdps(A, B, C, 1, 1)
+#define __builtin_ia32_scatterpfqps(A, B, C, D, E) __builtin_ia32_scatterpfqps(A, B, C, 1, 1)
+
+/* shaintrin.h */
+#define __builtin_ia32_sha1rnds4(A, B, C) __builtin_ia32_sha1rnds4(A, B, 1)
+
 #include <wmmintrin.h>
 #include <immintrin.h>
 #include <mm3dnow.h>
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-check.h b/gcc/testsuite/gcc.target/i386/avx512cd-check.h
new file mode 100644
index 00000000000..bccf8b48e06
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-check.h
@@ -0,0 +1,46 @@
+#include <stdlib.h>
+#include "cpuid.h"
+#include "m512-check.h"
+#include "avx512f-os-support.h"
+
+static void avx512cd_test (void);
+
+static void __attribute__ ((noinline)) do_test (void)
+{
+  avx512cd_test ();
+}
+
+int
+main ()
+{
+  unsigned int eax, ebx, ecx, edx;
+
+  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+    return 0;
+
+  if ((ecx & bit_OSXSAVE) == (bit_OSXSAVE))
+    {
+      if (__get_cpuid_max (0, NULL) < 7)
+	return 0;
+
+      __cpuid_count (7, 0, eax, ebx, ecx, edx);
+
+      if ((avx512f_os_support ()) && ((ebx & (bit_AVX512CD)) == (bit_AVX512CD)))
+	{
+	  do_test ();
+#ifdef DEBUG
+	  printf ("PASSED\n");
+#endif
+	  return 0;
+	}
+#ifdef DEBUG
+      printf ("SKIPPED\n");
+#endif
+    }
+#ifdef DEBUG
+  else
+    printf ("SKIPPED\n");
+#endif
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vpbroadcastmb2q-1.c b/gcc/testsuite/gcc.target/i386/avx512cd-vpbroadcastmb2q-1.c
new file mode 100644
index 00000000000..036031b7659
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vpbroadcastmb2q-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512cd -O2" } */
+/* { dg-final { scan-assembler "vpbroadcastmb2q\[ \\t\]+\[^\n\]*k\[1-7\]\[^\n\]*%zmm\[0-7\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_broadcastmb_epi64 (m8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vpbroadcastmb2q-2.c b/gcc/testsuite/gcc.target/i386/avx512cd-vpbroadcastmb2q-2.c
new file mode 100644
index 00000000000..05f4bfc4252
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vpbroadcastmb2q-2.c
@@ -0,0 +1,39 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512cd" } */
+/* { dg-require-effective-target avx512cd } */
+
+#define HAVE_512
+#define AVX512CD
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+
+CALC (long long *res, __mmask8 src)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    res[i] = src;
+}
+
+static void
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_q) res;
+  long long res_ref[SIZE];
+  __mmask8 src;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      res.a[i] = -1;
+    }
+
+  res.x = INTRINSIC (_broadcastmb_epi64) (src);
+
+  CALC (res_ref, src);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vpbroadcastmw2d-1.c b/gcc/testsuite/gcc.target/i386/avx512cd-vpbroadcastmw2d-1.c
new file mode 100644
index 00000000000..36abb5e7bc1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vpbroadcastmw2d-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512cd -O2" } */
+/* { dg-final { scan-assembler "vpbroadcastmw2d\[ \\t\]+\[^\n\]*k\[1-7\]\[^\n\]*%zmm\[0-7\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m16;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_broadcastmw_epi32 (m16);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vpbroadcastmw2d-2.c b/gcc/testsuite/gcc.target/i386/avx512cd-vpbroadcastmw2d-2.c
new file mode 100644
index 00000000000..7282110ab37
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vpbroadcastmw2d-2.c
@@ -0,0 +1,39 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512cd" } */
+/* { dg-require-effective-target avx512cd } */
+
+#define HAVE_512
+#define AVX512CD
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+
+CALC (int *res, __mmask16 src)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    res[i] = src;
+}
+
+static void
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_d) res;
+  int res_ref[SIZE];
+  __mmask16 src;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      res.a[i] = -1;
+    }
+
+  res.x = INTRINSIC (_broadcastmw_epi32) (src);
+
+  CALC (res_ref, src);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vpconflictd-1.c b/gcc/testsuite/gcc.target/i386/avx512cd-vpconflictd-1.c
new file mode 100644
index 00000000000..d3f2a258dbf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vpconflictd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512cd -O2" } */
+/* { dg-final { scan-assembler-times "vpconflictd\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpconflictd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpconflictd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m512i res;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_conflict_epi32 (s);
+  res = _mm512_mask_conflict_epi32 (res, 2, s);
+  res = _mm512_maskz_conflict_epi32 (2, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vpconflictd-2.c b/gcc/testsuite/gcc.target/i386/avx512cd-vpconflictd-2.c
new file mode 100644
index 00000000000..16597fbafb0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vpconflictd-2.c
@@ -0,0 +1,60 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512cd" } */
+/* { dg-require-effective-target avx512cd } */
+
+#define HAVE_512
+#define AVX512CD
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *s, int *r)
+{
+  int i, j;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = 0;
+      for (j = 0; j < i; j++)
+	{
+	  r[i] |= s[j] == s[i] ? 1 << j : 0;
+	}
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s, res1, res2, res3;
+  int res_ref[SIZE];
+  MASK_TYPE mask = MASK_VALUE;
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 1234 * (i % 5);
+      res1.a[i] = DEFAULT_VALUE;
+      res2.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_conflict_epi32) (s.x);
+  res2.x = INTRINSIC (_mask_conflict_epi32) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_conflict_epi32) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vpconflictq-1.c b/gcc/testsuite/gcc.target/i386/avx512cd-vpconflictq-1.c
new file mode 100644
index 00000000000..795fa6add48
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vpconflictq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512cd -O2" } */
+/* { dg-final { scan-assembler-times "vpconflictq\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpconflictq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vpconflictq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m512i res;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_conflict_epi64 (s);
+  res = _mm512_mask_conflict_epi64 (res, 2, s);
+  res = _mm512_maskz_conflict_epi64 (2, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vpconflictq-2.c b/gcc/testsuite/gcc.target/i386/avx512cd-vpconflictq-2.c
new file mode 100644
index 00000000000..a2695195c48
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vpconflictq-2.c
@@ -0,0 +1,60 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512cd" } */
+/* { dg-require-effective-target avx512cd } */
+
+#define HAVE_512
+#define AVX512CD
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (long long *s, long long *r)
+{
+  int i, j;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = 0;
+      for (j = 0; j < i; j++)
+	{
+	  r[i] |= s[i] == s[j] ? 1 << j : 0;
+	}
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s, res1, res2, res3;
+  long long res_ref[SIZE];
+  MASK_TYPE mask = MASK_VALUE;
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 12345678 * (i % 5);
+      res1.a[i] = DEFAULT_VALUE;
+      res2.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_conflict_epi64) (s.x);
+  res2.x = INTRINSIC (_mask_conflict_epi64) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_conflict_epi64) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vplzcntd-1.c b/gcc/testsuite/gcc.target/i386/avx512cd-vplzcntd-1.c
new file mode 100644
index 00000000000..65a2a32751a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vplzcntd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512cd -O2" } */
+/* { dg-final { scan-assembler-times "vplzcntd\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vplzcntd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1} } */
+/* { dg-final { scan-assembler-times "vplzcntd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m512i res;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_lzcnt_epi32 (s);
+  res = _mm512_mask_lzcnt_epi32 (res, 2, s);
+  res = _mm512_maskz_lzcnt_epi32 (2, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vplzcntd-2.c b/gcc/testsuite/gcc.target/i386/avx512cd-vplzcntd-2.c
new file mode 100644
index 00000000000..0a357b69fa6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vplzcntd-2.c
@@ -0,0 +1,60 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512cd" } */
+/* { dg-require-effective-target avx512cd } */
+
+#define HAVE_512
+#define AVX512CD
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include <strings.h>
+
+static void
+CALC (int *s, int *r)
+{
+  int i, res;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      res = 0;
+      while ((res < 32) && (((s[i] >> (31 - res)) & 1) == 0))
+	++res;
+      r[i] = res;
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s, res1, res2, res3;
+  int res_ref[SIZE];
+  MASK_TYPE mask = MASK_VALUE;
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 12345678 * (i % 5);
+      res1.a[i] = DEFAULT_VALUE;
+      res2.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_lzcnt_epi32) (s.x);
+  res2.x = INTRINSIC (_mask_lzcnt_epi32) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_lzcnt_epi32) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vplzcntq-1.c b/gcc/testsuite/gcc.target/i386/avx512cd-vplzcntq-1.c
new file mode 100644
index 00000000000..0324cd0c2be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vplzcntq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512cd -O2" } */
+/* { dg-final { scan-assembler-times "vplzcntq\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vplzcntq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vplzcntq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m512i res;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_lzcnt_epi64 (s);
+  res = _mm512_maskz_lzcnt_epi64 (2, s);
+  res = _mm512_mask_lzcnt_epi64 (res, 2, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vplzcntq-2.c b/gcc/testsuite/gcc.target/i386/avx512cd-vplzcntq-2.c
new file mode 100644
index 00000000000..f0cc40304c9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vplzcntq-2.c
@@ -0,0 +1,60 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512cd" } */
+/* { dg-require-effective-target avx512cd } */
+
+#define HAVE_512
+#define AVX512CD
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include <strings.h>
+
+static void
+CALC (long long *s, long long *r)
+{
+  int i, res;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      res = 0;
+      while ((res < 64) && (((s[i] >> (63 - res)) & 1) == 0))
+	++res;
+      r[i] = res;
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s, res1, res2, res3;
+  long long res_ref[SIZE];
+  MASK_TYPE mask = MASK_VALUE;
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 12345678 * (i % 5);
+      res1.a[i] = DEFAULT_VALUE;
+      res2.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_lzcnt_epi64) (s.x);
+  res2.x = INTRINSIC (_mask_lzcnt_epi64) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_lzcnt_epi64) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vptestnmd-1.c b/gcc/testsuite/gcc.target/i386/avx512cd-vptestnmd-1.c
new file mode 100644
index 00000000000..39797a8fca4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vptestnmd-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512cd -O2" } */
+/* { dg-final { scan-assembler-times "vptestnmd\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n^k\]*k\[1-7\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vptestnmd\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n^k\]*k\[1-7\]\{" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m16;
+
+void extern
+avx512cd_test (void)
+{
+  m16 = _mm512_testn_epi32_mask (x, x);
+  m16 = _mm512_mask_testn_epi32_mask (3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vptestnmd-2.c b/gcc/testsuite/gcc.target/i386/avx512cd-vptestnmd-2.c
new file mode 100644
index 00000000000..567e164044c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vptestnmd-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512cd" } */
+/* { dg-require-effective-target avx512cd } */
+
+#define AVX512CD
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (MASK_TYPE *res, int *src1, int *src2)
+{
+  int i;
+  *res = 0;
+  MASK_TYPE one = 1;
+
+  for (i = 0; i < SIZE; i++)
+    if (!(src1[i] & src2[i]))
+      *res = *res | one << i;
+}
+
+static void
+TEST (void)
+{
+  int i, sign = 1;
+  UNION_TYPE (AVX512F_LEN, i_d) src1, src2;
+  MASK_TYPE res_ref, res1, res2;
+  MASK_TYPE mask = MASK_VALUE;
+  res1 = 0;
+  res2 = 0;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = i * i * sign;
+      src2.a[i] = i + 20;
+      sign = -sign;
+    }
+
+  res1 = INTRINSIC (_testn_epi32_mask) (src1.x, src2.x);
+  res2 = INTRINSIC (_mask_testn_epi32_mask) (mask, src1.x, src2.x);
+
+  CALC (&res_ref, src1.a, src2.a);
+
+  if (res1 != res_ref)
+    abort ();
+
+  res_ref &= mask;
+
+  if (res2 != res_ref)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vptestnmq-1.c b/gcc/testsuite/gcc.target/i386/avx512cd-vptestnmq-1.c
new file mode 100644
index 00000000000..dd68612ad43
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vptestnmq-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512cd -O2" } */
+/* { dg-final { scan-assembler-times "vptestnmq\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n^k\]*k\[1-7\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vptestnmq\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n^k\]*k\[1-7\]\{" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m8;
+
+void extern
+avx512cd_test (void)
+{
+  m8 = _mm512_testn_epi64_mask (x, x);
+  m8 = _mm512_mask_testn_epi64_mask (3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512cd-vptestnmq-2.c b/gcc/testsuite/gcc.target/i386/avx512cd-vptestnmq-2.c
new file mode 100644
index 00000000000..ff9f011427e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512cd-vptestnmq-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512cd" } */
+/* { dg-require-effective-target avx512cd } */
+
+#define AVX512CD
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (MASK_TYPE *res, long long *src1, long long *src2)
+{
+  int i;
+  *res = 0;
+  MASK_TYPE one = 1;
+
+  for (i = 0; i < SIZE; i++)
+    if (!(src1[i] & src2[i]))
+      *res = *res | one << i;
+}
+
+static void
+TEST (void)
+{
+  int i, sign = 1;
+  UNION_TYPE (AVX512F_LEN, i_q) src1, src2;
+  MASK_TYPE res_ref, res1, res2;
+  MASK_TYPE mask = MASK_VALUE;
+  res1 = 0;
+  res2 = 0;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = i * i * sign;
+      src2.a[i] = i + 20;
+      sign = -sign;
+    }
+
+  res1 = INTRINSIC (_testn_epi64_mask) (src1.x, src2.x);
+  res2 = INTRINSIC (_mask_testn_epi64_mask) (mask, src1.x, src2.x);
+
+  CALC (&res_ref, src1.a, src2.a);
+
+  if (res1 != res_ref)
+    abort ();
+
+  res_ref &= mask;
+
+  if (res2 != res_ref)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-check.h b/gcc/testsuite/gcc.target/i386/avx512er-check.h
new file mode 100644
index 00000000000..34440d346b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-check.h
@@ -0,0 +1,46 @@
+#include <stdlib.h>
+#include "cpuid.h"
+#include "m512-check.h"
+#include "avx512f-os-support.h"
+
+static void avx512er_test (void);
+
+static void __attribute__ ((noinline)) do_test (void)
+{
+  avx512er_test ();
+}
+
+int
+main ()
+{
+  unsigned int eax, ebx, ecx, edx;
+
+  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+    return 0;
+
+  if ((ecx & bit_OSXSAVE) == (bit_OSXSAVE))
+    {
+      if (__get_cpuid_max (0, NULL) < 7)
+	return 0;
+
+      __cpuid_count (7, 0, eax, ebx, ecx, edx);
+
+      if ((avx512f_os_support ()) && ((ebx & bit_AVX512ER) == bit_AVX512ER))
+	{
+	  do_test ();
+#ifdef DEBUG
+	  printf ("PASSED\n");
+#endif
+	  return 0;
+	}
+#ifdef DEBUG
+      printf ("SKIPPED\n");
+#endif
+    }
+#ifdef DEBUG
+  else
+    printf ("SKIPPED\n");
+#endif
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vexp2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512er-vexp2pd-1.c
new file mode 100644
index 00000000000..9fb87cfb8ec
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-vexp2pd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512er -O2" } */
+/* { dg-final { scan-assembler-times "vexp2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vexp2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vexp2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vexp2pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vexp2pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vexp2pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512er_test (void)
+{
+  x = _mm512_exp2a23_pd (x);
+  x = _mm512_mask_exp2a23_pd (x, m, x);
+  x = _mm512_maskz_exp2a23_pd (m, x);
+  x = _mm512_exp2a23_round_pd (x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_exp2a23_round_pd (x, m, x, _MM_FROUND_TO_NEG_INF);
+  x = _mm512_maskz_exp2a23_round_pd (m, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vexp2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512er-vexp2pd-2.c
new file mode 100644
index 00000000000..ce4e86c1f95
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-vexp2pd-2.c
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512er } */
+/* { dg-options "-O2 -mavx512er" } */
+
+#include "avx512er-check.h"
+#include "avx512f-mask-type.h"
+#include "avx512f-helper.h"
+#include <math.h>
+
+void static
+compute_vexp2pd (double *s, double *r)
+{
+  int i;
+  for (i = 0; i < 8; i++)
+    r[i] = pow (2.0, s[i]);
+}
+
+void static
+avx512er_test (void)
+{
+  union512d src, res1, res2, res3;
+  __mmask8 mask = MASK_VALUE;
+  double res_ref[8];
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      src.a[i] = 179.345 - 6.5645 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = _mm512_exp2a23_pd (src.x);
+  res2.x = _mm512_mask_exp2a23_pd (res2.x, mask, src.x);
+  res3.x = _mm512_maskz_exp2a23_pd (mask, src.x);
+
+  compute_vexp2pd (src.a, res_ref);
+
+  if (check_rough_union512d (res1, res_ref, 0.0001))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, 8);
+  if (check_rough_union512d (res2, res_ref, 0.0001))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, 8);
+  if (check_rough_union512d (res3, res_ref, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vexp2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512er-vexp2ps-1.c
new file mode 100644
index 00000000000..a7e7009ec01
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-vexp2ps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512er -O2" } */
+/* { dg-final { scan-assembler-times "vexp2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vexp2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vexp2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vexp2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vexp2ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vexp2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512er_test (void)
+{
+  x = _mm512_exp2a23_ps (x);
+  x = _mm512_mask_exp2a23_ps (x, m, x);
+  x = _mm512_maskz_exp2a23_ps (m, x);
+  x = _mm512_exp2a23_round_ps (x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_exp2a23_round_ps (x, m, x, _MM_FROUND_TO_POS_INF);
+  x = _mm512_maskz_exp2a23_round_ps (m, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vexp2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512er-vexp2ps-2.c
new file mode 100644
index 00000000000..06ef68c3d2a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-vexp2ps-2.c
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512er } */
+/* { dg-options "-O2 -mavx512er" } */
+
+#include "avx512er-check.h"
+#include "avx512f-mask-type.h"
+#include "avx512f-helper.h"
+#include <math.h>
+
+void static
+compute_vexp2ps (float *s, float *r)
+{
+  int i;
+  for (i = 0; i < 16; i++)
+    r[i] = pow (2.0, s[i]);
+}
+
+void static
+avx512er_test (void)
+{
+  union512 src, res1, res2, res3;
+  __mmask16 mask = MASK_VALUE;
+  float res_ref[16];
+  int i;
+
+  for (i = 0; i < 16; i++)
+    {
+      src.a[i] = 179.345 - 6.5645 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = _mm512_exp2a23_ps (src.x);
+  res2.x = _mm512_mask_exp2a23_ps (res2.x, mask, src.x);
+  res3.x = _mm512_maskz_exp2a23_ps (mask, src.x);
+
+  compute_vexp2ps (src.a, res_ref);
+
+  if (check_rough_union512 (res1, res_ref, 0.0001))
+    abort ();
+
+  MASK_MERGE ()(res_ref, mask, 16);
+  if (check_rough_union512 (res2, res_ref, 0.0001))
+    abort ();
+
+  MASK_ZERO ()(res_ref, mask, 16);
+  if (check_rough_union512 (res3, res_ref, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrcp28pd-1.c b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28pd-1.c
new file mode 100644
index 00000000000..06b61609f14
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28pd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512er -O2" } */
+/* { dg-final { scan-assembler-times "vrcp28pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vrcp28pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vrcp28pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vrcp28pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrcp28pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrcp28pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512er_test (void)
+{
+  x = _mm512_rcp28_pd (x);
+  x = _mm512_mask_rcp28_pd (x, m, x);
+  x = _mm512_maskz_rcp28_pd (m, x);
+  x = _mm512_rcp28_round_pd (x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_rcp28_round_pd (x, m, x, _MM_FROUND_TO_NEG_INF);
+  x = _mm512_maskz_rcp28_round_pd (m, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrcp28pd-2.c b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28pd-2.c
new file mode 100644
index 00000000000..609aeaa31c6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28pd-2.c
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512er } */
+/* { dg-options "-O2 -mavx512er" } */
+
+#include "avx512er-check.h"
+#include "avx512f-mask-type.h"
+#include "avx512f-helper.h"
+
+void static
+compute_vrcp28pd (double *s, double *r)
+{
+  int i;
+  for (i = 0; i < 8; i++)
+    r[i] = 1.0 / s[i];
+}
+
+void static
+avx512er_test (void)
+{
+  union512d src, res1, res2, res3;
+  __mmask8 mask = MASK_VALUE;
+  double res_ref[8];
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      src.a[i] = 179.345 - 6.5645 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = _mm512_rcp28_pd (src.x);
+  res2.x = _mm512_mask_rcp28_pd (res2.x, mask, src.x);
+  res3.x = _mm512_maskz_rcp28_pd (mask, src.x);
+
+  compute_vrcp28pd (src.a, res_ref);
+
+  if (check_rough_union512d (res1, res_ref, 0.0001))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, 8);
+  if (check_rough_union512d (res2, res_ref, 0.0001))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, 8);
+  if (check_rough_union512d (res3, res_ref, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ps-1.c b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ps-1.c
new file mode 100644
index 00000000000..023d6b2f519
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512er -O2" } */
+/* { dg-final { scan-assembler-times "vrcp28ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vrcp28ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vrcp28ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vrcp28ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrcp28ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrcp28ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512er_test (void)
+{
+  x = _mm512_rcp28_ps (x);
+  x = _mm512_mask_rcp28_ps (x, m, x);
+  x = _mm512_maskz_rcp28_ps (m, x);
+  x = _mm512_rcp28_round_ps (x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_rcp28_round_ps (x, m, x, _MM_FROUND_TO_POS_INF);
+  x = _mm512_maskz_rcp28_round_ps (m, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ps-2.c b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ps-2.c
new file mode 100644
index 00000000000..4059e0e7f52
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ps-2.c
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512er } */
+/* { dg-options "-O2 -mavx512er" } */
+
+#include "avx512er-check.h"
+#include "avx512f-mask-type.h"
+#include "avx512f-helper.h"
+
+void static
+compute_vrcp28ps (float *s, float *r)
+{
+  int i;
+  for (i = 0; i < 16; i++)
+    r[i] = 1.0 / s[i];
+}
+
+void static
+avx512er_test (void)
+{
+  union512 src, res1, res2, res3;
+  __mmask16 mask = MASK_VALUE;
+  float res_ref[16];
+  int i;
+
+  for (i = 0; i < 16; i++)
+    {
+      src.a[i] = 179.345 - 6.5645 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = _mm512_rcp28_ps (src.x);
+  res2.x = _mm512_mask_rcp28_ps (res2.x, mask, src.x);
+  res3.x = _mm512_maskz_rcp28_ps (mask, src.x);
+
+  compute_vrcp28ps (src.a, res_ref);
+
+  if (check_rough_union512 (res1, res_ref, 0.0001))
+    abort ();
+
+  MASK_MERGE ()(res_ref, mask, 16);
+  if (check_rough_union512 (res2, res_ref, 0.0001))
+    abort ();
+
+  MASK_ZERO ()(res_ref, mask, 16);
+  if (check_rough_union512 (res3, res_ref, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28pd-1.c b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28pd-1.c
new file mode 100644
index 00000000000..dfb95b2bf30
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28pd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512er -O2" } */
+/* { dg-final { scan-assembler-times "vrsqrt28pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vrsqrt28pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vrsqrt28pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vrsqrt28pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrsqrt28pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrsqrt28pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512er_test (void)
+{
+  x = _mm512_rsqrt28_pd (x);
+  x = _mm512_mask_rsqrt28_pd (x, m, x);
+  x = _mm512_maskz_rsqrt28_pd (m, x);
+  x = _mm512_rsqrt28_round_pd (x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_rsqrt28_round_pd (x, m, x, _MM_FROUND_TO_NEG_INF);
+  x = _mm512_maskz_rsqrt28_round_pd (m, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28pd-2.c b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28pd-2.c
new file mode 100644
index 00000000000..84a66addd55
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28pd-2.c
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512er } */
+/* { dg-options "-O2 -mavx512er" } */
+
+#include "avx512er-check.h"
+#include "avx512f-mask-type.h"
+#include "avx512f-helper.h"
+#include <math.h>
+
+void static
+compute_vrsqrt28pd (double *s, double *r)
+{
+  int i;
+  for (i = 0; i < 8; i++)
+    r[i] = 1.0 / sqrt (s[i]);
+}
+
+void static
+avx512er_test (void)
+{
+  union512d src, res1, res2, res3;
+  __mmask8 mask = MASK_VALUE;
+  double res_ref[8];
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      src.a[i] = 179.345 - 6.5645 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = _mm512_rsqrt28_pd (src.x);
+  res2.x = _mm512_mask_rsqrt28_pd (res2.x, mask, src.x);
+  res3.x = _mm512_maskz_rsqrt28_pd (mask, src.x);
+
+  compute_vrsqrt28pd (src.a, res_ref);
+
+  if (check_rough_union512d (res1, res_ref, 0.0001))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, 8);
+  if (check_rough_union512d (res2, res_ref, 0.0001))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, 8);
+  if (check_rough_union512d (res3, res_ref, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ps-1.c b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ps-1.c
new file mode 100644
index 00000000000..ecd3a6fbf12
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512er -O2" } */
+/* { dg-final { scan-assembler-times "vrsqrt28ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vrsqrt28ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vrsqrt28ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vrsqrt28ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrsqrt28ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrsqrt28ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512er_test (void)
+{
+  x = _mm512_rsqrt28_ps (x);
+  x = _mm512_mask_rsqrt28_ps (x, m, x);
+  x = _mm512_maskz_rsqrt28_ps (m, x);
+  x = _mm512_rsqrt28_round_ps (x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_rsqrt28_round_ps (x, m, x, _MM_FROUND_TO_POS_INF);
+  x = _mm512_maskz_rsqrt28_round_ps (m, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ps-2.c b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ps-2.c
new file mode 100644
index 00000000000..a92472e6191
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ps-2.c
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512er } */
+/* { dg-options "-O2 -mavx512er" } */
+
+#include "avx512er-check.h"
+#include "avx512f-mask-type.h"
+#include "avx512f-helper.h"
+#include <math.h>
+
+void static
+compute_vrsqrt28ps (float *s, float *r)
+{
+  int i;
+  for (i = 0; i < 16; i++)
+    r[i] = 1.0 / sqrt (s[i]);
+}
+
+void static
+avx512er_test (void)
+{
+  union512 src, res1, res2, res3;
+  __mmask16 mask = MASK_VALUE;
+  float res_ref[16];
+  int i;
+
+  for (i = 0; i < 16; i++)
+    {
+      src.a[i] = 179.345 - 6.5645 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = _mm512_rsqrt28_ps (src.x);
+  res2.x = _mm512_mask_rsqrt28_ps (res2.x, mask, src.x);
+  res3.x = _mm512_maskz_rsqrt28_ps (mask, src.x);
+
+  compute_vrsqrt28ps (src.a, res_ref);
+
+  if (check_rough_union512 (res1, res_ref, 0.0001))
+    abort ();
+
+  MASK_MERGE ()(res_ref, mask, 16);
+  if (check_rough_union512 (res2, res_ref, 0.0001))
+    abort ();
+
+  MASK_ZERO ()(res_ref, mask, 16);
+  if (check_rough_union512 (res3, res_ref, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-gpr-1.c b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-gpr-1.c
new file mode 100644
index 00000000000..f550e22471b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-gpr-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+%r\[^\n\]+%zmm\[0-9\]\[^\{\]" 1 { target { ! { ia32 } } } } } */
+/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+%e\[^\n\]+%zmm\[0-9\]\[^\{\]" 1 { target { ! { ia32 } } } } } */
+/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+\[^\n\]+%zmm\[0-9\]\[^\{\]" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+\[^\n\]+%zmm\[0-9\]\[^\{\]" 1 { target ia32 } } } */
+
+#include <x86intrin.h>
+
+__m512i
+foo_1 (long long y)
+{
+  return __extension__ (__m512i)(__v8di){ y, y, y, y, y, y, y, y };
+}
+
+__m512i
+foo_2 (int y)
+{
+  return __extension__ (__m512i)(__v16si){ y, y, y, y, y, y, y, y, y,
+				      y, y, y, y, y, y, y };
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-gpr-2.c b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-gpr-2.c
new file mode 100644
index 00000000000..91665b299ad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-gpr-2.c
@@ -0,0 +1,29 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+#include "avx512f-broadcast-gpr-1.c"
+
+void
+avx512f_test (void)
+{
+  union512i_q q;
+  union512i_d d;
+  int i;
+
+  q.x = foo_1 (3);
+  d.x = foo_2 (5);
+
+  for (i = 0; i < 8; i++)
+  {
+    if (q.a[i] != 3)
+      abort ();
+  }
+
+  for (i = 0; i < 16; i++)
+  {
+    if (d.a[i] != 5)
+      abort ();
+  }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceil-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-ceil-sfix-vec-1.c
new file mode 100644
index 00000000000..038d25e3582
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-ceil-sfix-vec-1.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#include <math.h>
+#include "avx512f-check.h"
+
+extern double ceil (double);
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (double *src)
+{
+  int i, sign = 1;
+  double f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  double a[NUM];
+  int r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = (int) ceil (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != (int) ceil (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceil-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-ceil-sfix-vec-2.c
new file mode 100644
index 00000000000..8dafb1bf815
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-ceil-sfix-vec-2.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-ceil-sfix-vec-1.c"
+
+/* { dg-final { scan-assembler "vrndscalepd\[^\n\]*zmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vcvttpd2dq\[^\n\]*zmm\[0-9\]" } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-check.h b/gcc/testsuite/gcc.target/i386/avx512f-check.h
new file mode 100644
index 00000000000..9e01367205c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-check.h
@@ -0,0 +1,47 @@
+#include <stdlib.h>
+#include "cpuid.h"
+#include "m512-check.h"
+#include "avx512f-os-support.h"
+
+static void avx512f_test (void);
+
+static void __attribute__ ((noinline)) do_test (void)
+{
+  avx512f_test ();
+}
+
+int
+main ()
+{
+  unsigned int eax, ebx, ecx, edx;
+
+  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+    return 0;
+
+  /* Run AVX512F test only if host has AVX512F support.  */
+  if ((ecx & bit_OSXSAVE) == (bit_OSXSAVE))
+    {
+      if (__get_cpuid_max (0, NULL) < 7)
+	return 0;
+
+      __cpuid_count (7, 0, eax, ebx, ecx, edx);
+
+      if ((avx512f_os_support ()) && ((ebx & bit_AVX512F) == bit_AVX512F))
+	{
+	  do_test ();
+#ifdef DEBUG
+	  printf ("PASSED\n");
+#endif
+	  return 0;
+	}
+#ifdef DEBUG
+      printf ("SKIPPED\n");
+#endif
+    }
+#ifdef DEBUG
+  else
+    printf ("SKIPPED\n");
+#endif
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-dummy.c b/gcc/testsuite/gcc.target/i386/avx512f-dummy.c
new file mode 100644
index 00000000000..84b062789b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-dummy.c
@@ -0,0 +1,13 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void static
+avx512f_test (void)
+{
+  union512i_q u, s1, s2;
+  long long e[8];
+  volatile int tst = check_union512i_q (u, e);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floor-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-floor-sfix-vec-1.c
new file mode 100644
index 00000000000..fab7e6528ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-floor-sfix-vec-1.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#include <math.h>
+#include "avx512f-check.h"
+
+extern double floor (double);
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (double *src)
+{
+  int i, sign = 1;
+  double f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  double a[NUM];
+  int r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = (int) floor (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != (int) floor (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floor-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-floor-sfix-vec-2.c
new file mode 100644
index 00000000000..90e625abcd5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-floor-sfix-vec-2.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-floor-sfix-vec-1.c"
+
+/* { dg-final { scan-assembler "vrndscalepd\[^\n\]*zmm\[0-9\]" } } */
+/* { dg-final { scan-assembler "vcvttpd2dq\[^\n\]*zmm\[0-9\]" } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-gather-1.c b/gcc/testsuite/gcc.target/i386/avx512f-gather-1.c
new file mode 100644
index 00000000000..5ccb03a1f49
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-gather-1.c
@@ -0,0 +1,217 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O3 -mavx512f" } */
+
+#include "avx512f-check.h"
+
+#define N 1024
+float vf1[N+16], vf2[N];
+double vd1[N+16], vd2[N];
+int vi1[N+16], vi2[N], k[N];
+long long vl1[N+16], vl2[N];
+long l[N];
+
+__attribute__((noinline, noclone)) void
+f1 (void)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vf2[i] = vf1[k[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f2 (void)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vi2[i] = vi1[k[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f3 (int x)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vf2[i] = vf1[k[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f4 (int x)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vi2[i] = vi1[k[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f5 (void)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vd2[i] = vd1[k[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f6 (void)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vl2[i] = vl1[k[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f7 (int x)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vd2[i] = vd1[k[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f8 (int x)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vl2[i] = vl1[k[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f9 (void)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vf2[i] = vf1[l[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f10 (void)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vi2[i] = vi1[l[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f11 (int x)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vf2[i] = vf1[l[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f12 (int x)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vi2[i] = vi1[l[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f13 (void)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vd2[i] = vd1[l[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f14 (void)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vl2[i] = vl1[l[i]];
+}
+
+__attribute__((noinline, noclone)) void
+f15 (int x)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vd2[i] = vd1[l[i] + x];
+}
+
+__attribute__((noinline, noclone)) void
+f16 (int x)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    vl2[i] = vl1[l[i] + x];
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+
+  for (i = 0; i < N + 16; i++)
+    {
+      asm ("");
+      vf1[i] = 17.0f + i;
+      vd1[i] = 19.0 + i;
+      vi1[i] = 21 + i;
+      vl1[i] = 23L + i;
+    }
+  for (i = 0; i < N; i++)
+    {
+      asm ("");
+      k[i] = (i * 731) & (N - 1);
+      l[i] = (i * 657) & (N - 1);
+    }
+
+  f1 ();
+  f2 ();
+  for (i = 0; i < N; i++)
+    if (vf2[i] != ((i * 731) & (N - 1)) + 17
+	|| vi2[i] != ((i * 731) & (N - 1)) + 21)
+      abort ();
+
+  f3 (12);
+  f4 (14);
+  for (i = 0; i < N; i++)
+    if (vf2[i] != ((i * 731) & (N - 1)) + 17 + 12
+	|| vi2[i] != ((i * 731) & (N - 1)) + 21 + 14)
+      abort ();
+
+  f5 ();
+  f6 ();
+  for (i = 0; i < N; i++)
+    if (vd2[i] != ((i * 731) & (N - 1)) + 19
+	|| vl2[i] != ((i * 731) & (N - 1)) + 23)
+      abort ();
+
+  f7 (6);
+  f8 (3);
+  for (i = 0; i < N; i++)
+    if (vd2[i] != ((i * 731) & (N - 1)) + 19 + 6
+	|| vl2[i] != ((i * 731) & (N - 1)) + 23 + 3)
+      abort ();
+
+  f9 ();
+  f10 ();
+  for (i = 0; i < N; i++)
+    if (vf2[i] != ((i * 657) & (N - 1)) + 17
+	|| vi2[i] != ((i * 657) & (N - 1)) + 21)
+      abort ();
+
+  f11 (7);
+  f12 (9);
+  for (i = 0; i < N; i++)
+    if (vf2[i] != ((i * 657) & (N - 1)) + 17 + 7
+	|| vi2[i] != ((i * 657) & (N - 1)) + 21 + 9)
+      abort ();
+
+  f13 ();
+  f14 ();
+  for (i = 0; i < N; i++)
+    if (vd2[i] != ((i * 657) & (N - 1)) + 19
+	|| vl2[i] != ((i * 657) & (N - 1)) + 23)
+      abort ();
+
+  f15 (2);
+  f16 (12);
+  for (i = 0; i < N; i++)
+    if (vd2[i] != ((i * 657) & (N - 1)) + 19 + 2
+	|| vl2[i] != ((i * 657) & (N - 1)) + 23 + 12)
+      abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-gather-2.c b/gcc/testsuite/gcc.target/i386/avx512f-gather-2.c
new file mode 100644
index 00000000000..86641926149
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-gather-2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */ /* PR59617 */
+/* { dg-options "-O3 -mavx512f -fdump-tree-vect-details" } */
+
+#include "avx512f-gather-1.c"
+
+/* { dg-final { scan-assembler-not "gather\[^\n\]*ymm\[^\n\]*ymm" { xfail { *-*-* } } } } */  /* PR59617 */
+/* { dg-final { scan-assembler-not "gather\[^\n\]*xmm\[^\n\]*ymm" { xfail { *-*-* } } } } */  /* PR59617 */
+/* { dg-final { scan-assembler-not "gather\[^\n\]*ymm\[^\n\]*xmm" { xfail { *-*-* } } } } */  /* PR59617 */
+/* { dg-final { scan-assembler-not "gather\[^\n\]*xmm\[^\n\]*xmm" { xfail { lp64 } } } } */  /* PR59617 */
+/* { dg-final { scan-tree-dump-times "note: vectorized 1 loops in function" 16 "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-gather-3.c b/gcc/testsuite/gcc.target/i386/avx512f-gather-3.c
new file mode 100644
index 00000000000..5e20dd8898a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-gather-3.c
@@ -0,0 +1,169 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O3 -mavx512f -ffast-math" } */
+
+#include "avx512f-check.h"
+
+#define N 1024
+float f[N];
+double d[N];
+int k[N];
+float *l[N];
+double *n[N];
+int **m[N];
+long q[N];
+long long **o[N];
+long long t[N];
+long long *r[N];
+int *s[N];
+
+__attribute__((noinline, noclone)) float
+f1 (void)
+{
+  int i;
+  float g = 0.0;
+  for (i = 0; i < N / 2; i++)
+    g += f[k[i]];
+  return g;
+}
+
+__attribute__((noinline, noclone)) float
+f2 (float *p)
+{
+  int i;
+  float g = 0.0;
+  for (i = 0; i < N / 2; i++)
+    g += p[k[i]];
+  return g;
+}
+
+__attribute__((noinline, noclone)) float
+f3 (void)
+{
+  int i;
+  float g = 0.0;
+  for (i = 0; i < N / 2; i++)
+    g += *l[i];
+  return g;
+}
+
+__attribute__((noinline, noclone)) int
+f4 (void)
+{
+  int i;
+  int g = 0;
+  for (i = 0; i < N / 2; i++)
+    g += **m[i];
+  return g;
+}
+
+__attribute__((noinline, noclone)) double
+f5 (void)
+{
+  int i;
+  double g = 0.0;
+  for (i = 0; i < N / 2; i++)
+    g += d[k[i]];
+  return g;
+}
+
+__attribute__((noinline, noclone)) double
+f6 (double *p)
+{
+  int i;
+  double g = 0.0;
+  for (i = 0; i < N / 2; i++)
+    g += p[k[i]];
+  return g;
+}
+
+__attribute__((noinline, noclone)) double
+f7 (void)
+{
+  int i;
+  double g = 0.0;
+  for (i = 0; i < N / 2; i++)
+    g += *n[i];
+  return g;
+}
+
+__attribute__((noinline, noclone)) int
+f8 (void)
+{
+  int i;
+  int g = 0;
+  for (i = 0; i < N / 2; i++)
+    g += **o[i];
+  return g;
+}
+
+__attribute__((noinline, noclone)) float
+f9 (void)
+{
+  int i;
+  float g = 0.0;
+  for (i = 0; i < N / 2; i++)
+    g += f[q[i]];
+  return g;
+}
+
+__attribute__((noinline, noclone)) float
+f10 (float *p)
+{
+  int i;
+  float g = 0.0;
+  for (i = 0; i < N / 2; i++)
+    g += p[q[i]];
+  return g;
+}
+
+__attribute__((noinline, noclone)) double
+f11 (void)
+{
+  int i;
+  double g = 0.0;
+  for (i = 0; i < N / 2; i++)
+    g += d[q[i]];
+  return g;
+}
+
+__attribute__((noinline, noclone)) double
+f12 (double *p)
+{
+  int i;
+  double g = 0.0;
+  for (i = 0; i < N / 2; i++)
+    g += p[q[i]];
+  return g;
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+
+  for (i = 0; i < N; i++)
+    {
+      asm ("");
+      f[i] = -256.0f + i;
+      d[i] = -258.0 + i;
+      k[i] = (i * 731) & (N - 1);
+      q[i] = (i * 657) & (N - 1);
+      t[i] = (i * 657) & (N - 1);
+      l[i] = &f[(i * 239) & (N - 1)];
+      n[i] = &d[(i * 271) & (N - 1)];
+      r[i] = &t[(i * 323) & (N - 1)];
+      s[i] = &k[(i * 565) & (N - 1)];
+      m[i] = &s[(i * 13) & (N - 1)];
+      o[i] = &r[(i * 19) & (N - 1)];
+    }
+
+  if (f1 () != 136448.0f || f2 (f) != 136448.0f || f3 () != 130304.0)
+    abort ();
+  if (f4 () != 261376 || f5 () != 135424.0 || f6 (d) != 135424.0)
+    abort ();
+  if (f7 () != 129280.0 || f8 () != 259840L || f9 () != 130816.0f)
+    abort ();
+  if (f10 (f) != 130816.0f || f11 () != 129792.0 || f12 (d) != 129792.0)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-gather-4.c b/gcc/testsuite/gcc.target/i386/avx512f-gather-4.c
new file mode 100644
index 00000000000..bea8c24b8cd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-gather-4.c
@@ -0,0 +1,38 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O3 -mavx512f" } */
+
+#include "avx512f-check.h"
+
+#define N 1024
+int a[N], b[N], c[N], d[N];
+
+__attribute__((noinline, noclone)) void
+foo (float *__restrict p, float *__restrict q, float *__restrict r,
+     int s1, int s2, int s3)
+{
+  int i;
+  for (i = 0; i < N; i++)
+    p[i] = q[a[i] * s1 + b[i] * s2 + s3] * r[c[i] * s1 + d[i] * s2 + s3];
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  float e[N], f[N], g[N];
+  for (i = 0; i < N; i++)
+    {
+      a[i] = (i * 7) & (N / 8 - 1);
+      b[i] = (i * 13) & (N / 8 - 1);
+      c[i] = (i * 23) & (N / 8 - 1);
+      d[i] = (i * 5) & (N / 8 - 1);
+      e[i] = 16.5 + i;
+      f[i] = 127.5 - i;
+    }
+  foo (g, e, f, 3, 2, 4);
+  for (i = 0; i < N; i++)
+    if (g[i] != (float) ((20.5 + a[i] * 3 + b[i] * 2)
+			 * (123.5 - c[i] * 3 - d[i] * 2)))
+      abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-gather-5.c b/gcc/testsuite/gcc.target/i386/avx512f-gather-5.c
new file mode 100644
index 00000000000..5edd446cb73
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-gather-5.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mavx512f" } */
+
+#include "avx512f-gather-4.c"
+
+/* { dg-final { scan-assembler "gather\[^\n\]*zmm" { xfail { *-*-* } } } } */ /* PR59617 */
+/* { dg-final { scan-assembler-not "gather\[^\n\]*ymm\[^\n\]*ymm" { xfail { *-*-* } } } } */ /* PR59617 */
+/* { dg-final { scan-assembler-not "gather\[^\n\]*xmm\[^\n\]*ymm" } } */
+/* { dg-final { scan-assembler-not "gather\[^\n\]*ymm\[^\n\]*xmm" } } */
+/* { dg-final { scan-assembler-not "gather\[^\n\]*xmm\[^\n\]*xmm" } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-helper.h b/gcc/testsuite/gcc.target/i386/avx512f-helper.h
new file mode 100644
index 00000000000..61b2e90d197
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-helper.h
@@ -0,0 +1,96 @@
+/* This file is used to reduce a number of runtime tests for AVX512F
+   instructions.  Idea is to create one file per instruction -
+   avx512f-insn-2.c - using defines from this file instead of intrinsic
+   name, vector length etc.  Then dg-options are set with appropriate
+   -Dwhatever options in that .c file producing tests for specific
+   length.  */
+
+#if defined (AVX512F)
+#include "avx512f-check.h"
+#elif defined (AVX512ER)
+#include "avx512er-check.h"
+#elif defined (AVX512CD)
+#include "avx512cd-check.h"
+#endif
+
+/* Macros expansion.  */
+#define CONCAT(a,b,c) a ## b ## c
+#define EVAL(a,b,c) CONCAT(a,b,c)
+
+/* Value to be written into destination.
+   We have one value for all types so it must be small enough
+   to fit into signed char.  */
+#define DEFAULT_VALUE 117
+
+#define MAKE_MASK_MERGE(NAME, TYPE)				      \
+static void							      \
+__attribute__((noinline, unused))				      \
+merge_masking_##NAME (TYPE *arr, unsigned long long mask, int size)   \
+{								      \
+  int i;							      \
+  for (i = 0; i < size; i++)					      \
+    {								      \
+      arr[i] = (mask & (1LL << i)) ? arr[i] : DEFAULT_VALUE;	      \
+    }								      \
+}
+
+MAKE_MASK_MERGE(i_b, char)
+MAKE_MASK_MERGE(i_w, short)
+MAKE_MASK_MERGE(i_d, int)
+MAKE_MASK_MERGE(i_q, long long)
+MAKE_MASK_MERGE(, float)
+MAKE_MASK_MERGE(d, double)
+
+#define MASK_MERGE(TYPE) merge_masking_##TYPE
+
+#define MAKE_MASK_ZERO(NAME, TYPE)				      \
+static void							      \
+__attribute__((noinline, unused))				      \
+zero_masking_##NAME (TYPE *arr, unsigned long long mask, int size)    \
+{								      \
+  int i;							      \
+  for (i = 0; i < size; i++)					      \
+    {								      \
+      arr[i] = (mask & (1LL << i)) ? arr[i] : 0;		      \
+    }								      \
+}
+
+MAKE_MASK_ZERO(i_b, char)
+MAKE_MASK_ZERO(i_w, short)
+MAKE_MASK_ZERO(i_d, int)
+MAKE_MASK_ZERO(i_q, long long)
+MAKE_MASK_ZERO(, float)
+MAKE_MASK_ZERO(d, double)
+
+#define MASK_ZERO(TYPE) zero_masking_##TYPE
+
+/* Intrinsic being tested.  */
+#define INTRINSIC(NAME) EVAL(_mm, AVX512F_LEN, NAME)
+/* Unions used for testing (for example union512d, union256d etc.).  */
+#define UNION_TYPE(SIZE, NAME) EVAL(union, SIZE, NAME)
+/* Corresponding union check.  */
+#define UNION_CHECK(SIZE, NAME) EVAL(check_union, SIZE, NAME)
+/* Corresponding fp union check.  */
+#define UNION_FP_CHECK(SIZE, NAME) EVAL(check_fp_union, SIZE, NAME)
+/* Corresponding rough union check.  */
+#define UNION_ROUGH_CHECK(SIZE, NAME) \
+  EVAL(check_rough_union, SIZE, NAME)
+/* Function which tests intrinsic for given length.  */
+#define TEST EVAL(test_, AVX512F_LEN,)
+/* Function which calculates result.  */
+#define CALC EVAL(calc_, AVX512F_LEN,)
+
+#define AVX512F_LEN 512
+#define AVX512F_LEN_HALF 256
+static void test_512 ();
+
+#if defined (AVX512F)
+void
+avx512f_test (void) { test_512 (); }
+#elif defined (AVX512CD)
+void
+avx512cd_test (void) { test_512 (); }
+#elif defined (AVX512ER)
+void
+avx512er_test (void) { test_512 (); }
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32gatherd512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherd512-1.c
new file mode 100644
index 00000000000..7a0ee9978fd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherd512-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpgatherdd\[ \\t\]+\[^\n\]*zmm\[0-9\]\[^\n\]*zmm\[0-9\]{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x, idx;
+volatile __mmask16 m16;
+int *base;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_i32gather_epi32 (idx, base, 8);
+  x = _mm512_mask_i32gather_epi32 (x, m16, idx, base, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32gatherd512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherd512-2.c
new file mode 100644
index 00000000000..d89ef048d82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherd512-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_gatherdd (int *res, __mmask16 m16, int *idx,
+		  int *src, int scale, int *r)
+{
+  int i;
+
+  for (i = 0; i < 16; i++)
+    {
+      if (m16 & (1 << i))
+	r[i] = *(int *) (((unsigned char *) src) + idx[i] * scale);
+      else
+	r[i] = res[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union512i_d idx, res;
+  int src[16];
+  int res_ref[16];
+  __mmask16 m16 = 0xBC5D;
+
+  for (i = 0; i < 16; i++)
+    {
+      src[i] = 1973 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+	 divide by 2 to demonstrate scale */
+      idx.a[i] = (64 - (i + 1) * 4) >> 1;
+    }
+
+  res.x = _mm512_mask_i32gather_epi32 (res.x, m16, idx.x, src, SCALE);
+  compute_gatherdd (res.a, m16, idx.a, src, SCALE, res_ref);
+
+  if (check_union512i_d (res, res_ref))
+    abort ();
+
+  res.x = _mm512_i32gather_epi32 (idx.x, src, SCALE);
+  compute_gatherdd (res.a, 0xFFFF, idx.a, src, SCALE, res_ref);
+
+  if (check_union512i_d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32gatherpd512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherpd512-1.c
new file mode 100644
index 00000000000..88b9ae62455
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherpd512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vgatherdpd\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*zmm\[0-9\]{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __m256i idx;
+volatile __mmask8 m8;
+double *base;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_i32gather_pd (idx, base, 8);
+  x = _mm512_mask_i32gather_pd (x, m8, idx, base, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32gatherpd512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherpd512-2.c
new file mode 100644
index 00000000000..3af491548ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherpd512-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_gatherdpd (double *res, __mmask8 m8, int *idx,
+		   double *src, int scale, double *r)
+{
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      if (m8 & (1 << i))
+	r[i] = *(double *) (((unsigned char *) src) + idx[i] * scale);
+      else
+	r[i] = res[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union512d res;
+  union256i_d idx;
+  double src[8];
+  double res_ref[8];
+  __mmask8 m8 = 0xC5;
+
+  res.x = _mm512_setzero_pd();
+
+  for (i = 0; i < 8; i++)
+    {
+      src[i] = 2.718281828459045 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+	 divide by 2 to demonstrate scale */
+      idx.a[i] = (64 - (i + 1) * 8) >> 1;
+    }
+
+  res.x = _mm512_mask_i32gather_pd (res.x, m8, idx.x, src, SCALE);
+  compute_gatherdpd (res.a, m8, idx.a, src, SCALE, res_ref);
+
+  if (check_union512d (res, res_ref))
+    abort ();
+
+  res.x = _mm512_i32gather_pd (idx.x, src, SCALE);
+  compute_gatherdpd (res.a, 0xFF, idx.a, src, SCALE, res_ref);
+
+  if (check_union512d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32gatherps512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherps512-1.c
new file mode 100644
index 00000000000..6abc2301d57
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherps512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vgatherdps\[ \\t\]+\[^\n\]*zmm\[0-9\]\[^\n\]*zmm\[0-9\]{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __m512i idx;
+volatile __mmask16 m16;
+float *base;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_i32gather_ps (idx, base, 8);
+  x = _mm512_mask_i32gather_ps (x, m16, idx, base, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32gatherps512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherps512-2.c
new file mode 100644
index 00000000000..691413ab2ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherps512-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_gatherdps (float *res, __mmask16 m16, int *idx,
+		   float *src, int scale, float *r)
+{
+  int i;
+
+  for (i = 0; i < 16; i++)
+    {
+      if (m16 & (1 << i))
+	r[i] = *(float *) (((unsigned char *) src) + idx[i] * scale);
+      else
+	r[i] = res[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union512 res;
+  union512i_d idx;
+  float src[16];
+  float res_ref[16];
+  __mmask16 m16 = 0xBC5D;
+
+  res.x = _mm512_setzero_ps();
+
+  for (i = 0; i < 16; i++)
+    {
+      src[i] = 2.718281828459045 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+	 divide by 2 to demonstrate scale */
+      idx.a[i] = (64 - (i + 1) * 4) >> 1;
+    }
+
+  res.x = _mm512_mask_i32gather_ps (res.x, m16, idx.x, src, SCALE);
+  compute_gatherdps (res.a, m16, idx.a, src, SCALE, res_ref);
+
+  if (check_union512 (res, res_ref))
+    abort ();
+
+  res.x = _mm512_i32gather_ps (idx.x, src, SCALE);
+  compute_gatherdps (res.a, 0xFFFF, idx.a, src, SCALE, res_ref);
+
+  if (check_union512 (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32gatherq512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherq512-1.c
new file mode 100644
index 00000000000..ee4491eb1db
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherq512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpgatherdq\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*zmm\[0-9\]{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m256i idx;
+volatile __mmask8 m8;
+long long *base;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_i32gather_epi64 (idx, base, 8);
+  x = _mm512_mask_i32gather_epi64 (x, m8, idx, base, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32gatherq512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherq512-2.c
new file mode 100644
index 00000000000..4d472faa2ab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32gatherq512-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_gatherdq (long long *res, __mmask8 m8, int *idx,
+		  long long *src, int scale, long long *r)
+{
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      if (m8 & (1 << i))
+	r[i] = *(long long *)
+	  (((unsigned char *) src) + idx[i] * scale);
+      else
+	r[i] = res[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union256i_d idx;
+  union512i_q res;
+  long long src[8];
+  long long res_ref[8];
+  __mmask8 m8 = 0xC5;
+
+  for (i = 0; i < 8; i++)
+    {
+      src[i] = 1983 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+	 divide by 2 to demonstrate scale */
+      idx.a[i] = (64 - (i + 1) * 8) >> 1;
+    }
+
+  res.x = _mm512_mask_i32gather_epi64 (res.x, m8, idx.x, src, SCALE);
+  compute_gatherdq (res.a, m8, idx.a, src, SCALE, res_ref);
+
+  if (check_union512i_q (res, res_ref))
+    abort ();
+
+  res.x = _mm512_i32gather_epi64 (idx.x, src, SCALE);
+  compute_gatherdq (res.a, 0xFF, idx.a, src, SCALE, res_ref);
+
+  if (check_union512i_q (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32scatterd512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterd512-1.c
new file mode 100644
index 00000000000..7a5c311661e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterd512-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpscatterdd\[ \\t\]+\[^\n\]*zmm\[0-9\]\[^\n\]*zmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m512i src, idx;
+volatile __mmask16 m16;
+int *addr;
+
+void extern
+avx512f_test (void)
+{
+  _mm512_i32scatter_epi32 (addr, idx, src, 8);
+  _mm512_mask_i32scatter_epi32 (addr, m16, idx, src, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32scatterd512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterd512-2.c
new file mode 100644
index 00000000000..569690021ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterd512-2.c
@@ -0,0 +1,51 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_scatterdd (__mmask16 m16, int *idx,
+		   int *src, int scale, int *r)
+{
+  int i;
+
+  for (i = 0; i < 16; i++)
+    {
+      if (m16 & (1 << i))
+	*(int *) (((unsigned char *) r) + idx[i] * scale) = src[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union512i_d src, idx;
+  int res[16] = { 0 };
+  int res_ref[16] = { 0 };
+  __mmask16 m16 = 0xBC5D;
+
+  for (i = 0; i < 16; i++)
+    {
+      src.a[i] = 1973 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+	 divide by 2 to demonstrate scale */
+      idx.a[i] = (64 - (i + 1) * 4) >> 1;
+    }
+
+  _mm512_mask_i32scatter_epi32 (res, m16, idx.x, src.x, SCALE);
+  compute_scatterdd (m16, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVi (res, res_ref, 16))
+    abort ();
+
+  _mm512_i32scatter_epi32 (res, idx.x, src.x, SCALE);
+  compute_scatterdd (0xFFFF, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVi (res, res_ref, 16))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32scatterpd512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterpd512-1.c
new file mode 100644
index 00000000000..6c5ddc0a9c8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterpd512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vscatterdpd\[ \\t\]+\[^\n\]*zmm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m512d src;
+volatile __m256i idx;
+volatile __mmask8 m8;
+double *addr;
+
+void extern
+avx512f_test (void)
+{
+  _mm512_i32scatter_pd (addr, idx, src, 8);
+  _mm512_mask_i32scatter_pd (addr, m8, idx, src, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32scatterpd512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterpd512-2.c
new file mode 100644
index 00000000000..987b3f437f0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterpd512-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_scatterdpd (__mmask8 m8, int *idx, double *src,
+		    int scale, double *r)
+{
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      if (m8 & (1 << i))
+	*(double *) (((unsigned char *) r) + idx[i] * scale) = src[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union512d src;
+  union256i_d idx;
+  double res[8] = { 0.0 };
+  double res_ref[8] = { 0.0 };
+  __mmask8 m8 = 0xC5;
+
+  for (i = 0; i < 8; i++)
+    {
+      src.a[i] = 2.718281828459045 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+         divide by 2 to demonstrate scale */
+      idx.a[i] = (64 - (i + 1) * 8) >> 1;
+    }
+
+  _mm512_mask_i32scatter_pd (res, m8, idx.x, src.x, SCALE);
+  compute_scatterdpd (m8, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVd (res, res_ref, 8))
+    abort ();
+
+  _mm512_i32scatter_pd (res, idx.x, src.x, SCALE);
+  compute_scatterdpd (0xFF, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVd (res, res_ref, 8))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32scatterps512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterps512-1.c
new file mode 100644
index 00000000000..c24344a28d6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterps512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vscatterdps\[ \\t\]+\[^\n\]*zmm\[0-9\]\[^\n\]*zmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m512 src;
+volatile __m512i idx;
+volatile __mmask16 m16;
+float *addr;
+
+void extern
+avx512f_test (void)
+{
+  _mm512_i32scatter_ps (addr, idx, src, 8);
+  _mm512_mask_i32scatter_ps (addr, m16, idx, src, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32scatterps512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterps512-2.c
new file mode 100644
index 00000000000..8604c8d5c1c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterps512-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_scatterdps (__mmask16 m16, int *idx,
+		    float *src, int scale, float *r)
+{
+  int i;
+
+  for (i = 0; i < 16; i++)
+    {
+      if (m16 & (1 << i))
+	*(float *) (((unsigned char *) r) + idx[i] * scale) = src[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union512 src;
+  union512i_d idx;
+  float res[16] = { 0.0 };
+  float res_ref[16] = { 0.0 };
+  __mmask16 m16 = 0xBC5D;
+
+  for (i = 0; i < 16; i++)
+    {
+      src.a[i] = 2.718281828459045 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+	 divide by 2 to demonstrate scale */
+      idx.a[i] = (64 - (i + 1) * 4) >> 1;
+    }
+
+  _mm512_mask_i32scatter_ps (res, m16, idx.x, src.x, SCALE);
+  compute_scatterdps (m16, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVf (res, res_ref, 16))
+    abort ();
+
+  _mm512_i32scatter_ps (res, idx.x, src.x, SCALE);
+  compute_scatterdps (0xFFFF, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVf (res, res_ref, 16))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32scatterq512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterq512-1.c
new file mode 100644
index 00000000000..5b28175465a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterq512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpscatterdq\[ \\t\]+\[^\n\]*zmm\[0-9\]\[^\n\]*ymm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m512i src;
+volatile __m256i idx;
+volatile __mmask8 m8;
+long long *addr;
+
+void extern
+avx512f_test (void)
+{
+  _mm512_i32scatter_epi64 (addr, idx, src, 8);
+  _mm512_mask_i32scatter_epi64 (addr, m8, idx, src, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i32scatterq512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterq512-2.c
new file mode 100644
index 00000000000..fe5c3ade1a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i32scatterq512-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_scatterdq (__mmask8 m8, int *idx, long long *src,
+		   int scale, long long *r)
+{
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      if (m8 & (1 << i))
+	*(long long *) (((unsigned char *) r) + idx[i] * scale) =
+	  src[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union256i_d idx;
+  union512i_q src;
+  long long res[8] = { 0 };
+  long long res_ref[8] = { 0 };
+  __mmask8 m8 = 0xC5;
+
+  for (i = 0; i < 8; i++)
+    {
+      src.a[i] = 1983 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+         divide by 2 to demonstrate scale */
+      idx.a[i] = (64 - (i + 1) * 8) >> 1;
+    }
+
+  _mm512_mask_i32scatter_epi64 (res, m8, idx.x, src.x, SCALE);
+  compute_scatterdq (m8, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVl (res, res_ref, 8))
+    abort ();
+
+  _mm512_i32scatter_epi64 (res, idx.x, src.x, SCALE);
+  compute_scatterdq (0xFF, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVl (res, res_ref, 8))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64gatherd512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherd512-1.c
new file mode 100644
index 00000000000..66dcf6f60c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherd512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpgatherqd\[ \\t\]+\[^\n\]*zmm\[0-9\]\[^\n\]*ymm\[0-9\]{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m256i x;
+volatile __m512i idx;
+volatile __mmask8 m8;
+int *base;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_i64gather_epi32 (idx, base, 8);
+  x = _mm512_mask_i64gather_epi32 (x, m8, idx, base, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64gatherd512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherd512-2.c
new file mode 100644
index 00000000000..dff818db4ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherd512-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_gatherqd (int *res, __mmask8 m8, long long *idx,
+		  int *src, int scale, int *r)
+{
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      if (m8 & (1 << i))
+	r[i] = *(int *) (((unsigned char *) src) + idx[i] * scale);
+      else
+	r[i] = res[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union256i_d res;
+  union512i_q idx;
+  int src[8];
+  int res_ref[8];
+  __mmask8 m8 = 0xC5;
+
+  for (i = 0; i < 8; i++)
+    {
+      src[i] = 1973 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+	 divide by 2 to demonstrate scale */
+      idx.a[i] = (32 - (i + 1) * 4) >> 1;
+    }
+
+  res.x = _mm512_mask_i64gather_epi32 (res.x, m8, idx.x, src, SCALE);
+  compute_gatherqd (res.a, m8, idx.a, src, SCALE, res_ref);
+
+  if (check_union256i_d (res, res_ref))
+    abort ();
+
+  res.x = _mm512_i64gather_epi32 (idx.x, src, SCALE);
+  compute_gatherqd (res.a, 0xFF, idx.a, src, SCALE, res_ref);
+
+  if (check_union256i_d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64gatherpd512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherpd512-1.c
new file mode 100644
index 00000000000..4a3df890497
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherpd512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vgatherqpd\[ \\t\]+\[^\n\]*zmm\[0-9\]\[^\n\]*zmm\[0-9\]{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __m512i idx;
+volatile __mmask8 m8;
+double *base;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_i64gather_pd (idx, base, 8);
+  x = _mm512_mask_i64gather_pd (x, m8, idx, base, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64gatherpd512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherpd512-2.c
new file mode 100644
index 00000000000..7cb6d82eb00
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherpd512-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_gatherqpd (double *res, __mmask8 m8, long long *idx,
+		   double *src, int scale, double *r)
+{
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      if (m8 & (1 << i))
+	r[i] = *(double *) (((unsigned char *) src) + idx[i] * scale);
+      else
+	r[i] = res[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union512d res;
+  union512i_q idx;
+  double src[8];
+  double res_ref[8];
+  __mmask8 m8 = 0xC5;
+
+  res.x = _mm512_setzero_pd();
+
+  for (i = 0; i < 8; i++)
+    {
+      src[i] = 2.718281828459045 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+	 divide by 2 to demonstrate scale */
+      idx.a[i] = (64 - (i + 1) * 8) >> 1;
+    }
+
+  res.x = _mm512_mask_i64gather_pd (res.x, m8, idx.x, src, SCALE);
+  compute_gatherqpd (res.a, m8, idx.a, src, SCALE, res_ref);
+
+  if (check_union512d (res, res_ref))
+    abort ();
+
+  res.x = _mm512_i64gather_pd (idx.x, src, SCALE);
+  compute_gatherqpd (res.a, 0xFF, idx.a, src, SCALE, res_ref);
+
+  if (check_union512d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64gatherps512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherps512-1.c
new file mode 100644
index 00000000000..4caee0569ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherps512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vgatherqps\[ \\t\]+\[^\n\]*zmm\[0-9\]\[^\n\]*ymm\[0-9\]{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m256 x;
+volatile __m512i idx;
+volatile __mmask8 m8;
+float *base;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_i64gather_ps (idx, base, 8);
+  x = _mm512_mask_i64gather_ps (x, m8, idx, base, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64gatherps512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherps512-2.c
new file mode 100644
index 00000000000..8ed0fcef409
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherps512-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_gatherqps (float *res, __mmask8 m8, long long *idx,
+		   float *src, int scale, float *r)
+{
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      if (m8 & (1 << i))
+	r[i] = *(float *) (((unsigned char *) src) + idx[i] * scale);
+      else
+	r[i] = res[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union256 res;
+  union512i_q idx;
+  float src[8];
+  float res_ref[8];
+  __mmask8 m8 = 0xC5;
+
+  res.x = _mm256_setzero_ps();
+
+  for (i = 0; i < 8; i++)
+    {
+      src[i] = 2.718281828459045 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+	 divide by 2 to demonstrate scale */
+      idx.a[i] = (32 - (i + 1) * 4) >> 1;
+    }
+
+  res.x = _mm512_mask_i64gather_ps (res.x, m8, idx.x, src, SCALE);
+  compute_gatherqps (res.a, m8, idx.a, src, SCALE, res_ref);
+
+  if (check_union256 (res, res_ref))
+    abort ();
+
+  res.x = _mm512_i64gather_ps (idx.x, src, SCALE);
+  compute_gatherqps (res.a, 0xFF, idx.a, src, SCALE, res_ref);
+
+  if (check_union256 (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64gatherq512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherq512-1.c
new file mode 100644
index 00000000000..20d39e74849
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherq512-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpgatherqq\[ \\t\]+\[^\n\]*zmm\[0-9\]\[^\n\]*zmm\[0-9\]{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x, idx;
+volatile __mmask8 m8;
+long long *base;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_i64gather_epi64 (idx, base, 8);
+  x = _mm512_mask_i64gather_epi64 (x, m8, idx, base, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64gatherq512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherq512-2.c
new file mode 100644
index 00000000000..134fd18b82d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64gatherq512-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_gatherqq (long long *res, __mmask8 m8, long long *idx,
+		  long long *src, int scale, long long *r)
+{
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      if (m8 & (1 << i))
+	r[i] = *(long long *)
+	  (((unsigned char *) src) + idx[i] * scale);
+      else
+	r[i] = res[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union512i_q idx, res;
+  long long src[8];
+  long long res_ref[8];
+  __mmask8 m8 = 0xC5;
+
+  for (i = 0; i < 8; i++)
+    {
+      src[i] = 1983 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+	 divide by 2 to demonstrate scale */
+      idx.a[i] = (64 - (i + 1) * 8) >> 1;
+    }
+
+  res.x = _mm512_mask_i64gather_epi64 (res.x, m8, idx.x, src, SCALE);
+  compute_gatherqq (res.a, m8, idx.a, src, SCALE, res_ref);
+
+  if (check_union512i_q (res, res_ref))
+    abort ();
+
+  res.x = _mm512_i64gather_epi64 (idx.x, src, SCALE);
+  compute_gatherqq (res.a, 0xFF, idx.a, src, SCALE, res_ref);
+
+  if (check_union512i_q (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64scatterd512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterd512-1.c
new file mode 100644
index 00000000000..a2f5275d67e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterd512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpscatterqd\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*zmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m256i src;
+volatile __m512i idx;
+volatile __mmask8 m8;
+int *addr;
+
+void extern
+avx512f_test (void)
+{
+  _mm512_i64scatter_epi32 (addr, idx, src, 8);
+  _mm512_mask_i64scatter_epi32 (addr, m8, idx, src, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64scatterd512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterd512-2.c
new file mode 100644
index 00000000000..877ef906205
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterd512-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_scatterqd (__mmask8 m8, long long *idx,
+		   int *src, int scale, int *r)
+{
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      if (m8 & (1 << i))
+	*(int *) (((unsigned char *) r) + idx[i] * scale) = src[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union256i_d src;
+  union512i_q idx;
+  int res[8] = { 0 };
+  int res_ref[8] = { 0 };
+  __mmask8 m8 = 0xC5;
+
+  for (i = 0; i < 8; i++)
+    {
+      src.a[i] = 1973 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+	 divide by 2 to demonstrate scale */
+      idx.a[i] = (32 - (i + 1) * 4) >> 1;
+    }
+
+  _mm512_mask_i64scatter_epi32 (res, m8, idx.x, src.x, SCALE);
+  compute_scatterqd (m8, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVi (res, res_ref, 8))
+    abort ();
+
+  _mm512_i64scatter_epi32 (res, idx.x, src.x, SCALE);
+  compute_scatterqd (0xFF, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVi (res, res_ref, 8))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64scatterpd512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterpd512-1.c
new file mode 100644
index 00000000000..288a2183b0c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterpd512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vscatterqpd\[ \\t\]+\[^\n\]*zmm\[0-9\]\[^\n\]*zmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m512d src;
+volatile __m512i idx;
+volatile __mmask8 m8;
+double *addr;
+
+void extern
+avx512f_test (void)
+{
+  _mm512_i64scatter_pd (addr, idx, src, 8);
+  _mm512_mask_i64scatter_pd (addr, m8, idx, src, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64scatterpd512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterpd512-2.c
new file mode 100644
index 00000000000..2ded7bc7628
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterpd512-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_scatterqpd (__mmask8 m8, long long *idx, double *src,
+		    int scale, double *r)
+{
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      if (m8 & (1 << i))
+	*(double *) (((unsigned char *) r) + idx[i] * scale) = src[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union512d src;
+  union512i_q idx;
+  double res[8] = { 0.0 };
+  double res_ref[8] = { 0.0 };
+  __mmask8 m8 = 0xC5;
+
+  for (i = 0; i < 8; i++)
+    {
+      src.a[i] = 2.718281828459045 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+         divide by 2 to demonstrate scale */
+      idx.a[i] = (64 - (i + 1) * 8) >> 1;
+    }
+
+  _mm512_mask_i64scatter_pd (res, m8, idx.x, src.x, SCALE);
+  compute_scatterqpd (m8, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVd (res, res_ref, 8))
+    abort ();
+
+  _mm512_i64scatter_pd (res, idx.x, src.x, SCALE);
+  compute_scatterqpd (0xFF, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVd (res, res_ref, 8))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64scatterps512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterps512-1.c
new file mode 100644
index 00000000000..6a0b05d7997
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterps512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vscatterqps\[ \\t\]+\[^\n\]*ymm\[0-9\]\[^\n\]*zmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m256 src;
+volatile __m512i idx;
+volatile __mmask8 m8;
+float *addr;
+
+void extern
+avx512f_test (void)
+{
+  _mm512_i64scatter_ps (addr, idx, src, 8);
+  _mm512_mask_i64scatter_ps (addr, m8, idx, src, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64scatterps512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterps512-2.c
new file mode 100644
index 00000000000..4a74d4667ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterps512-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_scatterqps (__mmask8 m8, long long *idx,
+		    float *src, int scale, float *r)
+{
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      if (m8 & (1 << i))
+	*(float *) (((unsigned char *) r) + idx[i] * scale) = src[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union256 src;
+  union512i_q idx;
+  float res[8] = { 0.0 };
+  float res_ref[8] = { 0.0 };
+  __mmask8 m8 = 0xC5;
+
+  for (i = 0; i < 8; i++)
+    {
+      src.a[i] = 2.718281828459045 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+	 divide by 2 to demonstrate scale */
+      idx.a[i] = (32 - (i + 1) * 4) >> 1;
+    }
+
+  _mm512_mask_i64scatter_ps (res, m8, idx.x, src.x, SCALE);
+  compute_scatterqps (m8, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVf (res, res_ref, 8))
+    abort ();
+
+  _mm512_i64scatter_ps (res, idx.x, src.x, SCALE);
+  compute_scatterqps (0xFF, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVf (res, res_ref, 8))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64scatterq512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterq512-1.c
new file mode 100644
index 00000000000..10a7a4be6f4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterq512-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpscatterqq\[ \\t\]+\[^\n\]*zmm\[0-9\]\[^\n\]*zmm\[0-9\]\[^\n\]*{%k\[1-7\]}" 2 } } */
+
+#include <immintrin.h>
+
+volatile __m512i src, idx;
+volatile __mmask8 m8;
+long long *addr;
+
+void extern
+avx512f_test (void)
+{
+  _mm512_i64scatter_epi64 (addr, idx, src, 8);
+  _mm512_mask_i64scatter_epi64 (addr, m8, idx, src, 8);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-i64scatterq512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterq512-2.c
new file mode 100644
index 00000000000..975973f34f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-i64scatterq512-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define SCALE 2
+
+static void
+compute_scatterqq (__mmask8 m8, long long *idx, long long *src,
+		   int scale, long long *r)
+{
+  int i;
+
+  for (i = 0; i < 8; i++)
+    {
+      if (m8 & (1 << i))
+	*(long long *) (((unsigned char *) r) + idx[i] * scale) =
+	  src[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  union512i_q src, idx;
+  long long res[8] = { 0 };
+  long long res_ref[8] = { 0 };
+  __mmask8 m8 = 0xC5;
+
+  for (i = 0; i < 8; i++)
+    {
+      src.a[i] = 1983 * (i + 1) * (i + 2);
+
+      /* About to gather in reverse order,
+         divide by 2 to demonstrate scale */
+      idx.a[i] = (64 - (i + 1) * 8) >> 1;
+    }
+
+  _mm512_mask_i64scatter_epi64 (res, m8, idx.x, src.x, SCALE);
+  compute_scatterqq (m8, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVl (res, res_ref, 8))
+    abort ();
+
+  _mm512_i64scatter_epi64 (res, idx.x, src.x, SCALE);
+  compute_scatterqq (0xFF, idx.a, src.a, SCALE, res_ref);
+
+  if (checkVl (res, res_ref, 8))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-inline-asm.c b/gcc/testsuite/gcc.target/i386/avx512f-inline-asm.c
new file mode 100644
index 00000000000..4e675e09618
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-inline-asm.c
@@ -0,0 +1,68 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static void
+init_vpadd_mask (int* dst, int *src1, int *src2, int seed)
+{
+  int i;
+
+  for (i = 0; i < 16; i++)
+    {
+      dst[i] = -1;
+      src1[i] = seed * 2 * i + 1;
+      src2[i] = seed * 2 * i;
+    }
+}
+
+static inline void
+calc_vpadd_mask_zeroed (int *dst, __mmask16 m, int *src1, int *src2)
+{
+  int i;
+
+  for (i = 0; i < 16; i++)
+    {
+      if (m & (1 << i))
+	dst[i] = src1[i] + src2[i];
+      else
+	dst[i] = 0;
+    }
+}
+
+void static
+avx512f_test (void)
+{
+  /* Checking mask arithmetic instruction */
+
+  __mmask16 msk_dst, msk_src1, msk_src2, msk_dst_ref;
+
+  msk_src1 = 0x0FFB;
+  msk_src2 = 0x0F0F;
+
+  asm ("kandw\t%2, %1, %0"
+       : "=Yk" (msk_dst)
+       : "Yk" (msk_src1), "Yk" (msk_src2));
+
+  msk_dst_ref =  _mm512_kand (msk_src1, msk_src2);
+  if (msk_dst != msk_dst_ref)
+    abort ();
+
+
+  /* Checking zero-masked vector instruction */
+  union512i_d dst, src1, src2;
+  int dst_ref[16];
+
+  init_vpadd_mask (dst.a,   src1.a, src2.a, 1);
+  init_vpadd_mask (dst_ref, src1.a, src2.a, 1);
+
+  asm ("vpaddd\t%2, %1, %0 %{%3%}%{z%}"
+       : "=x" (dst.x)
+       : "x" (src1.x), "x" (src2.x), "k" (msk_dst));
+
+  calc_vpadd_mask_zeroed (dst_ref, msk_dst, src1.a, src2.a);
+
+  if (check_union512i_d (dst, dst_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-kandnw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-kandnw-1.c
new file mode 100644
index 00000000000..3d777c83015
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-kandnw-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "kandnw\[ \\t\]+\[^\n\]*%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+void
+avx512f_test ()
+{
+  __mmask16 k1, k2, k3;
+  volatile __m512 x;
+
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (1) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (2) );
+
+  k3 = _mm512_kandn (k1, k2);
+  x = _mm512_mask_add_ps (x, k3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-kandw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-kandw-1.c
new file mode 100644
index 00000000000..19a3cf4dbc3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-kandw-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "kandw\[ \\t\]+\[^\n\]*%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+void
+avx512f_test ()
+{
+  __mmask16 k1, k2, k3;
+  volatile __m512 x;
+
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (1) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (2) );
+
+  k3 = _mm512_kand (k1, k2);
+  x = _mm512_mask_add_ps (x, k3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-klogic-2.c b/gcc/testsuite/gcc.target/i386/avx512f-klogic-2.c
new file mode 100644
index 00000000000..df7fc9b7b7d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-klogic-2.c
@@ -0,0 +1,58 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void
+avx512f_test (void)
+{
+  __mmask16 dst, src1, src2, dst_ref;
+  volatile __m512 x;
+
+  __asm__( "kmovw %1, %0" : "=k" (src1) : "r" (0x0FFF) );
+  __asm__( "kmovw %1, %0" : "=k" (src2) : "r" (0x0F0F) );
+
+  dst = _mm512_kand (src1, src2);
+  x = _mm512_mask_add_ps (x, dst, x, x);
+  dst_ref = src1 & src2;
+  if (dst != dst_ref)
+    abort ();
+
+  dst = _mm512_kandn (src1, src2);
+  x = _mm512_mask_add_ps (x, dst, x, x);
+  dst_ref = ~src1 & src2;
+  if (dst != dst_ref)
+    abort ();
+
+  dst = _mm512_kor (src1, src2);
+  x = _mm512_mask_add_ps (x, dst, x, x);
+  dst_ref = src1 | src2;
+  if (dst != dst_ref)
+    abort ();
+
+  dst = _mm512_kxnor (src1, src2);
+  x = _mm512_mask_add_ps (x, dst, x, x);
+  dst_ref = ~(src1 ^ src2);
+  if (dst != dst_ref)
+    abort ();
+
+  dst = _mm512_kxor (src1, src2);
+  x = _mm512_mask_add_ps (x, dst, x, x);
+  dst_ref = src1 ^ src2;
+  if (dst != dst_ref)
+    abort ();
+
+  dst = _mm512_knot (src1);
+  x = _mm512_mask_add_ps (x, dst, x, x);
+  dst_ref = ~src1;
+  if (dst != dst_ref)
+    abort ();
+
+  dst = _mm512_kunpackb (src1, src2);
+  x = _mm512_mask_add_ps (x, dst, x, x);
+  dst_ref = 0xFF0F;
+
+  if (dst != dst_ref)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-knotw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-knotw-1.c
new file mode 100644
index 00000000000..a8f8f10b6be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-knotw-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "knotw\[ \\t\]+\[^\n\]*%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+void
+avx512f_test ()
+{
+  __mmask16 k1, k2;
+  volatile __m512 x;
+
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (45) );
+
+  k2 = _mm512_knot (k1);
+
+  x = _mm512_mask_add_ps (x, k1, x, x);
+  x = _mm512_mask_add_ps (x, k2, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-kortestw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-kortestw-1.c
new file mode 100644
index 00000000000..a3cdd4a1ab7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-kortestw-1.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -mavx512f" } */
+/* { dg-final { scan-assembler-times "kortestw\[ \\t\]+\[^\n\]*%k\[0-7\]" 4 } } */
+
+#include <immintrin.h>
+
+void
+avx512f_test () {
+  volatile __mmask16 k1;
+  __mmask16 k2;
+  volatile __mmask8 k3;
+  __mmask8 k4;
+
+  volatile short r;
+
+  /* Check that appropriate insn sequence is generated at -O0.  */
+  r = _mm512_kortestc (k1, k2);
+  r = _mm512_kortestz (k1, k2);
+
+  r = _mm512_kortestc (k3, k4);
+  r = _mm512_kortestz (k3, k4);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-kortestw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-kortestw-2.c
new file mode 100644
index 00000000000..4b9cadcc2d1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-kortestw-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void
+avx512f_test () {
+  volatile __mmask16 k1;
+  __mmask16 k2;
+  volatile short r = 0;
+
+  /* Test kortestc.  */
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (0) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (45) );
+
+  r += _mm512_kortestc (k1, k2);
+
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (0) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (0) );
+
+  r += _mm512_kortestc (k1, k2);
+  if (r)
+    abort ();
+
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (-1) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (0) );
+
+  r += _mm512_kortestc (k1, k2);
+  if (!r)
+    abort ();
+
+  r = 0;
+  /* Test kortestz.  */
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (0) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (45) );
+
+  r += _mm512_kortestz (k1, k2);
+
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (-1) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (0) );
+
+  r += _mm512_kortestz (k1, k2);
+  if (r)
+    abort ();
+
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (0) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (0) );
+
+  r += _mm512_kortestz (k1, k2);
+  if (!r)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-korw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-korw-1.c
new file mode 100644
index 00000000000..96f837b96b0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-korw-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "korw\[ \\t\]+\[^\n\]*%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+void
+avx512f_test ()
+{
+  __mmask16 k1, k2, k3;
+  volatile __m512 x;
+
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (1) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (2) );
+
+  k3 = _mm512_kor (k1, k2);
+  x = _mm512_mask_add_ps (x, k3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-kunpckbw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-kunpckbw-1.c
new file mode 100644
index 00000000000..bc55f8b301c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-kunpckbw-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "kunpckbw\[ \\t\]+\[^\n\]*%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+void
+avx512f_test () {
+  __mmask16 k1, k2, k3;
+  volatile __m512 x;
+
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (1) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (2) );
+
+  k3 = _mm512_kunpackb (k1, k2);
+  x = _mm512_mask_add_ps (x, k3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-kxnorw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-kxnorw-1.c
new file mode 100644
index 00000000000..8b12b2ac896
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-kxnorw-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "kxnorw\[ \\t\]+\[^\n\]*%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+void
+avx512f_test ()
+{
+  __mmask16 k1, k2, k3;
+  volatile __m512 x;
+
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (1) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (2) );
+
+  k3 = _mm512_kxnor (k1, k2);
+  x = _mm512_mask_add_ps (x, k3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-kxorw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-kxorw-1.c
new file mode 100644
index 00000000000..7ae1bc46204
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-kxorw-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "kxorw\[ \\t\]+\[^\n\]*%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+void
+avx512f_test ()
+{
+  __mmask16 k1, k2, k3;
+  volatile __m512 x;
+
+  __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (1) );
+  __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (2) );
+
+  k3 = _mm512_kxor (k1, k2);
+  x = _mm512_mask_add_ps (x, k3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-mask-type.h b/gcc/testsuite/gcc.target/i386/avx512f-mask-type.h
new file mode 100644
index 00000000000..53c439e24d1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-mask-type.h
@@ -0,0 +1,8 @@
+/* Type of mask.  */
+#if SIZE <= 8
+#define MASK_TYPE __mmask8
+#define MASK_VALUE 0xB9
+#elif SIZE <= 16
+#define MASK_TYPE __mmask16
+#define MASK_VALUE 0xA6BA
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-os-support.h b/gcc/testsuite/gcc.target/i386/avx512f-os-support.h
new file mode 100644
index 00000000000..deefa5e1105
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-os-support.h
@@ -0,0 +1,10 @@
+/* Check if the OS supports executing AVX512F instructions.  */
+
+static int
+avx512f_os_support (void)
+{
+  unsigned int eax, edx;
+
+  __asm__ ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
+  return (eax & 230) == 230;
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-rounding.c b/gcc/testsuite/gcc.target/i386/avx512f-rounding.c
new file mode 100644
index 00000000000..254e3a418f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-rounding.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -mavx512f" } */
+
+#include <x86intrin.h>
+
+int
+test_rounding (__m128d x, int r)
+{
+  return _mm_cvt_roundsd_i32 (x, r); /* { dg-error "incorrect rounding operand." } */
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-1.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-1.c
new file mode 100644
index 00000000000..0ae82bc4138
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-1.c
@@ -0,0 +1,45 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512
+__attribute__ ((noinline))
+foo (float *v)
+{
+  return _mm512_set_ps (v[15], v[14], v[13], v[12],
+			v[11], v[10], v[9], v[8],
+			v[7], v[6], v[5], v[4],
+			v[3], v[2], v[1], v[0]);
+}
+
+static __m512
+__attribute__ ((noinline))
+foo_r (float *v)
+{
+  return _mm512_setr_ps (v[0], v[1], v[2], v[3],
+			 v[4], v[5], v[6], v[7],
+			 v[8], v[9], v[10], v[11],
+			 v[12], v[13], v[14], v[15]);
+}
+
+static void
+avx512f_test (void)
+{
+  float v[16] = { -3.3, 2.6, 1.48, 9.104, -23.9, 17, -13.48, 4,
+		  69.78, 0.33, 81, 0.4, -8.9, -173.37, 0.8, 68 };
+  union512 res;
+
+  res.x = foo (v);
+
+  if (check_union512 (res, v))
+    abort ();
+
+  res.x = _mm512_setzero_ps ();
+
+  res.x = foo_r (v);
+
+  if (check_union512 (res, v))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-2.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-2.c
new file mode 100644
index 00000000000..1884c2f334f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-2.c
@@ -0,0 +1,49 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512
+__attribute__ ((noinline))
+foo (float x1, float x2, float x3, float x4,
+     float x5, float x6, float x7, float x8,
+     float x9, float x10, float x11, float x12,
+     float x13, float x14, float x15, float x16)
+{
+  return _mm512_set_ps (x1, x2, x3, x4, x5, x6, x7, x8,
+			x9, x10, x11, x12, x13, x14, x15, x16);
+}
+
+static __m512
+__attribute__ ((noinline))
+foo_r (float x1, float x2, float x3, float x4,
+       float x5, float x6, float x7, float x8,
+       float x9, float x10, float x11, float x12,
+       float x13, float x14, float x15, float x16)
+{
+  return _mm512_setr_ps (x16, x15, x14, x13, x12, x11, x10, x9,
+			 x8, x7, x6, x5, x4, x3, x2, x1);
+}
+
+static void
+avx512f_test (void)
+{
+  float v[16] = { -3.3, 2.6, 1.48, 9.104, -23.9, 17, -13.48, 4,
+		  69.78, 0.33, 81, 0.4, -8.9, -173.37, 0.8, 68 };
+  union512 res;
+
+  res.x = foo (v[15], v[14], v[13], v[12], v[11], v[10], v[9], v[8],
+	       v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]);
+
+  if (check_union512 (res, v))
+    abort ();
+
+  res.x = _mm512_setzero_ps ();
+
+  res.x = foo_r (v[15], v[14], v[13], v[12], v[11], v[10], v[9], v[8],
+		 v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]);
+
+  if (check_union512 (res, v))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-3.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-3.c
new file mode 100644
index 00000000000..7ec166a5886
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-3.c
@@ -0,0 +1,45 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512
+__attribute__ ((noinline))
+foo (float x)
+{
+  return _mm512_set_ps (x, x, x, x, x, x, x, x,
+			x, x, x, x, x, x, x, x);
+}
+
+static __m512
+__attribute__ ((noinline))
+foo_r (float x)
+{
+  return _mm512_setr_ps (x, x, x, x, x, x, x, x,
+			 x, x, x, x, x, x, x, x);
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  float e = 34.5;
+  float v[16];
+  union512 res;
+
+  for (i = 0; i < 16; i++)
+    v[i] = e;
+
+  res.x = foo (e);
+
+  if (check_union512 (res, v))
+    abort ();
+
+  res.x = _mm512_setzero_ps ();
+
+  res.x = foo_r (e);
+
+  if (check_union512 (res, v))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-4.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-4.c
new file mode 100644
index 00000000000..cd37e006450
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-4.c
@@ -0,0 +1,119 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512
+__attribute__ ((noinline))
+foo (float x, int i)
+{
+  switch (i)
+    {
+    case 15:
+      return _mm512_set_ps (x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 14:
+      return _mm512_set_ps (0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 13:
+      return _mm512_set_ps (0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 12:
+      return _mm512_set_ps (0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 11:
+      return _mm512_set_ps (0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 10:
+      return _mm512_set_ps (0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 9:
+      return _mm512_set_ps (0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 8:
+      return _mm512_set_ps (0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 7:
+      return _mm512_set_ps (0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0);
+    case 6:
+      return _mm512_set_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0);
+    case 5:
+      return _mm512_set_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0);
+    case 4:
+      return _mm512_set_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0);
+    case 3:
+      return _mm512_set_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0);
+    case 2:
+      return _mm512_set_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0);
+    case 1:
+      return _mm512_set_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0);
+    case 0:
+      return _mm512_set_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x);
+    default:
+      abort ();
+    }
+}
+
+static __m512
+__attribute__ ((noinline))
+foo_r (float x, int i)
+{
+  switch (i)
+    {
+    case 0:
+      return _mm512_setr_ps (x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 1:
+      return _mm512_setr_ps (0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 2:
+      return _mm512_setr_ps (0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 3:
+      return _mm512_setr_ps (0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 4:
+      return _mm512_setr_ps (0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 5:
+      return _mm512_setr_ps (0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 6:
+      return _mm512_setr_ps (0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 7:
+      return _mm512_setr_ps (0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 8:
+      return _mm512_setr_ps (0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0);
+    case 9:
+      return _mm512_setr_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0);
+    case 10:
+      return _mm512_setr_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0);
+    case 11:
+      return _mm512_setr_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0);
+    case 12:
+      return _mm512_setr_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0);
+    case 13:
+      return _mm512_setr_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0);
+    case 14:
+      return _mm512_setr_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0);
+    case 15:
+      return _mm512_setr_ps (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x);
+    default:
+      abort ();
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  float e = -3.234;
+  float v[16];
+  union512 res;
+  int i, j;
+
+  for (i = 0; i < 16; i++)
+    {
+      for (j = 0; j < 16; j++)
+	v[j] = 0;
+      v[i] = e;
+
+      res.x = foo (e, i);
+
+      if (check_union512 (res, v))
+	abort ();
+
+      res.x = _mm512_setzero_ps ();
+
+      res.x = foo_r (e, i);
+
+      if (check_union512 (res, v))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-5.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-5.c
new file mode 100644
index 00000000000..dec7fd40a7e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v16sf-5.c
@@ -0,0 +1,119 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512
+__attribute__ ((noinline))
+foo (float x, int i)
+{
+  switch (i)
+    {
+    case 15:
+      return _mm512_set_ps (x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 14:
+      return _mm512_set_ps (1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 13:
+      return _mm512_set_ps (1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 12:
+      return _mm512_set_ps (1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 11:
+      return _mm512_set_ps (1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 10:
+      return _mm512_set_ps (1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 9:
+      return _mm512_set_ps (1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 8:
+      return _mm512_set_ps (1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 7:
+      return _mm512_set_ps (1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1);
+    case 6:
+      return _mm512_set_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1);
+    case 5:
+      return _mm512_set_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1);
+    case 4:
+      return _mm512_set_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1);
+    case 3:
+      return _mm512_set_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1);
+    case 2:
+      return _mm512_set_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1);
+    case 1:
+      return _mm512_set_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1);
+    case 0:
+      return _mm512_set_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x);
+    default:
+      abort ();
+    }
+}
+
+static __m512
+__attribute__ ((noinline))
+foo_r (float x, int i)
+{
+  switch (i)
+    {
+    case 0:
+      return _mm512_setr_ps (x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 1:
+      return _mm512_setr_ps (1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 2:
+      return _mm512_setr_ps (1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 3:
+      return _mm512_setr_ps (1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 4:
+      return _mm512_setr_ps (1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 5:
+      return _mm512_setr_ps (1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 6:
+      return _mm512_setr_ps (1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 7:
+      return _mm512_setr_ps (1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 8:
+      return _mm512_setr_ps (1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1);
+    case 9:
+      return _mm512_setr_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1);
+    case 10:
+      return _mm512_setr_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1);
+    case 11:
+      return _mm512_setr_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1);
+    case 12:
+      return _mm512_setr_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1);
+    case 13:
+      return _mm512_setr_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1);
+    case 14:
+      return _mm512_setr_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1);
+    case 15:
+      return _mm512_setr_ps (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x);
+    default:
+      abort ();
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  float e = -3.234;
+  float v[16];
+  union512 res;
+  int i, j;
+
+  for (i = 0; i < 16; i++)
+    {
+      for (j = 0; j < 16; j++)
+	v[j] = 1;
+      v[i] = e;
+
+      res.x = foo (e, i);
+
+      if (check_union512 (res, v))
+	abort ();
+
+      res.x = _mm512_setzero_ps ();
+
+      res.x = foo_r (e, i);
+
+      if (check_union512 (res, v))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-1.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-1.c
new file mode 100644
index 00000000000..ebd0486999f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-1.c
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512i
+__attribute__ ((noinline))
+foo (int *v)
+{
+  return _mm512_set_epi32 (v[15], v[14], v[13], v[12],
+			   v[11], v[10], v[9], v[8],
+			   v[7], v[6], v[5], v[4],
+			   v[3], v[2], v[1], v[0]);
+}
+
+static __m512i
+__attribute__ ((noinline))
+foo_r (int *v)
+{
+  return _mm512_setr_epi32 (v[0], v[1], v[2], v[3],
+			    v[4], v[5], v[6], v[7],
+			    v[8], v[9], v[10], v[11],
+			    v[12], v[13], v[14], v[15]);
+}
+
+static void
+avx512f_test (void)
+{
+  int v[16] = { 19832468, 2134, 6576856, 6678,
+		8723467, 54646, 234566, 12314,
+		786784, 77575, 645245, 234555,
+		9487733, 411244, 12344, 86533 };
+  union512i_d res;
+
+  res.x = foo (v);
+
+  if (check_union512i_d (res, v))
+    abort ();
+
+  res.x = _mm512_setzero_si512 ();
+
+  res.x = foo_r (v);
+
+  if (check_union512i_d (res, v))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-2.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-2.c
new file mode 100644
index 00000000000..3090a2de66c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-2.c
@@ -0,0 +1,49 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512i
+__attribute__ ((noinline))
+foo (int x1, int x2, int x3, int x4,
+     int x5, int x6, int x7, int x8,
+     int x9, int x10, int x11, int x12,
+     int x13, int x14, int x15, int x16)
+{
+  return _mm512_set_epi32 (x1, x2, x3, x4, x5, x6, x7, x8,
+			   x9, x10, x11, x12, x13, x14, x15, x16);
+}
+
+static __m512i
+__attribute__ ((noinline))
+foo_r (int x1, int x2, int x3, int x4,
+       int x5, int x6, int x7, int x8,
+       int x9, int x10, int x11, int x12,
+       int x13, int x14, int x15, int x16)
+{
+  return _mm512_setr_epi32 (x16, x15, x14, x13, x12, x11, x10, x9,
+			    x8, x7, x6, x5, x4, x3, x2, x1);
+}
+
+static void
+avx512f_test (void)
+{
+  int v[16] = { -3, -453, 2, -231, 1, -111, 9, -145,
+		23, 671, -173, 166, -13, 714, 69, 123 };
+  union512i_d res;
+
+  res.x = foo (v[15], v[14], v[13], v[12], v[11], v[10], v[9], v[8],
+	       v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]);
+
+  if (check_union512i_d (res, v))
+     abort ();
+
+  res.x = _mm512_setzero_si512 ();
+
+  res.x = foo_r (v[15], v[14], v[13], v[12], v[11], v[10], v[9], v[8],
+		 v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]);
+
+  if (check_union512i_d (res, v))
+     abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-3.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-3.c
new file mode 100644
index 00000000000..c02838ec349
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-3.c
@@ -0,0 +1,45 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512i
+__attribute__ ((noinline))
+foo (int x)
+{
+  return _mm512_set_epi32 (x, x, x, x, x, x, x, x,
+			   x, x, x, x, x, x, x, x);
+}
+
+static __m512i
+__attribute__ ((noinline))
+foo_r (int x)
+{
+  return _mm512_setr_epi32 (x, x, x, x, x, x, x, x,
+			    x, x, x, x, x, x, x, x);
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  int e = 0xabadbeef;
+  int v[16];
+  union512i_d res;
+
+  for (i = 0; i < 16; i++)
+    v[i] = e;
+
+  res.x = foo (e);
+
+  if (check_union512i_d (res, v))
+    abort ();
+
+  res.x = _mm512_setzero_si512 ();
+
+  res.x = foo_r (e);
+
+  if (check_union512i_d (res, v))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-4.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-4.c
new file mode 100644
index 00000000000..a16f6f06852
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-4.c
@@ -0,0 +1,119 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512i
+__attribute__ ((noinline))
+foo (int x, int i)
+{
+  switch (i)
+    {
+    case 15:
+      return _mm512_set_epi32 (x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 14:
+      return _mm512_set_epi32 (0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 13:
+      return _mm512_set_epi32 (0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 12:
+      return _mm512_set_epi32 (0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 11:
+      return _mm512_set_epi32 (0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 10:
+      return _mm512_set_epi32 (0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 9:
+      return _mm512_set_epi32 (0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 8:
+      return _mm512_set_epi32 (0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 7:
+      return _mm512_set_epi32 (0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0);
+    case 6:
+      return _mm512_set_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0);
+    case 5:
+      return _mm512_set_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0);
+    case 4:
+      return _mm512_set_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0);
+    case 3:
+      return _mm512_set_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0);
+    case 2:
+      return _mm512_set_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0);
+    case 1:
+      return _mm512_set_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0);
+    case 0:
+      return _mm512_set_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x);
+    default:
+      abort ();
+    }
+}
+
+static __m512i
+__attribute__ ((noinline))
+foo_r (int x, int i)
+{
+  switch (i)
+    {
+    case 0:
+      return _mm512_setr_epi32 (x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 1:
+      return _mm512_setr_epi32 (0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 2:
+      return _mm512_setr_epi32 (0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 3:
+      return _mm512_setr_epi32 (0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 4:
+      return _mm512_setr_epi32 (0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 5:
+      return _mm512_setr_epi32 (0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 6:
+      return _mm512_setr_epi32 (0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 7:
+      return _mm512_setr_epi32 (0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0, 0);
+    case 8:
+      return _mm512_setr_epi32 (0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0, 0);
+    case 9:
+      return _mm512_setr_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0, 0);
+    case 10:
+      return _mm512_setr_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0, 0);
+    case 11:
+      return _mm512_setr_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0, 0);
+    case 12:
+      return _mm512_setr_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0, 0);
+    case 13:
+      return _mm512_setr_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0, 0);
+    case 14:
+      return _mm512_setr_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x, 0);
+    case 15:
+      return _mm512_setr_epi32 (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, x);
+    default:
+      abort ();
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int e = 0xabadbeef;
+  int v[16];
+  union512i_d res;
+  int i, j;
+
+  for (i = 0; i < 16; i++)
+    {
+      for (j = 0; j < 16; j++)
+	v[j] = 0;
+      v[i] = e;
+
+      res.x = foo (e, i);
+
+      if (check_union512i_d (res, v))
+	abort ();
+
+      res.x = _mm512_setzero_si512 ();
+
+      res.x = foo_r (e, i);
+
+      if (check_union512i_d (res, v))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-5.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-5.c
new file mode 100644
index 00000000000..948d4ed42f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v16si-5.c
@@ -0,0 +1,119 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512i
+__attribute__ ((noinline))
+foo (int x, int i)
+{
+  switch (i)
+    {
+    case 15:
+      return _mm512_set_epi32 (x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 14:
+      return _mm512_set_epi32 (1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 13:
+      return _mm512_set_epi32 (1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 12:
+      return _mm512_set_epi32 (1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 11:
+      return _mm512_set_epi32 (1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 10:
+      return _mm512_set_epi32 (1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 9:
+      return _mm512_set_epi32 (1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 8:
+      return _mm512_set_epi32 (1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 7:
+      return _mm512_set_epi32 (1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1);
+    case 6:
+      return _mm512_set_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1);
+    case 5:
+      return _mm512_set_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1);
+    case 4:
+      return _mm512_set_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1);
+    case 3:
+      return _mm512_set_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1);
+    case 2:
+      return _mm512_set_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1);
+    case 1:
+      return _mm512_set_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1);
+    case 0:
+      return _mm512_set_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x);
+    default:
+      abort ();
+    }
+}
+
+static __m512i
+__attribute__ ((noinline))
+foo_r (int x, int i)
+{
+  switch (i)
+    {
+    case 0:
+      return _mm512_setr_epi32 (x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 1:
+      return _mm512_setr_epi32 (1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 2:
+      return _mm512_setr_epi32 (1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 3:
+      return _mm512_setr_epi32 (1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 4:
+      return _mm512_setr_epi32 (1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 5:
+      return _mm512_setr_epi32 (1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 6:
+      return _mm512_setr_epi32 (1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 7:
+      return _mm512_setr_epi32 (1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1, 1);
+    case 8:
+      return _mm512_setr_epi32 (1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1, 1);
+    case 9:
+      return _mm512_setr_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1, 1);
+    case 10:
+      return _mm512_setr_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1, 1);
+    case 11:
+      return _mm512_setr_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1, 1);
+    case 12:
+      return _mm512_setr_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1, 1);
+    case 13:
+      return _mm512_setr_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1, 1);
+    case 14:
+      return _mm512_setr_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x, 1);
+    case 15:
+      return _mm512_setr_epi32 (1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, x);
+    default:
+      abort ();
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int e = 0xabadbeef;
+  int v[16];
+  union512i_d res;
+  int i, j;
+
+  for (i = 0; i < 16; i++)
+    {
+      for (j = 0; j < 16; j++)
+	v[j] = 1;
+      v[i] = e;
+
+      res.x = foo (e, i);
+
+      if (check_union512i_d (res, v))
+	abort ();
+
+      res.x = _mm512_setzero_si512 ();
+
+      res.x = foo_r (e, i);
+
+      if (check_union512i_d (res, v))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-1.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-1.c
new file mode 100644
index 00000000000..a3514ef7271
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-1.c
@@ -0,0 +1,38 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512d
+__attribute__ ((noinline))
+foo (double *v)
+{
+  return _mm512_set_pd (v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]);
+}
+
+static __m512d
+__attribute__ ((noinline))
+foo_r (double *v)
+{
+  return _mm512_setr_pd (v[0], v[1], v[2], v[3], v[4], v[5], v[6], v[7]);
+}
+
+static void
+avx512f_test (void)
+{
+  double v[8] = { -3.3, 2.6, 1.48, 9.104, -23.9, -173.37, -13.48, 69.78 };
+  union512d res;
+
+  res.x = foo (v);
+
+  if (check_union512d (res, v))
+    abort ();
+
+  res.x = _mm512_setzero_pd ();
+
+  res.x = foo_r (v);
+
+  if (check_union512d (res, v))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-2.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-2.c
new file mode 100644
index 00000000000..a412de58207
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-2.c
@@ -0,0 +1,40 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512d
+__attribute__ ((noinline))
+foo (double x1, double x2, double x3, double x4,
+     double x5, double x6, double x7, double x8)
+{
+  return _mm512_set_pd (x1, x2, x3, x4, x5, x6, x7, x8);
+}
+
+static __m512d
+__attribute__ ((noinline))
+foo_r (double x1, double x2, double x3, double x4,
+       double x5, double x6, double x7, double x8)
+{
+  return _mm512_setr_pd (x8, x7, x6, x5, x4, x3, x2, x1);
+}
+
+static void
+avx512f_test (void)
+{
+  double v[8] = { -3.3, 2.6, 1.48, 9.104, -23.9, -173.37, -13.48, 69.78 };
+  union512d res;
+
+  res.x = foo (v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]);
+
+  if (check_union512d (res, v))
+    abort ();
+
+  res.x = _mm512_setzero_pd ();
+
+  res.x = foo_r (v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]);
+
+  if (check_union512d (res, v))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-3.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-3.c
new file mode 100644
index 00000000000..751af670378
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-3.c
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512d
+__attribute__ ((noinline))
+foo (double x)
+{
+  return _mm512_set_pd (x, x, x, x, x, x, x, x);
+}
+
+static __m512d
+__attribute__ ((noinline))
+foo_r (double x)
+{
+  return _mm512_setr_pd (x, x, x, x, x, x, x, x);
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  double e = 34.5;
+  double v[8];
+  union512d res;
+
+  for (i = 0; i < 8; i++)
+    v[i] = e;
+
+  res.x = foo (e);
+
+  if (check_union512d (res, v))
+    abort ();
+
+  res.x = _mm512_setzero_pd ();
+
+  res.x = foo_r (e);
+
+  if (check_union512d (res, v))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-4.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-4.c
new file mode 100644
index 00000000000..f62bb5fa065
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-4.c
@@ -0,0 +1,87 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512d
+__attribute__ ((noinline))
+foo (double x, int i)
+{
+  switch (i)
+    {
+    case 7:
+      return _mm512_set_pd (x, 0, 0, 0, 0, 0, 0, 0);
+    case 6:
+      return _mm512_set_pd (0, x, 0, 0, 0, 0, 0, 0);
+    case 5:
+      return _mm512_set_pd (0, 0, x, 0, 0, 0, 0, 0);
+    case 4:
+      return _mm512_set_pd (0, 0, 0, x, 0, 0, 0, 0);
+    case 3:
+      return _mm512_set_pd (0, 0, 0, 0, x, 0, 0, 0);
+    case 2:
+      return _mm512_set_pd (0, 0, 0, 0, 0, x, 0, 0);
+    case 1:
+      return _mm512_set_pd (0, 0, 0, 0, 0, 0, x, 0);
+    case 0:
+      return _mm512_set_pd (0, 0, 0, 0, 0, 0, 0, x);
+    default:
+      abort ();
+    }
+}
+
+static __m512d
+__attribute__ ((noinline))
+foo_r (double x, int i)
+{
+  switch (i)
+    {
+    case 0:
+      return _mm512_setr_pd (x, 0, 0, 0, 0, 0, 0, 0);
+    case 1:
+      return _mm512_setr_pd (0, x, 0, 0, 0, 0, 0, 0);
+    case 2:
+      return _mm512_setr_pd (0, 0, x, 0, 0, 0, 0, 0);
+    case 3:
+      return _mm512_setr_pd (0, 0, 0, x, 0, 0, 0, 0);
+    case 4:
+      return _mm512_setr_pd (0, 0, 0, 0, x, 0, 0, 0);
+    case 5:
+      return _mm512_setr_pd (0, 0, 0, 0, 0, x, 0, 0);
+    case 6:
+      return _mm512_setr_pd (0, 0, 0, 0, 0, 0, x, 0);
+    case 7:
+      return _mm512_setr_pd (0, 0, 0, 0, 0, 0, 0, x);
+    default:
+      abort ();
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  double e = -3.234;
+  double v[8];
+  union512d res;
+  int i, j;
+
+  for (i = 0; i < 8; i++)
+    {
+      for (j = 0; j < 8; j++)
+	v[j] = 0;
+      v[i] = e;
+
+      res.x = foo (e, i);
+
+      if (check_union512d (res, v))
+	abort ();
+
+      res.x = _mm512_setzero_pd ();
+
+      res.x = foo_r (e, i);
+
+      if (check_union512d (res, v))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-5.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-5.c
new file mode 100644
index 00000000000..c6abd82da04
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v8df-5.c
@@ -0,0 +1,87 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512d
+__attribute__ ((noinline))
+foo (double x, int i)
+{
+  switch (i)
+    {
+    case 7:
+      return _mm512_set_pd (x, 1, 1, 1, 1, 1, 1, 1);
+    case 6:
+      return _mm512_set_pd (1, x, 1, 1, 1, 1, 1, 1);
+    case 5:
+      return _mm512_set_pd (1, 1, x, 1, 1, 1, 1, 1);
+    case 4:
+      return _mm512_set_pd (1, 1, 1, x, 1, 1, 1, 1);
+    case 3:
+      return _mm512_set_pd (1, 1, 1, 1, x, 1, 1, 1);
+    case 2:
+      return _mm512_set_pd (1, 1, 1, 1, 1, x, 1, 1);
+    case 1:
+      return _mm512_set_pd (1, 1, 1, 1, 1, 1, x, 1);
+    case 0:
+      return _mm512_set_pd (1, 1, 1, 1, 1, 1, 1, x);
+    default:
+      abort ();
+    }
+}
+
+static __m512d
+__attribute__ ((noinline))
+foo_r (double x, int i)
+{
+  switch (i)
+    {
+    case 0:
+      return _mm512_setr_pd (x, 1, 1, 1, 1, 1, 1, 1);
+    case 1:
+      return _mm512_setr_pd (1, x, 1, 1, 1, 1, 1, 1);
+    case 2:
+      return _mm512_setr_pd (1, 1, x, 1, 1, 1, 1, 1);
+    case 3:
+      return _mm512_setr_pd (1, 1, 1, x, 1, 1, 1, 1);
+    case 4:
+      return _mm512_setr_pd (1, 1, 1, 1, x, 1, 1, 1);
+    case 5:
+      return _mm512_setr_pd (1, 1, 1, 1, 1, x, 1, 1);
+    case 6:
+      return _mm512_setr_pd (1, 1, 1, 1, 1, 1, x, 1);
+    case 7:
+      return _mm512_setr_pd (1, 1, 1, 1, 1, 1, 1, x);
+    default:
+      abort ();
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  double e = -3.234;
+  double v[8];
+  union512d res;
+  int i, j;
+
+  for (i = 0; i < 8; i++)
+    {
+      for (j = 0; j < 8; j++)
+	v[j] = 1;
+      v[i] = e;
+
+      res.x = foo (e, i);
+
+      if (check_union512d (res, v))
+	abort ();
+
+      res.x = _mm512_setzero_pd ();
+
+      res.x = foo_r (e, i);
+
+      if (check_union512d (res, v))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-1.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-1.c
new file mode 100644
index 00000000000..8cb1f8f61b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-1.c
@@ -0,0 +1,39 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512i
+__attribute__ ((noinline))
+foo (long long *v)
+{
+  return _mm512_set_epi64 (v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]);
+}
+
+static __m512i
+__attribute__ ((noinline))
+foo_r (long long *v)
+{
+  return _mm512_setr_epi64 (v[0], v[1], v[2], v[3], v[4], v[5], v[6], v[7]);
+}
+
+static void
+avx512f_test (void)
+{
+  long long v[8] = { 0x12e9e94645ad8LL, 0x851c0b39446LL, 2134, 6678,
+		     0x786784645245LL, 0x9487731234LL, 41124, 86530 };
+  union512i_q res;
+
+  res.x = foo (v);
+
+  if (check_union512i_q (res, v))
+    abort ();
+
+  res.x = _mm512_setzero_si512 ();
+
+  res.x = foo_r (v);
+
+  if (check_union512i_q (res, v))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-2.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-2.c
new file mode 100644
index 00000000000..fd033ce24e0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-2.c
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512i
+__attribute__ ((noinline))
+foo (long long x1, long long x2, long long x3, long long x4,
+     long long x5, long long x6, long long x7, long long x8)
+{
+  return _mm512_set_epi64 (x1, x2, x3, x4, x5, x6, x7, x8);
+}
+
+static __m512i
+__attribute__ ((noinline))
+foo_r (long long x1, long long x2, long long x3, long long x4,
+       long long x5, long long x6, long long x7, long long x8)
+{
+  return _mm512_setr_epi64 (x8, x7, x6, x5, x4, x3, x2, x1);
+}
+
+static void
+avx512f_test (void)
+{
+  long long v[8] = { 0x12e9e94645ad8LL, 0x851c0b39446LL, 2134, 6678,
+		     0x786784645245LL, 0x9487731234LL, 41124, 86530 };
+  union512i_q res;
+
+  res.x = foo (v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]);
+
+  if (check_union512i_q (res, v))
+    abort ();
+
+  res.x = _mm512_setzero_si512 ();
+
+  res.x = foo_r (v[7], v[6], v[5], v[4], v[3], v[2], v[1], v[0]);
+
+  if (check_union512i_q (res, v))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-3.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-3.c
new file mode 100644
index 00000000000..16e12c7f1a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-3.c
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512i
+__attribute__ ((noinline))
+foo (long long x)
+{
+  return _mm512_set_epi64 (x, x, x, x, x, x, x, x);
+}
+
+static __m512i
+__attribute__ ((noinline))
+foo_r (long long x)
+{
+  return _mm512_setr_epi64 (x, x, x, x, x, x, x, x);
+}
+
+static void
+avx512f_test (void)
+{
+  int i;
+  long long e = 0xfed178ab134badf1LL;
+  long long v[8];
+  union512i_q res;
+
+  for (i = 0; i < 8; i++)
+    v[i] = e;
+
+  res.x = foo (e);
+
+  if (check_union512i_q (res, v))
+    abort ();
+
+  res.x = _mm512_setzero_si512 ();
+
+  res.x = foo_r (e);
+
+  if (check_union512i_q (res, v))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-4.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-4.c
new file mode 100644
index 00000000000..ea6421fcc03
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-4.c
@@ -0,0 +1,87 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512i
+__attribute__ ((noinline))
+foo (long long x, int i)
+{
+  switch (i)
+    {
+    case 7:
+      return _mm512_set_epi64 (x, 0, 0, 0, 0, 0, 0, 0);
+    case 6:
+      return _mm512_set_epi64 (0, x, 0, 0, 0, 0, 0, 0);
+    case 5:
+      return _mm512_set_epi64 (0, 0, x, 0, 0, 0, 0, 0);
+    case 4:
+      return _mm512_set_epi64 (0, 0, 0, x, 0, 0, 0, 0);
+    case 3:
+      return _mm512_set_epi64 (0, 0, 0, 0, x, 0, 0, 0);
+    case 2:
+      return _mm512_set_epi64 (0, 0, 0, 0, 0, x, 0, 0);
+    case 1:
+      return _mm512_set_epi64 (0, 0, 0, 0, 0, 0, x, 0);
+    case 0:
+      return _mm512_set_epi64 (0, 0, 0, 0, 0, 0, 0, x);
+    default:
+      abort ();
+    }
+}
+
+static __m512i
+__attribute__ ((noinline))
+foo_r (long long x, int i)
+{
+  switch (i)
+    {
+    case 0:
+      return _mm512_setr_epi64 (x, 0, 0, 0, 0, 0, 0, 0);
+    case 1:
+      return _mm512_setr_epi64 (0, x, 0, 0, 0, 0, 0, 0);
+    case 2:
+      return _mm512_setr_epi64 (0, 0, x, 0, 0, 0, 0, 0);
+    case 3:
+      return _mm512_setr_epi64 (0, 0, 0, x, 0, 0, 0, 0);
+    case 4:
+      return _mm512_setr_epi64 (0, 0, 0, 0, x, 0, 0, 0);
+    case 5:
+      return _mm512_setr_epi64 (0, 0, 0, 0, 0, x, 0, 0);
+    case 6:
+      return _mm512_setr_epi64 (0, 0, 0, 0, 0, 0, x, 0);
+    case 7:
+      return _mm512_setr_epi64 (0, 0, 0, 0, 0, 0, 0, x);
+    default:
+      abort ();
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  long long e = 0xabadbeef01234567LL;
+  long long v[8];
+  union512i_q res;
+  int i, j;
+
+  for (i = 0; i < 8; i++)
+    {
+      for (j = 0; j < 8; j++)
+	v[j] = 0;
+      v[i] = e;
+
+      res.x = foo (e, i);
+
+      if (check_union512i_q (res, v))
+	abort ();
+
+      res.x = _mm512_setzero_si512 ();
+
+      res.x = foo_r (e, i);
+
+      if (check_union512i_q (res, v))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-5.c b/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-5.c
new file mode 100644
index 00000000000..76ec4438897
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-set-v8di-5.c
@@ -0,0 +1,87 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static __m512i
+__attribute__ ((noinline))
+foo (long long x, int i)
+{
+  switch (i)
+    {
+    case 7:
+      return _mm512_set_epi64 (x, 1, 1, 1, 1, 1, 1, 1);
+    case 6:
+      return _mm512_set_epi64 (1, x, 1, 1, 1, 1, 1, 1);
+    case 5:
+      return _mm512_set_epi64 (1, 1, x, 1, 1, 1, 1, 1);
+    case 4:
+      return _mm512_set_epi64 (1, 1, 1, x, 1, 1, 1, 1);
+    case 3:
+      return _mm512_set_epi64 (1, 1, 1, 1, x, 1, 1, 1);
+    case 2:
+      return _mm512_set_epi64 (1, 1, 1, 1, 1, x, 1, 1);
+    case 1:
+      return _mm512_set_epi64 (1, 1, 1, 1, 1, 1, x, 1);
+    case 0:
+      return _mm512_set_epi64 (1, 1, 1, 1, 1, 1, 1, x);
+    default:
+      abort ();
+    }
+}
+
+static __m512i
+__attribute__ ((noinline))
+foo_r (long long x, int i)
+{
+  switch (i)
+    {
+    case 0:
+      return _mm512_setr_epi64 (x, 1, 1, 1, 1, 1, 1, 1);
+    case 1:
+      return _mm512_setr_epi64 (1, x, 1, 1, 1, 1, 1, 1);
+    case 2:
+      return _mm512_setr_epi64 (1, 1, x, 1, 1, 1, 1, 1);
+    case 3:
+      return _mm512_setr_epi64 (1, 1, 1, x, 1, 1, 1, 1);
+    case 4:
+      return _mm512_setr_epi64 (1, 1, 1, 1, x, 1, 1, 1);
+    case 5:
+      return _mm512_setr_epi64 (1, 1, 1, 1, 1, x, 1, 1);
+    case 6:
+      return _mm512_setr_epi64 (1, 1, 1, 1, 1, 1, x, 1);
+    case 7:
+      return _mm512_setr_epi64 (1, 1, 1, 1, 1, 1, 1, x);
+    default:
+      abort ();
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  long long e = 0xabadbeef01234567LL;
+  long long v[8];
+  union512i_q res;
+  int i, j;
+
+  for (i = 0; i < 8; i++)
+    {
+      for (j = 0; j < 8; j++)
+	v[j] = 1;
+      v[i] = e;
+
+      res.x = foo (e, i);
+
+      if (check_union512i_q (res, v))
+	abort ();
+
+      res.x = _mm512_setzero_si512 ();
+
+      res.x = foo_r (e, i);
+
+      if (check_union512i_q (res, v))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-setzero-pd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-setzero-pd-1.c
new file mode 100644
index 00000000000..f0589bd18a3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-setzero-pd-1.c
@@ -0,0 +1,21 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void static
+avx512f_test (void)
+{
+  int i;
+  union512d res;
+  double res_ref[8];
+
+  res.x = _mm512_setzero_pd ();
+
+  for (i = 0; i < 8; i++)
+    res_ref[i] = 0.0;
+
+  if (check_union512d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-setzero-ps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-setzero-ps-1.c
new file mode 100644
index 00000000000..5b1ee29e340
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-setzero-ps-1.c
@@ -0,0 +1,21 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void static
+avx512f_test (void)
+{
+  int i;
+  union512 res;
+  float res_ref[16];
+
+  res.x = _mm512_setzero_ps ();
+
+  for (i = 0; i < 16; i++)
+    res_ref[i] = 0.0;
+
+  if (check_union512 (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-setzero-si512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-setzero-si512-1.c
new file mode 100644
index 00000000000..1c60489b4fb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-setzero-si512-1.c
@@ -0,0 +1,21 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void static
+avx512f_test (void)
+{
+  int i;
+  union512i_q res;
+  long long res_ref[8];
+
+  res.x = _mm512_setzero_si512 ();
+
+  for (i = 0; i < 8; i++)
+    res_ref[i] = 0;
+
+  if (check_union512i_q (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vaddpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vaddpd-1.c
new file mode 100644
index 00000000000..8e37fec8e3d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vaddpd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_add_pd (x, x);
+  x = _mm512_mask_add_pd (x, m, x, x);
+  x = _mm512_maskz_add_pd (m, x, x);
+  x = _mm512_add_round_pd (x, x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_add_round_pd (x, m, x, x, _MM_FROUND_TO_NEG_INF);
+  x = _mm512_maskz_add_round_pd (m, x, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vaddpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vaddpd-2.c
new file mode 100644
index 00000000000..ce6918ed66e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vaddpd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (double *r, double *s1, double *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] + s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_add_pd) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_add_pd) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_add_pd) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vaddps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vaddps-1.c
new file mode 100644
index 00000000000..648fe486888
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vaddps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_add_ps (x, x);
+  x = _mm512_mask_add_ps (x, m, x, x);
+  x = _mm512_maskz_add_ps (m, x, x);
+  x = _mm512_add_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_add_round_ps (x, m, x, x, _MM_FROUND_TO_POS_INF);
+  x = _mm512_maskz_add_round_ps (m, x, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vaddps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vaddps-2.c
new file mode 100644
index 00000000000..6c982bcaffc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vaddps-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (float *r, float *s1, float *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] + s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN,) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_add_ps) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_add_ps) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_add_ps) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vaddsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vaddsd-1.c
new file mode 100644
index 00000000000..f0bc5cecc5d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vaddsd-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vaddsd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_add_round_sd (x1, x2, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vaddss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vaddss-1.c
new file mode 100644
index 00000000000..5a8491cfd20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vaddss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vaddss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_add_round_ss (x1, x2, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-valignd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-valignd-1.c
new file mode 100644
index 00000000000..693adb0577f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-valignd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "valignd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "valignd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "valignd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i z;
+volatile __mmask16 m1;
+
+void extern
+avx512f_test (void)
+{
+  z = _mm512_alignr_epi32 (z, z, 3);
+  z = _mm512_mask_alignr_epi32 (z, m1, z, z, 3);
+  z = _mm512_maskz_alignr_epi32 (m1, z, z, 3);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-valignd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-valignd-2.c
new file mode 100644
index 00000000000..3d2a71ca1c8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-valignd-2.c
@@ -0,0 +1,61 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+#define N (SIZE / 2)
+
+static void
+CALC (int *s1, int *s2, int *r)
+{
+  int i;
+  int s[2 * SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s[i] = s2[i];
+      s[i + SIZE] = s1[i];
+    }
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = s[i + N];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, s1, s2;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 2 * i;
+      s2.a[i] = i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_alignr_epi32) (s1.x, s2.x, N);
+  res2.x = INTRINSIC (_mask_alignr_epi32) (res2.x, mask, s1.x, s2.x, N);
+  res3.x = INTRINSIC (_maskz_alignr_epi32) (mask, s1.x, s2.x, N);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+      abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+      abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+      abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-valignq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-valignq-1.c
new file mode 100644
index 00000000000..a72946837a0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-valignq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "valignq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "valignq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "valignq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i z;
+volatile __mmask8 m1;
+
+void extern
+avx512f_test (void)
+{
+  z = _mm512_alignr_epi64 (z, z, 3);
+  z = _mm512_mask_alignr_epi64 (z, m1, z, z, 3);
+  z = _mm512_maskz_alignr_epi64 (m1, z, z, 3);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-valignq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-valignq-2.c
new file mode 100644
index 00000000000..b3c09c7b1a3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-valignq-2.c
@@ -0,0 +1,61 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+#define N (SIZE / 2)
+
+static void
+CALC (long long *s1, long long *s2, long long *r)
+{
+  int i;
+  long long s[2 * SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s[i] = s2[i];
+      s[i + SIZE] = s1[i];
+    }
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = s[i + N];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, s1, s2;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 2 * i;
+      s2.a[i] = i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_alignr_epi64) (s1.x, s2.x, N);
+  res2.x = INTRINSIC (_mask_alignr_epi64) (res2.x, mask, s1.x, s2.x, N);
+  res3.x = INTRINSIC (_maskz_alignr_epi64) (mask, s1.x, s2.x, N);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+      abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+      abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+      abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vblendmpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vblendmpd-1.c
new file mode 100644
index 00000000000..cb0e4c2504f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vblendmpd-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "(vblendmpd|vmovapd)\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_blend_pd (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vblendmpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vblendmpd-2.c
new file mode 100644
index 00000000000..1fe4cb61605
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vblendmpd-2.c
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (double *r, double *s1, double *s2, MASK_TYPE mask)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (mask & (1LL << i)) ? s2[i] : s1[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, d) res1, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+
+  res1.x = INTRINSIC (_mask_blend_pd) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a, mask);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vblendmps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vblendmps-1.c
new file mode 100644
index 00000000000..faee9955b64
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vblendmps-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "(vblendmps|vmovaps)\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_blend_ps (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vblendmps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vblendmps-2.c
new file mode 100644
index 00000000000..e92c70c37e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vblendmps-2.c
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (float *r, float *s1, float *s2, MASK_TYPE mask)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (mask & (1 << i)) ? s2[i] : s1[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN,) res1, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+
+  res1.x = INTRINSIC (_mask_blend_ps) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a, mask);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastf32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastf32x4-1.c
new file mode 100644
index 00000000000..2af23f11dbd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastf32x4-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vbroadcastf32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]|vshuff32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcastf32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vshuff32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcastf32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}|vshuff32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __m128 y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_broadcast_f32x4 (y);
+  x = _mm512_mask_broadcast_f32x4 (x, m, y);
+  x = _mm512_maskz_broadcast_f32x4 (m, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastf32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastf32x4-2.c
new file mode 100644
index 00000000000..79abcdc0d27
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastf32x4-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (float *r, float *s)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[i % 4];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN,) res1, res2, res3;
+  UNION_TYPE (128,) src;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < 4; i++)
+    {
+      src.a[i] = 34.67 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_broadcast_f32x4) (src.x);
+  res2.x = INTRINSIC (_mask_broadcast_f32x4) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_broadcast_f32x4) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE ()(res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO ()(res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastf64x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastf64x4-1.c
new file mode 100644
index 00000000000..dbc3967ccba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastf64x4-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vbroadcastf64x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]|vshuff64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcastf64x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vshuff64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcastf64x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}|vshuff64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __m256d y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_broadcast_f64x4 (y);
+  x = _mm512_mask_broadcast_f64x4 (x, m, y);
+  x = _mm512_maskz_broadcast_f64x4 (m, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastf64x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastf64x4-2.c
new file mode 100644
index 00000000000..bc5f6a1cc6f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastf64x4-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (double *r, double *s)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[i % 4];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3;
+  UNION_TYPE (256, d) src;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < 2; i++)
+    {
+      src.a[i] = 34.67 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_broadcast_f64x4) (src.x);
+  res2.x = INTRINSIC (_mask_broadcast_f64x4) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_broadcast_f64x4) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vbroadcasti32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcasti32x4-1.c
new file mode 100644
index 00000000000..743e1cbcc87
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcasti32x4-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vbroadcasti32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]|vshufi32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcasti32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vshufi32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcasti32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}|vshufi32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m128i y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_broadcast_i32x4 (y);
+  x = _mm512_mask_broadcast_i32x4 (x, m, y);
+  x = _mm512_maskz_broadcast_i32x4 (m, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vbroadcasti32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcasti32x4-2.c
new file mode 100644
index 00000000000..61dccc227a1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcasti32x4-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, int *s)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[i % 4];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3;
+  UNION_TYPE (128, i_d) src;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < 4; i++)
+    {
+      src.a[i] = 34 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_broadcast_i32x4) (src.x);
+  res2.x = INTRINSIC (_mask_broadcast_i32x4) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_broadcast_i32x4) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vbroadcasti64x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcasti64x4-1.c
new file mode 100644
index 00000000000..28a50ed8ccd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcasti64x4-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vbroadcasti64x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]|vshufi64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcasti64x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vshufi64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcasti64x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}|vshufi64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m256i y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_broadcast_i64x4 (y);
+  x = _mm512_mask_broadcast_i64x4 (x, m, y);
+  x = _mm512_maskz_broadcast_i64x4 (m, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vbroadcasti64x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcasti64x4-2.c
new file mode 100644
index 00000000000..6286fca8178
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcasti64x4-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (long long *r, long long *s)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[i % 4];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3;
+  UNION_TYPE (256, i_q) src;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < 2; i++)
+    {
+      src.a[i] = 34 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_broadcast_i64x4) (src.x);
+  res2.x = INTRINSIC (_mask_broadcast_i64x4) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_broadcast_i64x4) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastsd-1.c
new file mode 100644
index 00000000000..3d261afea75
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastsd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vbroadcastsd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcastsd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcastsd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __m128d y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_broadcastsd_pd (y);
+  x = _mm512_mask_broadcastsd_pd (x, m, y);
+  x = _mm512_maskz_broadcastsd_pd (m, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastsd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastsd-2.c
new file mode 100644
index 00000000000..3ecc1a7c588
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastsd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (double *r, double *s)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[0];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3;
+  UNION_TYPE (128, d) src;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < 2; i++)
+    {
+      src.a[i] = 1.5 + 34.67 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_broadcastsd_pd) (src.x);
+  res2.x = INTRINSIC (_mask_broadcastsd_pd) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_broadcastsd_pd) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastss-1.c
new file mode 100644
index 00000000000..4cc8cb78714
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastss-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vbroadcastss\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcastss\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcastss\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __m128 y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_broadcastss_ps (y);
+  x = _mm512_mask_broadcastss_ps (x, m, y);
+  x = _mm512_maskz_broadcastss_ps (m, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastss-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastss-2.c
new file mode 100644
index 00000000000..f3f339825bd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vbroadcastss-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (float *r, float *s)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[0];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN,) res1, res2, res3;
+  UNION_TYPE (128,) src;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < 4; i++)
+    {
+      src.a[i] = 1.5 + 34.67 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_broadcastss_ps) (src.x);
+  res2.x = INTRINSIC (_mask_broadcastss_ps) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_broadcastss_ps) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE ()(res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO ()(res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcmppd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcmppd-1.c
new file mode 100644
index 00000000000..fa3655610c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcmppd-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler "vcmppd\[ \\t\]+\[^\n\]*\[^\}\]%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vcmppd\[ \\t\]+\[^\n\]*\[^\}\]%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */
+/* { dg-final { scan-assembler "vcmppd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vcmppd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  m = _mm512_cmp_pd_mask (x, x, _CMP_FALSE_OQ);
+  m = _mm512_mask_cmp_pd_mask (m, x, x, _CMP_FALSE_OQ);
+  m = _mm512_cmp_round_pd_mask (x, x, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC);
+  m = _mm512_mask_cmp_round_pd_mask (m, x, x, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcmppd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcmppd-2.c
new file mode 100644
index 00000000000..333a83576b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcmppd-2.c
@@ -0,0 +1,75 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#include <math.h>
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+#if AVX512F_LEN == 512
+#define CMP(imm, rel)					\
+    dst_ref = 0;					\
+    for (i = 0; i < 8; i++)				\
+    {							\
+      dst_ref = (((int) rel) << i) | dst_ref;		\
+    }							\
+    source1.x = _mm512_loadu_pd(s1);			\
+    source2.x = _mm512_loadu_pd(s2);			\
+    dst1 = _mm512_cmp_pd_mask(source1.x, source2.x, imm);\
+    dst2 = _mm512_mask_cmp_pd_mask(mask, source1.x, source2.x, imm);\
+    if (dst_ref != dst1) abort();			\
+    if ((dst_ref & mask) != dst2) abort();
+#endif
+
+static void
+TEST ()
+{
+    UNION_TYPE (AVX512F_LEN, d) source1, source2;
+    MASK_TYPE dst1, dst2, dst_ref;
+    MASK_TYPE mask = MASK_VALUE;
+    int i;
+    double s1[8]={2134.3343, 6678.346, 453.345635, 54646.464,
+		  231.23311, 5674.455, 111.111111, 23241.152};
+    double s2[8]={41124.234, 6678.346, 8653.65635, 856.43576,
+		  231.23311, 4646.123, 111.111111, 124.12455};
+
+    CMP(_CMP_EQ_OQ, !isunordered(s1[i], s2[i]) && s1[i] == s2[i]);
+    CMP(_CMP_LT_OS, !isunordered(s1[i], s2[i]) && s1[i] < s2[i]);
+    CMP(_CMP_LE_OS, !isunordered(s1[i], s2[i]) && s1[i] <= s2[i]);
+    CMP(_CMP_UNORD_Q, isunordered(s1[i], s2[i]));
+    CMP(_CMP_NEQ_UQ, isunordered(s1[i], s2[i]) || s1[i] != s2[i]);
+    CMP(_CMP_NLT_US, isunordered(s1[i], s2[i]) || s1[i] >= s2[i]);
+    CMP(_CMP_NLE_US, isunordered(s1[i], s2[i]) || s1[i] > s2[i]);
+    CMP(_CMP_ORD_Q, !isunordered(s1[i], s2[i]));
+
+    CMP(_CMP_EQ_UQ, isunordered(s1[i], s2[i]) || s1[i] == s2[i]);
+    CMP(_CMP_NGE_US, isunordered(s1[i], s2[i]) || s1[i] < s2[i]);
+    CMP(_CMP_NGT_US, isunordered(s1[i], s2[i]) || s1[i] <= s2[i]);
+
+    CMP(_CMP_FALSE_OQ, 0);
+    CMP(_CMP_NEQ_OQ, !isunordered(s1[i], s2[i]) && s1[i] != s2[i]);
+    CMP(_CMP_GE_OS, !isunordered(s1[i], s2[i]) && s1[i] >= s2[i]);
+    CMP(_CMP_GT_OS, !isunordered(s1[i], s2[i]) && s1[i] > s2[i]);
+    CMP(_CMP_TRUE_UQ, 1);
+
+    CMP(_CMP_EQ_OS, !isunordered(s1[i], s2[i]) && s1[i] == s2[i]);
+    CMP(_CMP_LT_OQ, !isunordered(s1[i], s2[i]) && s1[i] < s2[i]);
+    CMP(_CMP_LE_OQ, !isunordered(s1[i], s2[i]) && s1[i] <= s2[i]);
+    CMP(_CMP_UNORD_S, isunordered(s1[i], s2[i]));
+    CMP(_CMP_NEQ_US, isunordered(s1[i], s2[i]) || s1[i] != s2[i]);
+    CMP(_CMP_NLT_UQ, isunordered(s1[i], s2[i]) || s1[i] >= s2[i]);
+    CMP(_CMP_NLE_UQ, isunordered(s1[i], s2[i]) || s1[i] > s2[i]);
+    CMP(_CMP_ORD_S, !isunordered(s1[i], s2[i]));
+    CMP(_CMP_EQ_US, isunordered(s1[i], s2[i]) || s1[i] == s2[i]);
+    CMP(_CMP_NGE_UQ, isunordered(s1[i], s2[i]) || s1[i] < s2[i]);
+    CMP(_CMP_NGT_UQ, isunordered(s1[i], s2[i]) || s1[i] <= s2[i]);
+    CMP(_CMP_FALSE_OS, 0);
+    CMP(_CMP_NEQ_OS, !isunordered(s1[i], s2[i]) && s1[i] != s2[i]);
+    CMP(_CMP_GE_OQ, !isunordered(s1[i], s2[i]) && s1[i] >= s2[i]);
+    CMP(_CMP_GT_OQ, !isunordered(s1[i], s2[i]) && s1[i] > s2[i]);
+    CMP(_CMP_TRUE_US, 1)
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcmpps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcmpps-1.c
new file mode 100644
index 00000000000..b90be8c726a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcmpps-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler "vcmpps\[ \\t\]+\[^\n\]*\[^\}\]%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vcmpps\[ \\t\]+\[^\n\]*\[^\}\]%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */
+/* { dg-final { scan-assembler "vcmpps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vcmpps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  m = _mm512_cmp_ps_mask (x, x, _CMP_FALSE_OQ);
+  m = _mm512_mask_cmp_ps_mask (m, x, x, _CMP_FALSE_OQ);
+  m = _mm512_cmp_round_ps_mask (x, x, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC);
+  m = _mm512_mask_cmp_round_ps_mask (m, x, x, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcmpps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcmpps-2.c
new file mode 100644
index 00000000000..5ffd470dbe2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcmpps-2.c
@@ -0,0 +1,79 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#include <math.h>
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+#if AVX512F_LEN == 512
+#define CMP(imm, rel)					\
+    dst_ref = 0;					\
+    for (i = 0; i < 16; i++)				\
+    {							\
+      dst_ref = (((int) rel) << i) | dst_ref;		\
+    }							\
+    source1.x = _mm512_loadu_ps(s1);			\
+    source2.x = _mm512_loadu_ps(s2);			\
+    dst1 = _mm512_cmp_ps_mask(source1.x, source2.x, imm);\
+    dst2 = _mm512_mask_cmp_ps_mask(mask, source1.x, source2.x, imm);\
+    if (dst_ref != dst1) abort();			\
+    if ((dst_ref & mask) != dst2) abort();
+#endif
+
+static void
+TEST ()
+{
+    UNION_TYPE (AVX512F_LEN,) source1, source2;
+    MASK_TYPE dst1, dst2, dst_ref;
+    MASK_TYPE mask = MASK_VALUE;
+    int i;
+    float s1[16] = {2134.3343, 6678.346, 453.345635, 54646.464,
+		    231.23311, 5674.455, 111.111111, 23241.152,
+		    123.14811, 1245.124, 244.151353, 53454.141,
+		    926.16717, 3733.261, 643.161644, 23514.633};
+    float s2[16] = {41124.234, 6678.346, 8653.65635, 856.43576,
+		    231.23311, 4646.123, 111.111111, 124.12455,
+		    123.14811, 1245.124, 244.151353, 53454.141,
+		    2134.3343, 6678.346, 453.345635, 54646.464};
+
+    CMP(_CMP_EQ_OQ, !isunordered(s1[i], s2[i]) && s1[i] == s2[i]);
+    CMP(_CMP_LT_OS, !isunordered(s1[i], s2[i]) && s1[i] < s2[i]);
+    CMP(_CMP_LE_OS, !isunordered(s1[i], s2[i]) && s1[i] <= s2[i]);
+    CMP(_CMP_UNORD_Q, isunordered(s1[i], s2[i]));
+    CMP(_CMP_NEQ_UQ, isunordered(s1[i], s2[i]) || s1[i] != s2[i]);
+    CMP(_CMP_NLT_US, isunordered(s1[i], s2[i]) || s1[i] >= s2[i]);
+    CMP(_CMP_NLE_US, isunordered(s1[i], s2[i]) || s1[i] > s2[i]);
+    CMP(_CMP_ORD_Q, !isunordered(s1[i], s2[i]));
+
+    CMP(_CMP_EQ_UQ, isunordered(s1[i], s2[i]) || s1[i] == s2[i]);
+    CMP(_CMP_NGE_US, isunordered(s1[i], s2[i]) || s1[i] < s2[i]);
+    CMP(_CMP_NGT_US, isunordered(s1[i], s2[i]) || s1[i] <= s2[i]);
+
+    CMP(_CMP_FALSE_OQ, 0);
+    CMP(_CMP_NEQ_OQ, !isunordered(s1[i], s2[i]) && s1[i] != s2[i]);
+    CMP(_CMP_GE_OS, !isunordered(s1[i], s2[i]) && s1[i] >= s2[i]);
+    CMP(_CMP_GT_OS, !isunordered(s1[i], s2[i]) && s1[i] > s2[i]);
+    CMP(_CMP_TRUE_UQ, 1);
+
+    CMP(_CMP_EQ_OS, !isunordered(s1[i], s2[i]) && s1[i] == s2[i]);
+    CMP(_CMP_LT_OQ, !isunordered(s1[i], s2[i]) && s1[i] < s2[i]);
+    CMP(_CMP_LE_OQ, !isunordered(s1[i], s2[i]) && s1[i] <= s2[i]);
+    CMP(_CMP_UNORD_S, isunordered(s1[i], s2[i]));
+    CMP(_CMP_NEQ_US, isunordered(s1[i], s2[i]) || s1[i] != s2[i]);
+    CMP(_CMP_NLT_UQ, isunordered(s1[i], s2[i]) || s1[i] >= s2[i]);
+    CMP(_CMP_NLE_UQ, isunordered(s1[i], s2[i]) || s1[i] > s2[i]);
+    CMP(_CMP_ORD_S, !isunordered(s1[i], s2[i]));
+    CMP(_CMP_EQ_US, isunordered(s1[i], s2[i]) || s1[i] == s2[i]);
+    CMP(_CMP_NGE_UQ, isunordered(s1[i], s2[i]) || s1[i] < s2[i]);
+    CMP(_CMP_NGT_UQ, isunordered(s1[i], s2[i]) || s1[i] <= s2[i]);
+    CMP(_CMP_FALSE_OS, 0);
+    CMP(_CMP_NEQ_OS, !isunordered(s1[i], s2[i]) && s1[i] != s2[i]);
+    CMP(_CMP_GE_OQ, !isunordered(s1[i], s2[i]) && s1[i] >= s2[i]);
+    CMP(_CMP_GT_OQ, !isunordered(s1[i], s2[i]) && s1[i] > s2[i]);
+    CMP(_CMP_TRUE_US, 1)
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcmpsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcmpsd-1.c
new file mode 100644
index 00000000000..7f92fbea386
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcmpsd-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler "vcmpsd\[ \\t\]+\[^\n\]*\[^\}\]%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vcmpsd\[ \\t\]+\[^\n\]*\[^\}\]%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */
+/* { dg-final { scan-assembler "vcmpsd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vcmpsd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  m = _mm_cmp_sd_mask (x, x, _CMP_FALSE_OQ);
+  m = _mm_mask_cmp_sd_mask (m, x, x, _CMP_FALSE_OQ);
+  m = _mm_cmp_round_sd_mask (x, x, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC);
+  m = _mm_mask_cmp_round_sd_mask (m, x, x, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcmpsd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcmpsd-2.c
new file mode 100644
index 00000000000..3e4729e4aac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcmpsd-2.c
@@ -0,0 +1,67 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-require-effective-target c99_runtime } */
+/* { dg-options "-O2 -mavx512f -std=c99" } */
+
+#include "avx512f-check.h"
+#include <math.h>
+
+double s1[2] = {2134.3343, 6678.346};
+double s2[2] = {1485.1288, 6678.346};
+
+__mmask8 dst_ref;
+
+#define CMP(imm, rel)					\
+    dst_ref = 0;					\
+    dst_ref = ((int) rel) | dst_ref;			\
+    source1 = _mm_loadu_pd(s1);				\
+    source2 = _mm_loadu_pd(s2);				\
+    dst = _mm_cmp_sd_mask(source1, source2, imm);	\
+    dst2 = _mm_mask_cmp_sd_mask(mask, source1, source2, imm);\
+    if (dst_ref != dst) abort();			\
+    if ((dst_ref & mask) != dst2) abort();
+
+static void
+avx512f_test ()
+{
+    __m128d source1, source2;
+    __mmask8 dst, dst2, mask;
+    mask = 1;
+    int i;
+
+    CMP(_CMP_EQ_OQ, !isunordered(s1[0], s2[0]) && s1[0] == s2[0]);
+    CMP(_CMP_LT_OS, !isunordered(s1[0], s2[0]) && s1[0] < s2[0]);
+    CMP(_CMP_LE_OS, !isunordered(s1[0], s2[0]) && s1[0] <= s2[0]);
+    CMP(_CMP_UNORD_Q, isunordered(s1[0], s2[0]));
+    CMP(_CMP_NEQ_UQ, isunordered(s1[0], s2[0]) || s1[0] != s2[0]);
+    CMP(_CMP_NLT_US, isunordered(s1[0], s2[0]) || s1[0] >= s2[0]);
+    CMP(_CMP_NLE_US, isunordered(s1[0], s2[0]) || s1[0] > s2[0]);
+    CMP(_CMP_ORD_Q, !isunordered(s1[0], s2[0]));
+
+    CMP(_CMP_EQ_UQ, isunordered(s1[0], s2[0]) || s1[0] == s2[0]);
+    CMP(_CMP_NGE_US, isunordered(s1[0], s2[0]) || s1[0] < s2[0]);
+    CMP(_CMP_NGT_US, isunordered(s1[0], s2[0]) || s1[0] <= s2[0]);
+
+    CMP(_CMP_FALSE_OQ, 0);
+    CMP(_CMP_NEQ_OQ, !isunordered(s1[0], s2[0]) && s1[0] != s2[0]);
+    CMP(_CMP_GE_OS, !isunordered(s1[0], s2[0]) && s1[0] >= s2[0]);
+    CMP(_CMP_GT_OS, !isunordered(s1[0], s2[0]) && s1[0] > s2[0]);
+    CMP(_CMP_TRUE_UQ, 1);
+
+    CMP(_CMP_EQ_OS, !isunordered(s1[0], s2[0]) && s1[0] == s2[0]);
+    CMP(_CMP_LT_OQ, !isunordered(s1[0], s2[0]) && s1[0] < s2[0]);
+    CMP(_CMP_LE_OQ, !isunordered(s1[0], s2[0]) && s1[0] <= s2[0]);
+    CMP(_CMP_UNORD_S, isunordered(s1[0], s2[0]));
+    CMP(_CMP_NEQ_US, isunordered(s1[0], s2[0]) || s1[0] != s2[0]);
+    CMP(_CMP_NLT_UQ, isunordered(s1[0], s2[0]) || s1[0] >= s2[0]);
+    CMP(_CMP_NLE_UQ, isunordered(s1[0], s2[0]) || s1[0] > s2[0]);
+    CMP(_CMP_ORD_S, !isunordered(s1[0], s2[0]));
+    CMP(_CMP_EQ_US, isunordered(s1[0], s2[0]) || s1[0] == s2[0]);
+    CMP(_CMP_NGE_UQ, isunordered(s1[0], s2[0]) || s1[0] < s2[0]);
+    CMP(_CMP_NGT_UQ, isunordered(s1[0], s2[0]) || s1[0] <= s2[0]);
+    CMP(_CMP_FALSE_OS, 0);
+    CMP(_CMP_NEQ_OS, !isunordered(s1[0], s2[0]) && s1[0] != s2[0]);
+    CMP(_CMP_GE_OQ, !isunordered(s1[0], s2[0]) && s1[0] >= s2[0]);
+    CMP(_CMP_GT_OQ, !isunordered(s1[0], s2[0]) && s1[0] > s2[0]);
+    CMP(_CMP_TRUE_US, 1)
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcmpss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcmpss-1.c
new file mode 100644
index 00000000000..9f370cb0e1e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcmpss-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler "vcmpss\[ \\t\]+\[^\n\]*\[^\}\]%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vcmpss\[ \\t\]+\[^\n\]*\[^\}\]%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */
+/* { dg-final { scan-assembler "vcmpss\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vcmpss\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  m = _mm_cmp_ss_mask (x, x, _CMP_FALSE_OQ);
+  m = _mm_mask_cmp_ss_mask (m, x, x, _CMP_FALSE_OQ);
+  m = _mm_cmp_round_ss_mask (x, x, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC);
+  m = _mm_mask_cmp_round_ss_mask (m, x, x, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcmpss-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcmpss-2.c
new file mode 100644
index 00000000000..7343cb05cdb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcmpss-2.c
@@ -0,0 +1,68 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-require-effective-target c99_runtime } */
+/* { dg-options "-O2 -mavx512f -std=c99" } */
+
+#include "avx512f-check.h"
+#include <math.h>
+
+float s1[4] = {2134.3343, 6678.346, 453.345635, 54646.464};
+float s2[4] = {1485.1288, 6678.346, 8653.65635, 856.43576};
+
+__mmask8 dst_ref;
+
+#define CMP(imm, rel)					\
+    dst_ref = 0;					\
+    dst_ref = ((int) rel) | dst_ref;			\
+    source1 = _mm_loadu_ps(s1);				\
+    source2 = _mm_loadu_ps(s2);				\
+    dst = _mm_cmp_ss_mask(source1, source2, imm);	\
+    dst2 = _mm_mask_cmp_ss_mask(mask, source1, source2, imm);\
+    if (dst_ref != dst) abort();			\
+    if ((dst_ref & mask)!= dst2) abort();
+
+static void
+avx512f_test ()
+{
+    __m128 source1, source2;
+    __mmask8 dst, dst2, mask;
+    int i;
+
+    mask = 1;
+
+    CMP(_CMP_EQ_OQ, !isunordered(s1[0], s2[0]) && s1[0] == s2[0]);
+    CMP(_CMP_LT_OS, !isunordered(s1[0], s2[0]) && s1[0] < s2[0]);
+    CMP(_CMP_LE_OS, !isunordered(s1[0], s2[0]) && s1[0] <= s2[0]);
+    CMP(_CMP_UNORD_Q, isunordered(s1[0], s2[0]));
+    CMP(_CMP_NEQ_UQ, isunordered(s1[0], s2[0]) || s1[0] != s2[0]);
+    CMP(_CMP_NLT_US, isunordered(s1[0], s2[0]) || s1[0] >= s2[0]);
+    CMP(_CMP_NLE_US, isunordered(s1[0], s2[0]) || s1[0] > s2[0]);
+    CMP(_CMP_ORD_Q, !isunordered(s1[0], s2[0]));
+
+    CMP(_CMP_EQ_UQ, isunordered(s1[0], s2[0]) || s1[0] == s2[0]);
+    CMP(_CMP_NGE_US, isunordered(s1[0], s2[0]) || s1[0] < s2[0]);
+    CMP(_CMP_NGT_US, isunordered(s1[0], s2[0]) || s1[0] <= s2[0]);
+
+    CMP(_CMP_FALSE_OQ, 0);
+    CMP(_CMP_NEQ_OQ, !isunordered(s1[0], s2[0]) && s1[0] != s2[0]);
+    CMP(_CMP_GE_OS, !isunordered(s1[0], s2[0]) && s1[0] >= s2[0]);
+    CMP(_CMP_GT_OS, !isunordered(s1[0], s2[0]) && s1[0] > s2[0]);
+    CMP(_CMP_TRUE_UQ, 1);
+
+    CMP(_CMP_EQ_OS, !isunordered(s1[0], s2[0]) && s1[0] == s2[0]);
+    CMP(_CMP_LT_OQ, !isunordered(s1[0], s2[0]) && s1[0] < s2[0]);
+    CMP(_CMP_LE_OQ, !isunordered(s1[0], s2[0]) && s1[0] <= s2[0]);
+    CMP(_CMP_UNORD_S, isunordered(s1[0], s2[0]));
+    CMP(_CMP_NEQ_US, isunordered(s1[0], s2[0]) || s1[0] != s2[0]);
+    CMP(_CMP_NLT_UQ, isunordered(s1[0], s2[0]) || s1[0] >= s2[0]);
+    CMP(_CMP_NLE_UQ, isunordered(s1[0], s2[0]) || s1[0] > s2[0]);
+    CMP(_CMP_ORD_S, !isunordered(s1[0], s2[0]));
+    CMP(_CMP_EQ_US, isunordered(s1[0], s2[0]) || s1[0] == s2[0]);
+    CMP(_CMP_NGE_UQ, isunordered(s1[0], s2[0]) || s1[0] < s2[0]);
+    CMP(_CMP_NGT_UQ, isunordered(s1[0], s2[0]) || s1[0] <= s2[0]);
+    CMP(_CMP_FALSE_OS, 0);
+    CMP(_CMP_NEQ_OS, !isunordered(s1[0], s2[0]) && s1[0] != s2[0]);
+    CMP(_CMP_GE_OQ, !isunordered(s1[0], s2[0]) && s1[0] >= s2[0]);
+    CMP(_CMP_GT_OQ, !isunordered(s1[0], s2[0]) && s1[0] > s2[0]);
+    CMP(_CMP_TRUE_US, 1)
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcomisd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcomisd-1.c
new file mode 100644
index 00000000000..7b5aff4e34b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcomisd-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "vcomisd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm"  } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile int res;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm_comi_round_sd (x, x, _CMP_LT_OS, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcomiss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcomiss-1.c
new file mode 100644
index 00000000000..bc504190487
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcomiss-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcomiss\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm" 1 } } */
+/* { dg-final { scan-assembler-times "vcomiss\[ \\t\]+\[^{}\n\]*%xmm" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile int res;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm_comi_round_ss (x, x, _CMP_LT_OS, _MM_FROUND_NO_EXC);
+}
+
+void extern
+avx512f_test_2 (void)
+{
+  res = _mm_comi_round_ss (x, x, _CMP_LT_OS, _MM_FROUND_CUR_DIRECTION);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcompresspd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcompresspd-1.c
new file mode 100644
index 00000000000..3f2cdff9c14
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcompresspd-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcompresspd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcompresspd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vcompresspd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+double *p;
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_compress_pd (x, m, x);
+  x = _mm512_maskz_compress_pd (m, x);
+
+  _mm512_mask_compressstoreu_pd (p, m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcompresspd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcompresspd-2.c
new file mode 100644
index 00000000000..4acbadbe729
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcompresspd-2.c
@@ -0,0 +1,62 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#define MASK ((1 << SIZE) - 1)
+#include <x86intrin.h>
+
+static void
+CALC (double *s, double *r, MASK_TYPE mask)
+{
+  int i, k;
+
+  for (i = 0, k = 0; i < SIZE; i++)
+    {
+      if (mask & (1 << i))
+	r[k++] = s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s, res1, res2;
+  double res3[SIZE];
+  MASK_TYPE compressed_mask, mask = MASK_VALUE;
+  double res_ref[SIZE];
+  int i, mask_bit_count, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 12345 * (i + 200) * sign;
+      res1.a[i] = DEFAULT_VALUE;
+      res3[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_mask_compress_pd) (res1.x, mask, s.x);
+  res2.x = INTRINSIC (_maskz_compress_pd) (mask, s.x);
+  INTRINSIC (_mask_compressstoreu_pd) (res3, mask, s.x);
+
+  mask_bit_count = __popcntd (mask & MASK);
+  compressed_mask = (1 << mask_bit_count) - 1;
+  CALC (s.a, res_ref, mask);
+
+  MASK_MERGE (d) (res_ref, compressed_mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, compressed_mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, compressed_mask, SIZE);
+  if (checkVd (res3, res_ref, SIZE))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcompressps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcompressps-1.c
new file mode 100644
index 00000000000..ab715c6fc09
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcompressps-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcompressps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcompressps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vcompressps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+float *p;
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_compress_ps (x, m, x);
+  x = _mm512_maskz_compress_ps (m, x);
+
+  _mm512_mask_compressstoreu_ps (p, m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcompressps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcompressps-2.c
new file mode 100644
index 00000000000..f996452b091
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcompressps-2.c
@@ -0,0 +1,62 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#define MASK ((1 << SIZE) - 1)
+#include <x86intrin.h>
+
+static void
+CALC (float *s, float *r, MASK_TYPE mask)
+{
+  int i, k;
+
+  for (i = 0, k = 0; i < SIZE; i++)
+    {
+      if (mask & (1 << i))
+	r[k++] = s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) s, res1, res2;
+  float res3[SIZE];
+  MASK_TYPE compressed_mask, mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int i, mask_bit_count, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 12345 * (i + 200) * sign;
+      res1.a[i] = DEFAULT_VALUE;
+      res3[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_mask_compress_ps) (res1.x, mask, s.x);
+  res2.x = INTRINSIC (_maskz_compress_ps) (mask, s.x);
+  INTRINSIC (_mask_compressstoreu_ps) (res3, mask, s.x);
+
+  mask_bit_count = __popcntd (mask & MASK);
+  compressed_mask = (1 << mask_bit_count) - 1;
+  CALC (s.a, res_ref, mask);
+
+  MASK_MERGE () (res_ref, compressed_mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, compressed_mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, compressed_mask, SIZE);
+  if (checkVf (res3, res_ref, SIZE))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtdq2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtdq2pd-1.c
new file mode 100644
index 00000000000..d2c616b08b5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtdq2pd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtdq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtdq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtdq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256i s;
+volatile __m512d res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepi32_pd (s);
+  res = _mm512_mask_cvtepi32_pd (res, m, s);
+  res = _mm512_maskz_cvtepi32_pd (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtdq2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtdq2pd-2.c
new file mode 100644
index 00000000000..77cdbab0eea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtdq2pd-2.c
@@ -0,0 +1,58 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SRC_SIZE ((AVX512F_LEN_HALF) / 32)
+#include "avx512f-mask-type.h"
+#define DST_SIZE ((AVX512F_LEN) / 64)
+
+static void
+CALC (int *s, double *r)
+{
+  int i;
+
+  for (i = 0; i < DST_SIZE; i++)
+    {
+      r[i] = (double) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN_HALF, i_d) s;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[DST_SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SRC_SIZE; i++)
+    {
+      s.a[i] = 123456 * (i + 2000) * sign;
+      sign = -sign;
+    }
+
+  for (i = 0; i < DST_SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_cvtepi32_pd) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepi32_pd) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepi32_pd) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, DST_SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, DST_SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtdq2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtdq2ps-1.c
new file mode 100644
index 00000000000..58e727d2814
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtdq2ps-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m512 res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepi32_ps (s);
+  res = _mm512_mask_cvtepi32_ps (res, m, s);
+  res = _mm512_maskz_cvtepi32_ps (m, s);
+  res = _mm512_cvt_roundepi32_ps (s, _MM_FROUND_TO_NEAREST_INT);
+  res = _mm512_mask_cvt_roundepi32_ps (res, m, s, _MM_FROUND_TO_POS_INF);
+  res = _mm512_maskz_cvt_roundepi32_ps (m, s, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtdq2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtdq2ps-2.c
new file mode 100644
index 00000000000..4a3e3aa4baf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtdq2ps-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *s, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (float) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s;
+  UNION_TYPE (AVX512F_LEN, ) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 123456 * (i + 2000) * sign;
+      res2.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_cvtepi32_ps) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepi32_ps) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepi32_ps) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2dq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2dq-1.c
new file mode 100644
index 00000000000..964878f92ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2dq-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d s;
+volatile __m256i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtpd_epi32 (s);
+  res = _mm512_mask_cvtpd_epi32 (res, m, s);
+  res = _mm512_maskz_cvtpd_epi32 (m, s);
+  res = _mm512_cvt_roundpd_epi32 (s, _MM_FROUND_TO_NEAREST_INT);
+  res = _mm512_mask_cvt_roundpd_epi32 (res, m, s, _MM_FROUND_TO_POS_INF);
+  res = _mm512_maskz_cvt_roundpd_epi32 (m, s, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2dq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2dq-2.c
new file mode 100644
index 00000000000..5ecb640aec5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2dq-2.c
@@ -0,0 +1,59 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SRC_SIZE ((AVX512F_LEN) / 64)
+#include "avx512f-mask-type.h"
+#define DST_SIZE ((AVX512F_LEN_HALF) / 32)
+
+static void
+CALC (double *s, unsigned *r)
+{
+  int i;
+
+  for (i = 0; i < SRC_SIZE; i++)
+    {
+      r[i] = (s[i] >= 0) ? (int) (s[i] + 0.5)
+			 : (int) (s[i] - 0.5);
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s;
+  UNION_TYPE (AVX512F_LEN_HALF, i_d) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[DST_SIZE] = { 0 };
+  int i, sign = 1;
+
+  for (i = 0; i < SRC_SIZE; i++)
+    {
+      s.a[i] = 123.456 * (i + 2000) * sign;
+      sign = -sign;
+    }
+
+  for (i = 0; i < DST_SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_cvtpd_epi32) (s.x);
+  res2.x = INTRINSIC (_mask_cvtpd_epi32) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtpd_epi32) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SRC_SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SRC_SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2ps-1.c
new file mode 100644
index 00000000000..457bb07700f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2ps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 6 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __m256 y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm512_cvtpd_ps (x);
+  y = _mm512_mask_cvtpd_ps (y, 4, x);
+  y = _mm512_maskz_cvtpd_ps (6, x);
+  y = _mm512_cvt_roundpd_ps (x, _MM_FROUND_TO_NEAREST_INT);
+  y = _mm512_mask_cvt_roundpd_ps (y, 4, x, _MM_FROUND_TO_NEG_INF);
+  y = _mm512_maskz_cvt_roundpd_ps (6, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2ps-2.c
new file mode 100644
index 00000000000..fa17ef9aa4c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2ps-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+void static
+CALC (float *e, UNION_TYPE (AVX512F_LEN, d) s1)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    e[i] = (float) s1.a[i];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s1;
+  UNION_TYPE (AVX512F_LEN_HALF,) u1, u2, u3;
+  MASK_TYPE mask = MASK_VALUE;
+  float e[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 0.12 * (i + 37.09);
+      u1.a[i] = DEFAULT_VALUE;
+      u2.a[i] = DEFAULT_VALUE;
+      u3.a[i] = DEFAULT_VALUE;
+    }
+
+  u1.x = INTRINSIC (_cvtpd_ps) (s1.x);
+  u2.x = INTRINSIC (_mask_cvtpd_ps) (u2.x, mask, s1.x);
+  u3.x = INTRINSIC (_maskz_cvtpd_ps) (mask, s1.x);
+
+  CALC (e, s1);
+
+  if (UNION_CHECK (AVX512F_LEN_HALF,) (u1, e))
+    abort ();
+
+  MASK_MERGE ()(e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF,) (u2, e))
+    abort ();
+
+  MASK_ZERO ()(e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF,) (u3, e))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2udq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2udq-1.c
new file mode 100644
index 00000000000..28bfb17aa99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2udq-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d s;
+volatile __m256i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtpd_epu32 (s);
+  res = _mm512_mask_cvtpd_epu32 (res, m, s);
+  res = _mm512_maskz_cvtpd_epu32 (m, s);
+  res = _mm512_cvt_roundpd_epu32 (s, _MM_FROUND_TO_NEAREST_INT);
+  res = _mm512_mask_cvt_roundpd_epu32 (res, m, s, _MM_FROUND_TO_POS_INF);
+  res = _mm512_maskz_cvt_roundpd_epu32 (m, s, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2udq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2udq-2.c
new file mode 100644
index 00000000000..24788d97a44
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtpd2udq-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SRC_SIZE ((AVX512F_LEN) / 64)
+#include "avx512f-mask-type.h"
+#define DST_SIZE ((AVX512F_LEN_HALF) / 32)
+
+static void
+CALC (double *s, unsigned *r)
+{
+  int i;
+
+  for (i = 0; i < DST_SIZE; i++)
+    {
+      r[i] = (unsigned) (s[i] + 0.5);
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s;
+  UNION_TYPE (AVX512F_LEN_HALF, i_d) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned res_ref[DST_SIZE] = { 0 };
+  int i;
+
+  for (i = 0; i < SRC_SIZE; i++)
+    {
+      s.a[i] = 123.456 * (i + 2000);
+    }
+
+  for (i = 0; i < DST_SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_cvtpd_epu32) (s.x);
+  res2.x = INTRINSIC (_mask_cvtpd_epu32) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtpd_epu32) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SRC_SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SRC_SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtph2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtph2ps-1.c
new file mode 100644
index 00000000000..b22a950dd66
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtph2ps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 6 } } */
+/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256i x;
+volatile __m512 y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm512_cvtph_ps (x);
+  y = _mm512_mask_cvtph_ps (y, 4, x);
+  y = _mm512_maskz_cvtph_ps (6, x);
+  y = _mm512_cvt_roundph_ps (x, _MM_FROUND_NO_EXC);
+  y = _mm512_mask_cvt_roundph_ps (y, 4, x, _MM_FROUND_NO_EXC);
+  y = _mm512_maskz_cvt_roundph_ps (6, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtph2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtph2ps-2.c
new file mode 100644
index 00000000000..725e1e87bb7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtph2ps-2.c
@@ -0,0 +1,84 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN_HALF, i_w) val;
+  UNION_TYPE (AVX512F_LEN,) res1,res2,res3;
+  MASK_TYPE mask = MASK_VALUE;
+  float exp[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      res1.a[i] = DEFAULT_VALUE;
+      res2.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  exp[0] = 1;
+  exp[1] = 2;
+  exp[2] = 4;
+  exp[3] = 8;
+#if AVX512F_LEN > 128
+  exp[4] = -1;
+  exp[5] = -2;
+  exp[6] = -4;
+  exp[7] = -8;
+#endif
+#if AVX512F_LEN > 256
+  exp[8] = 1;
+  exp[9] = 2;
+  exp[10] = 4;
+  exp[11] = 8;
+  exp[12] = -1;
+  exp[13] = -2;
+  exp[14] = -4;
+  exp[15] = -8;
+#endif
+
+  val.a[0] = 0x3c00;
+  val.a[1] = 0x4000;
+  val.a[2] = 0x4400;
+  val.a[3] = 0x4800;
+#if AVX512F_LEN > 128
+  val.a[4] = 0xbc00;
+  val.a[5] = 0xc000;
+  val.a[6] = 0xc400;
+  val.a[7] = 0xc800;
+#endif
+#if AVX512F_LEN > 256
+  val.a[8] = 0x3c00;
+  val.a[9] = 0x4000;
+  val.a[10] = 0x4400;
+  val.a[11] = 0x4800;
+  val.a[12] = 0xbc00;
+  val.a[13] = 0xc000;
+  val.a[14] = 0xc400;
+  val.a[15] = 0xc800;
+#endif
+
+  res1.x = _mm512_cvtph_ps (val.x);
+  res2.x = _mm512_mask_cvtph_ps (res2.x, mask, val.x);
+  res3.x = _mm512_maskz_cvtph_ps (mask, val.x);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, exp))
+    abort ();
+
+  MASK_MERGE () (exp, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res2, exp))
+    abort ();
+
+  MASK_ZERO () (exp, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res3, exp))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2dq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2dq-1.c
new file mode 100644
index 00000000000..2db36e9c135
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2dq-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 s;
+volatile __m512i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtps_epi32 (s);
+  res = _mm512_mask_cvtps_epi32 (res, m, s);
+  res = _mm512_maskz_cvtps_epi32 (m, s);
+  res = _mm512_cvt_roundps_epi32 (s, _MM_FROUND_TO_NEAREST_INT);
+  res = _mm512_mask_cvt_roundps_epi32 (res, m, s, _MM_FROUND_TO_POS_INF);
+  res = _mm512_maskz_cvt_roundps_epi32 (m, s, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2dq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2dq-2.c
new file mode 100644
index 00000000000..a35c2ad02dd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2dq-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, float *s)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    r[i] = (s[i] >= 0) ? (int) (s[i] + 0.5) : (int) (s[i] - 0.5);
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN,) src;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      res2.a[i] = DEFAULT_VALUE;
+      src.a[i] = 1.5 + 34.67 * i * sign;
+      sign = sign * -1;
+    }
+
+  res1.x = INTRINSIC (_cvtps_epi32) (src.x);
+  res2.x = INTRINSIC (_mask_cvtps_epi32) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtps_epi32) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2pd-1.c
new file mode 100644
index 00000000000..c6fc4733720
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2pd-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256 s;
+volatile __m512d res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtps_pd (s);
+  res = _mm512_mask_cvtps_pd (res, m, s);
+  res = _mm512_maskz_cvtps_pd (m, s);
+  res = _mm512_cvt_roundps_pd (s, _MM_FROUND_NO_EXC);
+  res = _mm512_mask_cvt_roundps_pd (res, m, s, _MM_FROUND_NO_EXC);
+  res = _mm512_maskz_cvt_roundps_pd (m, s, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2pd-2.c
new file mode 100644
index 00000000000..5bed4f33fc9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2pd-2.c
@@ -0,0 +1,58 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SRC_SIZE ((AVX512F_LEN_HALF) / 32)
+#include "avx512f-mask-type.h"
+#define DST_SIZE ((AVX512F_LEN) / 64)
+
+static void
+CALC (float *s, double *r)
+{
+  int i;
+
+  for (i = 0; i < DST_SIZE; i++)
+    {
+      r[i] = (double) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN_HALF, ) s;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[DST_SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SRC_SIZE; i++)
+    {
+      s.a[i] = 123.456 * (i + 2000) * sign;
+      sign = -sign;
+    }
+
+  for (i = 0; i < DST_SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_cvtps_pd) (s.x);
+  res2.x = INTRINSIC (_mask_cvtps_pd) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtps_pd) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, DST_SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, DST_SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-1.c
new file mode 100644
index 00000000000..daf701484a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvtps2ph\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vcvtps2ph\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2ph\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __m256i y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm512_cvtps_ph (x, 0);
+  y = _mm512_maskz_cvtps_ph (4, x, 0);
+  y = _mm512_mask_cvtps_ph (y, 2, x, 0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-2.c
new file mode 100644
index 00000000000..6fe9effd6a0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-2.c
@@ -0,0 +1,84 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN,) val;
+  UNION_TYPE (AVX512F_LEN_HALF, i_w) res1,res2,res3;
+  MASK_TYPE mask = MASK_VALUE;
+  short exp[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      res1.a[i] = DEFAULT_VALUE;
+      res2.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  val.a[0] = 1;
+  val.a[1] = 2;
+  val.a[2] = 4;
+  val.a[3] = 8;
+#if AVX512F_LEN > 128
+  val.a[4] = -1;
+  val.a[5] = -2;
+  val.a[6] = -4;
+  val.a[7] = -8;
+#endif
+#if AVX512F_LEN > 256
+  val.a[8] = 1;
+  val.a[9] = 2;
+  val.a[10] = 4;
+  val.a[11] = 8;
+  val.a[12] = -1;
+  val.a[13] = -2;
+  val.a[14] = -4;
+  val.a[15] = -8;
+#endif
+
+  exp[0] = 0x3c00;
+  exp[1] = 0x4000;
+  exp[2] = 0x4400;
+  exp[3] = 0x4800;
+#if AVX512F_LEN > 128
+  exp[4] = 0xbc00;
+  exp[5] = 0xc000;
+  exp[6] = 0xc400;
+  exp[7] = 0xc800;
+#endif
+#if AVX512F_LEN > 256
+  exp[8] = 0x3c00;
+  exp[9] = 0x4000;
+  exp[10] = 0x4400;
+  exp[11] = 0x4800;
+  exp[12] = 0xbc00;
+  exp[13] = 0xc000;
+  exp[14] = 0xc400;
+  exp[15] = 0xc800;
+#endif
+
+  res1.x = _mm512_cvtps_ph (val.x, 0);
+  res2.x = _mm512_mask_cvtps_ph (res2.x, mask, val.x, 0);
+  res3.x = _mm512_maskz_cvtps_ph (mask, val.x, 0);
+
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res1, exp))
+    abort ();
+
+  MASK_MERGE (i_w) (exp, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res2, exp))
+    abort ();
+
+  MASK_ZERO (i_w) (exp, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res3, exp))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2udq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2udq-1.c
new file mode 100644
index 00000000000..dfc08ab10d4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2udq-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 s;
+volatile __m512i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtps_epu32 (s);
+  res = _mm512_mask_cvtps_epu32 (res, m, s);
+  res = _mm512_maskz_cvtps_epu32 (m, s);
+  res = _mm512_cvt_roundps_epu32 (s, _MM_FROUND_TO_NEAREST_INT);
+  res = _mm512_mask_cvt_roundps_epu32 (res, m, s, _MM_FROUND_TO_NEG_INF);
+  res = _mm512_maskz_cvt_roundps_epu32 (m, s, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2udq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2udq-2.c
new file mode 100644
index 00000000000..7826e2d795c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2udq-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (unsigned *r, float *s)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    r[i] = (unsigned) (s[i] + 0.5);
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN,) src;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1.5 + 34.67 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtps_epu32) (src.x);
+  res2.x = INTRINSIC (_mask_cvtps_epu32) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtps_epu32) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si-1.c
new file mode 100644
index 00000000000..84a10da4b6e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvtsd2si\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile unsigned y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvt_roundsd_i32 (x, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si64-1.c
new file mode 100644
index 00000000000..ca2ff58b3b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si64-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvtsd2siq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile unsigned long long y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvt_roundsd_i64 (x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2ss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2ss-1.c
new file mode 100644
index 00000000000..8cb51c42a99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2ss-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtsd2ss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 s1, r;
+volatile __m128d s2;
+
+void extern
+avx512f_test (void)
+{
+  r = _mm_cvt_roundsd_ss (s1, s2, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2usi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2usi-1.c
new file mode 100644
index 00000000000..c5e80aed47d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2usi-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvtsd2usi\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtsd2usi\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile unsigned y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvtsd_u32 (x);
+  y = _mm_cvt_roundsd_u32 (x, _MM_FROUND_TO_NEG_INF);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2usi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2usi-2.c
new file mode 100644
index 00000000000..e53012446e0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2usi-2.c
@@ -0,0 +1,20 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void static
+avx512f_test (void)
+{
+  union128d s1;
+  unsigned int d;
+  unsigned int e;
+
+  s1.x = _mm_set_pd (24.43, 68.346);
+  d =  _mm_cvtsd_u32 (s1.x);
+  e = (unsigned int)(s1.a[0] + 0.5);
+
+  if (e != d)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2usi64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2usi64-1.c
new file mode 100644
index 00000000000..9edecd31d8f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2usi64-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvtsd2usi\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtsd2usi\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile unsigned long long y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvtsd_u64 (x);
+  y = _mm_cvt_roundsd_u64 (x, _MM_FROUND_TO_POS_INF);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2usi64-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2usi64-2.c
new file mode 100644
index 00000000000..92843d9e361
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2usi64-2.c
@@ -0,0 +1,20 @@
+/* { dg-do run { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void static
+avx512f_test (void)
+{
+  union128d s1;
+  unsigned long long d;
+  unsigned long long e;
+
+  s1.x = _mm_set_pd (24.43, 68.346);
+  d =  _mm_cvtsd_u64 (s1.x);
+  e = (unsigned long long)(s1.a[0] + 0.5);
+
+  if (e != d)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2sd64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2sd64-1.c
new file mode 100644
index 00000000000..2d49094131e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2sd64-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtsi2sdq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile long long n;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_cvt_roundi64_sd (x, n, _MM_FROUND_TO_POS_INF);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss-1.c
new file mode 100644
index 00000000000..9768a570169
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtsi2ss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile int n;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_cvt_roundi32_ss (x, n, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss64-1.c
new file mode 100644
index 00000000000..c9d2daf363f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss64-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtsi2ssq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile long long n;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_cvt_roundi64_ss (x, n, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2sd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2sd-1.c
new file mode 100644
index 00000000000..5b6a43f5471
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2sd-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtss2sd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d s1, r;
+volatile __m128 s2;
+
+void extern
+avx512f_test (void)
+{
+  r = _mm_cvt_roundss_sd (s1, s2, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si-1.c
new file mode 100644
index 00000000000..1e52fea6396
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvtss2si\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile unsigned y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvt_roundss_i32 (x, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si64-1.c
new file mode 100644
index 00000000000..bc3e301e231
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si64-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvtss2siq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile unsigned long long y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvt_roundss_i64 (x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2usi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2usi-1.c
new file mode 100644
index 00000000000..70fcfe82c39
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2usi-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvtss2usi\[ \\t\]+\[^\n\]*%xmm\[0-9\]"  2 } } */
+/* { dg-final { scan-assembler-times "vcvtss2usi\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile unsigned y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvtss_u32 (x);
+  y = _mm_cvt_roundss_u32 (x, _MM_FROUND_TO_NEG_INF);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2usi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2usi-2.c
new file mode 100644
index 00000000000..bdfab830956
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2usi-2.c
@@ -0,0 +1,20 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void static
+avx512f_test (void)
+{
+  union128 s1;
+  unsigned int d;
+  unsigned int e;
+
+  s1.x = _mm_set_ps (24.43, 68.346, 35.7765, 34508.51);
+  d =  _mm_cvtss_u32 (s1.x);
+  e = (unsigned int)(s1.a[0] + 0.5);
+
+  if (e != d)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2usi64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2usi64-1.c
new file mode 100644
index 00000000000..0dd46cd9347
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2usi64-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvtss2usi\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2  } } */
+/* { dg-final { scan-assembler-times "vcvtss2usi\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile unsigned long long y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvtss_u64 (x);
+  y = _mm_cvt_roundss_u64 (x, _MM_FROUND_TO_POS_INF);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2usi64-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2usi64-2.c
new file mode 100644
index 00000000000..d19da31719c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2usi64-2.c
@@ -0,0 +1,20 @@
+/* { dg-do run { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void static
+avx512f_test (void)
+{
+  union128 s1;
+  unsigned long long d;
+  unsigned long long e;
+
+  s1.x = _mm_set_ps (24.43, 68.346, 12.34, 80.67);
+  d =  _mm_cvtss_u64 (s1.x);
+  e = (unsigned long long)(s1.a[0] + 0.5);
+
+  if (e != d)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttpd2dq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttpd2dq-1.c
new file mode 100644
index 00000000000..5fad1e354c9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttpd2dq-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d s;
+volatile __m256i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvttpd_epi32 (s);
+  res = _mm512_mask_cvttpd_epi32 (res, m, s);
+  res = _mm512_maskz_cvttpd_epi32 (m, s);
+  res = _mm512_cvtt_roundpd_epi32 (s, _MM_FROUND_NO_EXC);
+  res = _mm512_mask_cvtt_roundpd_epi32 (res, m, s, _MM_FROUND_NO_EXC);
+  res = _mm512_maskz_cvtt_roundpd_epi32 (m, s, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttpd2dq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttpd2dq-2.c
new file mode 100644
index 00000000000..f73c5c3c9f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttpd2dq-2.c
@@ -0,0 +1,58 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SRC_SIZE ((AVX512F_LEN) / 64)
+#include "avx512f-mask-type.h"
+#define DST_SIZE ((AVX512F_LEN_HALF) / 32)
+
+static void
+CALC (double *s, int *r)
+{
+  int i;
+
+  for (i = 0; i < SRC_SIZE; i++)
+    {
+      r[i] = (int) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s;
+  UNION_TYPE (AVX512F_LEN_HALF, i_d) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[DST_SIZE] = { 0 };
+  int i, sign = 1;
+
+  for (i = 0; i < SRC_SIZE; i++)
+    {
+      s.a[i] = 123.456 * (i + 2000) * sign;
+      sign = -sign;
+    }
+
+  for (i = 0; i < DST_SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_cvttpd_epi32) (s.x);
+  res2.x = INTRINSIC (_mask_cvttpd_epi32) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvttpd_epi32) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SRC_SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SRC_SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttpd2udq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttpd2udq-1.c
new file mode 100644
index 00000000000..36f2e40c59b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttpd2udq-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d s;
+volatile __m256i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvttpd_epu32 (s);
+  res = _mm512_mask_cvttpd_epu32 (res, m, s);
+  res = _mm512_maskz_cvttpd_epu32 (m, s);
+  res = _mm512_cvtt_roundpd_epu32 (s, _MM_FROUND_NO_EXC);
+  res = _mm512_mask_cvtt_roundpd_epu32 (res, m, s, _MM_FROUND_NO_EXC);
+  res = _mm512_maskz_cvtt_roundpd_epu32 (m, s, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttpd2udq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttpd2udq-2.c
new file mode 100644
index 00000000000..a8d3adc8d46
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttpd2udq-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SRC_SIZE ((AVX512F_LEN) / 64)
+#include "avx512f-mask-type.h"
+#define DST_SIZE ((AVX512F_LEN_HALF) / 32)
+
+static void
+CALC (double *s, unsigned *r)
+{
+  int i;
+
+  for (i = 0; i < DST_SIZE; i++)
+    {
+      r[i] = (unsigned) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s;
+  UNION_TYPE (AVX512F_LEN_HALF, i_d) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned res_ref[DST_SIZE] = { 0 };
+  int i;
+
+  for (i = 0; i < SRC_SIZE; i++)
+    {
+      s.a[i] = 123.456 * (i + 2000);
+    }
+
+  for (i = 0; i < DST_SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_cvttpd_epu32) (s.x);
+  res2.x = INTRINSIC (_mask_cvttpd_epu32) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvttpd_epu32) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SRC_SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SRC_SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttps2dq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttps2dq-1.c
new file mode 100644
index 00000000000..a156dbee9f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttps2dq-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 s;
+volatile __m512i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvttps_epi32 (s);
+  res = _mm512_mask_cvttps_epi32 (res, m, s);
+  res = _mm512_maskz_cvttps_epi32 (m, s);
+  res = _mm512_cvtt_roundps_epi32 (s, _MM_FROUND_NO_EXC);
+  res = _mm512_mask_cvtt_roundps_epi32 (res, m, s, _MM_FROUND_NO_EXC);
+  res = _mm512_maskz_cvtt_roundps_epi32 (m, s, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttps2dq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttps2dq-2.c
new file mode 100644
index 00000000000..f2cb5c708d2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttps2dq-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, float *s)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    r[i] = (int) s[i];
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN,) src;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      res2.a[i] = DEFAULT_VALUE;
+      src.a[i] = 1.5 + 34.67 * i * sign;
+      sign = sign * -1;
+    }
+
+  res1.x = INTRINSIC (_cvttps_epi32) (src.x);
+  res2.x = INTRINSIC (_mask_cvttps_epi32) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvttps_epi32) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttps2udq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttps2udq-1.c
new file mode 100644
index 00000000000..ffbfdfca328
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttps2udq-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 s;
+volatile __m512i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvttps_epu32 (s);
+  res = _mm512_mask_cvttps_epu32 (res, m, s);
+  res = _mm512_maskz_cvttps_epu32 (m, s);
+  res = _mm512_cvtt_roundps_epu32 (s, _MM_FROUND_NO_EXC);
+  res = _mm512_mask_cvtt_roundps_epu32 (res, m, s, _MM_FROUND_NO_EXC);
+  res = _mm512_maskz_cvtt_roundps_epu32 (m, s, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttps2udq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttps2udq-2.c
new file mode 100644
index 00000000000..2b0212e1c54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttps2udq-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (unsigned *r, float *s)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    r[i] = (unsigned) s[i];
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN,) src;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1.5 + 34.67 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvttps_epu32) (src.x);
+  res2.x = INTRINSIC (_mask_cvttps_epu32) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvttps_epu32) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si-1.c
new file mode 100644
index 00000000000..e813a24a0a1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvttsd2si\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttsd2si\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvttsd_i32 (x);
+  y = _mm_cvtt_roundsd_i32 (x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si-2.c
new file mode 100644
index 00000000000..a447a873421
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si-2.c
@@ -0,0 +1,28 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+#include "avx512f-mask-type.h"
+#include "avx512f-helper.h"
+
+static int
+__attribute__ ((noinline, unused))
+test (__m128d x)
+{
+  return _mm_cvttsd_i32 (x);
+}
+
+static void
+avx512f_test (void)
+{
+  union128d s1;
+  int res, res_ref;
+
+  s1.x = _mm_set_pd (123.321, 456.987);
+  res = test (s1.x);
+  res_ref = (int) s1.a[0];
+
+  if (res != res_ref)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si64-1.c
new file mode 100644
index 00000000000..a3b870c1004
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si64-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvttsd2siq\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttsd2siq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile long long y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvttsd_i64 (x);
+  y = _mm_cvtt_roundsd_i64 (x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si64-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si64-2.c
new file mode 100644
index 00000000000..7b759c1fa9e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si64-2.c
@@ -0,0 +1,28 @@
+/* { dg-do run { target { ! { ia32 } } } } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+#include "avx512f-mask-type.h"
+#include "avx512f-helper.h"
+
+static int
+__attribute__ ((noinline, unused))
+test (__m128d x)
+{
+  return _mm_cvttsd_i64 (x);
+}
+
+static void
+avx512f_test (void)
+{
+  union128d s1;
+  long long res, res_ref;
+
+  s1.x = _mm_set_pd (123.321, 456.987);
+  res = test (s1.x);
+  res_ref = (long long) s1.a[0];
+
+  if (res != res_ref)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2usi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2usi-1.c
new file mode 100644
index 00000000000..3a88517a738
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2usi-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvttsd2usi\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttsd2usi\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile unsigned y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvttsd_u32 (x);
+  y = _mm_cvtt_roundsd_u32 (x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2usi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2usi-2.c
new file mode 100644
index 00000000000..00f7eb6e5d6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2usi-2.c
@@ -0,0 +1,27 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static unsigned int
+__attribute__((noinline, unused))
+test (union128d s1)
+{
+  return _mm_cvttsd_u32 (s1.x);
+}
+
+void static
+avx512f_test (void)
+{
+  union128d s1;
+  unsigned int d;
+  unsigned int e;
+
+  s1.x = _mm_set_pd (24.43, 68.346);
+  d =  test (s1);
+  e = (unsigned int)s1.a[0];
+
+  if (e != d)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2usi64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2usi64-1.c
new file mode 100644
index 00000000000..87bbcb7be6e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2usi64-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvttsd2usi\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttsd2usi\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile unsigned long long y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvttsd_u64 (x);
+  y = _mm_cvtt_roundsd_u64 (x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2usi64-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2usi64-2.c
new file mode 100644
index 00000000000..4aa45ef8264
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2usi64-2.c
@@ -0,0 +1,27 @@
+/* { dg-do run { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static unsigned long long
+__attribute__((noinline, unused))
+test (union128d s1)
+{
+  return _mm_cvttsd_u64 (s1.x);
+}
+
+void static
+avx512f_test (void)
+{
+  union128d s1;
+  unsigned long long d;
+  unsigned long long e;
+
+  s1.x = _mm_set_pd (24.43, 68.346);
+  d =  test (s1);
+  e = (unsigned long long)s1.a[0];
+
+  if (e != d)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si-1.c
new file mode 100644
index 00000000000..7669a1729a2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvttss2si\[ \\t\]+\[^\n\]*%xmm\[0-9\]"  2 } } */
+/* { dg-final { scan-assembler-times "vcvttss2si\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvttss_i32 (x);
+  y = _mm_cvtt_roundss_i32 (x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si-2.c
new file mode 100644
index 00000000000..2aa62c07140
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si-2.c
@@ -0,0 +1,28 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+#include "avx512f-mask-type.h"
+#include "avx512f-helper.h"
+
+static int
+__attribute__ ((noinline, unused))
+test (__m128 x)
+{
+  return _mm_cvttss_i32 (x);
+}
+
+static void
+avx512f_test (void)
+{
+  union128 s1;
+  int res, res_ref;
+
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  res = test (s1.x);
+  res_ref = (int) s1.a[0];
+
+  if (res != res_ref)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si64-1.c
new file mode 100644
index 00000000000..4888d6d1d9a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si64-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvttss2siq\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2  } } */
+/* { dg-final { scan-assembler-times "vcvttss2siq\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile long long y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvttss_i64 (x);
+  y = _mm_cvtt_roundss_i64 (x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si64-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si64-2.c
new file mode 100644
index 00000000000..cf33b997a8e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si64-2.c
@@ -0,0 +1,28 @@
+/* { dg-do run { target { ! { ia32 } } } } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+#include "avx512f-mask-type.h"
+#include "avx512f-helper.h"
+
+static int
+__attribute__ ((noinline, unused))
+test (__m128 x)
+{
+  return _mm_cvttss_i64 (x);
+}
+
+static void
+avx512f_test (void)
+{
+  union128 s1;
+  long long res, res_ref;
+
+  s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
+  res = test (s1.x);
+  res_ref = (long long) s1.a[0];
+
+  if (res != res_ref)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2usi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2usi-1.c
new file mode 100644
index 00000000000..b270276352c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2usi-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvttss2usi\[ \\t\]+\[^\n\]*%xmm\[0-9\]"  2 } } */
+/* { dg-final { scan-assembler-times "vcvttss2usi\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile unsigned y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvttss_u32 (x);
+  y = _mm_cvtt_roundss_u32 (x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2usi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2usi-2.c
new file mode 100644
index 00000000000..4d19104776b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2usi-2.c
@@ -0,0 +1,27 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static unsigned int
+__attribute__((noinline, unused))
+test (union128 s1)
+{
+  return _mm_cvttss_u32 (s1.x);
+}
+
+void static
+avx512f_test (void)
+{
+  union128 s1;
+  unsigned int d;
+  unsigned int e;
+
+  s1.x = _mm_set_ps (24.43, 68.346, 45.12, 90.97);
+  d =  test (s1);
+  e = (unsigned int)s1.a[0];
+
+  if (e != d)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2usi64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2usi64-1.c
new file mode 100644
index 00000000000..7c3b473c3b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2usi64-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vcvttss2usi\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2  } } */
+/* { dg-final { scan-assembler-times "vcvttss2usi\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile unsigned long long y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm_cvttss_u64 (x);
+  y = _mm_cvtt_roundss_u64 (x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2usi64-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2usi64-2.c
new file mode 100644
index 00000000000..85f55d6cd7d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2usi64-2.c
@@ -0,0 +1,27 @@
+/* { dg-do run { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static unsigned long long
+__attribute__((noinline, unused))
+test (union128 s1)
+{
+  return _mm_cvttss_u64 (s1.x);
+}
+
+void static
+avx512f_test (void)
+{
+  union128 s1;
+  unsigned long long d;
+  unsigned long long e;
+
+  s1.x = _mm_set_ps (24.43, 68.346, 10.756, 89.145);
+  d =  test (s1);
+  e = (unsigned long long)s1.a[0];
+
+  if (e != d)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtudq2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtudq2pd-1.c
new file mode 100644
index 00000000000..933e785e866
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtudq2pd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtudq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtudq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtudq2pd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256i s;
+volatile __m512d res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepu32_pd (s);
+  res = _mm512_mask_cvtepu32_pd (res, m, s);
+  res = _mm512_maskz_cvtepu32_pd (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtudq2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtudq2pd-2.c
new file mode 100644
index 00000000000..814a7b769c2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtudq2pd-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SRC_SIZE ((AVX512F_LEN_HALF) / 32)
+#include "avx512f-mask-type.h"
+#define DST_SIZE ((AVX512F_LEN) / 64)
+
+static void
+CALC (unsigned *s, double *r)
+{
+  int i;
+
+  for (i = 0; i < DST_SIZE; i++)
+    {
+      r[i] = (double) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN_HALF, i_d) s;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[DST_SIZE];
+  int i;
+
+  for (i = 0; i < SRC_SIZE; i++)
+    {
+      s.a[i] = 123456 * (i + 2000);
+    }
+
+  for (i = 0; i < DST_SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_cvtepu32_pd) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepu32_pd) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepu32_pd) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, DST_SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, DST_SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtudq2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtudq2ps-1.c
new file mode 100644
index 00000000000..a42a58890a2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtudq2ps-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m512 res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepu32_ps (s);
+  res = _mm512_mask_cvtepu32_ps (res, m, s);
+  res = _mm512_maskz_cvtepu32_ps (m, s);
+  res = _mm512_cvt_roundepu32_ps (s, _MM_FROUND_TO_NEAREST_INT);
+  res = _mm512_mask_cvt_roundepu32_ps (res, m, s, _MM_FROUND_TO_NEG_INF);
+  res = _mm512_maskz_cvt_roundepu32_ps (m, s, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtudq2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtudq2ps-2.c
new file mode 100644
index 00000000000..c43df063abc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtudq2ps-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (unsigned *s, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (float) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s;
+  UNION_TYPE (AVX512F_LEN, ) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 123456 * (i + 2000);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtepu32_ps) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepu32_ps) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepu32_ps) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-1.c
new file mode 100644
index 00000000000..b00c321c500
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "vcvtusi2sd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile unsigned n;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_cvtu32_sd (x, n);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-2.c
new file mode 100644
index 00000000000..2100cbeb423
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-2.c
@@ -0,0 +1,31 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static void
+  __attribute__ ((noinline, unused))
+compute_vcvtusi2sd (double *s1, unsigned s2, double *r)
+{
+  r[0] = (double) s2;
+  r[1] = s1[1];
+}
+
+static void
+avx512f_test (void)
+{
+  union128d s1, res;
+  unsigned s2;
+  double res_ref[2];
+
+  s1.x = _mm_set_pd (-24.43, -43.35);
+  s2 = 0xFEDCA987;
+
+  res.x = _mm_cvtu32_sd (s1.x, s2);
+
+  compute_vcvtusi2sd (s1.a, s2, res_ref);
+
+  if (check_union128d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c
new file mode 100644
index 00000000000..097cfa27b51
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtusi2sd\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2sd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile unsigned long long n;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_cvtu64_sd (x, n);
+  x = _mm_cvt_roundu64_sd (x, n, _MM_FROUND_TO_POS_INF);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-2.c
new file mode 100644
index 00000000000..997e21bb54d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-2.c
@@ -0,0 +1,31 @@
+/* { dg-do run { target { ! { ia32 } } } } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static void
+  __attribute__ ((noinline, unused))
+compute_vcvtusi2sd (double *s1, unsigned long long s2, double *r)
+{
+  r[0] = (double) s2;
+  r[1] = s1[1];
+}
+
+static void
+avx512f_test (void)
+{
+  union128d s1, res;
+  unsigned long long s2;
+  double res_ref[4];
+
+  s1.x = _mm_set_pd (-24.43, -43.35);
+  s2 = 0xFEDCBA9876543210;
+
+  res.x = _mm_cvtu64_sd (s1.x, s2);
+
+  compute_vcvtusi2sd (s1.a, s2, res_ref);
+
+  if (check_union128d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-1.c
new file mode 100644
index 00000000000..93b53fd543e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtusi2ss\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2ss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile unsigned n;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_cvtu32_ss (x, n);
+  x = _mm_cvt_roundu32_ss (x, n, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-2.c
new file mode 100644
index 00000000000..b5f67dd0ba0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-2.c
@@ -0,0 +1,33 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static void
+  __attribute__ ((noinline, unused))
+compute_vcvtusi2ss (float *s1, unsigned s2, float *r)
+{
+  r[0] = (float) s2;
+  r[1] = s1[1];
+  r[2] = s1[2];
+  r[3] = s1[3];
+}
+
+static void
+avx512f_test (void)
+{
+  union128 s1, res;
+  unsigned s2;
+  float res_ref[4];
+
+  s1.x = _mm_set_ps (-24.43, 68.346, -43.35, 546.46);
+  s2 = 0xFEDCA987;
+
+  res.x = _mm_cvtu32_ss (s1.x, s2);
+
+  compute_vcvtusi2ss (s1.a, s2, res_ref);
+
+  if (check_union128 (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c
new file mode 100644
index 00000000000..f1f691e88d8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vcvtusi2ss\[ \\t\]+\[^\n\]*%xmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtusi2ss\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile unsigned long long n;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_cvtu64_ss (x, n);
+  x = _mm_cvt_roundu64_ss (x, n, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-2.c
new file mode 100644
index 00000000000..eeb499aac9f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-2.c
@@ -0,0 +1,33 @@
+/* { dg-do run { target { ! { ia32 } } } } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+static void
+  __attribute__ ((noinline, unused))
+compute_vcvtusi2ss (float *s1, unsigned long long s2, float *r)
+{
+  r[0] = (float) s2;
+  r[1] = s1[1];
+  r[2] = s1[2];
+  r[3] = s1[3];
+}
+
+static void
+avx512f_test (void)
+{
+  union128 s1, res;
+  unsigned long long s2;
+  float res_ref[4];
+
+  s1.x = _mm_set_ps (-24.43, 68.346, -43.35, 546.46);
+  s2 = 0xFEDCBA9876543210;
+
+  res.x = _mm_cvtu64_ss (s1.x, s2);
+
+  compute_vcvtusi2ss (s1.a, s2, res_ref);
+
+  if (check_union128 (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vdivpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vdivpd-1.c
new file mode 100644
index 00000000000..660c9566342
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vdivpd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_div_pd (x, x);
+  x = _mm512_mask_div_pd (x, m, x, x);
+  x = _mm512_maskz_div_pd (m, x, x);
+  x = _mm512_div_round_pd (x, x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_div_round_pd (x, m, x, x, _MM_FROUND_TO_NEG_INF);
+  x = _mm512_maskz_div_round_pd (m, x, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vdivpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vdivpd-2.c
new file mode 100644
index 00000000000..761ee20f898
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vdivpd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (double *r, double *s1, double *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] / s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign + 1.0;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_div_pd) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_div_pd) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_div_pd) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vdivps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vdivps-1.c
new file mode 100644
index 00000000000..8274440f7ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vdivps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_div_ps (x, x);
+  x = _mm512_mask_div_ps (x, m, x, x);
+  x = _mm512_maskz_div_ps (m, x, x);
+  x = _mm512_div_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_div_round_ps (x, m, x, x, _MM_FROUND_TO_POS_INF);
+  x = _mm512_maskz_div_round_ps (m, x, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vdivps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vdivps-2.c
new file mode 100644
index 00000000000..5249bbdf4d2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vdivps-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (float *r, float *s1, float *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] / s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN,) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign + 1.0;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_div_ps) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_div_ps) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_div_ps) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vdivsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vdivsd-1.c
new file mode 100644
index 00000000000..95df56cc2f3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vdivsd-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vdivsd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x1, x2;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_div_round_sd (x1, x2, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vdivss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vdivss-1.c
new file mode 100644
index 00000000000..5c6eb947ad0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vdivss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vdivss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_div_round_ss (x1, x2, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vec-init.c b/gcc/testsuite/gcc.target/i386/avx512f-vec-init.c
new file mode 100644
index 00000000000..acbd34f3f36
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vec-init.c
@@ -0,0 +1,121 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+%zmm" 2 } } */
+/* { dg-final { scan-assembler-times "vpbroadcastd" 1 } } */
+/* { dg-final { scan-assembler-times "vpbroadcastq" 1 } } */
+/* { dg-final { scan-assembler-times "vpbroadcastb" 2 } } */
+/* { dg-final { scan-assembler-times "vpbroadcastw" 2 } } */
+/* { dg-final { scan-assembler-times "vbroadcastss" 1 } } */
+/* { dg-final { scan-assembler-times "vbroadcastsd" 1 } } */
+
+#include <x86intrin.h>
+
+typedef char __v64qi __attribute__ ((vector_size (64)));
+typedef short __v32hi __attribute__ ((vector_size (64)));
+
+__v64qi foo_1 (char c)
+{
+  __v64qi v1 = {
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c
+  };
+
+  return v1;
+}
+
+__v32hi foo_2 (short c)
+{
+  __v32hi v1 = {
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c
+  };
+
+  return v1;
+}
+
+__v16si foo_3 (int c)
+{
+  __v16si v1 = {
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c
+  };
+
+  return v1;
+}
+
+__v8di foo_4 (long long c)
+{
+  __v8di v1 = {
+      c, c, c, c, c, c, c, c
+  };
+
+  return v1;
+}
+
+__v32qi foo_5 (char c)
+{
+  __v32qi v1 = {
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c
+  };
+
+  return v1;
+}
+
+__v16hi foo_6 (short c)
+{
+  __v16hi v1 = {
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c
+  };
+
+  return v1;
+}
+
+__v8si foo_7 (int c)
+{
+  __v8si v1 = {
+      c, c, c, c, c, c, c, c
+  };
+
+  return v1;
+}
+
+__v4di foo_8 (long long c)
+{
+  __v4di v1 = {
+      c, c, c, c
+  };
+
+  return v1;
+}
+
+
+__v16qi foo_9 (char c)
+{
+  __v16qi v1 = {
+      c, c, c, c, c, c, c, c,
+      c, c, c, c, c, c, c, c
+  };
+
+  return v1;
+}
+
+__v8hi foo_10(short c)
+{
+  __v8hi v1 = {
+      c, c, c, c, c, c, c, c
+  };
+
+  return v1;
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vec-unpack.c b/gcc/testsuite/gcc.target/i386/avx512f-vec-unpack.c
new file mode 100644
index 00000000000..8dcdac7b063
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vec-unpack.c
@@ -0,0 +1,127 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mavx512f" } */
+
+long long *D;
+int *S;
+short *H;
+char *Q;
+
+long long foo_unpack_1 (int low, int high, int ind)
+{
+  int i;
+
+  for (i = low; i <= high; i++)
+    D[i] *= S[i];
+
+  return D[ind];
+}
+
+long long foo_unpack_2 (int low, int high, int ind)
+{
+  int i;
+
+  for (i = low; i <= high; i++)
+    D[i] *= H[i];
+
+  return D[ind];
+}
+
+long long foo_unpack_3 (int low, int high, int ind)
+{
+  int i;
+
+  for (i = low; i <= high; i++)
+    D[i] *= Q[i];
+
+  return D[ind];
+}
+
+int foo_unpack_4 (int low, int high, int ind)
+{
+  int i;
+
+  for (i = low; i <= high; i++)
+    S[i] *= H[i];
+
+  return S[ind];
+}
+
+int foo_unpack_5 (int low, int high, int ind)
+{
+  int i;
+
+  for (i = low; i <= high; i++)
+    S[i] *= Q[i];
+
+  return S[ind];
+}
+
+short foo_unpack_6 (int low, int high, int ind)
+{
+  int i;
+
+  for (i = low; i <= high; i++)
+    H[i] *= Q[i];
+
+  return H[ind];
+}
+
+int foo_expand_1 (int low, int high, int ind)
+{
+  int i;
+
+  for (i = low; i <= high; i++)
+    S[i] *= D[i];
+
+  return S[ind];
+}
+
+short foo_expand_2 (int low, int high, int ind)
+{
+  int i;
+
+  for (i = low; i <= high; i++)
+    H[i] *= D[i];
+
+  return H[ind];
+}
+
+char foo_expand_3 (int low, int high, int ind)
+{
+  int i;
+
+  for (i = low; i <= high; i++)
+    Q[i] *= D[i];
+
+  return Q[ind];
+}
+
+short foo_expand_4 (int low, int high, int ind)
+{
+  int i;
+
+  for (i = low; i <= high; i++)
+    H[i] *= S[i];
+
+  return H[ind];
+}
+
+char foo_expand_5 (int low, int high, int ind)
+{
+  int i;
+
+  for (i = low; i <= high; i++)
+    Q[i] *= S[i];
+
+  return Q[ind];
+}
+
+char foo_expand_6 (int low, int high, int ind)
+{
+  int i;
+
+  for (i = low; i <= high; i++)
+    Q[i] *= H[i];
+
+  return Q[ind];
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vexpandpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vexpandpd-1.c
new file mode 100644
index 00000000000..fc121656f20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vexpandpd-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vexpandpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vexpandpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+
+#include <immintrin.h>
+
+double *p;
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_expand_pd (x, m, x);
+  x = _mm512_maskz_expand_pd (m, x);
+
+  x = _mm512_mask_expandloadu_pd (x, m, p);
+  x = _mm512_maskz_expandloadu_pd (m, p);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vexpandpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vexpandpd-2.c
new file mode 100644
index 00000000000..088a2dd02e1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vexpandpd-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (double *s, double *r, MASK_TYPE mask)
+{
+  int i, k;
+
+  for (i = 0, k = 0; i < SIZE; i++)
+    {
+      if (mask & (1 << i))
+	r[i] = s[k++];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s1, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  double s2[SIZE];
+  double res_ref1[SIZE];
+  double res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 123.456 * (i + 200) * sign;
+      s2[i] = 789.012 * (i + 300) * sign;
+      res1.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_mask_expand_pd) (res1.x, mask, s1.x);
+  res2.x = INTRINSIC (_maskz_expand_pd) (mask, s1.x);
+  res3.x = INTRINSIC (_mask_expandloadu_pd) (res3.x, mask, s2);
+  res4.x = INTRINSIC (_maskz_expandloadu_pd) (mask, s2);
+
+  CALC (s1.a, res_ref1, mask);
+  CALC (s2, res_ref2, mask);
+
+  MASK_MERGE (d) (res_ref1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref1))
+    abort ();
+
+  MASK_ZERO (d) (res_ref1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref1))
+    abort ();
+
+  MASK_MERGE (d) (res_ref2, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref2))
+    abort ();
+
+  MASK_ZERO (d) (res_ref2, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res4, res_ref2))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vexpandps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vexpandps-1.c
new file mode 100644
index 00000000000..fcf87642b40
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vexpandps-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vexpandps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vexpandps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+
+#include <immintrin.h>
+
+float *p;
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_expand_ps (x, m, x);
+  x = _mm512_maskz_expand_ps (m, x);
+
+  x = _mm512_mask_expandloadu_ps (x, m, p);
+  x = _mm512_maskz_expandloadu_ps (m, p);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vexpandps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vexpandps-2.c
new file mode 100644
index 00000000000..1faf3dfe917
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vexpandps-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (float *s, float *r, MASK_TYPE mask)
+{
+  int i, k;
+
+  for (i = 0, k = 0; i < SIZE; i++)
+    {
+      if (mask & (1 << i))
+	r[i] = s[k++];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) s1, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  float s2[SIZE];
+  float res_ref1[SIZE];
+  float res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 123.456 * (i + 200) * sign;
+      s2[i] = 789.012 * (i + 300) * sign;
+      res1.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_mask_expand_ps) (res1.x, mask, s1.x);
+  res2.x = INTRINSIC (_maskz_expand_ps) (mask, s1.x);
+  res3.x = INTRINSIC (_mask_expandloadu_ps) (res3.x, mask, s2);
+  res4.x = INTRINSIC (_maskz_expandloadu_ps) (mask, s2);
+
+  CALC (s1.a, res_ref1, mask);
+  CALC (s2, res_ref2, mask);
+
+  MASK_MERGE () (res_ref1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref1))
+    abort ();
+
+  MASK_ZERO () (res_ref1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref1))
+    abort ();
+
+  MASK_MERGE () (res_ref2, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref2))
+    abort ();
+
+  MASK_ZERO () (res_ref2, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res4, res_ref2))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vextractf32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vextractf32x4-1.c
new file mode 100644
index 00000000000..b32d161ba9a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vextractf32x4-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vextractf32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vextractf32x4\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vextractf32x4\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __m128 y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm512_extractf32x4_ps (x, 1);
+  y = _mm512_mask_extractf32x4_ps (y, 2, x, 1);
+  y = _mm512_maskz_extractf32x4_ps (2, x, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vextractf32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vextractf32x4-2.c
new file mode 100644
index 00000000000..35377b4302a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vextractf32x4-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "string.h"
+
+void
+CALC (UNION_TYPE (AVX512F_LEN,) s1, float *res_ref, int mask)
+{
+  memset (res_ref, 0, 16);
+  memcpy (res_ref, s1.a + mask * 4, 16);
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN,) s1;
+  union128 res1, res2, res3;
+  float res_ref[4];
+  MASK_TYPE mask = MASK_VALUE;
+  int j;
+
+  for (j = 0; j < SIZE; j++)
+    {
+      s1.a[j] = j * j / 4.56;
+    }
+
+  for (j = 0; j < 4; j++)
+    {
+      res1.a[j] = DEFAULT_VALUE;
+      res2.a[j] = DEFAULT_VALUE;
+      res3.a[j] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_extractf32x4_ps) (s1.x, 1);
+  res2.x = INTRINSIC (_mask_extractf32x4_ps) (res2.x, mask, s1.x, 1);
+  res3.x = INTRINSIC (_maskz_extractf32x4_ps) (mask, s1.x, 1);
+  CALC (s1, res_ref, 1);
+
+  if (check_union128 (res1, res_ref))
+    abort ();
+
+  MASK_MERGE ()(res_ref, mask, 4);
+  if (check_union128 (res2, res_ref))
+    abort ();
+
+  MASK_ZERO ()(res_ref, mask, 4);
+  if (check_union128 (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vextractf64x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vextractf64x4-1.c
new file mode 100644
index 00000000000..6259ac80624
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vextractf64x4-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vextractf64x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vextractf64x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vextractf64x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __m256d y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm512_extractf64x4_pd (x, 1);
+  y = _mm512_maskz_extractf64x4_pd (2, x, 1);
+  y = _mm512_mask_extractf64x4_pd (y, 2, x, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vextractf64x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vextractf64x4-2.c
new file mode 100644
index 00000000000..b73044917b5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vextractf64x4-2.c
@@ -0,0 +1,65 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512f" } */
+
+#include <string.h>
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+
+void static
+avx512f_test (void)
+{
+  union512d s1;
+  union256d res1, res2, res3;
+  __mmask8 mask = 0xBA;
+  double res_ref[4];
+  int j;
+
+  for (j = 0; j < 8; j++)
+    {
+      s1.a[j] = j * j / 4.56;
+    }
+
+  for (j = 0; j < 4; j++)
+    {
+      res1.a[j] = DEFAULT_VALUE;
+      res2.a[j] = DEFAULT_VALUE;
+      res3.a[j] = DEFAULT_VALUE;
+    }
+
+  res1.x = _mm512_extractf64x4_pd (s1.x, 0);
+  res2.x = _mm512_mask_extractf64x4_pd (res2.x, mask, s1.x, 0);
+  res3.x = _mm512_maskz_extractf64x4_pd (mask, s1.x, 0);
+
+  memset (res_ref, 0, 32);
+  memcpy (res_ref, s1.a, 32);
+
+  if (check_union256d (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, 4);
+  if (check_union256d (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, 4);
+  if (check_union256d (res3, res_ref))
+    abort ();
+
+  res1.x = _mm512_extractf64x4_pd (s1.x, 1);
+  res2.x = _mm512_mask_extractf64x4_pd (res2.x, mask, s1.x, 1);
+  res3.x = _mm512_maskz_extractf64x4_pd (mask, s1.x, 1);
+
+  memset (res_ref, 0, 32);
+  memcpy (res_ref, s1.a + 4, 32);
+
+  if (check_union256d (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, 4);
+  if (check_union256d (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, 4);
+  if (check_union256d (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vextracti32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vextracti32x4-1.c
new file mode 100644
index 00000000000..87c92f7b5d8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vextracti32x4-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vextracti32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vextracti32x4\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vextracti32x4\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m128i y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm512_extracti32x4_epi32 (x, 1);
+  y = _mm512_mask_extracti32x4_epi32 (y, 2, x, 1);
+  y = _mm512_maskz_extracti32x4_epi32 (2, x, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vextracti32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vextracti32x4-2.c
new file mode 100644
index 00000000000..1ea77b03422
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vextracti32x4-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "string.h"
+
+void
+CALC (UNION_TYPE (AVX512F_LEN, i_d) s1, int *res_ref, int mask)
+{
+  memset (res_ref, 0, 16);
+  memcpy (res_ref, s1.a + mask * 4, 16);
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1;
+  union128i_d res1, res2, res3;
+  int res_ref[4];
+  MASK_TYPE mask = MASK_VALUE;
+  int j;
+
+  for (j = 0; j < SIZE; j++)
+    {
+      s1.a[j] = j * j / 4.56;
+    }
+
+  for (j = 0; j < 4; j++)
+    {
+      res1.a[j] = DEFAULT_VALUE;
+      res2.a[j] = DEFAULT_VALUE;
+      res3.a[j] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_extracti32x4_epi32) (s1.x, 1);
+  res2.x =
+    INTRINSIC (_mask_extracti32x4_epi32) (res2.x, mask, s1.x, 1);
+  res3.x = INTRINSIC (_maskz_extracti32x4_epi32) (mask, s1.x, 1);
+  CALC (s1, res_ref, 1);
+
+  if (check_union128i_d (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, 4);
+  if (check_union128i_d (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, 4);
+  if (check_union128i_d (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vextracti64x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vextracti64x4-1.c
new file mode 100644
index 00000000000..71268bcbe52
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vextracti64x4-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vextracti64x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vextracti64x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vextracti64x4\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m256i y;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm512_extracti64x4_epi64 (x, 1);
+  y = _mm512_mask_extracti64x4_epi64 (y, 2, x, 1);
+  y = _mm512_maskz_extracti64x4_epi64 (2, x, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vextracti64x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vextracti64x4-2.c
new file mode 100644
index 00000000000..9753d2461f0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vextracti64x4-2.c
@@ -0,0 +1,62 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512f" } */
+
+#include <string.h>
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+
+void static
+avx512f_test (void)
+{
+  union512i_q s1;
+  union256i_q res1, res2, res3;
+  __mmask8 mask = 0xBA;
+  long long int res_ref[4];
+  int j;
+
+  for (j = 0; j < 8; j++)
+    s1.a[j] = j * j;
+
+  for (j = 0; j < 4; j++)
+    {
+      res1.a[j] = DEFAULT_VALUE;
+      res2.a[j] = DEFAULT_VALUE;
+      res3.a[j] = DEFAULT_VALUE;
+    }
+  res1.x = _mm512_extracti64x4_epi64 (s1.x, 0);
+  res2.x = _mm512_mask_extracti64x4_epi64 (res2.x, mask, s1.x, 0);
+  res3.x = _mm512_maskz_extracti64x4_epi64 (mask, s1.x, 0);
+
+  memset (res_ref, 0, 32);
+  memcpy (res_ref, s1.a, 32);
+
+  if (check_union256i_q (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, 4);
+  if (check_union256i_q (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, 4);
+  if (check_union256i_q (res3, res_ref))
+    abort ();
+
+  res1.x = _mm512_extracti64x4_epi64 (s1.x, 1);
+  res2.x = _mm512_mask_extracti64x4_epi64 (res2.x, mask, s1.x, 1);
+  res3.x = _mm512_maskz_extracti64x4_epi64 (mask, s1.x, 1);
+
+  memset (res_ref, 0, 32);
+  memcpy (res_ref, s1.a + 4, 32);
+
+  if (check_union256i_q (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, 4);
+  if (check_union256i_q (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, 4);
+  if (check_union256i_q (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmpd-1.c
new file mode 100644
index 00000000000..e452ebcffd0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmpd-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vfixupimmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vfixupimmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfixupimmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfixupimmpd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vfixupimmpd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfixupimmpd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x1, x2;
+volatile __m512i y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fixupimm_pd (x1, x2, y, 3);
+  x1 = _mm512_mask_fixupimm_pd (x1, m, x2, y, 3);
+  x1 = _mm512_maskz_fixupimm_pd (m, x1, x2, y, 3);
+  x1 = _mm512_fixupimm_round_pd (x1, x2, y, 3, _MM_FROUND_NO_EXC);
+  x1 = _mm512_mask_fixupimm_round_pd (x1, m, x2, y, 3, _MM_FROUND_NO_EXC);
+  x1 = _mm512_maskz_fixupimm_round_pd (m, x1, x2, y, 3, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmpd-2.c
new file mode 100644
index 00000000000..263fecd5f71
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmpd-2.c
@@ -0,0 +1,115 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include "math.h"
+#include "values.h"
+
+static void
+CALC (double *r, double src, long long tbl)
+{
+  switch (tbl & 0xf)
+    {
+    case 0:
+      *r = src;
+      break;
+    case 1:
+      *r = src;
+      break;
+    case 2:
+      *r = signbit (src) ? -NAN : NAN;
+      break;
+    case 3:
+      *r = -NAN;
+      break;
+    case 4:
+      *r = -INFINITY;
+      break;
+    case 5:
+      *r = INFINITY;
+      break;
+    case 6:
+      *r = signbit (src) ? -INFINITY : INFINITY;
+      break;
+    case 7:
+      *r = 1.0 / -INFINITY;
+      break;
+    case 8:
+      *r = 0.0;
+      break;
+    case 9:
+      *r = -1.0;
+      break;
+    case 10:
+      *r = 1.0;
+      break;
+    case 11:
+      *r = 1.0 / 2.0;
+      break;
+    case 12:
+      *r = 90.0;
+      break;
+    case 13:
+      *r = M_PI_2;
+      break;
+    case 14:
+      *r = MAXDOUBLE;
+      break;
+    case 15:
+      *r = -MAXDOUBLE;
+      break;
+    default:
+      abort ();
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, j, k;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3, s1;
+  UNION_TYPE (AVX512F_LEN, i_q) s2;
+  double res_ref[SIZE];
+
+
+  float vals[2] = { -10, 10 };
+  int controls[8] = {0x11111111, 0x77777777, 0x77777777, 0x88888888,
+    0x99999999, 0xaaaaaaaa, 0xbbbbbbbb, 0xcccccccc};
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < 2; i++)
+    {
+      for (j = 0; j < SIZE; j++)
+	{
+	  s1.a[j] = vals[i];
+	  s2.a[j] = controls[j];
+	  res1.a[j] = DEFAULT_VALUE;
+	  res2.a[j] = DEFAULT_VALUE;
+	  res3.a[j] = DEFAULT_VALUE;
+
+	  CALC (&res_ref[j], s1.a[j], s2.a[j]);
+	}
+
+      res1.x = INTRINSIC (_fixupimm_pd) (res1.x, s1.x, s2.x, 0);
+      res2.x = INTRINSIC (_mask_fixupimm_pd) (res2.x, mask, s1.x, s2.x, 0);
+      res3.x = INTRINSIC (_maskz_fixupimm_pd) (mask, res3.x, s1.x, s2.x, 0);
+
+      if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+	abort ();
+
+      MASK_MERGE(d) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+	abort ();
+      MASK_ZERO(d) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+	abort ();
+    }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmps-1.c
new file mode 100644
index 00000000000..5cf045df342
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmps-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vfixupimmps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vfixupimmps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfixupimmps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfixupimmps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vfixupimmps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfixupimmps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x1, x2;
+volatile __m512i y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fixupimm_ps (x1, x2, y, 3);
+  x1 = _mm512_mask_fixupimm_ps (x1, m, x2, y, 3);
+  x1 = _mm512_maskz_fixupimm_ps (m, x1, x2, y, 3);
+  x1 = _mm512_fixupimm_round_ps (x1, x2, y, 3, _MM_FROUND_NO_EXC);
+  x1 = _mm512_mask_fixupimm_round_ps (x1, m, x2, y, 3, _MM_FROUND_NO_EXC);
+  x1 = _mm512_maskz_fixupimm_round_ps (m, x1, x2, y, 3, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmps-2.c
new file mode 100644
index 00000000000..9fca53705de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmps-2.c
@@ -0,0 +1,121 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "math.h"
+#include "values.h"
+
+static void
+CALC (float *r, float src, int tbl)
+{
+  switch (tbl & 0xf)
+    {
+    case 0:
+      *r = src;
+      break;
+    case 1:
+      *r = src;
+      break;
+    case 2:
+      *r = signbit (src) ? -NAN : NAN;
+      break;
+    case 3:
+      *r = -NAN;
+      break;
+    case 4:
+      *r = -INFINITY;
+      break;
+    case 5:
+      *r = INFINITY;
+      break;
+    case 6:
+      *r = signbit (src) ? -INFINITY : INFINITY;
+      break;
+    case 7:
+      *r = 1.0 / -INFINITY;
+      break;
+    case 8:
+      *r = 0.0;
+      break;
+    case 9:
+      *r = -1.0;
+      break;
+    case 10:
+      *r = 1.0;
+      break;
+    case 11:
+      *r = 1.0 / 2.0;
+      break;
+    case 12:
+      *r = 90.0;
+      break;
+    case 13:
+      *r = M_PI_2;
+      break;
+    case 14:
+      *r = MAXFLOAT;
+      break;
+    case 15:
+      *r = -MAXFLOAT;
+      break;
+    default:
+      abort ();
+    }
+}
+
+
+void static
+TEST (void)
+{
+  int i, j, k;
+  UNION_TYPE (AVX512F_LEN,) res1, res2, res3, s1;
+  UNION_TYPE (AVX512F_LEN, i_d) s2;
+  float res_ref[SIZE];
+
+
+  float vals[2] = { -10, 10 };
+  int controls[16] = { 0x11111111,
+    0x77777777, 0x88888888, 0x99999999,
+    0xaaaaaaaa, 0xbbbbbbbb, 0xcccccccc,
+    0x77777777, 0x88888888, 0x99999999,
+    0xaaaaaaaa, 0xbbbbbbbb, 0xcccccccc,
+    0xdddddddd, 0xeeeeeeee, 0xffffffff
+  };
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < 2; i++)
+    {
+      for (j = 0; j < SIZE; j++)
+	{
+	  s1.a[j] = vals[i];
+	  s2.a[j] = controls[j];
+	  res1.a[j] = DEFAULT_VALUE;
+	  res2.a[j] = DEFAULT_VALUE;
+	  res3.a[j] = DEFAULT_VALUE;
+
+	  CALC (&res_ref[j], s1.a[j], s2.a[j]);
+	}
+
+      res1.x = INTRINSIC (_fixupimm_ps) (res1.x, s1.x, s2.x, 0);
+      res2.x = INTRINSIC (_mask_fixupimm_ps) (res2.x, mask, s1.x, s2.x, 0);
+      res3.x = INTRINSIC (_maskz_fixupimm_ps) (mask, res3.x, s1.x, s2.x, 0);
+
+      if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+	abort ();
+
+      MASK_MERGE() (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+	abort ();
+      MASK_ZERO() (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+	abort ();
+    }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmsd-1.c
new file mode 100644
index 00000000000..76676afef82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmsd-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vfixupimmsd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vfixupimmsd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfixupimmsd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfixupimmsd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vfixupimmsd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfixupimmsd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile __m128i y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_fixupimm_sd (x, x, y, 3);
+  x = _mm_mask_fixupimm_sd (x, m, x, y, 3);
+  x = _mm_maskz_fixupimm_sd (m, x, x, y, 3);
+  x = _mm_fixupimm_round_sd (x, x, y, 3, _MM_FROUND_NO_EXC);
+  x = _mm_mask_fixupimm_round_sd (x, m, x, y, 3, _MM_FROUND_NO_EXC);
+  x = _mm_maskz_fixupimm_round_sd (m, x, x, y, 3, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmsd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmsd-2.c
new file mode 100644
index 00000000000..ebd288ed268
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmsd-2.c
@@ -0,0 +1,118 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+#include <math.h>
+#include <values.h>
+#include "avx512f-mask-type.h"
+
+void
+compute_fixupimmpd (double *r, double src, long long tbl)
+{
+  switch (tbl & 0xf)
+    {
+    case 0:
+      *r = src;
+      break;
+    case 1:
+      *r = src;
+      break;
+    case 2:
+      *r = signbit (src) ? -NAN : NAN;
+      break;
+    case 3:
+      *r = -NAN;
+      break;
+    case 4:
+      *r = -INFINITY;
+      break;
+    case 5:
+      *r = INFINITY;
+      break;
+    case 6:
+      *r = signbit (src) ? -INFINITY : INFINITY;
+      break;
+    case 7:
+      *r = 1.0 / -INFINITY;
+      break;
+    case 8:
+      *r = 0.0;
+      break;
+    case 9:
+      *r = -1.0;
+      break;
+    case 10:
+      *r = 1.0;
+      break;
+    case 11:
+      *r = 1.0 / 2.0;
+      break;
+    case 12:
+      *r = 90.0;
+      break;
+    case 13:
+      *r = M_PI_2;
+      break;
+    case 14:
+      *r = MAXDOUBLE;
+      break;
+    case 15:
+      *r = -MAXDOUBLE;
+      break;
+    default:
+      abort ();
+    }
+}
+
+void static
+avx512f_test (void)
+{
+  union128d s1, res1, res2, res3;
+  union128i_q s2;
+  double res_ref[2];
+  int i, j, k;
+
+  float vals[2] = { -10, 10 };
+  int controls[10] = { 0x11111111,
+    0x77777777, 0x88888888, 0x99999999,
+    0xaaaaaaaa, 0xbbbbbbbb, 0xcccccccc,
+    0xdddddddd, 0xeeeeeeee, 0xffffffff
+  };
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < 2; i++)
+    {
+      s1.a[0] = vals[i];
+      s1.a[1] = 1.0;
+      s2.a[1] = 1.0;
+
+      res_ref[0] = 1.0;
+      res_ref[1] = 1.0;
+      res1.a[0] = res2.a[0] = res3.a[0] = DEFAULT_VALUE;
+      res1.a[1] = res2.a[1] = res3.a[1] = DEFAULT_VALUE;
+
+      for (j = 0; j < 10; j++)
+	{
+	  s2.a[0] = controls[j];
+	  compute_fixupimmpd (&res_ref[0], s1.a[0], s2.a[0]);
+
+	  res1.x = _mm_fixupimm_sd (res1.x, s1.x, s2.x, 0);
+	  res2.x = _mm_mask_fixupimm_sd (res2.x, mask, s1.x, s2.x, 0);
+	  res3.x = _mm_maskz_fixupimm_sd (mask, res3.x, s1.x, s2.x, 0);
+
+	  if (check_union128d (res1, res_ref))
+	    abort ();
+
+	  MASK_MERGE (d) (res_ref, mask, 1);
+	  if (check_union128d (res2, res_ref))
+	    abort ();
+
+	  MASK_ZERO (d) (res_ref, mask, 1);
+	  if (check_union128d (res3, res_ref))
+	    abort ();
+	}
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmss-1.c
new file mode 100644
index 00000000000..435befbfa6f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmss-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vfixupimmss\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vfixupimmss\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfixupimmss\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfixupimmss\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vfixupimmss\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfixupimmss\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile __m128i y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_fixupimm_ss (x, x, y, 3);
+  x = _mm_mask_fixupimm_ss (x, m, x, y, 3);
+  x = _mm_maskz_fixupimm_ss (m, x, x, y, 3);
+  x = _mm_fixupimm_round_ss (x, x, y, 3, _MM_FROUND_NO_EXC);
+  x = _mm_mask_fixupimm_round_ss (x, m, x, y, 3, _MM_FROUND_NO_EXC);
+  x = _mm_maskz_fixupimm_round_ss (m, x, x, y, 3, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmss-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmss-2.c
new file mode 100644
index 00000000000..50830b8bd36
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfixupimmss-2.c
@@ -0,0 +1,119 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+#include <math.h>
+#include <values.h>
+#include "avx512f-mask-type.h"
+
+void
+compute_fixupimmps (float *r, float src, int tbl)
+{
+  switch (tbl & 0xf)
+    {
+    case 0:
+      *r = src;
+      break;
+    case 1:
+      *r = src;
+      break;
+    case 2:
+      *r = signbit (src) ? -NAN : NAN;
+      break;
+    case 3:
+      *r = -NAN;
+      break;
+    case 4:
+      *r = -INFINITY;
+      break;
+    case 5:
+      *r = INFINITY;
+      break;
+    case 6:
+      *r = signbit (src) ? -INFINITY : INFINITY;
+      break;
+    case 7:
+      *r = 1.0 / -INFINITY;
+      break;
+    case 8:
+      *r = 0.0;
+      break;
+    case 9:
+      *r = -1.0;
+      break;
+    case 10:
+      *r = 1.0;
+      break;
+    case 11:
+      *r = 1.0 / 2.0;
+      break;
+    case 12:
+      *r = 90.0;
+      break;
+    case 13:
+      *r = M_PI_2;
+      break;
+    case 14:
+      *r = MAXFLOAT;
+      break;
+    case 15:
+      *r = -MAXFLOAT;
+      break;
+    default:
+      abort ();
+    }
+}
+
+void static
+avx512f_test (void)
+{
+  union128 s1, res1, res2, res3;
+  union128i_d s2;
+  float res_ref[4];
+  int i, j, k;
+
+  float vals[2] = { -10, 10 };
+  int controls[10] = { 0x11111111,
+    0x77777777, 0x88888888, 0x99999999,
+    0xaaaaaaaa, 0xbbbbbbbb, 0xcccccccc,
+    0xdddddddd, 0xeeeeeeee, 0xffffffff
+  };
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < 2; i++)
+    {
+      s1.a[0] = vals[i];
+      res1.a[0] = res2.a[0] = res3.a[0] = DEFAULT_VALUE;
+      for (k = 1; k < 4; k++)
+	{
+	  s1.a[k] = k;
+	  s2.a[k] = k;
+	  res_ref[k] = k;
+	  res1.a[k] = res2.a[k] = res3.a[k] = DEFAULT_VALUE;
+	}
+
+      for (j = 0; j < 10; j++)
+	{
+	  s2.a[0] = controls[j];
+	  compute_fixupimmps (&res_ref[0], s1.a[0], s2.a[0]);
+
+	  res1.x = _mm_fixupimm_ss (res1.x, s1.x, s2.x, 0);
+	  res2.x = _mm_mask_fixupimm_ss (res2.x, mask, s1.x, s2.x, 0);
+	  res3.x = _mm_maskz_fixupimm_ss (mask, res3.x, s1.x, s2.x, 0);
+
+	  if (check_union128 (res1, res_ref))
+	    abort ();
+
+	  MASK_MERGE () (res_ref, mask, 1);
+	  if (check_union128 (res2, res_ref))
+	    abort ();
+
+	  MASK_ZERO () (res_ref, mask, 1);
+	  if (check_union128 (res3, res_ref))
+	    abort ();
+	}
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXpd-1.c
new file mode 100644
index 00000000000..c45930c6b20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXpd-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 8 } } */
+/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vfmadd231pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x1, x2, x3;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fmadd_pd (x1, x2, x3);
+  x1 = _mm512_mask_fmadd_pd (x1, m, x2, x3);
+  x3 = _mm512_mask3_fmadd_pd (x1, x2, x3, m);
+  x1 = _mm512_maskz_fmadd_pd (m, x1, x2, x3);
+  x1 = _mm512_fmadd_round_pd (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT);
+  x1 = _mm512_mask_fmadd_round_pd (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF);
+  x3 = _mm512_mask3_fmadd_round_pd (x1, x2, x3, m, _MM_FROUND_TO_POS_INF);
+  x1 = _mm512_maskz_fmadd_round_pd (m, x1, x2, x3, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXpd-2.c
new file mode 100644
index 00000000000..79736300869
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXpd-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (double *s1, double *s2, double *s3, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] * s2[i] + s3[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s1, s2, s3, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref1[SIZE];
+  double res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 56.78 * (i + 1) * sign;
+      s3.a[i] = 90.12 * (i + 2) * sign;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_fmadd_pd) (s1.x, s2.x, s3.x);
+#endif
+  res2.x = INTRINSIC (_mask_fmadd_pd) (s1.x, mask, s2.x, s3.x);
+  res3.x = INTRINSIC (_mask3_fmadd_pd) (s2.x, s3.x, s1.x, mask);
+  res4.x = INTRINSIC (_maskz_fmadd_pd) (mask, s1.x, s2.x, s3.x);
+
+  CALC (s1.a, s2.a, s3.a, res_ref1);
+  CALC (s2.a, s3.a, s1.a, res_ref2);
+
+#if AVX512F_LEN == 512
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res1, res_ref1, 0.0001))
+    abort ();
+#endif
+
+  MASK_MERGE (d) (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res2, res_ref1, 0.0001))
+    abort ();
+
+  MASK_MERGE (d) (res_ref2, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res3, res_ref2, 0.0001))
+    abort ();
+
+  MASK_ZERO (d) (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res4, res_ref1, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXps-1.c
new file mode 100644
index 00000000000..ddeddb21b67
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXps-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 8 } } */
+/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vfmadd231ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x1, x2, x3;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fmadd_ps (x1, x2, x3);
+  x1 = _mm512_mask_fmadd_ps (x1, m, x2, x3);
+  x3 = _mm512_mask3_fmadd_ps (x1, x2, x3, m);
+  x1 = _mm512_maskz_fmadd_ps (m, x1, x2, x3);
+  x1 = _mm512_fmadd_round_ps (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT);
+  x1 = _mm512_mask_fmadd_round_ps (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF);
+  x3 = _mm512_mask3_fmadd_round_ps (x1, x2, x3, m, _MM_FROUND_TO_POS_INF);
+  x1 = _mm512_maskz_fmadd_round_ps (m, x1, x2, x3, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXps-2.c
new file mode 100644
index 00000000000..6883b77d7fb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXps-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (float *s1, float *s2, float *s3, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] * s2[i] + s3[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) s1, s2, s3, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref1[SIZE];
+  float res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 56.78 * (i + 1) * sign;
+      s3.a[i] = 90.12 * (i + 2) * sign;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_fmadd_ps) (s1.x, s2.x, s3.x);
+#endif
+  res2.x = INTRINSIC (_mask_fmadd_ps) (s1.x, mask, s2.x, s3.x);
+  res3.x = INTRINSIC (_mask3_fmadd_ps) (s2.x, s3.x, s1.x, mask);
+  res4.x = INTRINSIC (_maskz_fmadd_ps) (mask, s1.x, s2.x, s3.x);
+
+  CALC (s1.a, s2.a, s3.a, res_ref1);
+  CALC (s2.a, s3.a, s1.a, res_ref2);
+
+#if AVX512F_LEN == 512
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res1, res_ref1, 0.0001))
+    abort ();
+#endif
+
+  MASK_MERGE () (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res2, res_ref1, 0.0001))
+    abort ();
+
+  MASK_MERGE () (res_ref2, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res3, res_ref2, 0.0001))
+    abort ();
+
+  MASK_ZERO () (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res4, res_ref1, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXsd-1.c
new file mode 100644
index 00000000000..ea8b17c58b0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXsd-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfmadd...sd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d a, b, c;
+
+void extern
+avx512f_test (void)
+{
+  a = _mm_fmadd_round_sd (a, b, c, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXss-1.c
new file mode 100644
index 00000000000..cd44fb47d5f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddXXXss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfmadd...ss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 a, b, c;
+
+void extern
+avx512f_test (void)
+{
+  a = _mm_fmadd_round_ss (a, b, c, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmaddsubXXXpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddsubXXXpd-1.c
new file mode 100644
index 00000000000..7f4ab7bdd1c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddsubXXXpd-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 8 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub231pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x1, x2, x3;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fmaddsub_pd (x1, x2, x3);
+  x1 = _mm512_mask_fmaddsub_pd (x1, m, x2, x3);
+  x3 = _mm512_mask3_fmaddsub_pd (x1, x2, x3, m);
+  x1 = _mm512_maskz_fmaddsub_pd (m, x1, x2, x3);
+  x1 = _mm512_fmaddsub_round_pd (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT);
+  x1 = _mm512_mask_fmaddsub_round_pd (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF);
+  x3 = _mm512_mask3_fmaddsub_round_pd (x1, x2, x3, m, _MM_FROUND_TO_POS_INF);
+  x1 = _mm512_maskz_fmaddsub_round_pd (m, x1, x2, x3, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmaddsubXXXpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddsubXXXpd-2.c
new file mode 100644
index 00000000000..c546520335f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddsubXXXpd-2.c
@@ -0,0 +1,69 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (double *s1, double *s2, double *s3, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      if (i % 2)
+	r[i] = s1[i] * s2[i] + s3[i];
+      else
+	r[i] = s1[i] * s2[i] - s3[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s1, s2, s3, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref1[SIZE];
+  double res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 56.78 * (i + 1) * sign;
+      s3.a[i] = 90.12 * (i + 2) * sign;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_fmaddsub_pd) (s1.x, s2.x, s3.x);
+#endif
+  res2.x = INTRINSIC (_mask_fmaddsub_pd) (s1.x, mask, s2.x, s3.x);
+  res3.x = INTRINSIC (_mask3_fmaddsub_pd) (s2.x, s3.x, s1.x, mask);
+  res4.x = INTRINSIC (_maskz_fmaddsub_pd) (mask, s1.x, s2.x, s3.x);
+
+  CALC (s1.a, s2.a, s3.a, res_ref1);
+  CALC (s2.a, s3.a, s1.a, res_ref2);
+
+#if AVX512F_LEN == 512
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res1, res_ref1, 0.0001))
+    abort ();
+#endif
+
+  MASK_MERGE (d) (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res2, res_ref1, 0.0001))
+    abort ();
+
+  MASK_MERGE (d) (res_ref2, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res3, res_ref2, 0.0001))
+    abort ();
+
+  MASK_ZERO (d) (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res4, res_ref1, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmaddsubXXXps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddsubXXXps-1.c
new file mode 100644
index 00000000000..73936c71caa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddsubXXXps-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 8 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub231ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x1, x2, x3;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fmaddsub_ps (x1, x2, x3);
+  x1 = _mm512_mask_fmaddsub_ps (x1, m, x2, x3);
+  x3 = _mm512_mask3_fmaddsub_ps (x1, x2, x3, m);
+  x1 = _mm512_maskz_fmaddsub_ps (m, x1, x2, x3);
+  x1 = _mm512_fmaddsub_round_ps (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT);
+  x1 = _mm512_mask_fmaddsub_round_ps (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF);
+  x3 = _mm512_mask3_fmaddsub_round_ps (x1, x2, x3, m, _MM_FROUND_TO_POS_INF);
+  x1 = _mm512_maskz_fmaddsub_round_ps (m, x1, x2, x3, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmaddsubXXXps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddsubXXXps-2.c
new file mode 100644
index 00000000000..2e27ffb46be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmaddsubXXXps-2.c
@@ -0,0 +1,69 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (float *s1, float *s2, float *s3, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      if (i % 2)
+	r[i] = s1[i] * s2[i] + s3[i];
+      else
+	r[i] = s1[i] * s2[i] - s3[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) s1, s2, s3, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref1[SIZE];
+  float res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 56.78 * (i + 1) * sign;
+      s3.a[i] = 90.12 * (i + 2) * sign;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_fmaddsub_ps) (s1.x, s2.x, s3.x);
+#endif
+  res2.x = INTRINSIC (_mask_fmaddsub_ps) (s1.x, mask, s2.x, s3.x);
+  res3.x = INTRINSIC (_mask3_fmaddsub_ps) (s2.x, s3.x, s1.x, mask);
+  res4.x = INTRINSIC (_maskz_fmaddsub_ps) (mask, s1.x, s2.x, s3.x);
+
+  CALC (s1.a, s2.a, s3.a, res_ref1);
+  CALC (s2.a, s3.a, s1.a, res_ref2);
+
+#if AVX512F_LEN == 512
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res1, res_ref1, 0.0001))
+    abort ();
+#endif
+
+  MASK_MERGE () (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res2, res_ref1, 0.0001))
+    abort ();
+
+  MASK_MERGE () (res_ref2, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res3, res_ref2, 0.0001))
+    abort ();
+
+  MASK_ZERO () (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res4, res_ref1, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXpd-1.c
new file mode 100644
index 00000000000..2ad15573290
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXpd-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vfmsub231pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x1, x2, x3;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fmsub_pd (x1, x2, x3);
+  x1 = _mm512_mask_fmsub_pd (x1, m, x2, x3);
+  x3 = _mm512_mask3_fmsub_pd (x1, x2, x3, m);
+  x1 = _mm512_maskz_fmsub_pd (m, x1, x2, x3);
+  x1 = _mm512_fmsub_round_pd (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT);
+  x1 = _mm512_mask_fmsub_round_pd (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF);
+  x3 = _mm512_mask3_fmsub_round_pd (x1, x2, x3, m, _MM_FROUND_TO_POS_INF);
+  x1 = _mm512_maskz_fmsub_round_pd (m, x1, x2, x3, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXpd-2.c
new file mode 100644
index 00000000000..caebada6d18
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXpd-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (double *s1, double *s2, double *s3, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] * s2[i] - s3[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s1, s2, s3, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref1[SIZE];
+  double res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 56.78 * (i + 1) * sign;
+      s3.a[i] = 90.12 * (i + 2) * sign;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_fmsub_pd) (s1.x, s2.x, s3.x);
+#endif
+  res2.x = INTRINSIC (_mask_fmsub_pd) (s1.x, mask, s2.x, s3.x);
+  res3.x = INTRINSIC (_mask3_fmsub_pd) (s2.x, s3.x, s1.x, mask);
+  res4.x = INTRINSIC (_maskz_fmsub_pd) (mask, s1.x, s2.x, s3.x);
+
+  CALC (s1.a, s2.a, s3.a, res_ref1);
+  CALC (s2.a, s3.a, s1.a, res_ref2);
+
+#if AVX512F_LEN == 512
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res1, res_ref1, 0.0001))
+    abort ();
+#endif
+
+  MASK_MERGE (d) (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res2, res_ref1, 0.0001))
+    abort ();
+
+  MASK_MERGE (d) (res_ref2, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res3, res_ref2, 0.0001))
+    abort ();
+
+  MASK_ZERO (d) (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res4, res_ref1, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXps-1.c
new file mode 100644
index 00000000000..81afaf59092
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXps-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vfmsub231ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x1, x2, x3;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fmsub_ps (x1, x2, x3);
+  x1 = _mm512_mask_fmsub_ps (x1, m, x2, x3);
+  x3 = _mm512_mask3_fmsub_ps (x1, x2, x3, m);
+  x1 = _mm512_maskz_fmsub_ps (m, x1, x2, x3);
+  x1 = _mm512_fmsub_round_ps (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT);
+  x1 = _mm512_mask_fmsub_round_ps (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF);
+  x3 = _mm512_mask3_fmsub_round_ps (x1, x2, x3, m, _MM_FROUND_TO_POS_INF);
+  x1 = _mm512_maskz_fmsub_round_ps (m, x1, x2, x3, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXps-2.c
new file mode 100644
index 00000000000..da8908f33ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXps-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (float *s1, float *s2, float *s3, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] * s2[i] - s3[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) s1, s2, s3, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref1[SIZE];
+  float res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 56.78 * (i + 1) * sign;
+      s3.a[i] = 90.12 * (i + 2) * sign;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_fmsub_ps) (s1.x, s2.x, s3.x);
+#endif
+  res2.x = INTRINSIC (_mask_fmsub_ps) (s1.x, mask, s2.x, s3.x);
+  res3.x = INTRINSIC (_mask3_fmsub_ps) (s2.x, s3.x, s1.x, mask);
+  res4.x = INTRINSIC (_maskz_fmsub_ps) (mask, s1.x, s2.x, s3.x);
+
+  CALC (s1.a, s2.a, s3.a, res_ref1);
+  CALC (s2.a, s3.a, s1.a, res_ref2);
+
+#if AVX512F_LEN == 512
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res1, res_ref1, 0.0001))
+    abort ();
+#endif
+
+  MASK_MERGE () (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res2, res_ref1, 0.0001))
+    abort ();
+
+  MASK_MERGE () (res_ref2, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res3, res_ref2, 0.0001))
+    abort ();
+
+  MASK_ZERO () (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res4, res_ref1, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXsd-1.c
new file mode 100644
index 00000000000..2d78df6f8e6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXsd-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfmsub...sd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d a, b, c;
+
+void extern
+avx512f_test (void)
+{
+  a = _mm_fmsub_round_sd (a, b, c, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXss-1.c
new file mode 100644
index 00000000000..b7609f58ec4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubXXXss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfmsub...ss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 a, b, c;
+
+void extern
+avx512f_test (void)
+{
+  a = _mm_fmsub_round_ss (a, b, c, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmsubaddXXXpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubaddXXXpd-1.c
new file mode 100644
index 00000000000..1ff3f2b7536
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubaddXXXpd-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd231pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x1, x2, x3;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fmsubadd_pd (x1, x2, x3);
+  x1 = _mm512_mask_fmsubadd_pd (x1, m, x2, x3);
+  x3 = _mm512_mask3_fmsubadd_pd (x1, x2, x3, m);
+  x1 = _mm512_maskz_fmsubadd_pd (m, x1, x2, x3);
+  x1 = _mm512_fmsubadd_round_pd (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT);
+  x1 = _mm512_mask_fmsubadd_round_pd (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF);
+  x3 = _mm512_mask3_fmsubadd_round_pd (x1, x2, x3, m, _MM_FROUND_TO_POS_INF);
+  x1 = _mm512_maskz_fmsubadd_round_pd (m, x1, x2, x3, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmsubaddXXXpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubaddXXXpd-2.c
new file mode 100644
index 00000000000..537948b1c4b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubaddXXXpd-2.c
@@ -0,0 +1,69 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (double *s1, double *s2, double *s3, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      if (i % 2)
+	r[i] = s1[i] * s2[i] - s3[i];
+      else
+	r[i] = s1[i] * s2[i] + s3[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s1, s2, s3, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref1[SIZE];
+  double res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 56.78 * (i + 1) * sign;
+      s3.a[i] = 90.12 * (i + 2) * sign;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_fmsubadd_pd) (s1.x, s2.x, s3.x);
+#endif
+  res2.x = INTRINSIC (_mask_fmsubadd_pd) (s1.x, mask, s2.x, s3.x);
+  res3.x = INTRINSIC (_mask3_fmsubadd_pd) (s2.x, s3.x, s1.x, mask);
+  res4.x = INTRINSIC (_maskz_fmsubadd_pd) (mask, s1.x, s2.x, s3.x);
+
+  CALC (s1.a, s2.a, s3.a, res_ref1);
+  CALC (s2.a, s3.a, s1.a, res_ref2);
+
+#if AVX512F_LEN == 512
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res1, res_ref1, 0.0001))
+    abort ();
+#endif
+
+  MASK_MERGE (d) (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res2, res_ref1, 0.0001))
+    abort ();
+
+  MASK_MERGE (d) (res_ref2, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res3, res_ref2, 0.0001))
+    abort ();
+
+  MASK_ZERO (d) (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res4, res_ref1, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmsubaddXXXps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubaddXXXps-1.c
new file mode 100644
index 00000000000..283c0af19f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubaddXXXps-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 8 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd231ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x1, x2, x3;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fmsubadd_ps (x1, x2, x3);
+  x1 = _mm512_mask_fmsubadd_ps (x1, m, x2, x3);
+  x3 = _mm512_mask3_fmsubadd_ps (x1, x2, x3, m);
+  x1 = _mm512_maskz_fmsubadd_ps (m, x1, x2, x3);
+  x1 = _mm512_fmsubadd_round_ps (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT);
+  x1 = _mm512_mask_fmsubadd_round_ps (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF);
+  x3 = _mm512_mask3_fmsubadd_round_ps (x1, x2, x3, m, _MM_FROUND_TO_POS_INF);
+  x1 = _mm512_maskz_fmsubadd_round_ps (m, x1, x2, x3, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfmsubaddXXXps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubaddXXXps-2.c
new file mode 100644
index 00000000000..85be77ccb12
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfmsubaddXXXps-2.c
@@ -0,0 +1,69 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (float *s1, float *s2, float *s3, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      if (i % 2)
+	r[i] = s1[i] * s2[i] - s3[i];
+      else
+	r[i] = s1[i] * s2[i] + s3[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) s1, s2, s3, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref1[SIZE];
+  float res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 56.78 * (i + 1) * sign;
+      s3.a[i] = 90.12 * (i + 2) * sign;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_fmsubadd_ps) (s1.x, s2.x, s3.x);
+#endif
+  res2.x = INTRINSIC (_mask_fmsubadd_ps) (s1.x, mask, s2.x, s3.x);
+  res3.x = INTRINSIC (_mask3_fmsubadd_ps) (s2.x, s3.x, s1.x, mask);
+  res4.x = INTRINSIC (_maskz_fmsubadd_ps) (mask, s1.x, s2.x, s3.x);
+
+  CALC (s1.a, s2.a, s3.a, res_ref1);
+  CALC (s2.a, s3.a, s1.a, res_ref2);
+
+#if AVX512F_LEN == 512
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res1, res_ref1, 0.0001))
+    abort ();
+#endif
+
+  MASK_MERGE () (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res2, res_ref1, 0.0001))
+    abort ();
+
+  MASK_MERGE () (res_ref2, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res3, res_ref2, 0.0001))
+    abort ();
+
+  MASK_ZERO () (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res4, res_ref1, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXpd-1.c
new file mode 100644
index 00000000000..b08d7e18891
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXpd-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vfnmadd231pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x1, x2, x3;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fnmadd_pd (x1, x2, x3);
+  x1 = _mm512_mask_fnmadd_pd (x1, m, x2, x3);
+  x3 = _mm512_mask3_fnmadd_pd (x1, x2, x3, m);
+  x1 = _mm512_maskz_fnmadd_pd (m, x1, x2, x3);
+  x1 = _mm512_fnmadd_round_pd (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT);
+  x1 = _mm512_mask_fnmadd_round_pd (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF);
+  x3 = _mm512_mask3_fnmadd_round_pd (x1, x2, x3, m, _MM_FROUND_TO_POS_INF);
+  x1 = _mm512_maskz_fnmadd_round_pd (m, x1, x2, x3, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXpd-2.c
new file mode 100644
index 00000000000..71939a5628b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXpd-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (double *s1, double *s2, double *s3, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = -s1[i] * s2[i] + s3[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s1, s2, s3, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref1[SIZE];
+  double res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 56.78 * (i + 1) * sign;
+      s3.a[i] = 90.12 * (i + 2) * sign;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_fnmadd_pd) (s1.x, s2.x, s3.x);
+#endif
+  res2.x = INTRINSIC (_mask_fnmadd_pd) (s1.x, mask, s2.x, s3.x);
+  res3.x = INTRINSIC (_mask3_fnmadd_pd) (s2.x, s3.x, s1.x, mask);
+  res4.x = INTRINSIC (_maskz_fnmadd_pd) (mask, s1.x, s2.x, s3.x);
+
+  CALC (s1.a, s2.a, s3.a, res_ref1);
+  CALC (s2.a, s3.a, s1.a, res_ref2);
+
+#if AVX512F_LEN == 512
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res1, res_ref1, 0.0001))
+    abort ();
+#endif
+
+  MASK_MERGE (d) (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res2, res_ref1, 0.0001))
+    abort ();
+
+  MASK_MERGE (d) (res_ref2, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res3, res_ref2, 0.0001))
+    abort ();
+
+  MASK_ZERO (d) (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res4, res_ref1, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXps-1.c
new file mode 100644
index 00000000000..8b4447c832f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXps-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vfnmadd231ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x1, x2, x3;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fnmadd_ps (x1, x2, x3);
+  x1 = _mm512_mask_fnmadd_ps (x1, m, x2, x3);
+  x3 = _mm512_mask3_fnmadd_ps (x1, x2, x3, m);
+  x1 = _mm512_maskz_fnmadd_ps (m, x1, x2, x3);
+  x1 = _mm512_fnmadd_round_ps (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT);
+  x1 = _mm512_mask_fnmadd_round_ps (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF);
+  x3 = _mm512_mask3_fnmadd_round_ps (x1, x2, x3, m, _MM_FROUND_TO_POS_INF);
+  x1 = _mm512_maskz_fnmadd_round_ps (m, x1, x2, x3, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXps-2.c
new file mode 100644
index 00000000000..b591d23aaa9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXps-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (float *s1, float *s2, float *s3, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = -s1[i] * s2[i] + s3[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) s1, s2, s3, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref1[SIZE];
+  float res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 56.78 * (i + 1) * sign;
+      s3.a[i] = 90.12 * (i + 2) * sign;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_fnmadd_ps) (s1.x, s2.x, s3.x);
+#endif
+  res2.x = INTRINSIC (_mask_fnmadd_ps) (s1.x, mask, s2.x, s3.x);
+  res3.x = INTRINSIC (_mask3_fnmadd_ps) (s2.x, s3.x, s1.x, mask);
+  res4.x = INTRINSIC (_maskz_fnmadd_ps) (mask, s1.x, s2.x, s3.x);
+
+  CALC (s1.a, s2.a, s3.a, res_ref1);
+  CALC (s2.a, s3.a, s1.a, res_ref2);
+
+#if AVX512F_LEN == 512
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res1, res_ref1, 0.0001))
+    abort ();
+#endif
+
+  MASK_MERGE () (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res2, res_ref1, 0.0001))
+    abort ();
+
+  MASK_MERGE () (res_ref2, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res3, res_ref2, 0.0001))
+    abort ();
+
+  MASK_ZERO () (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res4, res_ref1, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXsd-1.c
new file mode 100644
index 00000000000..e938236d402
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXsd-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfnmadd...sd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d a, b, c;
+
+void extern
+avx512f_test (void)
+{
+  a = _mm_fnmadd_round_sd (a, b, c, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXss-1.c
new file mode 100644
index 00000000000..f5752e4b77d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfnmaddXXXss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfnmadd...ss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 a, b, c;
+
+void extern
+avx512f_test (void)
+{
+  a = _mm_fnmadd_round_ss (a, b, c, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXpd-1.c
new file mode 100644
index 00000000000..a0776430d58
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXpd-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vfnmsub231pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x1, x2, x3;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fnmsub_pd (x1, x2, x3);
+  x1 = _mm512_mask_fnmsub_pd (x1, m, x2, x3);
+  x3 = _mm512_mask3_fnmsub_pd (x1, x2, x3, m);
+  x1 = _mm512_maskz_fnmsub_pd (m, x1, x2, x3);
+  x1 = _mm512_fnmsub_round_pd (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT);
+  x1 = _mm512_mask_fnmsub_round_pd (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF);
+  x3 = _mm512_mask3_fnmsub_round_pd (x1, x2, x3, m, _MM_FROUND_TO_POS_INF);
+  x1 = _mm512_maskz_fnmsub_round_pd (m, x1, x2, x3, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXpd-2.c
new file mode 100644
index 00000000000..177ea73062a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXpd-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (double *s1, double *s2, double *s3, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = -s1[i] * s2[i] - s3[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s1, s2, s3, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref1[SIZE];
+  double res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 56.78 * (i + 1) * sign;
+      s3.a[i] = 90.12 * (i + 2) * sign;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_fnmsub_pd) (s1.x, s2.x, s3.x);
+#endif
+  res2.x = INTRINSIC (_mask_fnmsub_pd) (s1.x, mask, s2.x, s3.x);
+  res3.x = INTRINSIC (_mask3_fnmsub_pd) (s2.x, s3.x, s1.x, mask);
+  res4.x = INTRINSIC (_maskz_fnmsub_pd) (mask, s1.x, s2.x, s3.x);
+
+  CALC (s1.a, s2.a, s3.a, res_ref1);
+  CALC (s2.a, s3.a, s1.a, res_ref2);
+
+#if AVX512F_LEN == 512
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res1, res_ref1, 0.0001))
+    abort ();
+#endif
+
+  MASK_MERGE (d) (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res2, res_ref1, 0.0001))
+    abort ();
+
+  MASK_MERGE (d) (res_ref2, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res3, res_ref2, 0.0001))
+    abort ();
+
+  MASK_ZERO (d) (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res4, res_ref1, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXps-1.c
new file mode 100644
index 00000000000..b863fb1bbd1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXps-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 8 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vfnmsub231ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x1, x2, x3;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_fnmsub_ps (x1, x2, x3);
+  x1 = _mm512_mask_fnmsub_ps (x1, m, x2, x3);
+  x3 = _mm512_mask3_fnmsub_ps (x1, x2, x3, m);
+  x1 = _mm512_maskz_fnmsub_ps (m, x1, x2, x3);
+  x1 = _mm512_fnmsub_round_ps (x1, x2, x3, _MM_FROUND_TO_NEAREST_INT);
+  x1 = _mm512_mask_fnmsub_round_ps (x1, m, x2, x3, _MM_FROUND_TO_NEG_INF);
+  x3 = _mm512_mask3_fnmsub_round_ps (x1, x2, x3, m, _MM_FROUND_TO_POS_INF);
+  x1 = _mm512_maskz_fnmsub_round_ps (m, x1, x2, x3, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXps-2.c
new file mode 100644
index 00000000000..379708b464a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXps-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (float *s1, float *s2, float *s3, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = -s1[i] * s2[i] - s3[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) s1, s2, s3, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref1[SIZE];
+  float res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 56.78 * (i + 1) * sign;
+      s3.a[i] = 90.12 * (i + 2) * sign;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_fnmsub_ps) (s1.x, s2.x, s3.x);
+#endif
+  res2.x = INTRINSIC (_mask_fnmsub_ps) (s1.x, mask, s2.x, s3.x);
+  res3.x = INTRINSIC (_mask3_fnmsub_ps) (s2.x, s3.x, s1.x, mask);
+  res4.x = INTRINSIC (_maskz_fnmsub_ps) (mask, s1.x, s2.x, s3.x);
+
+  CALC (s1.a, s2.a, s3.a, res_ref1);
+  CALC (s2.a, s3.a, s1.a, res_ref2);
+
+#if AVX512F_LEN == 512
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res1, res_ref1, 0.0001))
+    abort ();
+#endif
+
+  MASK_MERGE () (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res2, res_ref1, 0.0001))
+    abort ();
+
+  MASK_MERGE () (res_ref2, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res3, res_ref2, 0.0001))
+    abort ();
+
+  MASK_ZERO () (res_ref1, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, ) (res4, res_ref1, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXsd-1.c
new file mode 100644
index 00000000000..931b5d4abc4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXsd-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfnmsub...sd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d a, b, c;
+
+void extern
+avx512f_test (void)
+{
+  a = _mm_fnmsub_round_sd (a, b, c, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXss-1.c
new file mode 100644
index 00000000000..f097f1a9977
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vfnmsubXXXss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vfnmsub...ss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 a, b, c;
+
+void extern
+avx512f_test (void)
+{
+  a = _mm_fnmsub_round_ss (a, b, c, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetexppd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetexppd-1.c
new file mode 100644
index 00000000000..3d899ea2b61
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetexppd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6} } */
+/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2} } */
+/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2} } */
+/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 3} } */
+/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1} } */
+/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1} } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_getexp_pd (x);
+  x = _mm512_mask_getexp_pd (x, m, x);
+  x = _mm512_maskz_getexp_pd (m, x);
+  x = _mm512_getexp_round_pd (x, _MM_FROUND_NO_EXC);
+  x = _mm512_mask_getexp_round_pd (x, m, x, _MM_FROUND_NO_EXC);
+  x = _mm512_maskz_getexp_round_pd (m, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetexppd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetexppd-2.c
new file mode 100644
index 00000000000..ec9321aa894
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetexppd-2.c
@@ -0,0 +1,58 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include "math.h"
+
+static void
+CALC (double *s, double *r)
+{
+  int i = 0;
+  for (i = 0; i < SIZE; i++)
+    r[i] = floor (log (s[i]) / log (2));
+}
+
+void static
+TEST (void)
+{
+  int j;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3, s;
+  double res_ref[SIZE];
+  double res_ref_mask[SIZE];
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (j = 0; j < SIZE; j++)
+    {
+      s.a[j] = j * (j + 12.0231);
+      res1.a[j] = DEFAULT_VALUE;
+      res2.a[j] = DEFAULT_VALUE;
+      res3.a[j] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_getexp_pd) (s.x);
+  res2.x = INTRINSIC (_mask_getexp_pd) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_getexp_pd) (mask, s.x);
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE(d) (res_ref, mask, SIZE);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO(d) (res_ref, mask, SIZE);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetexpps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetexpps-1.c
new file mode 100644
index 00000000000..fb5674d702b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetexpps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6} } */
+/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2} } */
+/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2} } */
+/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 3} } */
+/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1} } */
+/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1} } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_getexp_ps (x);
+  x = _mm512_mask_getexp_ps (x, m, x);
+  x = _mm512_maskz_getexp_ps (m, x);
+  x = _mm512_getexp_round_ps (x, _MM_FROUND_NO_EXC);
+  x = _mm512_mask_getexp_round_ps (x, m, x, _MM_FROUND_NO_EXC);
+  x = _mm512_maskz_getexp_round_ps (m, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetexpps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetexpps-2.c
new file mode 100644
index 00000000000..56f4eaa15fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetexpps-2.c
@@ -0,0 +1,58 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "math.h"
+
+static void
+CALC (float *s, float *r)
+{
+  int i = 0;
+  for (i = 0; i < SIZE; i++)
+    r[i] = floor (log (s[i]) / log (2));
+}
+
+void static
+TEST (void)
+{
+  int j;
+  UNION_TYPE (AVX512F_LEN, ) res1,res2,res3,s;
+  float res_ref[SIZE];
+  float res_ref_mask[SIZE];
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (j = 0; j < SIZE; j++)
+    {
+      s.a[j] = j * (j + 12.0231);
+      res1.a[j] = DEFAULT_VALUE;
+      res2.a[j] = DEFAULT_VALUE;
+      res3.a[j] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_getexp_ps) (s.x);
+  res2.x = INTRINSIC (_mask_getexp_ps) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_getexp_ps) (mask, s.x);
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE() (res_ref,mask,SIZE );
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO() (res_ref,mask,SIZE );
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref))
+    abort ();
+
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetexpsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetexpsd-1.c
new file mode 100644
index 00000000000..952ed546095
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetexpsd-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vgetexpsd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\, %xmm\[0-9\]\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vgetexpsd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\, %xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_getexp_sd (x, x);
+  x = _mm_getexp_round_sd (x, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetexpsd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetexpsd-2.c
new file mode 100644
index 00000000000..c1e5e5f2202
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetexpsd-2.c
@@ -0,0 +1,36 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#define SIZE (128 / 64)
+
+#include <math.h>
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+
+static void
+compute_vgetexpsd (double *s, double *r)
+{
+  r[0] = floor (log (s[0]) / log (2));
+}
+
+void static
+avx512f_test (void)
+{
+  int i;
+  union128d res1, s1;
+  double res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 5.0 - i;
+      res_ref[i] = s1.a[i];
+    }
+
+  res1.x = _mm_getexp_sd (s1.x, s1.x);
+
+  compute_vgetexpsd (s1.a, res_ref);
+
+  if (check_fp_union128d (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetexpss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetexpss-1.c
new file mode 100644
index 00000000000..d946a4788dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetexpss-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vgetexpss\[ \\t\]+\[^\n\]*%xmm\[0-9\]\, %xmm\[0-9\]\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vgetexpss\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\, %xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_getexp_ss (x, x);
+  x = _mm_getexp_round_ss (x, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetexpss-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetexpss-2.c
new file mode 100644
index 00000000000..39d77c7a026
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetexpss-2.c
@@ -0,0 +1,36 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#define SIZE (128 / 32)
+
+#include <math.h>
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+
+static void
+compute_vgetexpss (float *s, float *r)
+{
+  r[0] = floor (log (s[0]) / log (2));
+}
+
+void static
+avx512f_test (void)
+{
+  int i;
+  union128 res1, s1;
+  float res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 5.0 - i;
+      res_ref[i] = s1.a[i];
+    }
+
+  res1.x = _mm_getexp_ss (s1.x, s1.x);
+
+  compute_vgetexpss (s1.a, res_ref);
+
+  if (check_fp_union128 (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetmantpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantpd-1.c
new file mode 100644
index 00000000000..b19846d17e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantpd-1.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x, y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_getmant_pd (y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src);
+  x =
+    _mm512_mask_getmant_pd (x, m, y, _MM_MANT_NORM_p75_1p5,
+			    _MM_MANT_SIGN_src);
+  x =
+    _mm512_maskz_getmant_pd (m, y, _MM_MANT_NORM_p75_1p5,
+			     _MM_MANT_SIGN_src);
+  x = _mm512_getmant_round_pd (y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src,
+			       _MM_FROUND_NO_EXC);
+  x =
+    _mm512_mask_getmant_round_pd (x, m, y, _MM_MANT_NORM_p75_1p5,
+			    _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+  x =
+    _mm512_maskz_getmant_round_pd (m, y, _MM_MANT_NORM_p75_1p5,
+			     _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetmantpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantpd-2.c
new file mode 100644
index 00000000000..473466b1e53
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantpd-2.c
@@ -0,0 +1,122 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include <math.h>
+
+#ifndef GET_NORM_MANT
+#define GET_NORM_MANT
+
+union fp_int_t
+{
+  long long int int_val;
+  double fp_val;
+};
+
+double
+get_norm_mant (double source, int signctrl, int interv)
+{
+  long long src, sign, exp, fraction;
+  union fp_int_t bin_conv;
+
+  bin_conv.fp_val = source;
+  src = bin_conv.int_val;
+  sign = (signctrl & 0x1) ? 0 : (src >> 63);
+  exp = (src & 0x7ff0000000000000) >> 52;
+  fraction = (src & 0xfffffffffffff);
+
+  if (isnan (source))
+    return signbit (source) ? -NAN : NAN;
+  if (source == 0.0 || source == -0.0 || isinf (source))
+    return sign ? -1.0 : 1.0;
+  if (signbit (source) && (signctrl & 0x2))
+    return -NAN;
+  if (!isnormal (source))
+    {
+      src = (src & 0xfff7ffffffffffff);
+      exp = 0x3ff;
+      while (!(src & 0x8000000000000))
+	{
+	  src += fraction & 0x8000000000000;
+	  fraction = fraction << 1;
+	  exp--;
+	}
+    }
+
+  switch (interv)
+    {
+    case 0:
+      exp = 0x3ff;
+      break;
+    case 1:
+      exp = ((exp - 0x3ff) & 0x1) ? 0x3fe : 0x3ff;
+      break;
+    case 2:
+      exp = 0x3fe;
+      break;
+    case 3:
+      exp = (fraction & 0x8000000000000) ? 0x3fe : 0x3ff;
+      break;
+    default:
+      abort ();
+    }
+
+  bin_conv.int_val = (sign << 63) | (exp << 52) | fraction;
+  return bin_conv.fp_val;
+}
+#endif
+
+CALC (double *r, double *s, int interv, int signctrl)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = get_norm_mant (s[i], signctrl, interv);
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3, src;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+  int interv = _MM_MANT_NORM_p5_1;
+  int signctrl = _MM_MANT_SIGN_src;
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 34.67 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_getmant_pd) (src.x, interv, signctrl);
+  res2.x =
+    INTRINSIC (_mask_getmant_pd) (res2.x, mask, src.x, interv,
+				  signctrl);
+  res3.x =
+    INTRINSIC (_maskz_getmant_pd) (mask, src.x, interv, signctrl);
+
+  CALC (res_ref, src.a, interv, signctrl);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetmantps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantps-1.c
new file mode 100644
index 00000000000..a3ce09e97c0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantps-1.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x, y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_getmant_ps (y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src);
+  x =
+    _mm512_mask_getmant_ps (x, m, y, _MM_MANT_NORM_p75_1p5,
+			    _MM_MANT_SIGN_src);
+  x =
+    _mm512_maskz_getmant_ps (m, y, _MM_MANT_NORM_p75_1p5,
+			     _MM_MANT_SIGN_src);
+  x = _mm512_getmant_round_ps (y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src,
+			 _MM_FROUND_NO_EXC);
+  x =
+    _mm512_mask_getmant_round_ps (x, m, y, _MM_MANT_NORM_p75_1p5,
+			    _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+  x =
+    _mm512_maskz_getmant_round_ps (m, y, _MM_MANT_NORM_p75_1p5,
+			     _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetmantps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantps-2.c
new file mode 100644
index 00000000000..b8ea24d891b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantps-2.c
@@ -0,0 +1,123 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include <math.h>
+
+#ifndef GET_NORM_MANT
+#define GET_NORM_MANT
+
+union fp_int_t
+{
+  int int_val;
+  float fp_val;
+};
+
+float
+get_norm_mant (float source, int signctrl, int interv)
+{
+  int src, sign, exp, fraction;
+  union fp_int_t bin_conv;
+
+  bin_conv.fp_val = source;
+  src = bin_conv.int_val;
+  sign = (signctrl & 0x1) ? 0 : (src >> 31);
+  exp = (src & 0x7f800000) >> 23;
+  fraction = (src & 0x7fffff);
+
+  if (isnan (source))
+    return signbit (source) ? -NAN : NAN;
+  if (source == 0.0 || source == -0.0 || isinf (source))
+    return sign ? -1.0 : 1.0;
+  if (signbit (source) && (signctrl & 0x2))
+    return -NAN;
+  if (!isnormal (source))
+    {
+      src = (src & 0xffbfffff);
+      exp = 0x7f;
+      while (!(src & 0x400000))
+	{
+	  src += fraction & 0x400000;
+	  fraction = fraction << 1;
+	  exp--;
+	}
+    }
+
+  switch (interv)
+    {
+    case 0:
+      exp = 0x7f;
+      break;
+    case 1:
+      exp = ((exp - 0x7f) & 0x1) ? 0x7e : 0x7f;
+      break;
+    case 2:
+      exp = 0x7e;
+      break;
+    case 3:
+      exp = (fraction & 0x400000) ? 0x7e : 0x7f;
+      break;
+    default:
+      abort ();
+    }
+
+  bin_conv.int_val = (sign << 31) | (exp << 23) | fraction;
+  
+  return bin_conv.fp_val;
+}
+#endif
+
+CALC (float *r, float *s, int interv, int signctrl)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = get_norm_mant (s[i], signctrl, interv);
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN,) res1, res2, res3, src;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int interv = _MM_MANT_NORM_p5_1;
+  int signctrl = _MM_MANT_SIGN_src;
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 34.67 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_getmant_ps) (src.x, interv, signctrl);
+  res2.x =
+    INTRINSIC (_mask_getmant_ps) (res2.x, mask, src.x, interv,
+				  signctrl);
+  res3.x =
+    INTRINSIC (_maskz_getmant_ps) (mask, src.x, interv, signctrl);
+
+  CALC (res_ref, src.a, interv, signctrl);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE ()(res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO ()(res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetmantsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantsd-1.c
new file mode 100644
index 00000000000..4b252a41619
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantsd-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vgetmantsd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vgetmantsd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x, y, z;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_getmant_sd (y, z, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src);
+  x = _mm_getmant_round_sd (y, z, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src,
+			    _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetmantsd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantsd-2.c
new file mode 100644
index 00000000000..50d98a45df4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantsd-2.c
@@ -0,0 +1,94 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+#include <math.h>
+
+union fp_int_t
+{
+  long long int int_val;
+  double fp_val;
+};
+
+double
+get_norm_mant (double source, int signctrl, int interv)
+{
+  long long src, sign, exp, fraction;
+
+  union fp_int_t bin_conv;
+
+  bin_conv.fp_val = source;
+  src = bin_conv.int_val;
+  sign = (signctrl & 0x1) ? 0 : (src >> 63);
+  exp = (src & 0x7ff0000000000000) >> 52;
+  fraction = (src & 0xfffffffffffff);
+
+  if (isnan (source))
+    return signbit (source) ? -NAN : NAN;
+  if (source == 0.0 || source == -0.0 || isinf (source))
+    return sign ? -1.0 : 1.0;
+  if (signbit (source) && (signctrl & 0x2))
+    return -NAN;
+  if (!isnormal (source))
+    {
+      src = (src & 0xfff7ffffffffffff);
+      exp = 0x3ff;
+      while (!(src & 0x8000000000000))
+	{
+	  src += fraction & 0x8000000000000;
+	  fraction = fraction << 1;
+	  exp--;
+	}
+    }
+
+  switch (interv)
+    {
+    case 0:
+      exp = 0x3ff;
+      break;
+    case 1:
+      exp = ((exp - 0x3ff) & 0x1) ? 0x3fe : 0x3ff;
+      break;
+    case 2:
+      exp = 0x3fe;
+      break;
+    case 3:
+      exp = (fraction & 0x8000000000000) ? 0x3fe : 0x3ff;
+      break;
+    default:
+      abort ();
+    }
+
+  bin_conv.int_val = (sign << 63) | (exp << 52) | fraction;
+  return bin_conv.fp_val;
+}
+
+static void
+compute_vgetmantsd (double *r, double *s1, double *s2, int interv,
+		    int signctrl)
+{
+  r[0] = get_norm_mant (s2[0], signctrl, interv);
+  r[1] = s1[1];
+}
+
+static void
+avx512f_test (void)
+{
+  int i, sign;
+  union128d res1, src1, src2;
+  double res_ref[2];
+  int interv = _MM_MANT_NORM_p5_1;
+  int signctrl = _MM_MANT_SIGN_src;
+
+  src1.x = _mm_set_pd (-3.0, 111.111);
+  src2.x = _mm_set_pd (222.222, -2.0);
+
+  res1.x = _mm_getmant_sd (src1.x, src2.x, interv, signctrl);
+
+  compute_vgetmantsd (res_ref, src1.a, src2.a, interv, signctrl);
+
+  if (check_union128d (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetmantss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantss-1.c
new file mode 100644
index 00000000000..30c837b6fab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantss-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vgetmantss\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[\\n\]" 2 } } */
+/* { dg-final { scan-assembler-times "vgetmantss\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[\\n\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x, y, z;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_getmant_ss (y, z, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src);
+  x = _mm_getmant_round_ss (y, z, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src,
+		      _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vgetmantss-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantss-2.c
new file mode 100644
index 00000000000..291c0df77e7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vgetmantss-2.c
@@ -0,0 +1,99 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+#include <math.h>
+
+union fp_int_t
+{
+  int int_val;
+  float fp_val;
+};
+
+float
+get_norm_mant (float source, int signctrl, int interv)
+{
+  int src, sign, exp, fraction;
+  union fp_int_t bin_conv;
+
+  bin_conv.fp_val = source;
+  src = bin_conv.int_val;
+  sign = (signctrl & 0x1) ? 0 : (src >> 31);
+  exp = (src & 0x7f800000) >> 23;
+  fraction = (src & 0x7fffff);
+
+  if (isnan (source))
+    return signbit (source) ? -NAN : NAN;
+  if (source == 0.0 || source == -0.0 || isinf (source))
+    return sign ? -1.0 : 1.0;
+  if (signbit (source) && (signctrl & 0x2))
+    return -NAN;
+  if (!isnormal (source))
+    {
+      src = (src & 0xffbfffff);
+      exp = 0x7f;
+      while (!(src & 0x400000))
+	{
+	  src += fraction & 0x400000;
+	  fraction = fraction << 1;
+	  exp--;
+	}
+    }
+
+  switch (interv)
+    {
+    case 0:
+      exp = 0x7f;
+      break;
+    case 1:
+      exp = ((exp - 0x7f) & 0x1) ? 0x7e : 0x7f;
+      break;
+    case 2:
+      exp = 0x7e;
+      break;
+    case 3:
+      exp = (fraction & 0x400000) ? 0x7e : 0x7f;
+      break;
+    default:
+      abort ();
+    }
+
+  bin_conv.int_val = (sign << 31) | (exp << 23) | fraction;
+
+  return bin_conv.fp_val;
+
+}
+
+static void
+compute_vgetmantss (float *r, float *s1, float *s2, int interv,
+		    int signctrl)
+{
+  int i;
+  r[0] = get_norm_mant (s2[0], signctrl, interv);
+  for (i = 1; i < 4; i++)
+    {
+      r[i] = s1[i];
+    }
+}
+
+static void
+avx512f_test (void)
+{
+  int i, sign;
+  union128 res1, src1, src2;
+  float res_ref[4];
+  int interv = _MM_MANT_NORM_p5_1;
+  int signctrl = _MM_MANT_SIGN_src;
+
+  src1.x = _mm_set_ps (-24.043, 68.346, -43.35, 546.46);
+  src2.x = _mm_set_ps (222.222, 333.333, 444.444, -2.0);
+
+  res1.x = _mm_getmant_ss (src1.x, src2.x, interv, signctrl);
+
+  compute_vgetmantss (res_ref, src1.a, src2.a, interv, signctrl);
+
+  if (check_union128 (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vinsertf32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vinsertf32x4-1.c
new file mode 100644
index 00000000000..b2caa53246c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vinsertf32x4-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vinsertf32x4\[^\n\]*zmm" 3 } } */
+/* { dg-final { scan-assembler-times "vinsertf32x4\[^\n\]*\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vinsertf32x4\[^\n\]*\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+__m128 y;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_insertf32x4 (x, y, 1);
+  x = _mm512_maskz_insertf32x4 (6, x, y, 1);
+  x = _mm512_mask_insertf32x4 (x, 2, x, y, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vinsertf32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vinsertf32x4-2.c
new file mode 100644
index 00000000000..9231163c327
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vinsertf32x4-2.c
@@ -0,0 +1,59 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "string.h"
+
+void static
+CALC (UNION_TYPE (AVX512F_LEN,) s1, union128 s2, float *res_ref, int imm)
+{
+  memcpy (res_ref, s1.a, SIZE * sizeof (float));
+  memcpy (res_ref + imm * 4, s2.a, 16);
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN,) s1, res1, res2, res3;
+  union128 s2;
+  float res_ref[SIZE];
+  int j;
+
+  MASK_TYPE mask = 6 ^ (0xffd >> SIZE);
+
+  for (j = 0; j < SIZE; j++)
+    {
+      s1.a[j] = j * j / 10.2;
+      res1.a[j] = DEFAULT_VALUE;
+      res2.a[j] = DEFAULT_VALUE;
+      res3.a[j] = DEFAULT_VALUE;
+    }
+
+  for (j = 0; j < 4; j++)
+    s2.a[j] = j * j * j / 2.03;
+
+  res1.x = INTRINSIC (_insertf32x4) (s1.x, s2.x, 1);
+  res2.x = INTRINSIC (_mask_insertf32x4) (res2.x, mask, s1.x, s2.x, 1);
+  res3.x = INTRINSIC (_maskz_insertf32x4) (mask, s1.x, s2.x, 1);
+
+  CALC (s1, s2, res_ref, 1);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vinsertf64x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vinsertf64x4-1.c
new file mode 100644
index 00000000000..a4c74fd4863
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vinsertf64x4-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vinsertf64x4\[ \\t\]+\[^\n\]+" 3 } } */
+/* { dg-final { scan-assembler-times "vinsertf64x4\[ \\t\]+\[^\n\]+\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vinsertf64x4\[ \\t\]+\[^\n\]+\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __m256d y;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_insertf64x4 (x, y, 1);
+  x = _mm512_mask_insertf64x4 (x, 2, x, y, 1);
+  x = _mm512_maskz_insertf64x4 (2, x, y, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vinsertf64x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vinsertf64x4-2.c
new file mode 100644
index 00000000000..17871b85493
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vinsertf64x4-2.c
@@ -0,0 +1,65 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512f" } */
+
+#define SIZE (512 / 64)
+#include "avx512f-mask-type.h"
+#include <string.h>
+#include "avx512f-check.h"
+#include "avx512f-mask-type.h"
+#include "avx512f-helper.h"
+
+void static
+avx512f_test (void)
+{
+  union512d s1, res, res2, res3;
+  union256d s2;
+  double res_ref[8];
+  MASK_TYPE mask = MASK_VALUE;
+  int j;
+
+  for (j = 0; j < 8; j++)
+    {
+      s1.a[j] = j * j + 1.6;
+      res2.a[j] = DEFAULT_VALUE;
+    }
+
+  for (j = 0; j < 4; j++)
+    s2.a[j] = j * j * j / 2.7;
+
+  res.x = _mm512_insertf64x4 (s1.x, s2.x, 0);
+  res2.x = _mm512_mask_insertf64x4 (res2.x, mask, s1.x, s2.x, 0);
+  res3.x = _mm512_maskz_insertf64x4 (mask, s1.x, s2.x, 0);
+
+  memcpy (res_ref, s1.a, 64);
+  memcpy (res_ref, s2.a, 32);
+
+  if (check_union512d (res, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (check_union512d (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (check_union512d (res3, res_ref))
+    abort ();
+
+  res.x = _mm512_insertf64x4 (s1.x, s2.x, 1);
+  res2.x = _mm512_mask_insertf64x4 (res2.x, mask, s1.x, s2.x, 1);
+  res3.x = _mm512_maskz_insertf64x4 (mask, s1.x, s2.x, 1);
+
+  memcpy (res_ref, s1.a, 64);
+  memcpy (res_ref + 4, s2.a, 32);
+
+  if (check_union512d (res, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (check_union512d (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (check_union512d (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vinserti32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vinserti32x4-1.c
new file mode 100644
index 00000000000..44c083137a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vinserti32x4-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vinserti32x4\[^\n\]*xmm\[^\n\]*zmm\[^\n\]*zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vinserti32x4\[^\n\]*\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vinserti32x4\[^\n\]*\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x,a;
+volatile __m128i y;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_maskz_inserti32x4 (6, x, y, 1);
+  x = _mm512_mask_inserti32x4 (a, 6, x, y, 1);
+  x = _mm512_inserti32x4 (x, y, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vinserti32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vinserti32x4-2.c
new file mode 100644
index 00000000000..c0cce565b4b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vinserti32x4-2.c
@@ -0,0 +1,59 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "string.h"
+
+void static
+CALC (UNION_TYPE (AVX512F_LEN, i_d) s1, union128i_d s2, int *res_ref, int imm)
+{
+  memcpy (res_ref, s1.a, SIZE * sizeof (int));
+  memcpy (res_ref + imm * 4, s2.a, 16);
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, res1, res2, res3;
+  union128i_d s2;
+  int res_ref[SIZE];
+  int j;
+
+  MASK_TYPE mask = 6 ^ (0xffd >> SIZE);
+
+  for (j = 0; j < SIZE; j++)
+    {
+      s1.a[j] = j * j;
+      res1.a[j] = DEFAULT_VALUE;
+      res2.a[j] = DEFAULT_VALUE;
+      res3.a[j] = DEFAULT_VALUE;
+    }
+
+  for (j = 0; j < 4; j++)
+    s2.a[j] = j * j * j;
+
+  res1.x = INTRINSIC (_inserti32x4) (s1.x, s2.x, 1);
+  res2.x = INTRINSIC (_mask_inserti32x4) (res2.x, mask, s1.x, s2.x, 1);
+  res3.x = INTRINSIC (_maskz_inserti32x4) (mask, s1.x, s2.x, 1);
+
+  CALC (s1, s2, res_ref, 1);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vinserti64x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vinserti64x4-1.c
new file mode 100644
index 00000000000..f5b7eff096d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vinserti64x4-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vinserti64x4\[ \\t\]+\[^\n\]+\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vinserti64x4\[ \\t\]+\[^\n\]+\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vinserti64x4\[ \\t\]+\[^\n\]+\[^\n\]" 3 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m256i y;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_inserti64x4 (x, y, 1);
+  x = _mm512_mask_inserti64x4 (x, 2, x, y, 1);
+  x = _mm512_maskz_inserti64x4 (2, x, y, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vinserti64x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vinserti64x4-2.c
new file mode 100644
index 00000000000..58993ad5ed0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vinserti64x4-2.c
@@ -0,0 +1,65 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512f" } */
+
+#define SIZE (512 / 64)
+#include "avx512f-mask-type.h"
+#include <string.h>
+#include "avx512f-check.h"
+#include "avx512f-mask-type.h"
+#include "avx512f-helper.h"
+
+void static
+avx512f_test (void)
+{
+  union512i_q s1, res, res2, res3;
+  union256i_q s2;
+  long long int res_ref[8];
+  MASK_TYPE mask = MASK_VALUE;
+  int j;
+
+  for (j = 0; j < 8; j++)
+    {
+      s1.a[j] = j * j;
+      res2.a[j] = DEFAULT_VALUE;
+    }
+
+  for (j = 0; j < 4; j++)
+    s2.a[j] = j * j * j;
+
+  res.x = _mm512_inserti64x4 (s1.x, s2.x, 0);
+  res2.x = _mm512_mask_inserti64x4 (res2.x, mask, s1.x, s2.x, 0);
+  res3.x = _mm512_maskz_inserti64x4 (mask, s1.x, s2.x, 0);
+
+  memcpy (res_ref, s1.a, 64);
+  memcpy (res_ref, s2.a, 32);
+
+  if (check_union512i_q (res, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (check_union512i_q (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (check_union512i_q (res3, res_ref))
+    abort ();
+
+  res.x = _mm512_inserti64x4 (s1.x, s2.x, 1);
+  res2.x = _mm512_mask_inserti64x4 (res2.x, mask, s1.x, s2.x, 1);
+  res3.x = _mm512_maskz_inserti64x4 (mask, s1.x, s2.x, 1);
+
+  memcpy (res_ref, s1.a, 64);
+  memcpy (res_ref + 4, s2.a, 32);
+
+  if (check_union512i_q (res, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (check_union512i_q (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (check_union512i_q (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmaxpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmaxpd-1.c
new file mode 100644
index 00000000000..085a7e5e0c6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmaxpd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_max_pd (x, x);
+  x = _mm512_mask_max_pd (x, m, x, x);
+  x = _mm512_maskz_max_pd (m, x, x);
+  x = _mm512_max_round_pd (x, x, _MM_FROUND_NO_EXC);
+  x = _mm512_mask_max_round_pd (x, m, x, x, _MM_FROUND_NO_EXC);
+  x = _mm512_maskz_max_round_pd (m, x, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmaxpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmaxpd-2.c
new file mode 100644
index 00000000000..70f60a9688e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmaxpd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (double *r, double *s1, double *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] > s2[i] ? s1[i] : s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_max_pd) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_max_pd) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_max_pd) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmaxps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmaxps-1.c
new file mode 100644
index 00000000000..564eeb516de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmaxps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_max_ps (x, x);
+  x = _mm512_mask_max_ps (x, m, x, x);
+  x = _mm512_maskz_max_ps (m, x, x);
+  x = _mm512_max_round_ps (x, x, _MM_FROUND_NO_EXC);
+  x = _mm512_mask_max_round_ps (x, m, x, x, _MM_FROUND_NO_EXC);
+  x = _mm512_maskz_max_round_ps (m, x, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmaxps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmaxps-2.c
new file mode 100644
index 00000000000..fc92eaa3aaa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmaxps-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (float *r, float *s1, float *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] > s2[i] ? s1[i] : s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, ) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_max_ps) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_max_ps) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_max_ps) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmaxsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmaxsd-1.c
new file mode 100644
index 00000000000..8c247044234
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmaxsd-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmaxsd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_max_round_sd (x1, x2, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmaxss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmaxss-1.c
new file mode 100644
index 00000000000..027445db32d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmaxss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmaxss\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_max_round_ss (x1, x2, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vminpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vminpd-1.c
new file mode 100644
index 00000000000..a4c993e6431
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vminpd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_min_pd (x, x);
+  x = _mm512_mask_min_pd (x, m, x, x);
+  x = _mm512_maskz_min_pd (m, x, x);
+  x = _mm512_min_round_pd (x, x, _MM_FROUND_NO_EXC);
+  x = _mm512_mask_min_round_pd (x, m, x, x, _MM_FROUND_NO_EXC);
+  x = _mm512_maskz_min_round_pd (m, x, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vminpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vminpd-2.c
new file mode 100644
index 00000000000..cfb355539e3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vminpd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (double *r, double *s1, double *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] < s2[i] ? s1[i] : s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_min_pd) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_min_pd) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_min_pd) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vminps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vminps-1.c
new file mode 100644
index 00000000000..3cd5904bcc5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vminps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_min_ps (x, x);
+  x = _mm512_mask_min_ps (x, m, x, x);
+  x = _mm512_maskz_min_ps (m, x, x);
+  x = _mm512_min_round_ps (x, x, _MM_FROUND_NO_EXC);
+  x = _mm512_mask_min_round_ps (x, m, x, x, _MM_FROUND_NO_EXC);
+  x = _mm512_maskz_min_round_ps (m, x, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vminps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vminps-2.c
new file mode 100644
index 00000000000..f619b12fe58
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vminps-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (float *r, float *s1, float *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] < s2[i] ? s1[i] : s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, ) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_min_ps) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_min_ps) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_min_ps) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vminsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vminsd-1.c
new file mode 100644
index 00000000000..8f8488f8b11
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vminsd-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vminsd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_min_round_sd (x1, x2, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vminss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vminss-1.c
new file mode 100644
index 00000000000..0774b75771d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vminss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vminss\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_min_round_ss (x1, x2, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovapd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovapd-1.c
new file mode 100644
index 00000000000..9cae38ff3fa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovapd-1.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vmovapd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+double *p;
+volatile __m512d x1, x2;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_mask_mov_pd (x1, m, x2);
+  x1 = _mm512_maskz_mov_pd (m, x2);
+
+  x1 = _mm512_load_pd (p);
+  x1 = _mm512_mask_load_pd (x1, m, p);
+  x1 = _mm512_maskz_load_pd (m, p);
+
+  _mm512_store_pd (p, x1);
+  _mm512_mask_store_pd (p, m, x1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovapd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovapd-2.c
new file mode 100644
index 00000000000..5e720ae8292
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovapd-2.c
@@ -0,0 +1,71 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE ((AVX512F_LEN) / 64)
+#include "avx512f-mask-type.h"
+#define ALIGN ((AVX512F_LEN) / 8)
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s2, s3, res1, res3, res4, res5, res6;
+  MASK_TYPE mask = MASK_VALUE;
+  double s1[SIZE] __attribute__ ((aligned (ALIGN)));
+  double res2[SIZE] __attribute__ ((aligned (ALIGN)));
+  double res7[SIZE] __attribute__ ((aligned (ALIGN)));
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1[i] = 12.34 * (i + 2000) * sign;
+      s2.a[i] = 56.78 * (i - 30) * sign;
+      s3.a[i] = 90.12 * (i + 40) * sign;
+      res3.a[i] = DEFAULT_VALUE;
+      res5.a[i] = DEFAULT_VALUE;
+      res7[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_load_pd) (s1);
+  INTRINSIC (_store_pd) (res2, s2.x);
+#endif
+  res3.x = INTRINSIC (_mask_mov_pd) (res3.x, mask, s3.x);
+  res4.x = INTRINSIC (_maskz_mov_pd) (mask, s3.x);
+  res5.x = INTRINSIC (_mask_load_pd) (res5.x, mask, s1);
+  res6.x = INTRINSIC (_maskz_load_pd) (mask, s1);
+  INTRINSIC (_mask_store_pd) (res7, mask, s2.x);
+
+#if AVX512F_LEN == 512
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, s1))
+    abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, d) (s2, res2))
+    abort ();
+#endif
+
+  MASK_MERGE (d) (s3.a, mask, SIZE);
+  if (checkVd (res3.a, s3.a, SIZE))
+    abort ();
+
+  MASK_ZERO (d) (s3.a, mask, SIZE);
+  if (checkVd (res4.a, s3.a, SIZE))
+    abort ();
+
+  MASK_MERGE (d) (s1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res5, s1))
+    abort ();
+
+  MASK_ZERO (d) (s1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res6, s1))
+    abort ();
+
+  MASK_MERGE (d) (s2.a, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (s2, res7))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovaps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovaps-1.c
new file mode 100644
index 00000000000..217e29ccb38
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovaps-1.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vmovaps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+float *p;
+volatile __m512 x1, x2;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_mask_mov_ps (x1, m, x2);
+  x1 = _mm512_maskz_mov_ps (m, x2);
+
+  x1 = _mm512_load_ps (p);
+  x1 = _mm512_mask_load_ps (x1, m, p);
+  x1 = _mm512_maskz_load_ps (m, p);
+
+  _mm512_store_ps (p, x1);
+  _mm512_mask_store_ps (p, m, x1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovaps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovaps-2.c
new file mode 100644
index 00000000000..d92ec968b63
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovaps-2.c
@@ -0,0 +1,71 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE ((AVX512F_LEN) / 32)
+#include "avx512f-mask-type.h"
+#define ALIGN ((AVX512F_LEN) / 8)
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) s2, s3, res1, res3, res4, res5, res6;
+  MASK_TYPE mask = MASK_VALUE;
+  float s1[SIZE] __attribute__ ((aligned (ALIGN)));
+  float res2[SIZE] __attribute__ ((aligned (ALIGN)));
+  float res7[SIZE] __attribute__ ((aligned (ALIGN)));
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1[i] = 12.34 * (i + 2000) * sign;
+      s2.a[i] = 56.78 * (i - 30) * sign;
+      s3.a[i] = 90.12 * (i + 40) * sign;
+      res3.a[i] = DEFAULT_VALUE;
+      res5.a[i] = DEFAULT_VALUE;
+      res7[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_load_ps) (s1);
+  INTRINSIC (_store_ps) (res2, s2.x);
+#endif
+  res3.x = INTRINSIC (_mask_mov_ps) (res3.x, mask, s3.x);
+  res4.x = INTRINSIC (_maskz_mov_ps) (mask, s3.x);
+  res5.x = INTRINSIC (_mask_load_ps) (res5.x, mask, s1);
+  res6.x = INTRINSIC (_maskz_load_ps) (mask, s1);
+  INTRINSIC (_mask_store_ps) (res7, mask, s2.x);
+
+#if AVX512F_LEN == 512
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, s1))
+    abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, ) (s2, res2))
+    abort ();
+#endif
+
+  MASK_MERGE () (s3.a, mask, SIZE);
+  if (checkVf (res3.a, s3.a, SIZE))
+    abort ();
+
+  MASK_ZERO () (s3.a, mask, SIZE);
+  if (checkVf (res4.a, s3.a, SIZE))
+    abort ();
+
+  MASK_MERGE () (s1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res5, s1))
+    abort ();
+
+  MASK_ZERO () (s1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res6, s1))
+    abort ();
+
+  MASK_MERGE () (s2.a, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (s2, res7))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovddup-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovddup-1.c
new file mode 100644
index 00000000000..ccaa078ef74
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovddup-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmovddup\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]|vunpcklpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vmovddup\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]|vunpcklpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovddup\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}|vunpcklpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x1, x2;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+    x1 = _mm512_movedup_pd (x2);
+    x1 = _mm512_mask_movedup_pd (x1, m8, x2);
+    x1 = _mm512_maskz_movedup_pd (m8, x2);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovddup-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovddup-2.c
new file mode 100644
index 00000000000..57619c1429b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovddup-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+void static
+CALC (double *s, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE/2; i++)
+    {
+      r[2 * i] = s[2 * i];
+      r[2 * i + 1] = s[2 * i];
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = i * 123.2 + 32.6;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_movedup_pd) (s.x);
+  res2.x = INTRINSIC (_mask_movedup_pd) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_movedup_pd) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovdqa32-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqa32-1.c
new file mode 100644
index 00000000000..1bfd2a591b8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqa32-1.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+int *p;
+volatile __m512i x1, x2;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_mask_mov_epi32 (x1, m, x2);
+  x1 = _mm512_maskz_mov_epi32 (m, x2);
+
+  x1 = _mm512_load_si512 (p);
+  x1 = _mm512_load_epi32 (p);
+  x1 = _mm512_mask_load_epi32 (x1, m, p);
+  x1 = _mm512_maskz_load_epi32 (m, p);
+
+  _mm512_store_si512 (p, x1);
+  _mm512_store_epi32 (p, x1);
+  _mm512_mask_store_epi32 (p, m, x1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovdqa32-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqa32-2.c
new file mode 100644
index 00000000000..685b58b60b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqa32-2.c
@@ -0,0 +1,80 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE ((AVX512F_LEN) / 32)
+#include "avx512f-mask-type.h"
+#define ALIGN ((AVX512F_LEN) / 8)
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s2, s3, res1, res2, res5, res6, res7, res8;
+  MASK_TYPE mask = MASK_VALUE;
+  int s1[SIZE] __attribute__ ((aligned (ALIGN)));
+  int res3[SIZE] __attribute__ ((aligned (ALIGN)));
+  int res4[SIZE] __attribute__ ((aligned (ALIGN)));
+  int res9[SIZE] __attribute__ ((aligned (ALIGN)));
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1[i] = 1234 * (i + 2000) * sign;
+      s2.a[i] = 5678 * (i - 30) * sign;
+      s3.a[i] = 9012 * (i + 40) * sign;
+      res5.a[i] = DEFAULT_VALUE;
+      res7.a[i] = DEFAULT_VALUE;
+      res9[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_load_si512) (s1);
+  res2.x = INTRINSIC (_load_epi32) (s1);
+  INTRINSIC (_store_si512) (res3, s2.x);
+  INTRINSIC (_store_epi32) (res4, s2.x);
+#endif
+  res5.x = INTRINSIC (_mask_mov_epi32) (res5.x, mask, s3.x);
+  res6.x = INTRINSIC (_maskz_mov_epi32) (mask, s3.x);
+  res7.x = INTRINSIC (_mask_load_epi32) (res7.x, mask, s1);
+  res8.x = INTRINSIC (_maskz_load_epi32) (mask, s1);
+  INTRINSIC (_mask_store_epi32) (res9, mask, s2.x);
+
+#if AVX512F_LEN == 512
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, s1))
+    abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, s1))
+    abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (s2, res3))
+    abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (s2, res4))
+    abort ();
+#endif
+
+  MASK_MERGE (i_d) (s3.a, mask, SIZE);
+  if (checkVi (res5.a, s3.a, SIZE))
+    abort ();
+
+  MASK_ZERO (i_d) (s3.a, mask, SIZE);
+  if (checkVi (res6.a, s3.a, SIZE))
+    abort ();
+
+  MASK_MERGE (i_d) (s1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res7, s1))
+    abort ();
+
+  MASK_ZERO (i_d) (s1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res8, s1))
+    abort ();
+
+  MASK_MERGE (i_d) (s2.a, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (s2, res9))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovdqa64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqa64-1.c
new file mode 100644
index 00000000000..81f958adb77
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqa64-1.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+long long *p;
+volatile __m512i x1, x2;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm512_mask_mov_epi64 (x1, m, x2);
+  x1 = _mm512_maskz_mov_epi64 (m, x2);
+
+  x1 = _mm512_load_epi64 (p);
+  x1 = _mm512_mask_load_epi64 (x1, m, p);
+  x1 = _mm512_maskz_load_epi64 (m, p);
+
+  _mm512_store_epi64 (p, x1);
+  _mm512_mask_store_epi64 (p, m, x1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovdqa64-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqa64-2.c
new file mode 100644
index 00000000000..d5f51f2d13a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqa64-2.c
@@ -0,0 +1,71 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE ((AVX512F_LEN) / 64)
+#include "avx512f-mask-type.h"
+#define ALIGN ((AVX512F_LEN) / 8)
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s2, s3, res1, res3, res4, res5, res6;
+  MASK_TYPE mask = MASK_VALUE;
+  long long s1[SIZE] __attribute__ ((aligned (ALIGN)));
+  long long res2[SIZE] __attribute__ ((aligned (ALIGN)));
+  long long res7[SIZE] __attribute__ ((aligned (ALIGN)));
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1[i] = 1234 * (i + 2000) * sign;
+      s2.a[i] = 5678 * (i - 30) * sign;
+      s3.a[i] = 9012 * (i + 40) * sign;
+      res3.a[i] = DEFAULT_VALUE;
+      res5.a[i] = DEFAULT_VALUE;
+      res7[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = INTRINSIC (_load_epi64) (s1);
+  INTRINSIC (_store_epi64) (res2, s2.x);
+#endif
+  res3.x = INTRINSIC (_mask_mov_epi64) (res3.x, mask, s3.x);
+  res4.x = INTRINSIC (_maskz_mov_epi64) (mask, s3.x);
+  res5.x = INTRINSIC (_mask_load_epi64) (res5.x, mask, s1);
+  res6.x = INTRINSIC (_maskz_load_epi64) (mask, s1);
+  INTRINSIC (_mask_store_epi64) (res7, mask, s2.x);
+
+#if AVX512F_LEN == 512
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, s1))
+    abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (s2, res2))
+    abort ();
+#endif
+
+  MASK_MERGE (i_q) (s3.a, mask, SIZE);
+  if (checkVl (res3.a, s3.a, SIZE))
+    abort ();
+
+  MASK_ZERO (i_q) (s3.a, mask, SIZE);
+  if (checkVl (res4.a, s3.a, SIZE))
+    abort ();
+
+  MASK_MERGE (i_q) (s1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res5, s1))
+    abort ();
+
+  MASK_ZERO (i_q) (s1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res6, s1))
+    abort ();
+
+  MASK_MERGE (i_q) (s2.a, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (s2, res7))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovdqu32-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqu32-1.c
new file mode 100644
index 00000000000..b8af781834e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqu32-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmovdqu32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqu32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqu32\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqu32\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqu32\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+int *p;
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_loadu_si512 (p);
+  x = _mm512_mask_loadu_epi32 (x, m, p);
+  x = _mm512_maskz_loadu_epi32 (m, p);
+
+  _mm512_storeu_si512 (p, x);
+  _mm512_mask_storeu_epi32 (p, m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovdqu32-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqu32-2.c
new file mode 100644
index 00000000000..f1ae73c1d82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqu32-2.c
@@ -0,0 +1,62 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE ((AVX512F_LEN) / 32)
+#include "avx512f-mask-type.h"
+
+typedef struct
+{
+  char c;
+  int a[SIZE];
+} __attribute__ ((packed)) EVAL(unaligned_array, AVX512F_LEN,);
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s2, res1, res3, res4;
+  EVAL(unaligned_array, AVX512F_LEN,) s1, res2, res5;
+  MASK_TYPE mask = MASK_VALUE;
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 12345 * (i + 2000) * sign;
+      s2.a[i] = 67890 * (i + 2000) * sign;
+      res3.a[i] = DEFAULT_VALUE;
+      res5.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+#if AVX512F_LEN == 512
+  res1.x = _mm512_loadu_si512 (s1.a);
+  _mm512_storeu_si512 (res2.a, s2.x);
+#endif
+  res3.x = INTRINSIC (_mask_loadu_epi32) (res3.x, mask, s1.a);
+  res4.x = INTRINSIC (_maskz_loadu_epi32) (mask, s1.a);
+  INTRINSIC (_mask_storeu_epi32) (res5.a, mask, s2.x);
+
+#if AVX512F_LEN == 512
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, s1.a))
+    abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (s2, res2.a))
+    abort ();
+#endif
+
+  MASK_MERGE (i_d) (s1.a, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, s1.a))
+    abort ();
+
+  MASK_ZERO (i_d) (s1.a, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res4, s1.a))
+    abort ();
+
+  MASK_MERGE (i_d) (s2.a, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (s2, res5.a))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovdqu64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqu64-1.c
new file mode 100644
index 00000000000..806d1f5867a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqu64-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+long long *p;
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_loadu_epi64 (x, m, p);
+  x = _mm512_maskz_loadu_epi64 (m, p);
+
+  _mm512_mask_storeu_epi64 (p, m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovdqu64-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqu64-2.c
new file mode 100644
index 00000000000..867a2517d54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovdqu64-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE ((AVX512F_LEN) / 64)
+#include "avx512f-mask-type.h"
+
+typedef struct
+{
+  char c;
+  long long a[SIZE];
+} __attribute__ ((packed)) EVAL(unaligned_array, AVX512F_LEN,);
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s2, res1, res2;
+  EVAL(unaligned_array, AVX512F_LEN,) s1, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 12345 * (i + 2000) * sign;
+      s2.a[i] = 67890 * (i + 2000) * sign;
+      res1.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_mask_loadu_epi64) (res1.x, mask, s1.a);
+  res2.x = INTRINSIC (_maskz_loadu_epi64) (mask, s1.a);
+  INTRINSIC (_mask_storeu_epi64) (res3.a, mask, s2.x);
+
+  MASK_MERGE (i_q) (s1.a, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, s1.a))
+    abort ();
+
+  MASK_ZERO (i_q) (s1.a, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, s1.a))
+    abort ();
+
+  MASK_MERGE (i_q) (s2.a, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (s2, res3.a))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovntdq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovntdq-1.c
new file mode 100644
index 00000000000..7a3ba47b1cb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovntdq-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "vmovntdq\[ \\t\]+\[^\n\]*%zmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+__m512i *x;
+volatile __m512i y;
+
+void extern
+avx512f_test (void)
+{
+  _mm512_stream_si512 (x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovntdq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovntdq-2.c
new file mode 100644
index 00000000000..7b200e37d15
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovntdq-2.c
@@ -0,0 +1,17 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void static
+avx512f_test (void)
+{
+  union512i_q s, res;
+
+  s.x = _mm512_set_epi64 (39578, -429496, 7856, 0, 85632, -1234, 47563, -1);
+  _mm512_stream_si512 (&res.x, s.x);
+
+  if (check_union512i_q (s, res.a))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovntpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovntpd-1.c
new file mode 100644
index 00000000000..a02162124b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovntpd-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "vmovntpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+double *x;
+volatile __m512d y;
+
+void extern
+avx512f_test (void)
+{
+  _mm512_stream_pd (x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovntpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovntpd-2.c
new file mode 100644
index 00000000000..96c26c21ef4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovntpd-2.c
@@ -0,0 +1,19 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void static
+avx512f_test (void)
+{
+  union512d s;
+  double res[8];
+
+  s.x = _mm512_set_pd (-39578.467285, 4294967295.1, -7856.342941, 0,
+		       85632.783567, 1234.9999, 47563.234215, -1.07);
+  _mm512_stream_pd (res, s.x);
+
+  if (check_union512d (s, res))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovntps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovntps-1.c
new file mode 100644
index 00000000000..933f01518aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovntps-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "vmovntps\[ \\t\]+\[^\n\]*%zmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+float *x;
+volatile __m512 y;
+
+void extern
+avx512f_test (void)
+{
+  _mm512_stream_ps (x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovntps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovntps-2.c
new file mode 100644
index 00000000000..9f4c7cb5ab2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovntps-2.c
@@ -0,0 +1,22 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+void static
+avx512f_test (void)
+{
+  union512 s;
+  float res[16];
+
+  s.x = _mm512_set_ps (-39578.467285, 4294967295.1, -7856.342941, 0,
+		       85632.783567, 1234.9999, 47563.234215, -1.07,
+		       3453.65743, -1234.9999, 67.234, -1,
+		       0.336624, 34534543, 4345.234234, -1.07234234);
+
+  _mm512_stream_ps (res, s.x);
+
+  if (check_union512 (s, res))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovshdup-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovshdup-1.c
new file mode 100644
index 00000000000..b23df0a00ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovshdup-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmovshdup\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vmovshdup\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovshdup\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_movehdup_ps (x);
+  x = _mm512_mask_movehdup_ps (x, m, x);
+  x = _mm512_maskz_movehdup_ps (m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovshdup-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovshdup-2.c
new file mode 100644
index 00000000000..1cd8a6b9e99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovshdup-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+void static
+CALC (float *s, float *r)
+{
+  int i;
+
+  for (i = 1; i < SIZE; i += 2)
+    {
+      r[i - 1] = r[i] = s[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) s, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = i * 123.2 + 32.6;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_movehdup_ps) (s.x);
+  res2.x = INTRINSIC (_mask_movehdup_ps) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_movehdup_ps) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovsldup-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovsldup-1.c
new file mode 100644
index 00000000000..f2fd4e07d2d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovsldup-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmovsldup\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vmovsldup\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovsldup\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_moveldup_ps (x);
+  x = _mm512_mask_moveldup_ps (x, m, x);
+  x = _mm512_maskz_moveldup_ps (m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovsldup-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovsldup-2.c
new file mode 100644
index 00000000000..032fec82e31
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovsldup-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+void static
+CALC (float *s, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i += 2)
+    {
+      r[i] = r[i + 1] = s[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) s, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = i * 123.2 + 32.6;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_moveldup_ps) (s.x);
+  res2.x = INTRINSIC (_mask_moveldup_ps) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_moveldup_ps) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovupd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovupd-1.c
new file mode 100644
index 00000000000..f505819e3fc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovupd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmovupd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovupd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovupd\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vmovupd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovupd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+double *p;
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_loadu_pd (p);
+  x = _mm512_mask_loadu_pd (x, m, p);
+  x = _mm512_maskz_loadu_pd (m, p);
+
+  _mm512_storeu_pd (p, x);
+  _mm512_mask_storeu_pd (p, m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovupd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovupd-2.c
new file mode 100644
index 00000000000..7e76e29b751
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovupd-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3, s2;
+  MASK_TYPE mask = MASK_VALUE;
+  double s1[SIZE];
+  double res4[SIZE];
+  double res5[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1[i] = 123.456 * (i + 2000) * sign;
+      s2.a[i] = 789.012 * (i + 3000) * sign;
+      res2.a[i] = DEFAULT_VALUE;
+      res5[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_loadu_pd) (s1);
+  res2.x = INTRINSIC (_mask_loadu_pd) (res2.x, mask, s1);
+  res3.x = INTRINSIC (_maskz_loadu_pd) (mask, s1);
+  INTRINSIC (_storeu_pd) (res4, s2.x);
+  INTRINSIC (_mask_storeu_pd) (res5, mask, s2.x);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, s1))
+    abort ();
+
+  MASK_MERGE (d) (s1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, s1))
+    abort ();
+
+  MASK_ZERO (d) (s1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, s1))
+    abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, d) (s2, res4))
+    abort ();
+
+  MASK_MERGE (d) (s2.a, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (s2, res5))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovups-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovups-1.c
new file mode 100644
index 00000000000..93b76876ceb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovups-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmovups\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovups\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovups\[ \\t\]+\[^\n\]*\\)\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vmovups\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmovups\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+float *p;
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_loadu_ps (p);
+  x = _mm512_mask_loadu_ps (x, m, p);
+  x = _mm512_maskz_loadu_ps (m, p);
+
+  _mm512_storeu_ps (p, x);
+  _mm512_mask_storeu_ps (p, m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmovups-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmovups-2.c
new file mode 100644
index 00000000000..7225bda54e2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmovups-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) res1, res2, res3, s2;
+  MASK_TYPE mask = MASK_VALUE;
+  float s1[SIZE];
+  float res4[SIZE];
+  float res5[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1[i] = 123.456 * (i + 2000) * sign;
+      s2.a[i] = 789.012 * (i + 3000) * sign;
+      res2.a[i] = DEFAULT_VALUE;
+      res5[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_loadu_ps) (s1);
+  res2.x = INTRINSIC (_mask_loadu_ps) (res2.x, mask, s1);
+  res3.x = INTRINSIC (_maskz_loadu_ps) (mask, s1);
+  INTRINSIC (_storeu_ps) (res4, s2.x);
+  INTRINSIC (_mask_storeu_ps) (res5, mask, s2.x);
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, s1))
+    abort ();
+
+  MASK_MERGE () (s1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, s1))
+    abort ();
+
+  MASK_ZERO () (s1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res3, s1))
+    abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, ) (s2, res4))
+    abort ();
+
+  MASK_MERGE () (s2.a, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (s2, res5))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmulpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmulpd-1.c
new file mode 100644
index 00000000000..fd3e3ac6942
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmulpd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mul_pd (x, x);
+  x = _mm512_mask_mul_pd (x, m, x, x);
+  x = _mm512_maskz_mul_pd (m, x, x);
+  x = _mm512_mul_round_pd (x, x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_mul_round_pd (x, m, x, x, _MM_FROUND_TO_NEG_INF);
+  x = _mm512_maskz_mul_round_pd (m, x, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmulpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmulpd-2.c
new file mode 100644
index 00000000000..bfd2a51559b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmulpd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (double *r, double *s1, double *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] * s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_mul_pd) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_mul_pd) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_mul_pd) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmulps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmulps-1.c
new file mode 100644
index 00000000000..e86f8972174
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmulps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mul_ps (x, x);
+  x = _mm512_mask_mul_ps (x, m, x, x);
+  x = _mm512_maskz_mul_ps (m, x, x);
+  x = _mm512_mul_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_mul_round_ps (x, m, x, x, _MM_FROUND_TO_POS_INF);
+  x = _mm512_maskz_mul_round_ps (m, x, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmulps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vmulps-2.c
new file mode 100644
index 00000000000..09bb29967af
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmulps-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (float *r, float *s1, float *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] * s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN,) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_mul_ps) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_mul_ps) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_mul_ps) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmulsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmulsd-1.c
new file mode 100644
index 00000000000..c85832aaa41
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmulsd-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmulsd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_mul_round_sd (x1, x2, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vmulss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vmulss-1.c
new file mode 100644
index 00000000000..cb4bf0a2d2e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vmulss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vmulss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_mul_round_ss (x1, x2, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpabsd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpabsd-2.c
new file mode 100644
index 00000000000..124e2e1a938
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpabsd-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *i1, int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    if (i1[i] < 0)
+      r[i] = -i1[i];
+    else
+      r[i] = i1[i];
+}
+
+static void
+TEST (void)
+{
+  int ck[SIZE];
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_d) s, d, dm, dz;
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = i * 7 + (i << 15) + 356;
+      d.a[i] = DEFAULT_VALUE;
+      dm.a[i] = DEFAULT_VALUE;
+      dz.a[i] = DEFAULT_VALUE;
+    }
+
+  CALC (s.a, ck);
+
+  d.x = INTRINSIC (_abs_epi32) (s.x);
+  dz.x = INTRINSIC (_maskz_abs_epi32) (mask, s.x);
+  dm.x = INTRINSIC (_mask_abs_epi32) (dm.x, mask, s.x);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (d, ck))
+    abort ();
+
+  MASK_MERGE (i_d) (ck, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (dm, ck))
+    abort ();
+
+  MASK_ZERO (i_d) (ck, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (dz, ck))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpabsd512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpabsd512-1.c
new file mode 100644
index 00000000000..67b1def173a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpabsd512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpabsd\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpabsd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpabsd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_abs_epi32 (x);
+  x = _mm512_maskz_abs_epi32 (7, x);
+  x = _mm512_mask_abs_epi32 (x, 6, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpabsq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpabsq-2.c
new file mode 100644
index 00000000000..ff906f6d41d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpabsq-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (long long *i1, long long *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    if (i1[i] < 0)
+      r[i] = -i1[i];
+    else
+      r[i] = i1[i];
+}
+
+static void
+TEST (void)
+{
+  long long ck[SIZE];
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_q) s, d, dm, dz;
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = i * 7 + (i << 15) + 356;
+      d.a[i] = DEFAULT_VALUE;
+      dm.a[i] = DEFAULT_VALUE;
+      dz.a[i] = DEFAULT_VALUE;
+    }
+
+  CALC (s.a, ck);
+
+  d.x = INTRINSIC (_abs_epi64) (s.x);
+  dz.x = INTRINSIC (_maskz_abs_epi64) (mask, s.x);
+  dm.x = INTRINSIC (_mask_abs_epi64) (dm.x, mask, s.x);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (d, ck))
+    abort ();
+
+  MASK_MERGE (i_q) (ck, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (dm, ck))
+    abort ();
+
+  MASK_ZERO (i_q) (ck, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (dz, ck))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpabsq512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpabsq512-1.c
new file mode 100644
index 00000000000..fee48b1b740
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpabsq512-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpabsq\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpabsq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpabsq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_abs_epi64 (x);
+  x = _mm512_maskz_abs_epi64 (2, x);
+  x = _mm512_mask_abs_epi64 (x, 3, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpaddd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpaddd-1.c
new file mode 100644
index 00000000000..f4bf7eb3f35
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpaddd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_add_epi32 (x, x);
+  x = _mm512_mask_add_epi32 (x, m, x, x);
+  x = _mm512_maskz_add_epi32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpaddd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpaddd-2.c
new file mode 100644
index 00000000000..8aff11eb952
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpaddd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, int *s1, int *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] + s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_add_epi32) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_add_epi32) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_add_epi32) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpaddq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpaddq-1.c
new file mode 100644
index 00000000000..6f8223e1140
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpaddq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpaddq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpaddq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpaddq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_add_epi64 (x, x);
+  x = _mm512_mask_add_epi64 (x, m, x, x);
+  x = _mm512_maskz_add_epi64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpaddq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpaddq-2.c
new file mode 100644
index 00000000000..a9d31715229
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpaddq-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (long long *r, long long *s1, long long *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] + s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_add_epi64) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_add_epi64) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_add_epi64) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpandd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpandd-1.c
new file mode 100644
index 00000000000..fbf8a49a376
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpandd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_and_si512 (x, x);
+  x = _mm512_and_epi32 (x, x);
+  x = _mm512_mask_and_epi32 (x, m, x, x);
+  x = _mm512_maskz_and_epi32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpandd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpandd-2.c
new file mode 100644
index 00000000000..b422c9d5dbd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpandd-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *s1, int *s2, int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = s1[i] & s2[i];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, s2, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i * sign;
+      s2.a[i] = (i + 20) * sign;
+      sign = -sign;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_and_si512) (s1.x, s2.x);
+  res2.x = INTRINSIC (_and_epi32) (s1.x, s2.x);
+  res3.x = INTRINSIC (_mask_and_epi32) (res3.x, mask, s1.x, s2.x);
+  res4.x = INTRINSIC (_maskz_and_epi32) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res4, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpandnd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpandnd-1.c
new file mode 100644
index 00000000000..8f48d601c30
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpandnd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpandnd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vpandnd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpandnd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_andnot_si512 (x, x);
+  x = _mm512_andnot_epi32 (x, x);
+  x = _mm512_mask_andnot_epi32 (x, m, x, x);
+  x = _mm512_maskz_andnot_epi32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpandnd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpandnd-2.c
new file mode 100644
index 00000000000..f1b12b6e6b0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpandnd-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *s1, int *s2, int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = (~s1[i]) & s2[i];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, s2, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i * sign;
+      s2.a[i] = (i + 20) * sign;
+      sign = -sign;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_andnot_si512) (s1.x, s2.x);
+  res2.x = INTRINSIC (_andnot_epi32) (s1.x, s2.x);
+  res3.x = INTRINSIC (_mask_andnot_epi32) (res3.x, mask, s1.x, s2.x);
+  res4.x = INTRINSIC (_maskz_andnot_epi32) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+      abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+      abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res4, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpandnq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpandnq-1.c
new file mode 100644
index 00000000000..348fb159656
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpandnq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpandnq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpandnq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpandnq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_andnot_epi64 (x, x);
+  x = _mm512_mask_andnot_epi64 (x,m, x, x);
+  x = _mm512_maskz_andnot_epi64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpandnq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpandnq-2.c
new file mode 100644
index 00000000000..d03bd0692f2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpandnq-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (long long *s1, long long *s2, long long *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = (~s1[i]) & s2[i];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s1, s2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i * sign;
+      s2.a[i] = (i + 20) * sign;
+      sign = -sign;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_andnot_epi64) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_andnot_epi64) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_andnot_epi64) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+      abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpandq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpandq-1.c
new file mode 100644
index 00000000000..343ff59f579
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpandq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpandq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpandq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpandq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_and_epi64 (x, x);
+  x = _mm512_mask_and_epi64 (x,m, x, x);
+  x = _mm512_maskz_and_epi64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpandq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpandq-2.c
new file mode 100644
index 00000000000..86ab76ba890
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpandq-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (long long *s1, long long *s2, long long *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = s1[i] & s2[i];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s1, s2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i * sign;
+      s2.a[i] = (i + 20) * sign;
+      sign = -sign;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_and_epi64) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_and_epi64) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_and_epi64) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+      abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpblendmd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpblendmd-1.c
new file mode 100644
index 00000000000..3a0aa2429a8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpblendmd-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "(vpblendmd|vmovdqa32)\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_blend_epi32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpblendmd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpblendmd-2.c
new file mode 100644
index 00000000000..c2670fbf9cf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpblendmd-2.c
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, int *s1, int *s2, MASK_TYPE mask)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (mask & (1LL << i)) ? s2[i] : s1[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 15 + 3467 * i * sign;
+      src2.a[i] = -2217 * i * sign;
+      sign = sign * -1;
+    }
+
+  res1.x = INTRINSIC (_mask_blend_epi32) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a, mask);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpblendmq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpblendmq-1.c
new file mode 100644
index 00000000000..38581beaf6a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpblendmq-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "(vpblendmq|vmovdqa64)\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_blend_epi64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpblendmq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpblendmq-2.c
new file mode 100644
index 00000000000..1fc8a5b5710
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpblendmq-2.c
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (long long *r, long long *s1, long long *s2, MASK_TYPE mask)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (mask & (1LL << i)) ? s2[i] : s1[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 15 + 3467 * i * sign;
+      src2.a[i] = -2217 * i * sign;
+      sign = sign * -1;
+    }
+
+  res1.x = INTRINSIC (_mask_blend_epi64) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a, mask);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastd-1.c
new file mode 100644
index 00000000000..668db6b81a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastd-1.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+%e\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+%e\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpbroadcastd\[ \\t\]+%e\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m128i y;
+volatile int z;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_broadcastd_epi32 (y);
+  x = _mm512_mask_broadcastd_epi32 (x, m, y);
+  x = _mm512_maskz_broadcastd_epi32 (m, y);
+
+  x = _mm512_set1_epi32 (z);
+  x = _mm512_mask_set1_epi32 (x, m, z);
+  x = _mm512_maskz_set1_epi32 (m, z);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastd-2.c
new file mode 100644
index 00000000000..67bd3ac2d38
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastd-2.c
@@ -0,0 +1,72 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, int *s)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[0];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3;
+  UNION_TYPE (128, i_d) src;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < 4; i++)
+    {
+      src.a[i] = 1 + 34 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_broadcastd_epi32) (src.x);
+  res2.x = INTRINSIC (_mask_broadcastd_epi32) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_broadcastd_epi32) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+
+  res1.x = INTRINSIC (_set1_epi32) (src.a[0]);
+  res2.x = INTRINSIC (_mask_set1_epi32) (res2.x, mask, src.a[0]);
+  res3.x = INTRINSIC (_maskz_set1_epi32) (mask, src.a[0]);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastq-1.c
new file mode 100644
index 00000000000..7c4698a34dd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastq-1.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 2  } } */
+/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+%r\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 { target { ! { ia32 } } } } } */
+/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+%r\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 { target { ! { ia32 } } } } } */
+/* { dg-final { scan-assembler-times "vpbroadcastq\[ \\t\]+%r\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 { target { ! { ia32 } } } } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m128i y;
+volatile long long z;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_broadcastq_epi64 (y);
+  x = _mm512_mask_broadcastq_epi64 (x, m, y);
+  x = _mm512_maskz_broadcastq_epi64 (m, y);
+
+  x = _mm512_set1_epi64 (z);
+  x = _mm512_mask_set1_epi64 (x, m, z);
+  x = _mm512_maskz_set1_epi64 (m, z);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastq-2.c
new file mode 100644
index 00000000000..4518f6ef4fb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpbroadcastq-2.c
@@ -0,0 +1,72 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (long long *r, long long *s)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[0];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3;
+  UNION_TYPE (128, i_q) src;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < 2; i++)
+    {
+      src.a[i] = 1 + 34 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_broadcastq_epi64) (src.x);
+  res2.x = INTRINSIC (_mask_broadcastq_epi64) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_broadcastq_epi64) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+
+  res1.x = INTRINSIC (_set1_epi64) (src.a[0]);
+  res2.x = INTRINSIC (_mask_set1_epi64) (res2.x, mask, src.a[0]);
+  res3.x = INTRINSIC (_maskz_set1_epi64) (mask, src.a[0]);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpd-1.c
new file mode 100644
index 00000000000..7e835db1e5f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpd-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  m = _mm512_cmp_epi32_mask (x, x, _MM_CMPINT_GE);
+  m = _mm512_mask_cmp_epi32_mask (m, x, x, _MM_CMPINT_NLE);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpd-2.c
new file mode 100644
index 00000000000..600dfd2c0ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpd-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#include <math.h>
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+#if AVX512F_LEN == 512
+#define CMP(imm, rel)					\
+    dst_ref = 0;					\
+    for (i = 0; i < 16; i++)				\
+    {							\
+      dst_ref = ((rel) << i) | dst_ref;			\
+    }							\
+    source1.x = _mm512_loadu_si512 (s1);		\
+    source2.x = _mm512_loadu_si512 (s2);		\
+    dst1 = _mm512_cmp_epi32_mask (source1.x, source2.x, imm);\
+    dst2 = _mm512_mask_cmp_epi32_mask (mask, source1.x, source2.x, imm);\
+    if (dst_ref != dst1) abort();			\
+    if ((mask & dst_ref) != dst2) abort();
+#endif
+
+static void
+TEST ()
+{
+    UNION_TYPE (AVX512F_LEN, i_d) source1, source2;
+    MASK_TYPE dst1, dst2, dst_ref;
+    MASK_TYPE mask = MASK_VALUE;
+    int i;
+    int s1[16] = {2134,  6678,  453, 54646,
+		  231, 5674,  111, 23241,
+		  12314,  145,  671, 77575,
+		  23455,  166, 5321, 5673};
+    int s2[16] = {41124, 6678, 8653,   856,
+		  231, 4646,  111,   124,
+		  2745, 4567, 3676,   123,
+		  714, 3589, 5683,  5673};
+
+    CMP(0x00, s1[i] == s2[i]);
+    CMP(0x01, s1[i] < s2[i]);
+    CMP(0x02, s1[i] <= s2[i]);
+    CMP(0x03, 0);
+    CMP(0x04, s1[i] != s2[i]);
+    CMP(0x05, s1[i] >= s2[i]);
+    CMP(0x06, s1[i] > s2[i]);
+    CMP(0x07, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpeqd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpeqd-1.c
new file mode 100644
index 00000000000..834fae79a43
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpeqd-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpcmpeqd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpcmpeqd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  m = _mm512_cmpeq_epi32_mask (x, x);
+  m = _mm512_mask_cmpeq_epi32_mask (3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpeqd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpeqd-2.c
new file mode 100644
index 00000000000..9a4c493aa6d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpeqd-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (MASK_TYPE *r, int *s1, int *s2)
+{
+  int i;
+  *r = 0;
+  MASK_TYPE one = 1;
+
+  for (i = 0; i < SIZE; i++)
+    if (s1[i] == s2[i])
+      *r = *r | (one << i);
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_d) src1, src2;
+  MASK_TYPE res_ref, res1, res2;
+  MASK_TYPE mask = MASK_VALUE;
+  res1 = 0;
+  res2 = 0;
+
+  for (i = 0; i < SIZE / 2; i++)
+    {
+      src1.a[i * 2] = i;
+      src1.a[i * 2 + 1] = i * i;
+      src2.a[i * 2] = 2 * i;
+      src2.a[i * 2 + 1] = i * i;
+    }
+
+  res1 = INTRINSIC (_cmpeq_epi32_mask) (src1.x, src2.x);
+  res2 = INTRINSIC (_mask_cmpeq_epi32_mask) (mask, src1.x, src2.x);
+
+  CALC (&res_ref, src1.a, src2.a);
+
+  if (res_ref != res1)
+    abort ();
+
+  res_ref &= mask;
+
+  if (res_ref != res2)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpeqq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpeqq-1.c
new file mode 100644
index 00000000000..8689fe3a0cd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpeqq-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpcmpeqq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpcmpeqq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  m = _mm512_cmpeq_epi64_mask (x, x);
+  m = _mm512_mask_cmpeq_epi64_mask (3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpeqq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpeqq-2.c
new file mode 100644
index 00000000000..8c269eeb10c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpeqq-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (MASK_TYPE *r, long long *s1, long long *s2)
+{
+  int i;
+  *r = 0;
+  MASK_TYPE one = 1;
+
+  for (i = 0; i < SIZE; i++)
+    if (s1[i] == s2[i])
+      *r = *r | (one << i);
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_q) src1, src2;
+  MASK_TYPE res1, res2, res_ref;
+  MASK_TYPE mask = MASK_VALUE;
+  res1 = 0;
+  res2 = 0;
+
+  for (i = 0; i < SIZE / 2; i++)
+    {
+      src1.a[i * 2] = i;
+      src1.a[i * 2 + 1] = i * i;
+      src2.a[i * 2] = 2 * i;
+      src2.a[i * 2 + 1] = i * i;
+    }
+
+  res1 = INTRINSIC (_cmpeq_epi64_mask) (src1.x, src2.x);
+  res2 = INTRINSIC (_mask_cmpeq_epi64_mask) (mask, src1.x, src2.x);
+
+  CALC (&res_ref, src1.a, src2.a);
+
+  if (res1 != res_ref)
+    abort ();
+
+  res_ref &= mask;
+
+  if (res2 != res_ref)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtd-1.c
new file mode 100644
index 00000000000..1be0f8d263b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtd-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpcmpgtd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpcmpgtd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  m = _mm512_cmpgt_epi32_mask (x, x);
+  m = _mm512_mask_cmpgt_epi32_mask (3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtd-2.c
new file mode 100644
index 00000000000..6c824360519
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtd-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (MASK_TYPE *r, int *s1, int *s2)
+{
+  int i;
+  *r = 0;
+  MASK_TYPE one = 1;
+
+  for (i = 0; i < SIZE; i++)
+    if (s1[i] > s2[i])
+      *r = *r | (one << i);
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_d) src1, src2;
+  MASK_TYPE res_ref, res1, res2;
+  MASK_TYPE mask = MASK_VALUE;
+  res1 = 0;
+  res2 = 0;
+
+  for (i = 0; i < SIZE / 2; i++)
+    {
+      src1.a[i * 2] = i;
+      src1.a[i * 2 + 1] = i * i;
+      src2.a[i * 2] = 2 * i;
+      src2.a[i * 2 + 1] = i * i;
+    }
+
+  res1 = INTRINSIC (_cmpgt_epi32_mask) (src1.x, src2.x);
+  res2 = INTRINSIC (_mask_cmpgt_epi32_mask) (mask, src1.x, src2.x);
+
+  CALC (&res_ref, src1.a, src2.a);
+
+  if (res_ref != res1)
+    abort ();
+
+  res_ref &= mask;
+
+  if (res_ref != res2)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtq-1.c
new file mode 100644
index 00000000000..b94be287ebc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtq-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpcmpgtq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpcmpgtq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[0-9\]\{" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  m = _mm512_cmpgt_epi64_mask (x, x);
+  m = _mm512_mask_cmpgt_epi64_mask (3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtq-2.c
new file mode 100644
index 00000000000..c1eb5801b2b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtq-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (MASK_TYPE *r, long long *s1, long long *s2)
+{
+  int i;
+  *r = 0;
+  MASK_TYPE one = 1;
+
+  for (i = 0; i < SIZE; i++)
+    if (s1[i] > s2[i])
+      *r = *r | (one << i);
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_q) src1, src2;
+  MASK_TYPE res1, res2, res_ref;
+  MASK_TYPE mask = MASK_VALUE;
+  res1 = 0;
+  res2 = 0;
+
+  for (i = 0; i < SIZE / 2; i++)
+    {
+      src1.a[i * 2] = i;
+      src1.a[i * 2 + 1] = i * i;
+      src2.a[i * 2] = 2 * i;
+      src2.a[i * 2 + 1] = i * i;
+    }
+
+  res1 = INTRINSIC (_cmpgt_epi64_mask) (src1.x, src2.x);
+  res2 = INTRINSIC (_mask_cmpgt_epi64_mask) (mask, src1.x, src2.x);
+
+  CALC (&res_ref, src1.a, src2.a);
+
+  if (res1 != res_ref)
+    abort ();
+
+  res_ref &= mask;
+
+  if (res2 != res_ref)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpq-1.c
new file mode 100644
index 00000000000..800140d0325
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpq-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */
+/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  m = _mm512_cmp_epi64_mask (x, x, _MM_CMPINT_NE);
+  m = _mm512_mask_cmp_epi64_mask (m, x, x, _MM_CMPINT_NLT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpq-2.c
new file mode 100644
index 00000000000..2a9ceb6a9f0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpq-2.c
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#include <math.h>
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+__mmask8 dst_ref;
+
+#define CMP(imm, rel)					\
+    dst_ref = 0;					\
+    for (i = 0; i < 8; i++)				\
+    {							\
+      dst_ref = ((rel) << i) | dst_ref;			\
+    }							\
+    source1.x = _mm512_loadu_si512 (s1);		\
+    source2.x = _mm512_loadu_si512 (s2);		\
+    dst1 = _mm512_cmp_epi64_mask (source1.x, source2.x, imm);\
+    dst2 = _mm512_mask_cmp_epi64_mask (mask, source1.x, source2.x, imm);\
+    if (dst_ref != dst1) abort();			\
+    if ((mask & dst_ref) != dst2) abort();
+
+static void
+TEST ()
+{
+    UNION_TYPE (AVX512F_LEN, i_d) source1, source2;
+    MASK_TYPE dst1, dst2, dst_ref;
+    MASK_TYPE mask = MASK_VALUE;
+    long long s1[8] = {2134,  6678,  453, 54646,
+		       231,  5674,  111, 23241};
+    long long s2[8] = {41124, 6678, 8653,   856,
+		       231,  4646,  111,   124};
+    int i;
+
+    CMP(0x00, s1[i] == s2[i]);
+    CMP(0x01, s1[i] < s2[i]);
+    CMP(0x02, s1[i] <= s2[i]);
+    CMP(0x03, 0);
+    CMP(0x04, s1[i] != s2[i]);
+    CMP(0x05, s1[i] >= s2[i]);
+    CMP(0x06, s1[i] > s2[i]);
+    CMP(0x07, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpud-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpud-1.c
new file mode 100644
index 00000000000..110c0904768
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpud-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  m = _mm512_cmp_epu32_mask (x, x, _MM_CMPINT_EQ);
+  m = _mm512_mask_cmp_epu32_mask (m, x, x, _MM_CMPINT_LT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpud-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpud-2.c
new file mode 100644
index 00000000000..c0bb97839f2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpud-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#include <math.h>
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+#if AVX512F_LEN == 512
+#define CMP(imm, rel)					\
+    dst_ref = 0;					\
+    for (i = 0; i < 16; i++)				\
+    {							\
+      dst_ref = ((rel) << i) | dst_ref;			\
+    }							\
+    source1.x = _mm512_loadu_si512 (s1);		\
+    source2.x = _mm512_loadu_si512 (s2);		\
+    dst1 = _mm512_cmp_epu32_mask (source1.x, source2.x, imm);\
+    dst2 = _mm512_mask_cmp_epu32_mask (mask, source1.x, source2.x, imm);\
+    if (dst_ref != dst1) abort();			\
+    if ((mask & dst_ref) != dst2) abort();
+#endif
+
+static void
+TEST ()
+{
+    unsigned int s1[16] = {2134,  6678,  453, 54646,
+			  231, 5674,  111, 23241,
+			  12314,  145,  671, 77575,
+			  23455,  166, 5321, 5673};
+    unsigned int s2[16] = {41124, 6678, 8653,   856,
+			  231, 4646,  111,   124,
+			  2745, 4567, 3676,   123,
+			  714, 3589, 5683,  5673};
+    UNION_TYPE (AVX512F_LEN, i_d) source1, source2;
+    MASK_TYPE dst1, dst2, dst_ref;
+    MASK_TYPE mask = MASK_VALUE;
+    int i;
+
+    CMP(0x00, s1[i] == s2[i]);
+    CMP(0x01, s1[i] < s2[i]);
+    CMP(0x02, s1[i] <= s2[i]);
+    CMP(0x03, 0);
+    CMP(0x04, s1[i] != s2[i]);
+    CMP(0x05, s1[i] >= s2[i]);
+    CMP(0x06, s1[i] > s2[i]);
+    CMP(0x07, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpuq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpuq-1.c
new file mode 100644
index 00000000000..2f79f4dccbe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpuq-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n^k\]*%k\[1-7\]\{" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  m = _mm512_cmp_epu64_mask (x, x, _MM_CMPINT_LE);
+  m = _mm512_mask_cmp_epu64_mask (m, x, x, _MM_CMPINT_UNUSED);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpuq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpuq-2.c
new file mode 100644
index 00000000000..3bd1b865623
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpuq-2.c
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#include <math.h>
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+#if AVX512F_LEN == 512
+#define CMP(imm, rel)					\
+    dst_ref = 0;					\
+    for (i = 0; i < 8; i++)				\
+    {							\
+      dst_ref = ((rel) << i) | dst_ref;			\
+    }							\
+    source1.x = _mm512_loadu_si512 (s1);		\
+    source2.x = _mm512_loadu_si512 (s2);		\
+    dst1 = _mm512_cmp_epu64_mask (source1.x, source2.x, imm);\
+    dst2 = _mm512_mask_cmp_epu64_mask (mask, source1.x, source2.x, imm);\
+    if (dst_ref != dst1) abort();			\
+    if ((mask & dst_ref) != dst2) abort();
+#endif
+
+static void
+TEST ()
+{
+    UNION_TYPE (AVX512F_LEN, i_q) source1, source2;
+    MASK_TYPE dst1, dst2, dst_ref;
+    MASK_TYPE mask = MASK_VALUE;
+    int i;
+    unsigned long long s1[8] = {2134,  6678,  453, 54646,
+				231,  5674,  111, 23241};
+    unsigned long long s2[8] = {41124, 6678, 8653,   856,
+				231,  4646,  111,   124};
+
+    CMP(0x00, s1[i] == s2[i]);
+    CMP(0x01, s1[i] < s2[i]);
+    CMP(0x02, s1[i] <= s2[i]);
+    CMP(0x03, 0);
+    CMP(0x04, s1[i] != s2[i]);
+    CMP(0x05, s1[i] >= s2[i]);
+    CMP(0x06, s1[i] > s2[i]);
+    CMP(0x07, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressd-1.c
new file mode 100644
index 00000000000..162fa7aef07
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressd-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpcompressd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpcompressd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vpcompressd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+int *p;
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_compress_epi32 (x, m, x);
+  x = _mm512_maskz_compress_epi32 (m, x);
+
+  _mm512_mask_compressstoreu_epi32 (p, m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressd-2.c
new file mode 100644
index 00000000000..2c1e3f586d8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressd-2.c
@@ -0,0 +1,62 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#define MASK ((1 << SIZE) - 1)
+#include <x86intrin.h>
+
+static void
+CALC (int *s, int *r, MASK_TYPE mask)
+{
+  int i, k;
+
+  for (i = 0, k = 0; i < SIZE; i++)
+    {
+      if (mask & (1 << i))
+	r[k++] = s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s, res1, res2;
+  int res3[SIZE];
+  MASK_TYPE compressed_mask, mask = MASK_VALUE;
+  int res_ref[SIZE];
+  int i, mask_bit_count, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 12345 * (i + 200) * sign;
+      res1.a[i] = DEFAULT_VALUE;
+      res3[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_mask_compress_epi32) (res1.x, mask, s.x);
+  res2.x = INTRINSIC (_maskz_compress_epi32) (mask, s.x);
+  INTRINSIC (_mask_compressstoreu_epi32) (res3, mask, s.x);
+
+  mask_bit_count = __popcntd (mask & MASK);
+  compressed_mask = (1 << mask_bit_count) - 1;
+  CALC (s.a, res_ref, mask);
+
+  MASK_MERGE (i_d) (res_ref, compressed_mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, compressed_mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, compressed_mask, SIZE);
+  if (checkVi (res3, res_ref, SIZE))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressq-1.c
new file mode 100644
index 00000000000..3a07ee89bd8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressq-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpcompressq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpcompressq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vpcompressq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*\\)\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+long long *p;
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_compress_epi64 (x, m, x);
+  x = _mm512_maskz_compress_epi64 (m, x);
+
+  _mm512_mask_compressstoreu_epi64 (p, m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressq-2.c
new file mode 100644
index 00000000000..0ea69f0ab77
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressq-2.c
@@ -0,0 +1,62 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#define MASK ((1 << SIZE) - 1)
+#include <x86intrin.h>
+
+static void
+CALC (long long *s, long long *r, MASK_TYPE mask)
+{
+  int i, k;
+
+  for (i = 0, k = 0; i < SIZE; i++)
+    {
+      if (mask & (1 << i))
+	r[k++] = s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s, res1, res2;
+  long long res3[SIZE];
+  MASK_TYPE compressed_mask, mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  int i, mask_bit_count, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 12345 * (i + 200) * sign;
+      res1.a[i] = DEFAULT_VALUE;
+      res3[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_mask_compress_epi64) (res1.x, mask, s.x);
+  res2.x = INTRINSIC (_maskz_compress_epi64) (mask, s.x);
+  INTRINSIC (_mask_compressstoreu_epi64) (res3, mask, s.x);
+
+  mask_bit_count = __popcntd (mask & MASK);
+  compressed_mask = (1 << mask_bit_count) - 1;
+  CALC (s.a, res_ref, mask);
+
+  MASK_MERGE (i_q) (res_ref, compressed_mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, compressed_mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, compressed_mask, SIZE);
+  if (checkVl (res3, res_ref, SIZE))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermd-1.c
new file mode 100644
index 00000000000..4b5f8d91a17
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vpermd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_permutexvar_epi32 (x, x);
+  x = _mm512_maskz_permutexvar_epi32 (m, x, x);
+  x = _mm512_mask_permutexvar_epi32 (x, m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermd-2.c
new file mode 100644
index 00000000000..db5fd09e7d3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermd-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *src1, int *mask, int *dst)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      dst[i] = src1[mask[i] & 15];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = (i + 10) * (i + 10) * sign;
+      src2.a[i] = (i + 30);
+      sign = -sign;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_permutexvar_epi32) (src1.x, src2.x);
+  res2.x = INTRINSIC (_maskz_permutexvar_epi32) (mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_mask_permutexvar_epi32) (res3.x, mask, src1.x, src2.x);
+
+  CALC (src1.a, src2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermi2d-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2d-1.c
new file mode 100644
index 00000000000..0436dfd709b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2d-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermi2d\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask2_permutex2var_epi32 (x, x, m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermi2d-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2d-2.c
new file mode 100644
index 00000000000..9aa104bbf5d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2d-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "math.h"
+#include "values.h"
+
+static void
+CALC (int *dst, int *src1, int *ind, int *src2)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      unsigned long long offset = ind[i] & (SIZE - 1);
+      unsigned long long cond = ind[i] & SIZE;
+
+      dst[i] = cond ? src2[offset] : src1[offset];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_d) s1, s2, res, ind;
+  int res_ref[SIZE];
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      ind.a[i] = DEFAULT_VALUE;
+      s1.a[i] = 34 * i + 1;
+      s2.a[i] = 34 * i;
+
+      res.a[i] = DEFAULT_VALUE;
+    }
+
+  CALC (res_ref, s1.a, ind.a, s2.a);
+
+  res.x =
+    INTRINSIC (_mask2_permutex2var_epi32) (s1.x, ind.x, mask, s2.x);
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermi2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2pd-1.c
new file mode 100644
index 00000000000..e2b74cc9910
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2pd-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermi2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __m512i y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask2_permutex2var_pd (x, y, m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermi2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2pd-2.c
new file mode 100644
index 00000000000..a2daca0bd55
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2pd-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include "math.h"
+#include "values.h"
+
+static void
+CALC (double *dst, double *src1, long long *ind, double *src2)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      unsigned long long offset = ind[i] & (SIZE - 1);
+      unsigned long long cond = ind[i] & SIZE;
+
+      dst[i] = cond ? src2[offset] : src1[offset];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, k;
+  UNION_TYPE (AVX512F_LEN, d) s1, s2, res;
+  UNION_TYPE (AVX512F_LEN, i_q) ind;
+  double res_ref[SIZE];
+
+  union
+  {
+    double f;
+    long long i;
+  } ind_copy[SIZE];
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      /* Some of the integer indexes may be interpreted as floating point
+         values in mask-merge mode, that's why we use IND_COPY.  */
+      ind.a[i] = ind_copy[i].i = 17 * (i << 1);
+      s1.a[i] = 42.5 * i + 1;
+      s2.a[i] = 22.5 * i;
+
+      res.a[i] = DEFAULT_VALUE;
+    }
+
+  CALC (res_ref, s1.a, ind.a, s2.a);
+
+  res.x = INTRINSIC (_mask2_permutex2var_pd) (s1.x, ind.x, mask, s2.x);
+
+  /* Standard MASK_MERGE cannot be used since VPERMI2PD in mask-merge mode
+     merges vectors of two different types (_m512d and __m512i).  */
+  for (k = 0; k < SIZE; k++)
+    res_ref[k] = (mask & (1LL << k)) ? res_ref[k] : ind_copy[k].f;
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermi2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2ps-1.c
new file mode 100644
index 00000000000..fc103a90e18
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2ps-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermi2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __m512i y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask2_permutex2var_ps (x, y, m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermi2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2ps-2.c
new file mode 100644
index 00000000000..56215cfca14
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2ps-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "math.h"
+#include "values.h"
+
+static void
+CALC (float *dst, float *src1, int *ind, float *src2)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      unsigned long long offset = ind[i] & (SIZE - 1);
+      unsigned long long cond = ind[i] & SIZE;
+
+      dst[i] = cond ? src2[offset] : src1[offset];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, k;
+  UNION_TYPE (AVX512F_LEN,) s1, s2, res;
+  UNION_TYPE (AVX512F_LEN, i_d) ind;
+  float res_ref[SIZE];
+
+  union
+  {
+    float f;
+    int i;
+  } ind_copy[SIZE];
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      /* Some of the integer indexes may be interpreted as floating point
+         values in mask-merge mode, that's why we use IND_COPY.  */
+      ind.a[i] = ind_copy[i].i = 17 * (i << 1);
+      s1.a[i] = 42.5 * i + 1;
+      s2.a[i] = 22.5 * i;
+
+      res.a[i] = DEFAULT_VALUE;
+    }
+
+  CALC (res_ref, s1.a, ind.a, s2.a);
+
+  res.x = INTRINSIC (_mask2_permutex2var_ps) (s1.x, ind.x, mask, s2.x);
+
+  /* Standard MASK_MERGE cannot be used since VPERMI2PS in mask-merge mode
+     merges vectors of two different types (_m512 and __m512i).  */
+  for (k = 0; k < SIZE; k++)
+    res_ref[k] = (mask & (1LL << k)) ? res_ref[k] : ind_copy[k].f;
+
+  if (UNION_CHECK (AVX512F_LEN,) (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermi2q-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2q-1.c
new file mode 100644
index 00000000000..7d780b2a3b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2q-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermi2q\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask2_permutex2var_epi64 (x, x, m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermi2q-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2q-2.c
new file mode 100644
index 00000000000..9d7b9bec3f3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermi2q-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include "math.h"
+#include "values.h"
+
+static void
+CALC (long long *dst, long long *src1, long long *ind, long long *src2)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      unsigned long long offset = ind[i] & (SIZE - 1);
+      unsigned long long cond = ind[i] & SIZE;
+
+      dst[i] = cond ? src2[offset] : src1[offset];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_q) s1, s2, res, ind;
+  long long res_ref[SIZE];
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      ind.a[i] = DEFAULT_VALUE;
+      s1.a[i] = 34 * i + 1;
+      s2.a[i] = 34 * i;
+
+      res.a[i] = DEFAULT_VALUE;
+    }
+
+  CALC (res_ref, s1.a, ind.a, s2.a);
+
+  res.x =
+    INTRINSIC (_mask2_permutex2var_epi64) (s1.x, ind.x, mask, s2.x);
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermilpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermilpd-1.c
new file mode 100644
index 00000000000..061a6253591
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermilpd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __m512i c;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_permutevar_pd (x, c);
+  x = _mm512_mask_permutevar_pd (x, m, x, c);
+  x = _mm512_maskz_permutevar_pd (m, x, c);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermilpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermilpd-2.c
new file mode 100644
index 00000000000..27d697bd846
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermilpd-2.c
@@ -0,0 +1,60 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+#ifndef CTRL
+#define CTRL 6
+#endif
+
+#undef mask_v
+#define mask_v(pos) (((CTRL & (1ULL << (pos))) >> (pos)) << 1)
+
+static void
+CALC (double *s1, long long *s2, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = s1[(2 * (i / 2)) + ((s2[i] & 0x02) >> 1)];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s1, res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_q) s2;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i + 10.;
+      s2.a[i] = mask_v (i);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_permutevar_pd) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_permutevar_pd) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_permutevar_pd) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermilpdi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermilpdi-1.c
new file mode 100644
index 00000000000..8b5ffd023af
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermilpdi-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*13\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*13\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpermilpd\[ \\t\]+\[^\n\]*13\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_permute_pd (x, 13);
+  x = _mm512_mask_permute_pd (x, m, x, 13);
+  x = _mm512_maskz_permute_pd (m, x, 13);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermilpdi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermilpdi-2.c
new file mode 100644
index 00000000000..9b5ecd4c6c5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermilpdi-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+#ifndef CTRL
+#define CTRL 129
+#endif
+
+static void
+CALC (double *s1, int s2, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (s2 & (1 << i)) ? s1[1 + 2 * (i / 2)] : s1[2 * (i / 2)];
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s1, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i + 10.;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_permute_pd) (s1.x, CTRL);
+  res2.x = INTRINSIC (_mask_permute_pd) (res2.x, mask, s1.x, CTRL);
+  res3.x = INTRINSIC (_maskz_permute_pd) (mask, s1.x, CTRL);
+
+  CALC (s1.a, CTRL, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermilps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermilps-1.c
new file mode 100644
index 00000000000..b46182b247d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermilps-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __m512i c;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_permutevar_ps (x, c);
+  x = _mm512_mask_permutevar_ps (x, m, x, c);
+  x = _mm512_maskz_permutevar_ps (m, x, c);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermilps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermilps-2.c
new file mode 100644
index 00000000000..92c65538d10
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermilps-2.c
@@ -0,0 +1,60 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+#ifndef CTRL
+#define CTRL 233
+#endif
+
+#undef mask_v
+#define mask_v(pos) ((CTRL & (0x3 << (pos))) >> (pos))
+
+static void
+CALC (float *s1, int *s2, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = s1[(4 * (i / 4)) + (s2[i] & 0x03)];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN,) s1, res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_d) s2;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i + 10.;
+      s2.a[i] = mask_v (i);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_permutevar_ps) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_permutevar_ps) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_permutevar_ps) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE ()(res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO ()(res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermilpsi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermilpsi-1.c
new file mode 100644
index 00000000000..f09213e03e7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermilpsi-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*13\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*13\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpermilps\[ \\t\]+\[^\n\]*13\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_permute_ps (x, 13);
+  x = _mm512_mask_permute_ps (x, m, x, 13);
+  x = _mm512_maskz_permute_ps (m, x, 13);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermilpsi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermilpsi-2.c
new file mode 100644
index 00000000000..381a794b4ed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermilpsi-2.c
@@ -0,0 +1,82 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+#ifndef CTRL
+#define CTRL 129
+#endif
+
+#ifndef SELECT4_DEFINED
+#define SELECT4_DEFINED
+static int
+select4 (int i, unsigned ctrl)
+{
+  int res;
+  switch (i % 4)
+    {
+    case 0:
+      res = (CTRL & 0x03);
+      break;
+    case 1:
+      res = ((CTRL & 0x0c) >> 2);
+      break;
+    case 2:
+      res = ((CTRL & 0x30) >> 4);
+      break;
+    case 3:
+      res = ((CTRL & 0xc0) >> 6);
+      break;
+    }
+  return res;
+}
+#endif
+
+static void
+CALC (float *s, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[(4 * (i / 4)) + select4 (i, CTRL)];
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN,) s1, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i + 10.;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_permute_ps) (s1.x, CTRL);
+  res2.x = INTRINSIC (_mask_permute_ps) (res2.x, mask, s1.x, CTRL);
+  res3.x = INTRINSIC (_maskz_permute_ps) (mask, s1.x, CTRL);
+
+  CALC (s1.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE ()(res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO ()(res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermpd-1.c
new file mode 100644
index 00000000000..d2e8b9c971b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermpd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m512d y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm512_permutexvar_pd (x, y);
+  y = _mm512_mask_permutexvar_pd (y, m, x, y);
+  y = _mm512_maskz_permutexvar_pd (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermpd-2.c
new file mode 100644
index 00000000000..3d168beba58
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermpd-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (double *s1, long long *mask, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[mask[i] & 7 % SIZE];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) src1, res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_q) src2;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = i * sign;
+      src2.a[i] = i + 20;
+      sign = -sign;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_permutexvar_pd) (src2.x, src1.x);
+  res2.x = INTRINSIC (_mask_permutexvar_pd) (res2.x, mask, src2.x, src1.x);
+  res3.x = INTRINSIC (_maskz_permutexvar_pd) (mask, src2.x, src1.x);
+
+  CALC (src1.a, src2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermpdi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermpdi-1.c
new file mode 100644
index 00000000000..97fd92c840f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermpdi-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_permutex_pd (x, 13);
+  x = _mm512_mask_permutex_pd (x, m, x, 13);
+  x = _mm512_maskz_permutex_pd (m, x, 13);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermpdi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermpdi-2.c
new file mode 100644
index 00000000000..eb8e583812f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermpdi-2.c
@@ -0,0 +1,58 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+#define N 0x7c
+
+static void
+CALC (double *s1, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      int index = (N >> ((i % 4) * 2)) & 3;
+      int base = i / 4;
+      r[i] = s1[4 * base + index];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) src1, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = i * i * sign;
+      res2.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_permutex_pd) (src1.x, N);
+  res2.x = INTRINSIC (_mask_permutex_pd) (res2.x, mask, src1.x, N);
+  res3.x = INTRINSIC (_maskz_permutex_pd) (mask, src1.x, N);
+
+  CALC (src1.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermps-1.c
new file mode 100644
index 00000000000..7b7367afad9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermps-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpermps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m512 y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  y = _mm512_permutexvar_ps (x, y);
+  y = _mm512_mask_permutexvar_ps (y, m, x, y);
+  y = _mm512_maskz_permutexvar_ps (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermps-2.c
new file mode 100644
index 00000000000..618294868bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermps-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (float *s1, int *mask, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[mask[i] & 15 % SIZE];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) src1, res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_d) src2;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = i * sign;
+      src2.a[i] = i + 20;
+      sign = -sign;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_permutexvar_ps) (src2.x, src1.x);
+  res2.x = INTRINSIC (_mask_permutexvar_ps) (res2.x, mask, src2.x, src1.x);
+  res3.x = INTRINSIC (_maskz_permutexvar_ps) (mask, src2.x, src1.x);
+
+  CALC (src1.a, src2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-1.c
new file mode 100644
index 00000000000..ef0271b612a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpermq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_permutex_epi64 (x, 13);
+  x = _mm512_mask_permutex_epi64 (x, m, x, 13);
+  x = _mm512_maskz_permutex_epi64 (m, x, 13);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-2.c
new file mode 100644
index 00000000000..6b1d778c6fd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-2.c
@@ -0,0 +1,59 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+#define IMM_MASK 0x7c
+
+static void
+CALC (long long *src1, int mask, long long *dst)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      int index = ((mask >> (2 * (i % 4))) & 3);
+      int base = i / 4;
+      dst[i] = src1[4 * base + index];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = (i + 10) * (i + 10) * sign;
+      sign = -sign;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_permutex_epi64) (src1.x, IMM_MASK);
+  res2.x = INTRINSIC (_maskz_permutex_epi64) (mask, src1.x, IMM_MASK);
+  res3.x = INTRINSIC (_mask_permutex_epi64) (res3.x, mask, src1.x, IMM_MASK);
+
+  CALC (src1.a, IMM_MASK, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermq-var-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-var-1.c
new file mode 100644
index 00000000000..62b28c33d57
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-var-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermq\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vpermq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_permutexvar_epi64 (x, x);
+  x = _mm512_maskz_permutexvar_epi64 (m, x, x);
+  x = _mm512_mask_permutexvar_epi64 (x, m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermq-var-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-var-2.c
new file mode 100644
index 00000000000..2733e175b56
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-var-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (long long *src1, long long *mask, long long *dst)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      dst[i] = src1[mask[i] & 7];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = (i + 10) * (i + 10) * sign;
+      src2.a[i] = 2 * i + 10;
+      sign = -sign;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_permutexvar_epi64) (src1.x, src2.x);
+  res2.x = INTRINSIC (_maskz_permutexvar_epi64) (mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_mask_permutexvar_epi64) (res3.x, mask, src1.x, src2.x);
+
+  CALC (src1.a, src2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermt2d-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2d-1.c
new file mode 100644
index 00000000000..892b5710dad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2d-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermt2d\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermt2d\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpermt2d\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_permutex2var_epi32 (x, x, x);
+  x = _mm512_mask_permutex2var_epi32 (x, m, x, x);
+  x = _mm512_maskz_permutex2var_epi32 (m, x, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermt2d-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2d-2.c
new file mode 100644
index 00000000000..ef8d1951b6d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2d-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "math.h"
+#include "values.h"
+
+static void
+CALC (int *dst, int *src1, int *ind, int *src2)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      unsigned long long offset = ind[i] & (SIZE - 1);
+      unsigned long long cond = ind[i] & SIZE;
+
+      dst[i] = cond ? src2[offset] : src1[offset];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_d) s1, s2, res1, res2, res3, ind;
+  int res_ref[SIZE];
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      ind.a[i] = 17 * (i << 1);
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 34 * i;
+
+      res1.a[i] = DEFAULT_VALUE;
+      res2.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  CALC (res_ref, s1.a, ind.a, s2.a);
+
+  res1.x = INTRINSIC (_permutex2var_epi32) (s1.x, ind.x, s2.x);
+  res2.x =
+    INTRINSIC (_mask_permutex2var_epi32) (s1.x, mask, ind.x, s2.x);
+  res3.x =
+    INTRINSIC (_maskz_permutex2var_epi32) (mask, s1.x, ind.x, s2.x);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermt2pd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2pd-1.c
new file mode 100644
index 00000000000..01595233f9b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2pd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermt2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermt2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpermt2pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __m512i y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_permutex2var_pd (x, y, x);
+  x = _mm512_mask_permutex2var_pd (x, m, y, x);
+  x = _mm512_maskz_permutex2var_pd (m, x, y, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermt2pd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2pd-2.c
new file mode 100644
index 00000000000..511a47015f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2pd-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include "math.h"
+#include "values.h"
+
+static void
+CALC (double *dst, double *src1, long long *ind, double *src2)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      unsigned long long offset = ind[i] & (SIZE - 1);
+      unsigned long long cond = ind[i] & SIZE;
+
+      dst[i] = cond ? src2[offset] : src1[offset];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, d) s1, s2, res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_q) ind;
+  double res_ref[SIZE];
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      ind.a[i] = 17 * (i << 1);
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 22.5 * i;
+
+      res1.a[i] = DEFAULT_VALUE;
+      res2.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  CALC (res_ref, s1.a, ind.a, s2.a);
+
+  res1.x = INTRINSIC (_permutex2var_pd) (s1.x, ind.x, s2.x);
+  res2.x = INTRINSIC (_mask_permutex2var_pd) (s1.x, mask, ind.x, s2.x);
+  res3.x =
+    INTRINSIC (_maskz_permutex2var_pd) (mask, s1.x, ind.x, s2.x);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermt2ps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2ps-1.c
new file mode 100644
index 00000000000..f315055da84
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2ps-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermt2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermt2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpermt2ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __m512i y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_permutex2var_ps (x, y, x);
+  x = _mm512_mask_permutex2var_ps (x, m, y, x);
+  x = _mm512_maskz_permutex2var_ps (m, x, y, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermt2ps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2ps-2.c
new file mode 100644
index 00000000000..cd35d1237ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2ps-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "math.h"
+#include "values.h"
+
+static void
+CALC (float *dst, float *src1, int *ind, float *src2)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      unsigned long long offset = ind[i] & (SIZE - 1);
+      unsigned long long cond = ind[i] & SIZE;
+
+      dst[i] = cond ? src2[offset] : src1[offset];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN,) s1, s2, res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_d) ind;
+  float res_ref[SIZE];
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      ind.a[i] = 17 * (i << 1);
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 22.5 * i;
+
+      res1.a[i] = DEFAULT_VALUE;
+      res2.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  CALC (res_ref, s1.a, ind.a, s2.a);
+
+  res1.x = INTRINSIC (_permutex2var_ps) (s1.x, ind.x, s2.x);
+  res2.x = INTRINSIC (_mask_permutex2var_ps) (s1.x, mask, ind.x, s2.x);
+  res3.x =
+    INTRINSIC (_maskz_permutex2var_ps) (mask, s1.x, ind.x, s2.x);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE ()(res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO ()(res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermt2q-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2q-1.c
new file mode 100644
index 00000000000..65f4afb0406
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2q-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpermt2q\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpermt2q\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpermt2q\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_permutex2var_epi64 (x, x, x);
+  x = _mm512_mask_permutex2var_epi64 (x, m, x, x);
+  x = _mm512_maskz_permutex2var_epi64 (m, x, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermt2q-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2q-2.c
new file mode 100644
index 00000000000..5f449adec2e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermt2q-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include "math.h"
+#include "values.h"
+
+static void
+CALC (long long *dst, long long *src1, long long *ind, long long *src2)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      unsigned long long offset = ind[i] & (SIZE - 1);
+      unsigned long long cond = ind[i] & SIZE;
+
+      dst[i] = cond ? src2[offset] : src1[offset];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_q) s1, s2, res1, res2, res3, ind;
+  long long res_ref[SIZE];
+
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      ind.a[i] = 17 * (i << 1);
+      s1.a[i] = DEFAULT_VALUE;
+      s2.a[i] = 34 * i;
+
+      res1.a[i] = DEFAULT_VALUE;
+      res2.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  CALC (res_ref, s1.a, ind.a, s2.a);
+
+  res1.x = INTRINSIC (_permutex2var_epi64) (s1.x, ind.x, s2.x);
+  res2.x =
+    INTRINSIC (_mask_permutex2var_epi64) (s1.x, mask, ind.x, s2.x);
+  res3.x =
+    INTRINSIC (_maskz_permutex2var_epi64) (mask, s1.x, ind.x, s2.x);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandd-1.c
new file mode 100644
index 00000000000..c70a2abc9ac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandd-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpexpandd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vpexpandd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+
+#include <immintrin.h>
+
+int *p;
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_expand_epi32 (x, m, x);
+  x = _mm512_maskz_expand_epi32 (m, x);
+
+  x = _mm512_mask_expandloadu_epi32 (x, m, p);
+  x = _mm512_maskz_expandloadu_epi32 (m, p);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandd-2.c
new file mode 100644
index 00000000000..31b3b5a05ee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandd-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *s, int *r, MASK_TYPE mask)
+{
+  int i, k;
+
+  for (i = 0, k = 0; i < SIZE; i++)
+    {
+      if (mask & (1 << i))
+	r[i] = s[k++];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  int s2[SIZE];
+  int res_ref1[SIZE];
+  int res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 12345 * (i + 200) * sign;
+      s2[i] = 67890 * (i + 300) * sign;
+      res1.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_mask_expand_epi32) (res1.x, mask, s1.x);
+  res2.x = INTRINSIC (_maskz_expand_epi32) (mask, s1.x);
+  res3.x = INTRINSIC (_mask_expandloadu_epi32) (res3.x, mask, s2);
+  res4.x = INTRINSIC (_maskz_expandloadu_epi32) (mask, s2);
+
+  CALC (s1.a, res_ref1, mask);
+  CALC (s2, res_ref2, mask);
+
+  MASK_MERGE (i_d) (res_ref1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref1))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref1))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref2, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref2))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref2, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res4, res_ref2))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandq-1.c
new file mode 100644
index 00000000000..fc477f209a0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandq-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpexpandq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vpexpandq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+
+#include <immintrin.h>
+
+long long *p;
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mask_expand_epi64 (x, m, x);
+  x = _mm512_maskz_expand_epi64 (m, x);
+
+  x = _mm512_mask_expandloadu_epi64 (x, m, p);
+  x = _mm512_maskz_expandloadu_epi64 (m, p);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandq-2.c
new file mode 100644
index 00000000000..f72799c574e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandq-2.c
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (long long *s, long long *r, MASK_TYPE mask)
+{
+  int i, k;
+
+  for (i = 0, k = 0; i < SIZE; i++)
+    {
+      if (mask & (1 << i))
+	r[i] = s[k++];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s1, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  long long s2[SIZE];
+  long long res_ref1[SIZE];
+  long long res_ref2[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 12345 * (i + 200) * sign;
+      s2[i] = 67890 * (i + 300) * sign;
+      res1.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_mask_expand_epi64) (res1.x, mask, s1.x);
+  res2.x = INTRINSIC (_maskz_expand_epi64) (mask, s1.x);
+  res3.x = INTRINSIC (_mask_expandloadu_epi64) (res3.x, mask, s2);
+  res4.x = INTRINSIC (_maskz_expandloadu_epi64) (mask, s2);
+
+  CALC (s1.a, res_ref1, mask);
+  CALC (s2, res_ref2, mask);
+
+  MASK_MERGE (i_q) (res_ref1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref1))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref1, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref1))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref2, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref2))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref2, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res4, res_ref2))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmaxsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxsd-1.c
new file mode 100644
index 00000000000..2c88e92bd85
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxsd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmaxsd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpmaxsd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmaxsd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_max_epi32 (x, x);
+  x = _mm512_mask_max_epi32 (x, m, x, x);
+  x = _mm512_maskz_max_epi32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmaxsd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxsd-2.c
new file mode 100644
index 00000000000..78c5511a37a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxsd-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+
+CALC (int *src1, int *src2, int *dst)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    dst[i] = src1[i] > src2[i] ? src1[i] : src2[i];
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) src1, src2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] =  i * sign;
+      src2.a[i] = (i + 2000) * sign;
+      sign = -sign;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_max_epi32) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_max_epi32) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_max_epi32) (mask, src1.x, src2.x);
+
+  CALC (src1.a, src2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmaxsq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxsq-1.c
new file mode 100644
index 00000000000..e15fa2ab3d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxsq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmaxsq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpmaxsq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmaxsq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_max_epi64 (x, x);
+  x = _mm512_mask_max_epi64 (x, m, x, x);
+  x = _mm512_maskz_max_epi64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmaxsq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxsq-2.c
new file mode 100644
index 00000000000..10bcd8230f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxsq-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+
+CALC (long long *src1, long long *src2, long long *dst)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    dst[i] = src1[i] > src2[i] ? src1[i] : src2[i];
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) src1, src2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] =  i * sign;
+      src2.a[i] = (i + 2000) * sign;
+      sign = -sign;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_max_epi64) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_max_epi64) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_max_epi64) (mask, src1.x, src2.x);
+
+  CALC (src1.a, src2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmaxud-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxud-1.c
new file mode 100644
index 00000000000..321992ac102
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxud-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmaxud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpmaxud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmaxud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_max_epu32 (x, x);
+  x = _mm512_mask_max_epu32 (x, m, x, x);
+  x = _mm512_maskz_max_epu32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmaxud-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxud-2.c
new file mode 100644
index 00000000000..b014be8627f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxud-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+
+CALC (unsigned *src1, unsigned *src2,
+      unsigned *dst)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    dst[i] = src1[i] > src2[i] ? src1[i] : src2[i];
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_d) src1, src2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] =  i;
+      src2.a[i] = (i + 2000);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_max_epu32) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_max_epu32) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_max_epu32) (mask, src1.x, src2.x);
+
+  CALC (src1.a, src2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmaxuq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxuq-1.c
new file mode 100644
index 00000000000..2cf8b4cc458
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxuq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmaxuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpmaxuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmaxuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_max_epu64 (x, x);
+  x = _mm512_mask_max_epu64 (x, m, x, x);
+  x = _mm512_maskz_max_epu64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmaxuq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxuq-2.c
new file mode 100644
index 00000000000..e2daacd3983
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmaxuq-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+
+CALC (unsigned long long *src1, unsigned long long *src2,
+    unsigned long long *dst)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    dst[i] = src1[i] > src2[i] ? src1[i] : src2[i];
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_q) src1, src2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned long long res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] =  i;
+      src2.a[i] = (i + 2000);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_max_epu64) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_max_epu64) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_max_epu64) (mask, src1.x, src2.x);
+
+  CALC (src1.a, src2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpminsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpminsd-1.c
new file mode 100644
index 00000000000..2beffc6e2b1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpminsd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpminsd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpminsd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpminsd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_min_epi32 (x, x);
+  x = _mm512_mask_min_epi32 (x, m, x, x);
+  x = _mm512_maskz_min_epi32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpminsd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpminsd-2.c
new file mode 100644
index 00000000000..1a6b82bfdd4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpminsd-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+
+CALC (int *src1, int *src2, int *dst)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    dst[i] = src1[i] < src2[i] ? src1[i] : src2[i];
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) src1, src2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] =  i * sign;
+      src2.a[i] = (i + 2000) * sign;
+      sign = -sign;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_min_epi32) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_min_epi32) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_min_epi32) (mask, src1.x, src2.x);
+
+  CALC (src1.a, src2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpminsq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpminsq-1.c
new file mode 100644
index 00000000000..8270307fb24
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpminsq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpminsq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpminsq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpminsq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_min_epi64 (x, x);
+  x = _mm512_mask_min_epi64 (x, m, x, x);
+  x = _mm512_maskz_min_epi64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpminsq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpminsq-2.c
new file mode 100644
index 00000000000..f646489ad44
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpminsq-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+
+CALC (long long *src1, long long *src2, long long *dst)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    dst[i] = src1[i] < src2[i] ? src1[i] : src2[i];
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) src1, src2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] =  i * sign;
+      src2.a[i] = (i + 2000) * sign;
+      sign = -sign;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_min_epi64) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_min_epi64) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_min_epi64) (mask, src1.x, src2.x);
+
+  CALC (src1.a, src2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpminud-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpminud-1.c
new file mode 100644
index 00000000000..6cbb9d631f2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpminud-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpminud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpminud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpminud\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_min_epu32 (x, x);
+  x = _mm512_mask_min_epu32 (x, m, x, x);
+  x = _mm512_maskz_min_epu32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpminud-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpminud-2.c
new file mode 100644
index 00000000000..17aac43a5ad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpminud-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+
+CALC (unsigned *src1, unsigned *src2,
+      unsigned *dst)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    dst[i] = src1[i] < src2[i] ? src1[i] : src2[i];
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_d) src1, src2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = i * i;
+      src2.a[i] = i + 20;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_min_epu32) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_min_epu32) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_min_epu32) (mask, src1.x, src2.x);
+
+  CALC (src1.a, src2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpminuq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpminuq-1.c
new file mode 100644
index 00000000000..816c11bccaf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpminuq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpminuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpminuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpminuq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_min_epu64 (x, x);
+  x = _mm512_mask_min_epu64 (x, m, x, x);
+  x = _mm512_maskz_min_epu64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpminuq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpminuq-2.c
new file mode 100644
index 00000000000..4c27977ace8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpminuq-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+
+CALC (unsigned long long *src1, unsigned long long *src2,
+    unsigned long long *dst)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    dst[i] = src1[i] < src2[i] ? src1[i] : src2[i];
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_q) src1, src2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned long long res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] =  i;
+      src2.a[i] = (i + 2000);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_min_epu64) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_min_epu64) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_min_epu64) (mask, src1.x, src2.x);
+
+  CALC (src1.a, src2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovdb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovdb-1.c
new file mode 100644
index 00000000000..c634d888d68
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovdb-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m128i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepi32_epi8 (s);
+  res = _mm512_mask_cvtepi32_epi8 (res, m, s);
+  res = _mm512_maskz_cvtepi32_epi8 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovdb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovdb-2.c
new file mode 100644
index 00000000000..d153cfef26d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovdb-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (char *r, int *s)
+{
+  int i;
+  for (i = 0; i < 16; i++)
+    {
+      r[i] = (i < SIZE) ? (char) s[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (128, i_b) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_d) src;
+  MASK_TYPE mask = MASK_VALUE;
+  char res_ref[16];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i * sign;
+      sign = sign * -1;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtepi32_epi8) (src.x);
+  res2.x = INTRINSIC (_mask_cvtepi32_epi8) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtepi32_epi8) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (128, i_b) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_b) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_b) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_b) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_b) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovdw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovdw-1.c
new file mode 100644
index 00000000000..bd66defe6c5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovdw-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m256i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepi32_epi16 (s);
+  res = _mm512_mask_cvtepi32_epi16 (res, m, s);
+  res = _mm512_maskz_cvtepi32_epi16 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovdw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovdw-2.c
new file mode 100644
index 00000000000..79fb5d89a42
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovdw-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#define SIZE_HALF (AVX512F_LEN_HALF / 16)
+
+CALC (short *r, int *s)
+{
+  int i;
+  for (i = 0; i < SIZE_HALF; i++)
+    {
+      r[i] = (i < SIZE) ? (short) s[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN_HALF, i_w) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_d) src;
+  MASK_TYPE mask = MASK_VALUE;
+  short res_ref[SIZE_HALF];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i * sign;
+      sign = sign * -1;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtepi32_epi16) (src.x);
+  res2.x = INTRINSIC (_mask_cvtepi32_epi16) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtepi32_epi16) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_w) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_w) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovqb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqb-1.c
new file mode 100644
index 00000000000..7fc5980c3a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqb-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m128i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepi64_epi8 (s);
+  res = _mm512_mask_cvtepi64_epi8 (res, m, s);
+  res = _mm512_maskz_cvtepi64_epi8 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovqb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqb-2.c
new file mode 100644
index 00000000000..ae4eae15469
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqb-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (char *r, long long *s)
+{
+  int i;
+  for (i = 0; i < 16; i++)
+    {
+      r[i] = (i < SIZE) ? (char) s[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (128, i_b) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_q) src;
+  MASK_TYPE mask = MASK_VALUE;
+  char res_ref[16];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i * sign;
+      sign = sign * -1;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtepi64_epi8) (src.x);
+  res2.x = INTRINSIC (_mask_cvtepi64_epi8) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtepi64_epi8) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (128, i_b) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_b) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_b) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_b) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_b) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovqd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqd-1.c
new file mode 100644
index 00000000000..f0f80b10175
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m256i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepi64_epi32 (s);
+  res = _mm512_mask_cvtepi64_epi32 (res, m, s);
+  res = _mm512_maskz_cvtepi64_epi32 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovqd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqd-2.c
new file mode 100644
index 00000000000..19b5cb89ae6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#define SIZE_HALF (AVX512F_LEN_HALF / 32)
+
+CALC (int *r, long long *s)
+{
+  int i;
+  for (i = 0; i < SIZE_HALF; i++)
+    {
+      r[i] = (i < SIZE) ? (int) s[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN_HALF, i_d) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_q) src;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE_HALF];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i * sign;
+      sign = sign * -1;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtepi64_epi32) (src.x);
+  res2.x = INTRINSIC (_mask_cvtepi64_epi32) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtepi64_epi32) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovqw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqw-1.c
new file mode 100644
index 00000000000..20011ee75a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqw-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m128i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepi64_epi16 (s);
+  res = _mm512_mask_cvtepi64_epi16 (res, m, s);
+  res = _mm512_maskz_cvtepi64_epi16 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovqw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqw-2.c
new file mode 100644
index 00000000000..3734adf0878
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovqw-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (short *r, long long *s)
+{
+  int i;
+  for (i = 0; i < 8; i++)
+    {
+      r[i] = (i < SIZE) ? (short) s[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (128, i_w) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_q) src;
+  MASK_TYPE mask = MASK_VALUE;
+  short res_ref[8];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i * sign;
+      sign = sign * -1;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtepi64_epi16) (src.x);
+  res2.x = INTRINSIC (_mask_cvtepi64_epi16) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtepi64_epi16) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (128, i_w) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_w) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_w) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_w) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_w) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdb-1.c
new file mode 100644
index 00000000000..c14dc04e004
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdb-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovsdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m128i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtsepi32_epi8 (s);
+  res = _mm512_mask_cvtsepi32_epi8 (res, m, s);
+  res = _mm512_maskz_cvtsepi32_epi8 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdb-2.c
new file mode 100644
index 00000000000..99ecd943361
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdb-2.c
@@ -0,0 +1,61 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include <limits.h>
+
+CALC (char *r, int *s)
+{
+  int i;
+  for (i = 0; i < 16; i++)
+    {
+      if (s[i] < CHAR_MIN)
+	r[i] = CHAR_MIN;
+      else if (s[i] > CHAR_MAX)
+	r[i] = CHAR_MAX;
+      else
+	r[i] = s[i];
+      r[i] = (i < SIZE) ? r[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (128, i_b) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_d) src;
+  MASK_TYPE mask = MASK_VALUE;
+  char res_ref[16];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i * sign;
+      sign = sign * -1;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtsepi32_epi8) (src.x);
+  res2.x = INTRINSIC (_mask_cvtsepi32_epi8) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtsepi32_epi8) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (128, i_b) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_b) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_b) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_b) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_b) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdw-1.c
new file mode 100644
index 00000000000..4984626ae06
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdw-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovsdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m256i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtsepi32_epi16 (s);
+  res = _mm512_mask_cvtsepi32_epi16 (res, m, s);
+  res = _mm512_maskz_cvtsepi32_epi16 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdw-2.c
new file mode 100644
index 00000000000..0e5cb4a2ad0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsdw-2.c
@@ -0,0 +1,62 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#define SIZE_HALF (AVX512F_LEN_HALF / 16)
+#include <limits.h>
+
+CALC (short *r, int *s)
+{
+  int i;
+  for (i = 0; i < SIZE_HALF; i++)
+    {
+      if (s[i] < SHRT_MIN)
+	r[i] = SHRT_MIN;
+      else if (s[i] > SHRT_MAX)
+	r[i] = SHRT_MAX;
+      else
+	r[i] = s[i];
+      r[i] = (i < SIZE) ? r[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN_HALF, i_w) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_d) src;
+  MASK_TYPE mask = MASK_VALUE;
+  short res_ref[SIZE_HALF];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i * sign;
+      sign = sign * -1;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtsepi32_epi16) (src.x);
+  res2.x = INTRINSIC (_mask_cvtsepi32_epi16) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtsepi32_epi16) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_w) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_w) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqb-1.c
new file mode 100644
index 00000000000..bcd6992b902
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqb-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovsqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m128i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtsepi64_epi8 (s);
+  res = _mm512_mask_cvtsepi64_epi8 (res, m, s);
+  res = _mm512_maskz_cvtsepi64_epi8 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqb-2.c
new file mode 100644
index 00000000000..3f4d3aa1179
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqb-2.c
@@ -0,0 +1,61 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include <limits.h>
+
+CALC (char *r, long long *s)
+{
+  int i;
+  for (i = 0; i < 16; i++)
+    {
+      if (s[i] < CHAR_MIN)
+	r[i] = CHAR_MIN;
+      else if (s[i] > CHAR_MAX)
+	r[i] = CHAR_MAX;
+      else
+	r[i] = s[i];
+      r[i] = (i < SIZE) ? r[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (128, i_b) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_q) src;
+  MASK_TYPE mask = MASK_VALUE;
+  char res_ref[16];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i * sign;
+      sign = sign * -1;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtsepi64_epi8) (src.x);
+  res2.x = INTRINSIC (_mask_cvtsepi64_epi8) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtsepi64_epi8) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (128, i_b) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_b) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_b) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_b) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_b) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqd-1.c
new file mode 100644
index 00000000000..acec81bb32d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovsqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m256i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtsepi64_epi32 (s);
+  res = _mm512_mask_cvtsepi64_epi32 (res, m, s);
+  res = _mm512_maskz_cvtsepi64_epi32 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqd-2.c
new file mode 100644
index 00000000000..2dbc4a276a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqd-2.c
@@ -0,0 +1,62 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#define SIZE_HALF (AVX512F_LEN_HALF / 32)
+#include <limits.h>
+
+CALC (int *r, long long *s)
+{
+  int i;
+  for (i = 0; i < SIZE_HALF; i++)
+    {
+      if (s[i] < INT_MIN)
+	r[i] = INT_MIN;
+      else if (s[i] > INT_MAX)
+	r[i] = INT_MAX;
+      else
+	r[i] = s[i];
+      r[i] = (i < SIZE) ? r[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN_HALF, i_d) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_q) src;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE_HALF];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i * sign;
+      sign = sign * -1;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtsepi64_epi32) (src.x);
+  res2.x = INTRINSIC (_mask_cvtsepi64_epi32) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtsepi64_epi32) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqw-1.c
new file mode 100644
index 00000000000..2952aca0764
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqw-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovsqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m128i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtsepi64_epi16 (s);
+  res = _mm512_mask_cvtsepi64_epi16 (res, m, s);
+  res = _mm512_maskz_cvtsepi64_epi16 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqw-2.c
new file mode 100644
index 00000000000..163bc16a220
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsqw-2.c
@@ -0,0 +1,61 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include <limits.h>
+
+CALC (short *r, long long *s)
+{
+  int i;
+  for (i = 0; i < 8; i++)
+    {
+      if (s[i] < SHRT_MIN)
+	r[i] = SHRT_MIN;
+      else if (s[i] > SHRT_MAX)
+	r[i] = SHRT_MAX;
+      else
+	r[i] = s[i];
+      r[i] = (i < SIZE) ? r[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (128, i_w) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_q) src;
+  MASK_TYPE mask = MASK_VALUE;
+  short res_ref[8];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i * sign;
+      sign = sign * -1;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtsepi64_epi16) (src.x);
+  res2.x = INTRINSIC (_mask_cvtsepi64_epi16) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtsepi64_epi16) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (128, i_w) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_w) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_w) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_w) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_w) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxbd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxbd-1.c
new file mode 100644
index 00000000000..18a34ae0120
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxbd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovsxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128i s;
+volatile __m512i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepi8_epi32 (s);
+  res = _mm512_mask_cvtepi8_epi32 (res, m, s);
+  res = _mm512_maskz_cvtepi8_epi32 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxbd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxbd-2.c
new file mode 100644
index 00000000000..3bfb6ab75f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxbd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (char *s, int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (int) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  union128i_b s;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 8 * i * sign;
+      res2.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_cvtepi8_epi32) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepi8_epi32) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepi8_epi32) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxbq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxbq-1.c
new file mode 100644
index 00000000000..e902b6e764e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxbq-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovsxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128i s;
+volatile __m512i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepi8_epi64 (s);
+  res = _mm512_mask_cvtepi8_epi64 (res, m, s);
+  res = _mm512_maskz_cvtepi8_epi64 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxbq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxbq-2.c
new file mode 100644
index 00000000000..540d21819a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxbq-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (char *s, long long int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (long long int) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  union128i_b s;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long int res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 8 * i * sign;
+      res2.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_cvtepi8_epi64) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepi8_epi64) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepi8_epi64) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxdq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxdq-1.c
new file mode 100644
index 00000000000..265c9fe3237
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxdq-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovsxdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsxdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsxdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256i s;
+volatile __m512i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepi32_epi64 (s);
+  res = _mm512_mask_cvtepi32_epi64 (res, m, s);
+  res = _mm512_maskz_cvtepi32_epi64 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxdq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxdq-2.c
new file mode 100644
index 00000000000..f1e131e00ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxdq-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *s, long long int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (long long int) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN_HALF, i_d) s;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long int res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 2000 * i * sign;
+      res2.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_cvtepi32_epi64) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepi32_epi64) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepi32_epi64) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxwd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxwd-1.c
new file mode 100644
index 00000000000..cdcba564eae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxwd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovsxwd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsxwd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsxwd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256i s;
+volatile __m512i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepi16_epi32 (s);
+  res = _mm512_mask_cvtepi16_epi32 (res, m, s);
+  res = _mm512_maskz_cvtepi16_epi32 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxwd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxwd-2.c
new file mode 100644
index 00000000000..04b43a6e83a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxwd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (short *s, int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (int) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN_HALF, i_w) s;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 2000 * i * sign;
+      res2.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_cvtepi16_epi32) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepi16_epi32) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepi16_epi32) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxwq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxwq-1.c
new file mode 100644
index 00000000000..28d6b17ba2f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxwq-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovsxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovsxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128i s;
+volatile __m512i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepi16_epi64 (s);
+  res = _mm512_mask_cvtepi16_epi64 (res, m, s);
+  res = _mm512_maskz_cvtepi16_epi64 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxwq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxwq-2.c
new file mode 100644
index 00000000000..9e6832d86de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovsxwq-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (short *s, long long int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (long long int) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  union128i_w s;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long int res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 2000 * i * sign;
+      res2.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_cvtepi16_epi64) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepi16_epi64) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepi16_epi64) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdb-1.c
new file mode 100644
index 00000000000..90019f3f39d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdb-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovusdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovusdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovusdb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m128i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtusepi32_epi8 (s);
+  res = _mm512_mask_cvtusepi32_epi8 (res, m, s);
+  res = _mm512_maskz_cvtusepi32_epi8 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdb-2.c
new file mode 100644
index 00000000000..b86b14efe80
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdb-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include <limits.h>
+
+CALC (unsigned char *r, unsigned int *s)
+{
+  int i;
+  for (i = 0; i < 16; i++)
+    {
+      r[i] = (s[i] > UCHAR_MAX) ? UCHAR_MAX : s[i];
+      r[i] = (i < SIZE) ? r[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (128, i_b) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_d) src;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned char res_ref[16];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtusepi32_epi8) (src.x);
+  res2.x = INTRINSIC (_mask_cvtusepi32_epi8) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtusepi32_epi8) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (128, i_b) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_b) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_b) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_b) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_b) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdw-1.c
new file mode 100644
index 00000000000..0ee86c982c6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdw-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovusdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovusdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovusdw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m256i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtusepi32_epi16 (s);
+  res = _mm512_mask_cvtusepi32_epi16 (res, m, s);
+  res = _mm512_maskz_cvtusepi32_epi16 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdw-2.c
new file mode 100644
index 00000000000..7840545d38f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusdw-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#define SIZE_HALF (AVX512F_LEN_HALF / 16)
+#include <limits.h>
+
+CALC (unsigned short *r, unsigned int *s)
+{
+  int i;
+  for (i = 0; i < SIZE_HALF; i++)
+    {
+      r[i] = (s[i] > USHRT_MAX) ? USHRT_MAX : s[i];
+      r[i] = (i < SIZE) ? r[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN_HALF, i_w) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_d) src;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned short res_ref[SIZE_HALF];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtusepi32_epi16) (src.x);
+  res2.x = INTRINSIC (_mask_cvtusepi32_epi16) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtusepi32_epi16) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_w) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_w) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_w) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqb-1.c
new file mode 100644
index 00000000000..4da4076bcb0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqb-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovusqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovusqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovusqb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m128i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtusepi64_epi8 (s);
+  res = _mm512_mask_cvtusepi64_epi8 (res, m, s);
+  res = _mm512_maskz_cvtusepi64_epi8 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqb-2.c
new file mode 100644
index 00000000000..4d02eaf35dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqb-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include <limits.h>
+
+CALC (unsigned char *r, unsigned long long *s)
+{
+  int i;
+  for (i = 0; i < 16; i++)
+    {
+      r[i] = (s[i] > UCHAR_MAX) ? UCHAR_MAX : s[i];
+      r[i] = (i < SIZE) ? r[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (128, i_b) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_q) src;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned char res_ref[16];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtusepi64_epi8) (src.x);
+  res2.x = INTRINSIC (_mask_cvtusepi64_epi8) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtusepi64_epi8) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (128, i_b) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_b) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_b) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_b) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_b) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqd-1.c
new file mode 100644
index 00000000000..69520d91d91
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovusqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovusqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovusqd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m256i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtusepi64_epi32 (s);
+  res = _mm512_mask_cvtusepi64_epi32 (res, m, s);
+  res = _mm512_maskz_cvtusepi64_epi32 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqd-2.c
new file mode 100644
index 00000000000..7b79d3e50c5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#define SIZE_HALF (AVX512F_LEN_HALF / 32)
+#include <limits.h>
+
+CALC (unsigned int *r, unsigned long long *s)
+{
+  int i;
+  for (i = 0; i < SIZE_HALF; i++)
+    {
+      r[i] = (s[i] > UINT_MAX) ? UINT_MAX : s[i];
+      r[i] = (i < SIZE) ? r[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN_HALF, i_d) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_q) src;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned int res_ref[SIZE_HALF];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtusepi64_epi32) (src.x);
+  res2.x = INTRINSIC (_mask_cvtusepi64_epi32) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtusepi64_epi32) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqw-1.c
new file mode 100644
index 00000000000..e6ca2283c4b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqw-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovusqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovusqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovusqw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i s;
+volatile __m128i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtusepi64_epi16 (s);
+  res = _mm512_mask_cvtusepi64_epi16 (res, m, s);
+  res = _mm512_maskz_cvtusepi64_epi16 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqw-2.c
new file mode 100644
index 00000000000..34fcd474f8e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovusqw-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include <limits.h>
+
+CALC (unsigned short *r, unsigned long long *s)
+{
+  int i;
+  for (i = 0; i < 8; i++)
+    {
+      r[i] = (s[i] > USHRT_MAX) ? USHRT_MAX : s[i];
+      r[i] = (i < SIZE) ? r[i] : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (128, i_w) res1, res2, res3;
+  UNION_TYPE (AVX512F_LEN, i_q) src;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned short res_ref[8];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src.a[i] = 1 + 34 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtusepi64_epi16) (src.x);
+  res2.x = INTRINSIC (_mask_cvtusepi64_epi16) (res2.x, mask, src.x);
+  res3.x = INTRINSIC (_maskz_cvtusepi64_epi16) (mask, src.x);
+
+  CALC (res_ref, src.a);
+
+  if (UNION_CHECK (128, i_w) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_w) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_w) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_w) (res_ref, mask, SIZE);
+  if (UNION_CHECK (128, i_w) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxbd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxbd-1.c
new file mode 100644
index 00000000000..6b4976dca71
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxbd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovzxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovzxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovzxbd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128i s;
+volatile __m512i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepu8_epi32 (s);
+  res = _mm512_mask_cvtepu8_epi32 (res, m, s);
+  res = _mm512_maskz_cvtepu8_epi32 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxbd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxbd-2.c
new file mode 100644
index 00000000000..eb2b9509f5e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxbd-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (unsigned char *s, int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  union128i_b s;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 16 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtepu8_epi32) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepu8_epi32) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepu8_epi32) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxbq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxbq-1.c
new file mode 100644
index 00000000000..758e06654f2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxbq-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovzxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovzxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovzxbq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128i s;
+volatile __m512i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepu8_epi64 (s);
+  res = _mm512_mask_cvtepu8_epi64 (res, m, s);
+  res = _mm512_maskz_cvtepu8_epi64 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxbq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxbq-2.c
new file mode 100644
index 00000000000..e1629951ad4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxbq-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (unsigned char *s, long long int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  union128i_b s;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long int res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 16 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtepu8_epi64) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepu8_epi64) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepu8_epi64) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxdq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxdq-1.c
new file mode 100644
index 00000000000..1a8c37a13c8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxdq-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovzxdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovzxdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovzxdq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256i s;
+volatile __m512i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepu32_epi64 (s);
+  res = _mm512_mask_cvtepu32_epi64 (res, m, s);
+  res = _mm512_maskz_cvtepu32_epi64 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxdq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxdq-2.c
new file mode 100644
index 00000000000..69c352279d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxdq-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (unsigned *s, long long int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN_HALF, i_d) s;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long int res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 2000 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtepu32_epi64) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepu32_epi64) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepu32_epi64) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxwd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxwd-1.c
new file mode 100644
index 00000000000..6f955585428
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxwd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovzxwd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovzxwd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovzxwd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256i s;
+volatile __m512i res;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepu16_epi32 (s);
+  res = _mm512_mask_cvtepu16_epi32 (res, m, s);
+  res = _mm512_maskz_cvtepu16_epi32 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxwd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxwd-2.c
new file mode 100644
index 00000000000..ea533143374
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxwd-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (unsigned short *s, int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN_HALF, i_w) s;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 2000 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtepu16_epi32) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepu16_epi32) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepu16_epi32) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxwq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxwq-1.c
new file mode 100644
index 00000000000..13f893e6300
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxwq-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmovzxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovzxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmovzxwq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128i s;
+volatile __m512i res;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_cvtepu16_epi64 (s);
+  res = _mm512_mask_cvtepu16_epi64 (res, m, s);
+  res = _mm512_maskz_cvtepu16_epi64 (m, s);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxwq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxwq-2.c
new file mode 100644
index 00000000000..9e0fc7668cc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmovzxwq-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (unsigned short *s, long long int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = (long long int) s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  union128i_w s;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long int res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 2000 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_cvtepu16_epi64) (s.x);
+  res2.x = INTRINSIC (_mask_cvtepu16_epi64) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_cvtepu16_epi64) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmuldq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmuldq-1.c
new file mode 100644
index 00000000000..091de8c3933
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmuldq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmuldq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpmuldq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmuldq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mul_epi32 (x, x);
+  x = _mm512_mask_mul_epi32 (x, m, x, x);
+  x = _mm512_maskz_mul_epi32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmuldq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmuldq-2.c
new file mode 100644
index 00000000000..83058dcf897
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmuldq-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SRC_SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#define DST_SIZE (AVX512F_LEN / 64)
+
+static void
+CALC (int *s1, int *s2, long long int *r)
+{
+  int i;
+
+  for (i = 0; i < DST_SIZE; i++)
+    r[i] = s1[i * 2] * s2[i * 2];
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, s2;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[DST_SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SRC_SIZE; i++)
+    {
+      s1.a[i] = i * 20;
+      s2.a[i] = i + 20;
+    }
+
+  for (i = 0; i < DST_SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  CALC (s1.a, s2.a, res_ref);
+
+  res1.x = INTRINSIC (_mul_epi32) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_mul_epi32) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_mul_epi32) (mask, s1.x, s2.x);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, DST_SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, DST_SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmulld-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmulld-1.c
new file mode 100644
index 00000000000..d1d77d2e4a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmulld-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmulld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpmulld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmulld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 mx;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mullo_epi32 (x, x);
+  x = _mm512_mask_mullo_epi32 (x, mx, x, x);
+  x = _mm512_maskz_mullo_epi32 (mx, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmulld-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmulld-2.c
new file mode 100644
index 00000000000..a08120c436d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmulld-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+
+static void
+CALC (int *src1, int *src2, int *dst)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    dst[i] = src1[i] * src2[i];
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) src1, src2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int dst_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = i + 50;
+      src2.a[i] = i + 100;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_mullo_epi32) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_mullo_epi32) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_mullo_epi32) (mask, src1.x, src2.x);
+
+  CALC (src1.a, src2.a, dst_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, dst_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (dst_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, dst_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (dst_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, dst_ref))
+    abort ();
+
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmuludq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmuludq-1.c
new file mode 100644
index 00000000000..b6fd4daf753
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmuludq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpmuludq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpmuludq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpmuludq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}{z}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_mul_epu32 (x, x);
+  x = _mm512_mask_mul_epu32 (x, m, x, x);
+  x = _mm512_maskz_mul_epu32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpmuludq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpmuludq-2.c
new file mode 100644
index 00000000000..fc0416b6cf6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpmuludq-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SRC_SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#define DST_SIZE (AVX512F_LEN / 64)
+
+static void
+CALC (unsigned int *s1, unsigned int *s2, unsigned long long *r)
+{
+  int i;
+
+  for (i = 0; i < DST_SIZE; i++)
+    r[i] = s1[i * 2] * s2[i * 2];
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, s2;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned long long res_ref[DST_SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SRC_SIZE; i++)
+    {
+      s1.a[i] = i * 20;
+      s2.a[i] = i + 20;
+    }
+  for (i = 0; i < DST_SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  CALC (s1.a, s2.a, res_ref);
+
+  res1.x = INTRINSIC (_mul_epu32) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_mul_epu32) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_mul_epu32) (mask, s1.x, s2.x);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, DST_SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, DST_SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpord-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpord-1.c
new file mode 100644
index 00000000000..78650751cb8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpord-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_or_si512 (x, x);
+  x = _mm512_or_epi32 (x, x);
+  x = _mm512_mask_or_epi32 (x, m, x, x);
+  x = _mm512_maskz_or_epi32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpord-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpord-2.c
new file mode 100644
index 00000000000..9493aa01fbc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpord-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *s1, int *s2, int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = s1[i] | s2[i];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, s2, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i * sign;
+      s2.a[i] = (i + 20) * sign;
+      sign = -sign;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_or_si512) (s1.x, s2.x);
+  res2.x = INTRINSIC (_or_epi32) (s1.x, s2.x);
+  res3.x = INTRINSIC (_mask_or_epi32) (res3.x, mask, s1.x, s2.x);
+  res4.x = INTRINSIC (_maskz_or_epi32) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res4, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vporq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vporq-1.c
new file mode 100644
index 00000000000..c6f8bb576ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vporq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vporq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vporq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vporq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_or_epi64 (x, x);
+  x = _mm512_mask_or_epi64 (x, m, x, x);
+  x = _mm512_maskz_or_epi64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vporq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vporq-2.c
new file mode 100644
index 00000000000..843ecbd37f3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vporq-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (long long *s1, long long *s2, long long *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = s1[i] | s2[i];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s1, s2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i * sign;
+      s2.a[i] = (i + 20) * sign;
+      sign = -sign;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_or_epi64) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_or_epi64) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_or_epi64) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+      abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprold-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vprold-1.c
new file mode 100644
index 00000000000..4a98e199251
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprold-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vprold\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vprold\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vprold\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_rol_epi32 (x, 12);
+  x = _mm512_mask_rol_epi32 (x, m, x, 12);
+  x = _mm512_maskz_rol_epi32 (m, x, 12);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprold-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vprold-2.c
new file mode 100644
index 00000000000..e56115d19a7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprold-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+#define N 0x5
+
+static void
+CALC (int *s1, int count, int *r)
+{
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = (s1[i] << count) | (s1[i] >> sizeof (s1[i]) * 8 - count);
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 137 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_rol_epi32) (s1.x, N);
+  res2.x = INTRINSIC (_mask_rol_epi32) (res2.x, mask, s1.x, N);
+  res3.x = INTRINSIC (_maskz_rol_epi32) (mask, s1.x, N);
+
+  CALC (s1.a, N, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprolq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vprolq-1.c
new file mode 100644
index 00000000000..91b2462ac8a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprolq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vprolq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vprolq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vprolq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_rol_epi64 (x, 12);
+  x = _mm512_mask_rol_epi64 (x, m, x, 12);
+  x = _mm512_maskz_rol_epi64 (m, x, 12);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprolq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vprolq-2.c
new file mode 100644
index 00000000000..116a6aa6bd7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprolq-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+#define N 0x5
+
+static void
+CALC (long long *s1, int count, long long *r)
+{
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = (s1[i] << count) | (s1[i] >> sizeof (s1[i]) * 8 - count);
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s1, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 137 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_rol_epi64) (s1.x, N);
+  res2.x = INTRINSIC (_mask_rol_epi64) (res2.x, mask, s1.x, N);
+  res3.x = INTRINSIC (_maskz_rol_epi64) (mask, s1.x, N);
+
+  CALC (s1.a, N, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprolvd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vprolvd-1.c
new file mode 100644
index 00000000000..10331a61dc5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprolvd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vprolvd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vprolvd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vprolvd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_rolv_epi32 (x, x);
+  x = _mm512_mask_rolv_epi32 (x, m, x, x);
+  x = _mm512_maskz_rolv_epi32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprolvd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vprolvd-2.c
new file mode 100644
index 00000000000..e537ae8f95d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprolvd-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *s1, int *s2, int *r)
+{
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = (s1[i] << s2[i]) | (s1[i] >> sizeof (s1[i]) * 8 - s2[i]);
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, s2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 137 * i;
+      s2.a[i] = (i + 7);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_rolv_epi32) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_rolv_epi32) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_rolv_epi32) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprolvq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vprolvq-1.c
new file mode 100644
index 00000000000..a182a620324
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprolvq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vprolvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vprolvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vprolvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_rolv_epi64 (x, x);
+  x = _mm512_mask_rolv_epi64 (x, m, x, x);
+  x = _mm512_maskz_rolv_epi64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprolvq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vprolvq-2.c
new file mode 100644
index 00000000000..a1c748d50b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprolvq-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (long long *s1, long long *s2, long long *r)
+{
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = (s1[i] << s2[i]) | (s1[i] >> sizeof (s1[i]) * 8 - s2[i]);
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s1, s2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 137 * i;
+      s2.a[i] = (i + 7);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_rolv_epi64) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_rolv_epi64) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_rolv_epi64) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprord-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vprord-1.c
new file mode 100644
index 00000000000..c1cf8a5f0d2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprord-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vprord\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vprord\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vprord\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_ror_epi32 (x, 12);
+  x = _mm512_mask_ror_epi32 (x, m, x, 12);
+  x = _mm512_maskz_ror_epi32 (m, x, 12);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprord-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vprord-2.c
new file mode 100644
index 00000000000..5223fe0a7d1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprord-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+#define N 0x5
+
+static void
+CALC (int *s1, int count, int *r)
+{
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = (s1[i] >> count) | (s1[i] << sizeof (s1[i]) * 8 - count);
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 137 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_ror_epi32) (s1.x, N);
+  res2.x = INTRINSIC (_mask_ror_epi32) (res2.x, mask, s1.x, N);
+  res3.x = INTRINSIC (_maskz_ror_epi32) (mask, s1.x, N);
+
+  CALC (s1.a, N, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprorq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vprorq-1.c
new file mode 100644
index 00000000000..66b9e0391c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprorq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vprorq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vprorq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vprorq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_ror_epi64 (x, 12);
+  x = _mm512_mask_ror_epi64 (x, m, x, 12);
+  x = _mm512_maskz_ror_epi64 (m, x, 12);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprorq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vprorq-2.c
new file mode 100644
index 00000000000..704b0a50a7e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprorq-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+#define N 0x5
+
+static void
+CALC (long long *s1, int count, long long *r)
+{
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = (s1[i] >> count) | (s1[i] << sizeof (s1[i]) * 8 - count);
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s1, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 137 * i;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_ror_epi64) (s1.x, N);
+  res2.x = INTRINSIC (_mask_ror_epi64) (res2.x, mask, s1.x, N);
+  res3.x = INTRINSIC (_maskz_ror_epi64) (mask, s1.x, N);
+
+  CALC (s1.a, N, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprorvd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vprorvd-1.c
new file mode 100644
index 00000000000..59f0c95e278
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprorvd-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "vprorvd\[ \\t\]+\[^\n\]*%zmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_rorv_epi32 (x, x);
+  x = _mm512_mask_rorv_epi32 (x, m, x, x);
+  x = _mm512_maskz_rorv_epi32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprorvd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vprorvd-2.c
new file mode 100644
index 00000000000..eaf8df92e4b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprorvd-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *s1, int *s2, int *r)
+{
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = (s1[i] >> s2[i]) | (s1[i] << sizeof (s1[i]) * 8 - s2[i]);
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, s2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 137 * i;
+      s2.a[i] = (i + 7);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_rorv_epi32) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_rorv_epi32) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_rorv_epi32) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprorvq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vprorvq-1.c
new file mode 100644
index 00000000000..31b59b18887
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprorvq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vprorvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vprorvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vprorvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_rorv_epi64 (x, x);
+  x = _mm512_mask_rorv_epi64 (x, m, x, x);
+  x = _mm512_maskz_rorv_epi64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vprorvq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vprorvq-2.c
new file mode 100644
index 00000000000..035ce96772c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vprorvq-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (long long *s1, long long *s2, long long *r)
+{
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = (s1[i] >> s2[i]) | (s1[i] << sizeof (s1[i]) * 8 - s2[i]);
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s1, s2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  unsigned int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 137 * i;
+      s2.a[i] = (i + 7);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_rorv_epi64) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_rorv_epi64) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_rorv_epi64) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshufd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshufd-1.c
new file mode 100644
index 00000000000..9b7afc54e85
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshufd-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpshufd\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpshufd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vpshufd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_shuffle_epi32 (x, _MM_PERM_AADB);
+  x = _mm512_mask_shuffle_epi32 (x, 2, x, _MM_PERM_AADB);
+  x = _mm512_maskz_shuffle_epi32 (2, x, _MM_PERM_AADB);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshufd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshufd-2.c
new file mode 100644
index 00000000000..a6379c372e8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshufd-2.c
@@ -0,0 +1,59 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *s1, unsigned char imm, int *r)
+{
+  int i, j, offset;
+
+  for (j = 0; j < SIZE / 4; j++)
+    {
+      offset = j * 4;
+      for (i = 0; i < 4; i++)
+	r[i + offset] =
+	  s1[((imm & (0x3 << (2 * i))) >> (2 * i)) + offset];
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, res1, res2, res3;
+  int res_ref[SIZE];
+  int i, j, sign = 1;
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (j = 0; j < SIZE; j++)
+    {
+      s1.a[j] = j * i * sign;
+      res1.a[j] = DEFAULT_VALUE;
+      res2.a[j] = DEFAULT_VALUE;
+      res3.a[j] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_shuffle_epi32) (s1.x, 0xec);
+  res2.x = INTRINSIC (_mask_shuffle_epi32) (res2.x, mask, s1.x, 0xec);
+  res3.x = INTRINSIC (_maskz_shuffle_epi32) (mask, s1.x, 0xec);
+
+  CALC (s1.a, 0xec, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpslld-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpslld-1.c
new file mode 100644
index 00000000000..a2c3711df58
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpslld-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m128i y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sll_epi32 (x, y);
+  x = _mm512_mask_sll_epi32 (x, m, x, y);
+  x = _mm512_maskz_sll_epi32 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpslld-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpslld-2.c
new file mode 100644
index 00000000000..541b106c4a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpslld-2.c
@@ -0,0 +1,62 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, int *s1,  int* s2)
+{
+  int i;
+  int count = s2[0];
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = count < 32 ? (s1[i] << count) : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1;
+  UNION_TYPE (128, i_d) src2;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  long long imm;
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + sign * 7 * i % 291;
+      sign = sign * -1;
+    }
+
+  for (imm = 1; imm <= 33; imm++)
+    {
+      src2.a[0] = imm;
+      for (i = 0; i < SIZE; i++)
+	res2.a[i] = DEFAULT_VALUE;
+
+      res1.x = INTRINSIC (_sll_epi32) (src1.x, src2.x);
+      res2.x = INTRINSIC (_mask_sll_epi32) (res2.x, mask, src1.x, src2.x);
+      res3.x = INTRINSIC (_maskz_sll_epi32) (mask, src1.x, src2.x);
+
+      CALC (res_ref, src1.a, src2.a);
+
+      if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+	abort ();
+
+      MASK_MERGE (i_d) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+	abort ();
+
+      MASK_ZERO (i_d) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpslldi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpslldi-1.c
new file mode 100644
index 00000000000..c81ac920027
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpslldi-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpslld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+#define y 7
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_slli_epi32 (x, y);
+  x = _mm512_mask_slli_epi32 (x, m, x, y);
+  x = _mm512_maskz_slli_epi32 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpslldi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpslldi-2.c
new file mode 100644
index 00000000000..c3bfdd28a5d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpslldi-2.c
@@ -0,0 +1,76 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, int *s1, int count)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = count < 32 ? (s1[i] << count) : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + sign * 7 * i % 291;
+      sign = sign * -1;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_slli_epi32) (src1.x, 2);
+  res2.x = INTRINSIC (_mask_slli_epi32) (res2.x, mask, src1.x, 2);
+  res3.x = INTRINSIC (_maskz_slli_epi32) (mask, src1.x, 2);
+
+  CALC (res_ref, src1.a, 2);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_slli_epi32) (src1.x, 33);
+  res2.x = INTRINSIC (_mask_slli_epi32) (res2.x, mask, src1.x, 33);
+  res3.x = INTRINSIC (_maskz_slli_epi32) (mask, src1.x, 33);
+
+  CALC (res_ref, src1.a, 33);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsllq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsllq-1.c
new file mode 100644
index 00000000000..491234e882b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsllq-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m128i y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sll_epi64 (x, y);
+  x = _mm512_mask_sll_epi64 (x, m, x, y);
+  x = _mm512_maskz_sll_epi64 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsllq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsllq-2.c
new file mode 100644
index 00000000000..5addaa51798
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsllq-2.c
@@ -0,0 +1,62 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (long long *r, long long *s1,  long long* s2)
+{
+  int i;
+  long long count = s2[0];
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = count < 64 ? (s1[i] << count) : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1;
+  UNION_TYPE (128, i_q) src2;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  long long imm;
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + sign * 7 * i % 291;
+      sign = sign * -1;
+    }
+
+  for (imm = 1; imm <= 65; imm++)
+    {
+      src2.a[0] = imm;
+      for (i = 0; i < SIZE; i++)
+	res2.a[i] = DEFAULT_VALUE;
+
+      res1.x = INTRINSIC (_sll_epi64) (src1.x, src2.x);
+      res2.x = INTRINSIC (_mask_sll_epi64) (res2.x, mask, src1.x, src2.x);
+      res3.x = INTRINSIC (_maskz_sll_epi64) (mask, src1.x, src2.x);
+
+      CALC (res_ref, src1.a, src2.a);
+
+      if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+	abort ();
+
+      MASK_MERGE (i_q) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+	abort ();
+
+      MASK_ZERO (i_q) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsllqi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsllqi-1.c
new file mode 100644
index 00000000000..7e077e41b83
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsllqi-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsllq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+#define y 7
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_slli_epi64 (x, y);
+  x = _mm512_mask_slli_epi64 (x, m, x, y);
+  x = _mm512_maskz_slli_epi64 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsllqi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsllqi-2.c
new file mode 100644
index 00000000000..e15b324d11a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsllqi-2.c
@@ -0,0 +1,76 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (long long *r, long long *s1, long long count)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = count < 64 ? (s1[i] << count) : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + sign * 7 * i % 291;
+      sign = sign * -1;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_slli_epi64) (src1.x, 3);
+  res2.x = INTRINSIC (_mask_slli_epi64) (res2.x, mask, src1.x, 3);
+  res3.x = INTRINSIC (_maskz_slli_epi64) (mask, src1.x, 3);
+
+  CALC (res_ref, src1.a, 3);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_slli_epi64) (src1.x, 65);
+  res2.x = INTRINSIC (_mask_slli_epi64) (res2.x, mask, src1.x, 65);
+  res3.x = INTRINSIC (_maskz_slli_epi64) (mask, src1.x, 65);
+
+  CALC (res_ref, src1.a, 65);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsllvd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsllvd-1.c
new file mode 100644
index 00000000000..0a966af3804
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsllvd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsllvd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsllvd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsllvd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m512i y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sllv_epi32 (x, y);
+  x = _mm512_mask_sllv_epi32 (x, m, x, y);
+  x = _mm512_maskz_sllv_epi32 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsllvd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsllvd-2.c
new file mode 100644
index 00000000000..82ff3a65253
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsllvd-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (unsigned int *r, unsigned int *s1, unsigned int *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s2[i] < 32 ? (s1[i] << s2[i]) : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned int res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + 7 * i % 291;
+      src2.a[i] = 1 + 17 * i % 71;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_sllv_epi32) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_sllv_epi32) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_sllv_epi32) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsllvq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsllvq-1.c
new file mode 100644
index 00000000000..8faeef02afa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsllvq-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsllvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsllvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsllvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m512i y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sllv_epi64 (x, y);
+  x = _mm512_mask_sllv_epi64 (x, m, x, y);
+  x = _mm512_maskz_sllv_epi64 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsllvq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsllvq-2.c
new file mode 100644
index 00000000000..e2b48d7fdde
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsllvq-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (unsigned long long *r, unsigned long long *s1,
+      unsigned long long *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s2[i] < 64 ? (s1[i] << s2[i]) : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned long long res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + 7 * i % 291;
+      src2.a[i] = 1 + 17 * i % 71;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_sllv_epi64) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_sllv_epi64) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_sllv_epi64) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsllvq512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsllvq512-1.c
new file mode 100644
index 00000000000..e93b8c52974
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsllvq512-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "vpsllvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sllv_epi64 (x, x);
+}
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsllvq512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsllvq512-2.c
new file mode 100644
index 00000000000..0c970dbb0fd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsllvq512-2.c
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include <string.h>
+#include "avx512f-check.h"
+
+static void
+compute_psllvq512 (long long int *s1, long long int *s2, long long int *r)
+{
+  int i;
+  long long int count;
+
+  for (i = 0; i < 8; ++i)
+    {
+      count = s2[i];
+      r[i] = s1[i] << count;
+    }
+}
+
+void static
+avx512f_test (void)
+{
+  union512i_q s1, s2, res;
+  long long int res_ref[8];
+  int i, j, sign = 1;
+  int fail = 0;
+
+  for (i = 0; i < 10; i++)
+    {
+      for (j = 0; j < 8; j++)
+	{
+	  s1.a[j] = j * i * sign;
+	  s2.a[j] = (j + i) >> 2;
+	  sign = -sign;
+	}
+
+      res.x = _mm512_sllv_epi64 (s1.x, s2.x);
+
+      compute_psllvq512 (s1.a, s2.a, res_ref);
+
+      fail += check_union512i_q (res, res_ref);
+    }
+
+  if (fail != 0)
+    abort ();
+}
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrad-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrad-1.c
new file mode 100644
index 00000000000..3d6c5fc13a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrad-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m128i y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sra_epi32 (x, y);
+  x = _mm512_mask_sra_epi32 (x, m, x, y);
+  x = _mm512_maskz_sra_epi32 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrad-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrad-2.c
new file mode 100644
index 00000000000..c9393fc2a7c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrad-2.c
@@ -0,0 +1,64 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, int *s1, int *s2)
+{
+  int i;
+  int count = s2[0];
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] =
+	count < 32 ? (s1[i] >> count) : (s1[i] > 0 ? 0 : 0xFFFFFFFF);
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1;
+  UNION_TYPE (128, i_d) src2;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  long long imm;
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + sign * 7 * i % 291;
+      sign = sign * -1;
+    }
+
+  for (imm = 1; imm <= 33; imm++)
+    {
+      src2.a[0] = imm;
+      for (i = 0; i < SIZE; i++)
+	res2.a[i] = DEFAULT_VALUE;
+
+      res1.x = INTRINSIC (_sra_epi32) (src1.x, src2.x);
+      res2.x =
+	INTRINSIC (_mask_sra_epi32) (res2.x, mask, src1.x, src2.x);
+      res3.x = INTRINSIC (_maskz_sra_epi32) (mask, src1.x, src2.x);
+
+      CALC (res_ref, src1.a, src2.a);
+
+      if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+	abort ();
+
+      MASK_MERGE (i_d) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+	abort ();
+
+      MASK_ZERO (i_d) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsradi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsradi-1.c
new file mode 100644
index 00000000000..c7bf9385dc9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsradi-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsrad\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+#define y 7
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_srai_epi32 (x, y);
+  x = _mm512_mask_srai_epi32 (x, m, x, y);
+  x = _mm512_maskz_srai_epi32 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsradi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsradi-2.c
new file mode 100644
index 00000000000..3ba3ff1315b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsradi-2.c
@@ -0,0 +1,78 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, int *s1, int count)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] =
+	count < 32 ? (s1[i] >> count) : (s1[i] > 0 ? 0 : 0xFFFFFFFF);
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + sign * 7 * i % 291;
+      sign = sign * -1;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_srai_epi32) (src1.x, 3);
+  res2.x =
+    INTRINSIC (_mask_srai_epi32) (res2.x, mask, src1.x, 3);
+  res3.x = INTRINSIC (_maskz_srai_epi32) (mask, src1.x, 3);
+
+  CALC (res_ref, src1.a, 3);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_srai_epi32) (src1.x, 33);
+  res2.x =
+    INTRINSIC (_mask_srai_epi32) (res2.x, mask, src1.x, 33);
+  res3.x = INTRINSIC (_maskz_srai_epi32) (mask, src1.x, 33);
+
+  CALC (res_ref, src1.a, 33);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsraq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsraq-1.c
new file mode 100644
index 00000000000..1c7a43db439
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsraq-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m128i y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sra_epi64 (x, y);
+  x = _mm512_mask_sra_epi64 (x, m, x, y);
+  x = _mm512_maskz_sra_epi64 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsraq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsraq-2.c
new file mode 100644
index 00000000000..c5ae9c67d19
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsraq-2.c
@@ -0,0 +1,65 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (long long *r, long long *s1, long long *s2)
+{
+  int i;
+  long long count = s2[0];
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] =
+	count < 64 ? (s1[i] >> count) : (s1[i] >
+					 0 ? 0 : 0xFFFFFFFFFFFFFFFFLL);
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1;
+  UNION_TYPE (128, i_q) src2;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  long long imm;
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + sign * 7 * i % 291;
+      sign = sign * -1;
+    }
+
+  for (imm = 1; imm <= 65; imm++)
+    {
+      src2.a[0] = imm;
+      for (i = 0; i < SIZE; i++)
+	res2.a[i] = DEFAULT_VALUE;
+
+      res1.x = INTRINSIC (_sra_epi64) (src1.x, src2.x);
+      res2.x =
+	INTRINSIC (_mask_sra_epi64) (res2.x, mask, src1.x, src2.x);
+      res3.x = INTRINSIC (_maskz_sra_epi64) (mask, src1.x, src2.x);
+
+      CALC (res_ref, src1.a, src2.a);
+
+      if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+	abort ();
+
+      MASK_MERGE (i_q) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+	abort ();
+
+      MASK_ZERO (i_q) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsraqi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsraqi-1.c
new file mode 100644
index 00000000000..6400ef4c7d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsraqi-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsraq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+#define y 7
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_srai_epi64 (x, y);
+  x = _mm512_mask_srai_epi64 (x, m, x, y);
+  x = _mm512_maskz_srai_epi64 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsraqi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsraqi-2.c
new file mode 100644
index 00000000000..47c273297da
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsraqi-2.c
@@ -0,0 +1,80 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (long long *r, long long *s1, long long count)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] =
+	count < 64 ? (s1[i] >> count) : (s1[i] >
+					 0 ? 0 : 0xFFFFFFFFFFFFFFFFLL);
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + sign * 7 * i % 291;
+      sign = sign * -1;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_srai_epi64) (src1.x, 3);
+  res2.x =
+    INTRINSIC (_mask_srai_epi64) (res2.x, mask, src1.x, 3);
+  res3.x = INTRINSIC (_maskz_srai_epi64) (mask, src1.x, 3);
+
+  CALC (res_ref, src1.a, 3);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_srai_epi64) (src1.x, 65);
+  res2.x =
+    INTRINSIC (_mask_srai_epi64) (res2.x, mask, src1.x, 65);
+  res3.x = INTRINSIC (_maskz_srai_epi64) (mask, src1.x, 65);
+
+  CALC (res_ref, src1.a, 65);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsravd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsravd-1.c
new file mode 100644
index 00000000000..80414c10928
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsravd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsravd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsravd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsravd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x, y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_srav_epi32 (x, y);
+  x = _mm512_mask_srav_epi32 (x, m, x, y);
+  x = _mm512_maskz_srav_epi32 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsravd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsravd-2.c
new file mode 100644
index 00000000000..0651c24cc00
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsravd-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, int *s1, int *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] =
+	s2[i] < 32 ? (s1[i] >> s2[i]) : (s1[i] > 0 ? 0 : 0xFFFFFFFF);
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + sign * 7 * i % 291;
+      src2.a[i] = 1 + 17 * i % 71;
+      sign = sign * -1;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_srav_epi32) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_srav_epi32) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_srav_epi32) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsravq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsravq-1.c
new file mode 100644
index 00000000000..db6b8dd37af
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsravq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsravq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsravq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsravq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x, y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_srav_epi64 (x, y);
+  x = _mm512_mask_srav_epi64 (x, m, x, y);
+  x = _mm512_maskz_srav_epi64 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsravq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsravq-2.c
new file mode 100644
index 00000000000..3b7063f57a2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsravq-2.c
@@ -0,0 +1,58 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (long long *r, long long *s1, long long *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] =
+	s2[i] < 64 ? (s1[i] >> s2[i]) : (s1[i] >
+					 0 ? 0 : 0xFFFFFFFFFFFFFFFFLL);
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + sign * 7 * i % 291;
+      src2.a[i] = 1 + 17 * i % 71;
+      sign = sign * -1;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_srav_epi64) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_srav_epi64) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_srav_epi64) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsravq512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsravq512-1.c
new file mode 100644
index 00000000000..318769b1647
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsravq512-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "vpsravq\[ \\t\]+\[^\n\]*%zmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_srav_epi64 (x, x);
+}
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsravq512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsravq512-2.c
new file mode 100644
index 00000000000..c2511e9f5ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsravq512-2.c
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include <string.h>
+#include "avx512f-check.h"
+
+static void
+compute_psravq512 (long long int *s1, long long int *s2, long long int *r)
+{
+  int i;
+  long long int count;
+
+  for (i = 0; i < 8; ++i)
+    {
+      count = s2[i];
+      r[i] = s1[i] >> count;
+    }
+}
+
+void static
+avx512f_test (void)
+{
+  union512i_q s1, s2, res;
+  long long int res_ref[8];
+  int i, j, sign = 1;
+  int fail = 0;
+
+  for (i = 0; i < 10; i++)
+    {
+      for (j = 0; j < 8; j++)
+	{
+	  s1.a[j] = j * i * sign;
+	  s2.a[j] = (j + i) >> 2;
+	  sign = -sign;
+	}
+
+      res.x = _mm512_srav_epi64 (s1.x, s2.x);
+
+      compute_psravq512 (s1.a, s2.a, res_ref);
+
+      fail += check_union512i_q (res, res_ref);
+    }
+
+  if (fail != 0)
+    abort ();
+}
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrld-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrld-1.c
new file mode 100644
index 00000000000..7c9ea161080
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrld-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m128i y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_srl_epi32 (x, y);
+  x = _mm512_mask_srl_epi32 (x, m, x, y);
+  x = _mm512_maskz_srl_epi32 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrld-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrld-2.c
new file mode 100644
index 00000000000..d4e7232012f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrld-2.c
@@ -0,0 +1,60 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (unsigned int *r, unsigned int *s1,  unsigned int* s2)
+{
+  int i;
+  unsigned int count = s2[0];
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = count < 32 ? (s1[i] >> count) : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1;
+  UNION_TYPE (128, i_d) src2;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned int res_ref[SIZE];
+
+  unsigned long long imm;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + 7 * i % 291;
+    }
+
+  for (imm = 1; imm <= 33; imm++)
+    {
+      src2.a[0] = imm;
+      for (i = 0; i < SIZE; i++)
+	res2.a[i] = DEFAULT_VALUE;
+
+      res1.x = INTRINSIC (_srl_epi32) (src1.x, src2.x);
+      res2.x = INTRINSIC (_mask_srl_epi32) (res2.x, mask, src1.x, src2.x);
+      res3.x = INTRINSIC (_maskz_srl_epi32) (mask, src1.x, src2.x);
+
+      CALC (res_ref, src1.a, src2.a);
+
+      if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+	abort ();
+
+      MASK_MERGE (i_d) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+	abort ();
+
+      MASK_ZERO (i_d) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrldi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrldi-1.c
new file mode 100644
index 00000000000..c21566d1ef1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrldi-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+#define y 7
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_srli_epi32 (x, y);
+  x = _mm512_mask_srli_epi32 (x, m, x, y);
+  x = _mm512_maskz_srli_epi32 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrldi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrldi-2.c
new file mode 100644
index 00000000000..e178445fb73
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrldi-2.c
@@ -0,0 +1,76 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (unsigned int *r, unsigned int *s1, unsigned int count)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = count < 32 ? (s1[i] >> count) : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned int res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + 7 * i % 291;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_srli_epi32) (src1.x, 3);
+  res2.x =
+    INTRINSIC (_mask_srli_epi32) (res2.x, mask, src1.x, 3);
+  res3.x = INTRINSIC (_maskz_srli_epi32) (mask, src1.x, 3);
+
+  CALC (res_ref, src1.a, 3);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_srli_epi32) (src1.x, 33);
+  res2.x =
+    INTRINSIC (_mask_srli_epi32) (res2.x, mask, src1.x, 33);
+  res3.x = INTRINSIC (_maskz_srli_epi32) (mask, src1.x, 33);
+
+  CALC (res_ref, src1.a, 33);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrlq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlq-1.c
new file mode 100644
index 00000000000..d3af6091f17
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlq-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m128i y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_srl_epi64 (x, y);
+  x = _mm512_mask_srl_epi64 (x, m, x, y);
+  x = _mm512_maskz_srl_epi64 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrlq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlq-2.c
new file mode 100644
index 00000000000..40305287350
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlq-2.c
@@ -0,0 +1,60 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (unsigned long long *r, unsigned long long *s1,  unsigned long long* s2)
+{
+  int i;
+  unsigned long long count = s2[0];
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = count < 64 ? (s1[i] >> count) : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1;
+  UNION_TYPE (128, i_q) src2;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned long long res_ref[SIZE];
+
+  unsigned long long imm;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + 7 * i % 291;
+    }
+
+  for (imm = 1; imm <= 65; imm++)
+    {
+      src2.a[0] = imm;
+      for (i = 0; i < SIZE; i++)
+	res2.a[i] = DEFAULT_VALUE;
+
+      res1.x = INTRINSIC (_srl_epi64) (src1.x, src2.x);
+      res2.x = INTRINSIC (_mask_srl_epi64) (res2.x, mask, src1.x, src2.x);
+      res3.x = INTRINSIC (_maskz_srl_epi64) (mask, src1.x, src2.x);
+
+      CALC (res_ref, src1.a, src2.a);
+
+      if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+	abort ();
+
+      MASK_MERGE (i_q) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+	abort ();
+
+      MASK_ZERO (i_q) (res_ref, mask, SIZE);
+      if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrlqi-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlqi-1.c
new file mode 100644
index 00000000000..b1f6d2766da
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlqi-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsrlq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+#define y 7
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_srli_epi64 (x, y);
+  x = _mm512_mask_srli_epi64 (x, m, x, y);
+  x = _mm512_maskz_srli_epi64 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrlqi-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlqi-2.c
new file mode 100644
index 00000000000..3fedac4c88f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlqi-2.c
@@ -0,0 +1,77 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (unsigned long long *r, unsigned long long *s1,
+      unsigned long long count)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = count < 64 ? (s1[i] >> count) : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned long long res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + 7 * i % 291;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_srli_epi64) (src1.x, 3);
+  res2.x =
+    INTRINSIC (_mask_srli_epi64) (res2.x, mask, src1.x, 3);
+  res3.x = INTRINSIC (_maskz_srli_epi64) (mask, src1.x, 3);
+
+  CALC (res_ref, src1.a, 3);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_srli_epi64) (src1.x, 65);
+  res2.x =
+    INTRINSIC (_mask_srli_epi64) (res2.x, mask, src1.x, 65);
+  res3.x = INTRINSIC (_maskz_srli_epi64) (mask, src1.x, 65);
+
+  CALC (res_ref, src1.a, 65);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvd-1.c
new file mode 100644
index 00000000000..c8fe74d734e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvd-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsrlvd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsrlvd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsrlvd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m512i y;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_srlv_epi32 (x, y);
+  x = _mm512_mask_srlv_epi32 (x, m, x, y);
+  x = _mm512_maskz_srlv_epi32 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvd-2.c
new file mode 100644
index 00000000000..514d36a37dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvd-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (unsigned int *r, unsigned int *s1, unsigned int *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s2[i] < 32 ? (s1[i] >> s2[i]) : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned int res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + 7 * i % 291;
+      src2.a[i] = 1 + 17 * i % 71;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_srlv_epi32) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_srlv_epi32) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_srlv_epi32) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvq-1.c
new file mode 100644
index 00000000000..b316f68f59b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvq-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsrlvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsrlvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsrlvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __m512i y;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_srlv_epi64 (x, y);
+  x = _mm512_mask_srlv_epi64 (x, m, x, y);
+  x = _mm512_maskz_srlv_epi64 (m, x, y);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvq-2.c
new file mode 100644
index 00000000000..586b8c2f930
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvq-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (unsigned long long *r, unsigned long long *s1,
+      unsigned long long *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s2[i] < 64 ? (s1[i] >> s2[i]) : 0;
+    }
+}
+
+void static
+TEST (void)
+{
+  int i;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  unsigned long long res_ref[SIZE];
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 2 + 7 * i % 291;
+      src2.a[i] = 1 + 17 * i % 71;
+    }
+
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_srlv_epi64) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_srlv_epi64) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_srlv_epi64) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvq512-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvq512-1.c
new file mode 100644
index 00000000000..99b12d200b5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvq512-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "vpsrlvq\[ \\t\]+\[^\n\]*%zmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_srlv_epi64 (x, x);
+}
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvq512-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvq512-2.c
new file mode 100644
index 00000000000..d262a83527d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsrlvq512-2.c
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include <string.h>
+#include "avx512f-check.h"
+
+static void
+compute_psrlvq512 (long long int *s1, long long int *s2, long long int *r)
+{
+  int i;
+  long long int count;
+
+  for (i = 0; i < 8; ++i)
+    {
+      count = s2[i];
+      r[i] = ((unsigned long long) s1[i]) >> count;
+    }
+}
+
+void static
+avx512f_test (void)
+{
+  union512i_q s1, s2, res;
+  long long int res_ref[8];
+  int i, j, sign = 1;
+  int fail = 0;
+
+  for (i = 0; i < 10; i++)
+    {
+      for (j = 0; j < 8; j++)
+	{
+	  s1.a[j] = j * i * sign;
+	  s2.a[j] = (j + i) >> 2;
+	  sign = -sign;
+	}
+
+      res.x = _mm512_srlv_epi64 (s1.x, s2.x);
+
+      compute_psrlvq512 (s1.a, s2.a, res_ref);
+
+      fail += check_union512i_q (res, res_ref);
+    }
+
+  if (fail != 0)
+    abort ();
+}
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsubd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsubd-1.c
new file mode 100644
index 00000000000..28c3584e13d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsubd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sub_epi32 (x, x);
+  x = _mm512_mask_sub_epi32 (x, m, x, x);
+  x = _mm512_maskz_sub_epi32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsubd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsubd-2.c
new file mode 100644
index 00000000000..acc26ce832c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsubd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, int *s1, int *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] - s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_sub_epi32) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_sub_epi32) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_sub_epi32) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsubq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsubq-1.c
new file mode 100644
index 00000000000..c51b291dae8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsubq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vpsubq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpsubq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpsubq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sub_epi64 (x, x);
+  x = _mm512_mask_sub_epi64 (x, m, x, x);
+  x = _mm512_maskz_sub_epi64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpsubq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpsubq-2.c
new file mode 100644
index 00000000000..ba16ee18470
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpsubq-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (long long *r, long long *s1, long long *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] - s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_sub_epi64) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_sub_epi64) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_sub_epi64) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpternlogd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpternlogd-1.c
new file mode 100644
index 00000000000..e4708bf51b0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpternlogd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x, y, z;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_ternarylogic_epi32 (x, y, z, 0xF0);
+  x = _mm512_mask_ternarylogic_epi32 (x, m, y, z, 0xF0);
+  x = _mm512_maskz_ternarylogic_epi32 (m, x, y, z, 0xF0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpternlogd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpternlogd-2.c
new file mode 100644
index 00000000000..c9813ed2432
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpternlogd-2.c
@@ -0,0 +1,71 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *src1, int *src2, int *src3, int imm, int *r)
+{
+  int i, j, index, res, mask, one_mask = 1;
+  int src1_bit, src2_bit, src3_bit, imm_bit;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      res = 0;
+      for (j = 0; j < 32; j++)
+	{
+	  mask = one_mask << j;
+	  src1_bit = ((src1[i] & mask) >> j) << 2;
+	  src2_bit = ((src2[i] & mask) >> j) << 1;
+	  src3_bit = ((src3[i] & mask) >> j);
+	  index = src1_bit | src2_bit | src3_bit;
+	  imm_bit = (imm & (one_mask << index)) >> index;
+	  res = res | (imm_bit << j);
+	}
+      r[i] = res;
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) src2, src3, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  int i, imm = 0x7D;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      res1.a[i] = DEFAULT_VALUE;
+      res2.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+      src2.a[i] = 145132 * i + 123123;
+      src3.a[i] = 1223 * i + 895;
+    }
+
+  CALC (res1.a, src2.a, src3.a, imm, res_ref);
+
+  res1.x = INTRINSIC (_ternarylogic_epi32) (res1.x, src2.x, src3.x,
+    imm);
+  res2.x = INTRINSIC (_mask_ternarylogic_epi32) (res2.x, mask, src2.x,
+    src3.x, imm);
+  res3.x = INTRINSIC (_maskz_ternarylogic_epi32) (mask, res3.x, src2.x,
+    src3.x, imm);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpternlogq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpternlogq-1.c
new file mode 100644
index 00000000000..7d074668d93
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpternlogq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpternlogq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpternlogq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpternlogq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x, y, z;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_ternarylogic_epi64 (x, y, z, 0xF0);
+  x = _mm512_mask_ternarylogic_epi64 (x, m, y, z, 0xF0);
+  x = _mm512_maskz_ternarylogic_epi64 (m, x, y, z, 0xF0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpternlogq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpternlogq-2.c
new file mode 100644
index 00000000000..a8065541ecc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpternlogq-2.c
@@ -0,0 +1,73 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (long long *src1, long long *src2, long long *src3,
+      long long imm, long long *r)
+{
+  int i, j;
+  long long res, index, mask, one_mask = 1;
+  long long src1_bit, src2_bit, src3_bit, imm_bit;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      res = 0;
+      for (j = 0; j < 64; j++)
+	{
+	  mask = one_mask << j;
+	  src1_bit = ((src1[i] & mask) >> j) << 2;
+	  src2_bit = ((src2[i] & mask) >> j) << 1;
+	  src3_bit = ((src3[i] & mask) >> j);
+	  index = src1_bit | src2_bit | src3_bit;
+	  imm_bit = (imm & (one_mask << index)) >> index;
+	  res = res | (imm_bit << j);
+	}
+      r[i] = res;
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) src2, src3, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  int i, imm = 0x7D;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      res1.a[i] = DEFAULT_VALUE;
+      res2.a[i] = DEFAULT_VALUE;
+      res3.a[i] = DEFAULT_VALUE;
+      src2.a[i] = 145132 * i + 123123;
+      src3.a[i] = 1223 * i + 895;
+    }
+
+  CALC (res1.a, src2.a, src3.a, imm, res_ref);
+
+  res1.x = INTRINSIC (_ternarylogic_epi64) (res1.x, src2.x, src3.x,
+    imm);
+  res2.x = INTRINSIC (_mask_ternarylogic_epi64) (res2.x, mask, src2.x,
+    src3.x, imm);
+  res3.x = INTRINSIC (_maskz_ternarylogic_epi64) (mask, res3.x, src2.x,
+    src3.x, imm);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vptestmd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vptestmd-1.c
new file mode 100644
index 00000000000..2242314ce08
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vptestmd-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vptestmd\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n^k\]*k\[1-7\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vptestmd\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n^k\]*k\[1-7\]\{" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m16;
+
+void extern
+avx512f_test (void)
+{
+  m16 = _mm512_test_epi32_mask (x, x);
+  m16 = _mm512_mask_test_epi32_mask (3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vptestmd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vptestmd-2.c
new file mode 100644
index 00000000000..5025fab3088
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vptestmd-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (MASK_TYPE *res, int *src1, int *src2)
+{
+  int i;
+  *res = 0;
+  MASK_TYPE one = 1;
+
+  for (i = 0; i < SIZE; i++)
+    if (src1[i] & src2[i])
+      *res = *res | one << i;
+}
+
+static void
+TEST (void)
+{
+  int i, sign = 1;
+  UNION_TYPE (AVX512F_LEN, i_d) src1, src2;
+  MASK_TYPE res_ref, res1, res2;
+  MASK_TYPE mask = MASK_VALUE;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = i * i * sign;
+      src2.a[i] = i + 20;
+      sign = -sign;
+    }
+
+  res1 = INTRINSIC (_test_epi32_mask) (src1.x, src2.x);
+  res2 = INTRINSIC (_mask_test_epi32_mask) (mask, src1.x, src2.x);
+
+  CALC (&res_ref, src1.a, src2.a);
+
+  if (res1 != res_ref)
+    abort ();
+
+  res_ref &= mask;
+
+  if (res2 != res_ref)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vptestmq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vptestmq-1.c
new file mode 100644
index 00000000000..9a92903a2bb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vptestmq-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vptestmq\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n^k\]*k\[1-7\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vptestmq\[ \\t\]+\[^\n\]*%zmm\[0-7\]\[^\n^k\]*k\[1-7\]\{" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+  m8 = _mm512_test_epi64_mask (x, x);
+  m8 = _mm512_mask_test_epi64_mask (3, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vptestmq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vptestmq-2.c
new file mode 100644
index 00000000000..9ec9e48b3b1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vptestmq-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (MASK_TYPE *res, long long *src1, long long *src2)
+{
+  int i;
+  *res = 0;
+  MASK_TYPE one = 1;
+
+  for (i = 0; i < SIZE; i++)
+    if (src1[i] & src2[i])
+      *res = *res | one << i;
+}
+
+static void
+TEST (void)
+{
+  int i, sign = 1;
+  UNION_TYPE (AVX512F_LEN, i_q) src1, src2;
+  MASK_TYPE res_ref, res1, res2;
+  MASK_TYPE mask = MASK_VALUE;
+  res1 = 0;
+  res2 = 0;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = i * i * sign;
+      src2.a[i] = i + 20;
+      sign = -sign;
+    }
+
+  res1 = INTRINSIC (_test_epi64_mask) (src1.x, src2.x);
+  res2 = INTRINSIC (_mask_test_epi64_mask) (mask, src1.x, src2.x);
+
+  CALC (&res_ref, src1.a, src2.a);
+
+  if (res1 != res_ref)
+    abort ();
+
+  res_ref &= mask;
+
+  if (res2 != res_ref)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpunpckhdq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpunpckhdq-1.c
new file mode 100644
index 00000000000..800e1e0ef5d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpunpckhdq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpunpckhdq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpunpckhdq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpunpckhdq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x, y, z;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_unpackhi_epi32 (y, z);
+  x = _mm512_mask_unpackhi_epi32 (x, m, y, z);
+  x = _mm512_maskz_unpackhi_epi32 (m, y, z);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpunpckhdq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpunpckhdq-2.c
new file mode 100644
index 00000000000..adb9b7a53aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpunpckhdq-2.c
@@ -0,0 +1,59 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, int *s1, int *s2)
+{
+  int i;
+  for (i = 0; i < SIZE / 4; i++)
+    {
+      r[4 * i] = s1[4 * i + 2];
+      r[4 * i + 1] = s2[4 * i + 2];
+      r[4 * i + 2] = s1[4 * i + 3];
+      r[4 * i + 3] = s2[4 * i + 3];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 34 * i * sign;
+      src1.a[i] = 179 * i;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_unpackhi_epi32) (src1.x, src2.x);
+  res2.x =
+    INTRINSIC (_mask_unpackhi_epi32) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_unpackhi_epi32) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpunpckhqdq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpunpckhqdq-1.c
new file mode 100644
index 00000000000..05b22297f8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpunpckhqdq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpunpckhqdq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpunpckhqdq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpunpckhqdq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x, y, z;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_unpackhi_epi64 (y, z);
+  x = _mm512_mask_unpackhi_epi64 (x, m, y, z);
+  x = _mm512_maskz_unpackhi_epi64 (m, y, z);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpunpckhqdq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpunpckhqdq-2.c
new file mode 100644
index 00000000000..b226274df16
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpunpckhqdq-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (long long *r, long long *s1, long long *s2)
+{
+  int i;
+  for (i = 0; i < SIZE / 2; i++)
+    {
+      r[2 * i] = s1[2 * i + 1];
+      r[2 * i + 1] = s2[2 * i + 1];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 34 * i * sign;
+      src1.a[i] = 179 * i;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_unpackhi_epi64) (src1.x, src2.x);
+  res2.x =
+    INTRINSIC (_mask_unpackhi_epi64) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_unpackhi_epi64) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpunpckldq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpunpckldq-1.c
new file mode 100644
index 00000000000..29a2c8dc697
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpunpckldq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpunpckldq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpunpckldq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpunpckldq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x, y, z;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_unpacklo_epi32 (y, z);
+  x = _mm512_mask_unpacklo_epi32 (x, m, y, z);
+  x = _mm512_maskz_unpacklo_epi32 (m, y, z);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpunpckldq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpunpckldq-2.c
new file mode 100644
index 00000000000..b715fde17ad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpunpckldq-2.c
@@ -0,0 +1,59 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (int *r, int *s1, int *s2)
+{
+  int i;
+  for (i = 0; i < SIZE / 4; i++)
+    {
+      r[4 * i] = s1[4 * i];
+      r[4 * i + 1] = s2[4 * i];
+      r[4 * i + 2] = s1[4 * i + 1];
+      r[4 * i + 3] = s2[4 * i + 1];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 34 * i * sign;
+      src1.a[i] = 179 * i;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_unpacklo_epi32) (src1.x, src2.x);
+  res2.x =
+    INTRINSIC (_mask_unpacklo_epi32) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_unpacklo_epi32) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpunpcklqdq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpunpcklqdq-1.c
new file mode 100644
index 00000000000..ac6f2976ade
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpunpcklqdq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpunpcklqdq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[\\n\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpunpcklqdq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpunpcklqdq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x, y, z;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_unpacklo_epi64 (y, z);
+  x = _mm512_mask_unpacklo_epi64 (x, m, y, z);
+  x = _mm512_maskz_unpacklo_epi64 (m, y, z);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpunpcklqdq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpunpcklqdq-2.c
new file mode 100644
index 00000000000..2892f1c3210
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpunpcklqdq-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (long long *r, long long *s1, long long *s2)
+{
+  int i;
+  for (i = 0; i < SIZE / 2; i++)
+    {
+      r[2 * i] = s1[2 * i];
+      r[2 * i + 1] = s2[2 * i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, i_q) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 34 * i * sign;
+      src1.a[i] = 179 * i;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_unpacklo_epi64) (src1.x, src2.x);
+  res2.x =
+    INTRINSIC (_mask_unpacklo_epi64) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_unpacklo_epi64) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpxord-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpxord-1.c
new file mode 100644
index 00000000000..99e82bef459
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpxord-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 4 } } */
+/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_xor_si512 (x, x);
+  x = _mm512_xor_epi32 (x, x);
+  x = _mm512_mask_xor_epi32 (x, m, x, x);
+  x = _mm512_maskz_xor_epi32 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpxord-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpxord-2.c
new file mode 100644
index 00000000000..7a9666ce7c6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpxord-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *s1, int *s2, int *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = s1[i] ^ s2[i];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) s1, s2, res1, res2, res3, res4;
+  MASK_TYPE mask = MASK_VALUE;
+  int res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i * sign;
+      s2.a[i] = (i + 20) * sign;
+      sign = -sign;
+      res3.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_xor_si512) (s1.x, s2.x);
+  res2.x = INTRINSIC (_xor_epi32) (s1.x, s2.x);
+  res3.x = INTRINSIC (_mask_xor_epi32) (res3.x, mask, s1.x, s2.x);
+  res4.x = INTRINSIC (_maskz_xor_epi32) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+    abort ();
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref))
+    abort ();
+
+  MASK_MERGE (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref))
+    abort ();
+
+  MASK_ZERO (i_d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (res4, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpxorq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpxorq-1.c
new file mode 100644
index 00000000000..cd2853409e6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpxorq-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vpxorq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vpxorq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpxorq\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_xor_epi64 (x, x);
+  x = _mm512_mask_xor_epi64 (x, m, x, x);
+  x = _mm512_maskz_xor_epi64 (m, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpxorq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpxorq-2.c
new file mode 100644
index 00000000000..288b0085ff6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpxorq-2.c
@@ -0,0 +1,53 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (long long *s1, long long *s2, long long *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    r[i] = s1[i] ^ s2[i];
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) s1, s2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  long long res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i * sign;
+      s2.a[i] = (i + 20) * sign;
+      sign = -sign;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_xor_epi64) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_xor_epi64) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_xor_epi64) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res1, res_ref))
+      abort ();
+
+  MASK_MERGE (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (i_q) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrcp14pd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14pd-1.c
new file mode 100644
index 00000000000..7342420489d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14pd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vrcp14pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vrcp14pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrcp14pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_rcp14_pd (x);
+  x = _mm512_mask_rcp14_pd (x, m, x);
+  x = _mm512_maskz_rcp14_pd (m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrcp14pd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14pd-2.c
new file mode 100644
index 00000000000..4653d77309b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14pd-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (double *s, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = 1.0 / s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 123.456 * (i + 2000) * sign;
+      res2.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_rcp14_pd) (s.x);
+  res2.x = INTRINSIC (_mask_rcp14_pd) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_rcp14_pd) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res1, res_ref, 0.0001))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res2, res_ref, 0.0001))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res3, res_ref, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrcp14ps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14ps-1.c
new file mode 100644
index 00000000000..ea6c68de7ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14ps-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vrcp14ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vrcp14ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrcp14ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_rcp14_ps (x);
+  x = _mm512_mask_rcp14_ps (x, m, x);
+  x = _mm512_maskz_rcp14_ps (m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrcp14ps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14ps-2.c
new file mode 100644
index 00000000000..6e0e577914b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14ps-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (float *s, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = 1.0 / s[i];
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN,) s, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int i, sign = 1;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 123.456 * (i + 2000) * sign;
+      res2.a[i] = DEFAULT_VALUE;
+      sign = -sign;
+    }
+
+  res1.x = INTRINSIC (_rcp14_ps) (s.x);
+  res2.x = INTRINSIC (_mask_rcp14_ps) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_rcp14_ps) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_ROUGH_CHECK (AVX512F_LEN,) (res1, res_ref, 0.0001))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN,) (res2, res_ref, 0.0001))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN,) (res3, res_ref, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrcp14sd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14sd-1.c
new file mode 100644
index 00000000000..c0c8d038cc3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14sd-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vrcp14sd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_rcp14_sd (x1, x2);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrcp14sd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14sd-2.c
new file mode 100644
index 00000000000..9ff3541d85c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14sd-2.c
@@ -0,0 +1,31 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+
+static void
+compute_vrcp14sd (double *s1, double *s2, double *r)
+{
+  r[0] = 1.0 / s2[0];
+  r[1] = s1[1];
+}
+
+static void
+avx512f_test (void)
+{
+  union128d s1, s2, res1, res2, res3;
+  double res_ref[2];
+
+  s1.x = _mm_set_pd (-3.0, 111.111);
+  s2.x = _mm_set_pd (222.222, -2.0);
+  res2.a[0] = DEFAULT_VALUE;
+
+  res1.x = _mm_rcp14_sd (s1.x, s2.x);
+
+  compute_vrcp14sd (s1.a, s2.a, res_ref);
+
+  if (check_union128d (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrcp14ss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14ss-1.c
new file mode 100644
index 00000000000..580dfd6a52d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14ss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vrcp14ss\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_rcp14_ss (x1, x2);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrcp14ss-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14ss-2.c
new file mode 100644
index 00000000000..fe8989aeb50
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrcp14ss-2.c
@@ -0,0 +1,33 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+
+static void
+compute_vrcp14ss (float *s1, float *s2, float *r)
+{
+  r[0] = 1.0 / s2[0];
+  r[1] = s1[1];
+  r[2] = s1[2];
+  r[3] = s1[3];
+}
+
+static void
+avx512f_test (void)
+{
+  union128 s1, s2, res1, res2, res3;
+  float res_ref[4];
+
+  s1.x = _mm_set_ps (-24.043, 68.346, -43.35, 546.46);
+  s2.x = _mm_set_ps (222.222, 333.333, 444.444, -2.0);
+  res2.a[0] = DEFAULT_VALUE;
+
+  res1.x = _mm_rcp14_ss (s1.x, s2.x);
+
+  compute_vrcp14ss (s1.a, s2.a, res_ref);
+
+  if (check_union128 (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrndscalepd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vrndscalepd-1.c
new file mode 100644
index 00000000000..3fb0e090ed7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrndscalepd-1.c
@@ -0,0 +1,35 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 6} } */
+/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 9} } */
+/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 3} } */
+/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%zmm\[0-9\]\[^\n\]*%zmm\[0-9\]\[^\{\]" 3} } */
+/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 6} } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_roundscale_pd (x, 0x42);
+  x = _mm512_ceil_pd (x);
+  x = _mm512_floor_pd (x);
+  x = _mm512_mask_roundscale_pd (x, 2, x, 0x42);
+  x = _mm512_mask_ceil_pd (x, 2, x);
+  x = _mm512_mask_floor_pd (x, 2, x);
+  x = _mm512_maskz_roundscale_pd (2, x, 0x42);
+  x = _mm512_maskz_ceil_pd (2, x);
+  x = _mm512_maskz_floor_pd (2, x);
+
+  x = _mm512_roundscale_round_pd (x, 0x42, _MM_FROUND_NO_EXC);
+  x = _mm512_ceil_round_pd (x, _MM_FROUND_NO_EXC);
+  x = _mm512_floor_round_pd (x, _MM_FROUND_NO_EXC);
+  x = _mm512_mask_roundscale_round_pd (x, 2, x, 0x42, _MM_FROUND_NO_EXC);
+  x = _mm512_mask_ceil_round_pd (x, 2, x, _MM_FROUND_NO_EXC);
+  x = _mm512_mask_floor_round_pd (x, 2, x, _MM_FROUND_NO_EXC);
+  x = _mm512_maskz_roundscale_round_pd (2, x, 0x42, _MM_FROUND_NO_EXC);
+  x = _mm512_maskz_ceil_round_pd (2, x, _MM_FROUND_NO_EXC);
+  x = _mm512_maskz_floor_round_pd (2, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrndscalepd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrndscalepd-2.c
new file mode 100644
index 00000000000..f655f59c677
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrndscalepd-2.c
@@ -0,0 +1,96 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include "math.h"
+
+static void
+CALC (double *s, double *r, int imm)
+{
+  int i = 0, rc, m;
+  rc = imm & 0xf;
+  m = imm >> 4;
+  for (i = 0; i < SIZE; i++)
+    switch (rc)
+      {
+      case _MM_FROUND_FLOOR:
+	r[i] = floor (s[i] * pow (2, m)) / pow (2, m);
+	break;
+      case _MM_FROUND_CEIL:
+	r[i] = ceil (s[i] * pow (2, m)) / pow (2, m);
+	break;
+      default:
+	abort ();
+	break;
+      }
+}
+
+void static
+TEST (void)
+{
+  int imm, i, j;
+  UNION_TYPE (AVX512F_LEN, d) res1,res2,res3,s;
+  double res_ref[SIZE];
+  double res_ref_mask[SIZE];
+
+  MASK_TYPE mask = 6 ^ (0xff >> SIZE);
+
+  imm = _MM_FROUND_FLOOR | (7 << 4);
+
+  for (i = 0; i < 3; i++)
+    {
+
+      for (j = 0; j < SIZE; j++)
+	{
+	  s.a[j] = j * (j + 12.0231);
+	  res1.a[j] = DEFAULT_VALUE;
+	  res2.a[j] = DEFAULT_VALUE;
+	  res3.a[j] = DEFAULT_VALUE;
+	}
+
+      switch (i)
+	{
+	case 0:
+	  imm = _MM_FROUND_FLOOR | (7 << 4);
+	  res1.x = INTRINSIC (_roundscale_pd) (s.x, imm);
+	  res2.x = INTRINSIC (_mask_roundscale_pd) (res2.x, mask, s.x, imm);
+	  res3.x = INTRINSIC (_maskz_roundscale_pd) (mask, s.x, imm);
+	  break;
+	case 1:
+	  imm = _MM_FROUND_FLOOR;
+	  res1.x = INTRINSIC (_floor_pd) (s.x);
+	  res2.x = INTRINSIC (_mask_floor_pd) (res2.x, mask, s.x);
+	  res3.x = INTRINSIC (_maskz_floor_pd) (mask, s.x);
+	  break;
+	case 2:
+	  imm = _MM_FROUND_CEIL;
+	  res1.x = INTRINSIC (_ceil_pd) (s.x);
+	  res2.x = INTRINSIC (_mask_ceil_pd) (res2.x, mask, s.x);
+	  res3.x = INTRINSIC (_maskz_ceil_pd) (mask, s.x);
+	  break;
+	}
+
+      CALC (s.a, res_ref, imm);
+
+      if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+	abort ();
+
+      MASK_MERGE(d) (res_ref,mask,SIZE );
+
+      if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+	abort ();
+
+      MASK_ZERO(d) (res_ref,mask,SIZE );
+
+      if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+	abort ();
+
+    }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrndscaleps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vrndscaleps-1.c
new file mode 100644
index 00000000000..7d5aeaac8ce
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrndscaleps-1.c
@@ -0,0 +1,35 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6} } */
+/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 9} } */
+/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 3} } */
+/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3} } */
+/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 6} } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_roundscale_ps (x, 0x42);
+  x = _mm512_ceil_ps (x);
+  x = _mm512_floor_ps (x);
+  x = _mm512_mask_roundscale_ps (x, 2, x, 0x42);
+  x = _mm512_mask_ceil_ps (x, 2, x);
+  x = _mm512_mask_floor_ps (x, 2, x);
+  x = _mm512_maskz_roundscale_ps (2, x, 0x42);
+  x = _mm512_maskz_ceil_ps (2, x);
+  x = _mm512_maskz_floor_ps (2, x);
+
+  x = _mm512_roundscale_round_ps (x, 0x42, _MM_FROUND_NO_EXC);
+  x = _mm512_ceil_round_ps (x, _MM_FROUND_NO_EXC);
+  x = _mm512_floor_round_ps (x, _MM_FROUND_NO_EXC);
+  x = _mm512_mask_roundscale_round_ps (x, 2, x, 0x42, _MM_FROUND_NO_EXC);
+  x = _mm512_mask_ceil_round_ps (x, 2, x, _MM_FROUND_NO_EXC);
+  x = _mm512_mask_floor_round_ps (x, 2, x, _MM_FROUND_NO_EXC);
+  x = _mm512_maskz_roundscale_round_ps (2, x, 0x42, _MM_FROUND_NO_EXC);
+  x = _mm512_maskz_ceil_round_ps (2, x, _MM_FROUND_NO_EXC);
+  x = _mm512_maskz_floor_round_ps (2, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrndscaleps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrndscaleps-2.c
new file mode 100644
index 00000000000..19c51102231
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrndscaleps-2.c
@@ -0,0 +1,94 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "math.h"
+
+static void
+CALC (float *s, float *r, int imm)
+{
+  int i = 0, rc, m;
+  rc = imm & 0xf;
+  m = imm >> 4;
+  for (i = 0; i < SIZE; i++)
+    switch (rc)
+      {
+      case _MM_FROUND_FLOOR:
+	r[i] = floor (s[i] * pow (2, m)) / pow (2, m);
+	break;
+      case _MM_FROUND_CEIL:
+	r[i] = ceil (s[i] * pow (2, m)) / pow (2, m);
+	break;
+      default:
+	abort ();
+	break;
+      }
+}
+
+void static
+TEST (void)
+{
+  int imm, i, j;
+  UNION_TYPE (AVX512F_LEN,) res1, res2, res3, s;
+  float res_ref[SIZE];
+
+  MASK_TYPE mask = 6 ^ (0xffff >> SIZE);
+
+  imm = _MM_FROUND_FLOOR | (7 << 4);
+
+  for (i = 0; i < 3; i++)
+    {
+
+      for (j = 0; j < SIZE; j++)
+	{
+	  s.a[j] = j * (j + 12.0231);
+	  res1.a[j] = DEFAULT_VALUE;
+	  res2.a[j] = DEFAULT_VALUE;
+	  res3.a[j] = DEFAULT_VALUE;
+	}
+
+      switch (i)
+	{
+	case 0:
+	  imm = _MM_FROUND_FLOOR | (7 << 4);
+	  res1.x = INTRINSIC (_roundscale_ps) (s.x, imm);
+	  res2.x = INTRINSIC (_mask_roundscale_ps) (res2.x, mask, s.x, imm);
+	  res3.x = INTRINSIC (_maskz_roundscale_ps) (mask, s.x, imm);
+	  break;
+	case 1:
+	  imm = _MM_FROUND_FLOOR;
+	  res1.x = INTRINSIC (_floor_ps) (s.x);
+	  res2.x = INTRINSIC (_mask_floor_ps) (res2.x, mask, s.x);
+	  res3.x = INTRINSIC (_maskz_floor_ps) (mask, s.x);
+	  break;
+	case 2:
+	  imm = _MM_FROUND_CEIL;
+	  res1.x = INTRINSIC (_ceil_ps) (s.x);
+	  res2.x = INTRINSIC (_mask_ceil_ps) (res2.x, mask, s.x);
+	  res3.x = INTRINSIC (_maskz_ceil_ps) (mask, s.x);
+	  break;
+	}
+
+      CALC (s.a, res_ref, imm);
+
+      if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+	abort ();
+
+      MASK_MERGE ()(res_ref, mask, SIZE);
+
+      if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+	abort ();
+
+      MASK_ZERO ()(res_ref, mask, SIZE);
+
+      if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+	abort ();
+
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrndscalesd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vrndscalesd-1.c
new file mode 100644
index 00000000000..2f370a92722
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrndscalesd-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vrndscalesd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vrndscalesd\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_roundscale_sd (x1, x2, 0x42);
+  x1 = _mm_roundscale_round_sd (x1, x2, 0x42, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrndscalesd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrndscalesd-2.c
new file mode 100644
index 00000000000..5b4e8423cad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrndscalesd-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#define SIZE (128 / 64)
+
+#include <math.h>
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+
+static void
+compute_rndscalesd (double *s1, double *s2, double *r, int imm)
+{
+  int rc, m;
+  rc = imm & 0xf;
+  m = imm >> 4;
+
+  switch (rc)
+    {
+    case _MM_FROUND_FLOOR:
+      r[0] = floor (s2[0] * pow (2, m)) / pow (2, m);
+      break;
+    case _MM_FROUND_CEIL:
+      r[0] = ceil (s2[0] * pow (2, m)) / pow (2, m);
+      break;
+    default:
+      abort ();
+      break;
+    }
+
+  r[1] = s1[1];
+}
+
+static void
+avx512f_test (void)
+{
+  int imm = _MM_FROUND_FLOOR | (7 << 4);
+  union128d s1, s2, res1;
+  double res_ref[SIZE];
+
+  s1.x = _mm_set_pd (4.05084, -1.23162);
+  s2.x = _mm_set_pd (-3.53222, 7.33527);
+
+  res1.x = _mm_roundscale_sd (s1.x, s2.x, imm);
+
+  compute_rndscalesd (s1.a, s2.a, res_ref, imm);
+
+  if (check_union128d (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrndscaless-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vrndscaless-1.c
new file mode 100644
index 00000000000..c9f5a753d28
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrndscaless-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vrndscaless\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vrndscaless\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_roundscale_ss (x1, x2, 0x42);
+  x1 = _mm_roundscale_round_ss (x1, x2, 0x42, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrndscaless-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrndscaless-2.c
new file mode 100644
index 00000000000..7acfe4c2a46
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrndscaless-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#define SIZE (128 / 32)
+
+#include <math.h>
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+
+static void
+compute_rndscaless (float *s1, float *s2, float *r, int imm)
+{
+  int rc, m;
+  rc = imm & 0xf;
+  m = imm >> 4;
+
+  switch (rc)
+    {
+    case _MM_FROUND_FLOOR:
+      r[0] = floorf (s2[0] * pow (2, m)) / pow (2, m);
+      break;
+    case _MM_FROUND_CEIL:
+      r[0] = ceilf (s2[0] * pow (2, m)) / pow (2, m);
+      break;
+    default:
+      abort ();
+      break;
+    }
+
+  r[1] = s1[1];
+  r[2] = s1[2];
+  r[3] = s1[3];
+}
+
+static void
+avx512f_test (void)
+{
+  int imm = _MM_FROUND_FLOOR | (7 << 4);
+  union128 s1, s2, res1;
+  float res_ref[SIZE];
+
+  s1.x = _mm_set_ps (4.05084, -1.23162, 2.00231, -6.22103);
+  s2.x = _mm_set_ps (-4.19319, -3.53222, 7.33527, 5.57655);
+
+  res1.x = _mm_roundscale_ss (s1.x, s2.x, imm);
+
+  compute_rndscaless (s1.a, s2.a, res_ref, imm);
+
+  if (check_union128 (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14pd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14pd-1.c
new file mode 100644
index 00000000000..e8818a6b630
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14pd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vrsqrt14pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vrsqrt14pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrsqrt14pd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_rsqrt14_pd (x);
+  x = _mm512_mask_rsqrt14_pd (x, m, x);
+  x = _mm512_maskz_rsqrt14_pd (m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14pd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14pd-2.c
new file mode 100644
index 00000000000..76e39cf805a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14pd-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#include <math.h>
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (double *s, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = 1.0 / sqrt(s[i]);
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 123.456 * (i + 2000);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_rsqrt14_pd) (s.x);
+  res2.x = INTRINSIC (_mask_rsqrt14_pd) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_rsqrt14_pd) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res1, res_ref, 0.0001))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res2, res_ref, 0.0001))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN, d) (res3, res_ref, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14ps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14ps-1.c
new file mode 100644
index 00000000000..b766d85418b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14ps-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vrsqrt14ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 3 } } */
+/* { dg-final { scan-assembler-times "vrsqrt14ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vrsqrt14ps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_rsqrt14_ps (x);
+  x = _mm512_mask_rsqrt14_ps (x, m, x);
+  x = _mm512_maskz_rsqrt14_ps (m, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14ps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14ps-2.c
new file mode 100644
index 00000000000..4e6f77dd40a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14ps-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#include <math.h>
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (float *s, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = 1.0 / sqrt(s[i]);
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN,) s, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 123.456 * (i + 2000);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_rsqrt14_ps) (s.x);
+  res2.x = INTRINSIC (_mask_rsqrt14_ps) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_rsqrt14_ps) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_ROUGH_CHECK (AVX512F_LEN,) (res1, res_ref, 0.0001))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN,) (res2, res_ref, 0.0001))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_ROUGH_CHECK (AVX512F_LEN,) (res3, res_ref, 0.0001))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14sd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14sd-1.c
new file mode 100644
index 00000000000..bd8b7a84f98
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14sd-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vrsqrt14sd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x1, x2;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_rsqrt14_sd (x1, x2);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14sd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14sd-2.c
new file mode 100644
index 00000000000..ef4e407f7d1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14sd-2.c
@@ -0,0 +1,32 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include <math.h>
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+
+static void
+compute_vrsqrt14sd (double *s1, double *s2, double *r)
+{
+  r[0] = 1.0 / sqrt (s2[0]);
+  r[1] = s1[1];
+}
+
+static void
+avx512f_test (void)
+{
+  union128d s1, s2, res1, res2, res3;
+  double res_ref[2];
+
+  s1.x = _mm_set_pd (-3.0, 111.111);
+  s2.x = _mm_set_pd (222.222, 4.0);
+  res2.a[0] = DEFAULT_VALUE;
+
+  res1.x = _mm_rsqrt14_sd (s1.x, s2.x);
+
+  compute_vrsqrt14sd (s1.a, s2.a, res_ref);
+
+  if (check_fp_union128d (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14ss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14ss-1.c
new file mode 100644
index 00000000000..d4d4eeadc13
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14ss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vrsqrt14ss\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_rsqrt14_ss (x1, x2);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14ss-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14ss-2.c
new file mode 100644
index 00000000000..b01420f7af0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vrsqrt14ss-2.c
@@ -0,0 +1,34 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include <math.h>
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+
+static void
+compute_vrsqrt14ss (float *s1, float *s2, float *r)
+{
+  r[0] = 1.0 / sqrt (s2[0]);
+  r[1] = s1[1];
+  r[2] = s1[2];
+  r[3] = s1[3];
+}
+
+static void
+avx512f_test (void)
+{
+  union128 s1, s2, res1, res2, res3;
+  float res_ref[4];
+
+  s1.x = _mm_set_ps (-24.43, 68.346, -43.35, 546.46);
+  s2.x = _mm_set_ps (222.222, 333.333, 444.444, 4.0);
+  res2.a[0] = DEFAULT_VALUE;
+
+  res1.x = _mm_rsqrt14_ss (s1.x, s2.x);
+
+  compute_vrsqrt14ss (s1.a, s2.a, res_ref);
+
+  if (check_fp_union128 (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vscalefpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vscalefpd-1.c
new file mode 100644
index 00000000000..6076e2c1b6b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vscalefpd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_scalef_pd (x, x);
+  x = _mm512_mask_scalef_pd (x, m, x, x);
+  x = _mm512_maskz_scalef_pd (m, x, x);
+  x = _mm512_scalef_round_pd (x, x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_scalef_round_pd (x, m, x, x, _MM_FROUND_TO_NEG_INF);
+  x = _mm512_maskz_scalef_round_pd (m, x, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vscalefpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vscalefpd-2.c
new file mode 100644
index 00000000000..829f7418f4f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vscalefpd-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include <math.h>
+
+CALC (double *r, double *s1, double *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = ldexp (s1[i], floor (s2[i]));
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_scalef_pd) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_scalef_pd) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_scalef_pd) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vscalefps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vscalefps-1.c
new file mode 100644
index 00000000000..37385f56802
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vscalefps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_scalef_ps (x, x);
+  x = _mm512_mask_scalef_ps (x, m, x, x);
+  x = _mm512_maskz_scalef_ps (m, x, x);
+  x = _mm512_scalef_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_scalef_round_ps (x, m, x, x, _MM_FROUND_TO_POS_INF);
+  x = _mm512_maskz_scalef_round_ps (m, x, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vscalefps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vscalefps-2.c
new file mode 100644
index 00000000000..59c32369f96
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vscalefps-2.c
@@ -0,0 +1,56 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include <math.h>
+
+CALC (float *r, float *s1, float *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = ldexp (s1[i], floor (s2[i]));
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, ) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_scalef_ps) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_scalef_ps) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_scalef_ps) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-1.c
new file mode 100644
index 00000000000..bbf238e7e52
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vscalefsd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vscalefsd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_scalef_sd (x, x);
+  x = _mm_scalef_round_sd (x, x, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-2.c
new file mode 100644
index 00000000000..131fc67c032
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-2.c
@@ -0,0 +1,37 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include <math.h>
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+
+#define SIZE (128 / 64)
+
+static void
+compute_scalefsd (double *s1, double *s2, double *r)
+{
+  r[0] = s1[0] * pow (2, floor (s2[0]));
+  r[1] = s1[1];
+}
+
+void static
+avx512f_test (void)
+{
+  union128d res1, s1, s2;
+  double res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 11.5 * (i + 1);
+      s2.a[i] = 10.5 * (i + 1);
+    }
+
+  res1.x = _mm_scalef_sd (s1.x, s2.x);
+
+  compute_scalefsd (s1.a, s2.a, res_ref);
+
+  if (check_union128d (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-1.c
new file mode 100644
index 00000000000..d36b2ffe388
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vscalefss\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vscalefss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm_scalef_ss (x, x);
+  x = _mm_scalef_round_ss (x, x, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-2.c
new file mode 100644
index 00000000000..3e8f6d19345
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-2.c
@@ -0,0 +1,39 @@
+/* { dg-do run } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-require-effective-target avx512f } */
+
+#include <math.h>
+#include "avx512f-check.h"
+#include "avx512f-helper.h"
+
+#define SIZE (128 / 32)
+
+static void
+compute_scalefss (float *s1, float *s2, float *r)
+{
+  r[0] = s1[0] * (float) pow (2, floor (s2[0]));
+  r[1] = s1[1];
+  r[2] = s1[2];
+  r[3] = s1[3];
+}
+
+static void
+avx512f_test (void)
+{
+  union128 res1, s1, s2;
+  float res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 11.5 * (i + 1);
+      s2.a[i] = 10.5 * (i + 1);
+    }
+
+  res1.x = _mm_scalef_ss (s1.x, s2.x);
+
+  compute_scalefss (s1.a, s2.a, res_ref);
+
+  if (check_union128 (res1, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshuff32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vshuff32x4-1.c
new file mode 100644
index 00000000000..712b3148297
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vshuff32x4-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vshuff32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vshuff32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vshuff32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+__m512 x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_shuffle_f32x4 (x, x, 56);
+  x = _mm512_mask_shuffle_f32x4 (x, 4, x, x, 56);
+  x = _mm512_maskz_shuffle_f32x4 (6, x, x, 56);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshuff32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vshuff32x4-2.c
new file mode 100644
index 00000000000..271c8624bd2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vshuff32x4-2.c
@@ -0,0 +1,68 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "string.h"
+
+void
+CALC (float *e, UNION_TYPE (AVX512F_LEN,) s1, UNION_TYPE (AVX512F_LEN,) s2,
+      int imm)
+{
+  int i, offset, selector;
+  float *source;
+  for (i = 0; i < SIZE / 4; i++)
+    {
+
+#if AVX512F_LEN == 512
+      selector = (imm >> i * 2) & 0x3;
+#else
+      selector = (imm >> i) & 0x1;
+#endif
+
+      offset = i * 4;
+      source = i * 4 * 32 < AVX512F_LEN / 2 ? s1.a : s2.a;
+      memcpy (e + offset, source + selector * 4, 16);
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN,) u1, u2, u3, s1, s2;
+  MASK_TYPE mask = MASK_VALUE;
+  float e[SIZE];
+  int i;
+  int imm = 203;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 1.2 / (i + 0.378);
+      s1.a[i] = 91.02 / (i + 4.3578);
+      u1.a[i] = DEFAULT_VALUE;
+      u2.a[i] = DEFAULT_VALUE;
+      u3.a[i] = DEFAULT_VALUE;
+    }
+
+  u1.x = INTRINSIC (_shuffle_f32x4) (s1.x, s2.x, imm);
+  u2.x = INTRINSIC (_mask_shuffle_f32x4) (u2.x, mask, s1.x, s2.x, imm);
+  u3.x = INTRINSIC (_maskz_shuffle_f32x4) (mask, s1.x, s2.x, imm);
+
+  CALC (e, s1, s2, imm);
+
+  if (UNION_CHECK (AVX512F_LEN,) (u1, e))
+    abort ();
+
+  MASK_MERGE ()(e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (u2, e))
+    abort ();
+
+  MASK_ZERO ()(e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (u3, e))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshuff64x2-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vshuff64x2-1.c
new file mode 100644
index 00000000000..c5ac373cc8a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vshuff64x2-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vshuff64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vshuff64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vshuff64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+__m512d x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_shuffle_f64x2 (x, x, 56);
+  x = _mm512_maskz_shuffle_f64x2 (3, x, x, 56);
+  x = _mm512_mask_shuffle_f64x2 (x, 3, x, x, 56);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshuff64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vshuff64x2-2.c
new file mode 100644
index 00000000000..4842942ac03
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vshuff64x2-2.c
@@ -0,0 +1,68 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include "string.h"
+
+void
+CALC (double *e, UNION_TYPE (AVX512F_LEN, d) s1,
+      UNION_TYPE (AVX512F_LEN, d) s2, int imm)
+{
+  int i, offset, selector;
+  double *source;
+  for (i = 0; i < SIZE / 2; i++)
+    {
+
+#if AVX512F_LEN == 512
+      selector = (imm >> i * 2) & 0x3;
+#else
+      selector = (imm >> i) & 0x1;
+#endif
+
+      offset = i * 2;
+      source = i * 2 * 64 < AVX512F_LEN / 2 ? s1.a : s2.a;
+      memcpy (e + offset, source + selector * 2, 16);
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) u1, u2, u3, s1, s2;
+  MASK_TYPE mask = MASK_VALUE;
+  double e[SIZE];
+  int i;
+  int imm = 203;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 1.2 / (i + 0.378);
+      s1.a[i] = 91.02 / (i + 4.3578);
+      u1.a[i] = DEFAULT_VALUE;
+      u2.a[i] = DEFAULT_VALUE;
+      u3.a[i] = DEFAULT_VALUE;
+    }
+
+  u1.x = INTRINSIC (_shuffle_f64x2) (s1.x, s2.x, imm);
+  u2.x = INTRINSIC (_mask_shuffle_f64x2) (u2.x, mask, s1.x, s2.x, imm);
+  u3.x = INTRINSIC (_maskz_shuffle_f64x2) (mask, s1.x, s2.x, imm);
+
+  CALC (e, s1, s2, imm);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (u1, e))
+    abort ();
+
+  MASK_MERGE (d) (e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (u2, e))
+    abort ();
+
+  MASK_ZERO (d) (e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (u3, e))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshufi32x4-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vshufi32x4-1.c
new file mode 100644
index 00000000000..8e48fdf7ddc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vshufi32x4-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vshufi32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vshufi32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vshufi32x4\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+__m512i x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_shuffle_i32x4 (x, x, 56);
+  x = _mm512_mask_shuffle_i32x4 (x, 8, x, x, 56);
+  x = _mm512_maskz_shuffle_i32x4 (8, x, x, 56);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshufi32x4-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vshufi32x4-2.c
new file mode 100644
index 00000000000..105c7156857
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vshufi32x4-2.c
@@ -0,0 +1,68 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+#include "string.h"
+
+void
+CALC (int *e, UNION_TYPE (AVX512F_LEN, i_d) s1,
+      UNION_TYPE (AVX512F_LEN, i_d) s2, int imm)
+{
+  int i, offset, selector;
+  int *source;
+  for (i = 0; i < SIZE / 4; i++)
+    {
+
+#if AVX512F_LEN == 512
+      selector = (imm >> i * 2) & 0x3;
+#else
+      selector = (imm >> i) & 0x1;
+#endif
+
+      offset = i * 4;
+      source = i * 4 * 32 < AVX512F_LEN / 2 ? s1.a : s2.a;
+      memcpy (e + offset, source + selector * 4, 16);
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_d) u1, u2, u3, s1, s2;
+  MASK_TYPE mask = MASK_VALUE;
+  int e[SIZE];
+  int i;
+  int imm = 203;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 1.2 / (i + 0.378);
+      s1.a[i] = 91.02 / (i + 4.3578);
+      u1.a[i] = DEFAULT_VALUE;
+      u2.a[i] = DEFAULT_VALUE;
+      u3.a[i] = DEFAULT_VALUE;
+    }
+
+  u1.x = INTRINSIC (_shuffle_i32x4) (s1.x, s2.x, imm);
+  u2.x = INTRINSIC (_mask_shuffle_i32x4) (u2.x, mask, s1.x, s2.x, imm);
+  u3.x = INTRINSIC (_maskz_shuffle_i32x4) (mask, s1.x, s2.x, imm);
+
+  CALC (e, s1, s2, imm);
+
+  if (UNION_CHECK (AVX512F_LEN, i_d) (u1, e))
+    abort ();
+
+  MASK_MERGE (i_d) (e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (u2, e))
+    abort ();
+
+  MASK_ZERO (i_d) (e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_d) (u3, e))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshufi64x2-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vshufi64x2-1.c
new file mode 100644
index 00000000000..5bb5c8f63f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vshufi64x2-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vshufi64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vshufi64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vshufi64x2\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+__m512i x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_shuffle_i64x2 (x, x, 56);
+  x = _mm512_mask_shuffle_i64x2 (x, 3, x, x, 56);
+  x = _mm512_maskz_shuffle_i64x2 (2, x, x, 56);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshufi64x2-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vshufi64x2-2.c
new file mode 100644
index 00000000000..d79d8f6bcc6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vshufi64x2-2.c
@@ -0,0 +1,68 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+#include "string.h"
+
+void
+CALC (long long *e, UNION_TYPE (AVX512F_LEN, i_q) s1,
+      UNION_TYPE (AVX512F_LEN, i_q) s2, int imm)
+{
+  int i, offset, selector;
+  long long *source;
+  for (i = 0; i < SIZE / 2; i++)
+    {
+
+#if AVX512F_LEN == 512
+      selector = (imm >> i * 2) & 0x3;
+#else
+      selector = (imm >> i) & 0x1;
+#endif
+
+      offset = i * 2;
+      source = i * 2 * 64 < AVX512F_LEN / 2 ? s1.a : s2.a;
+      memcpy (e + offset, source + selector * 2, 16);
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, i_q) u1, u2, u3, s1, s2;
+  MASK_TYPE mask = MASK_VALUE;
+  long long e[SIZE];
+  int i;
+  int imm = 203;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 1.2 / (i + 0.378);
+      s1.a[i] = 91.02 / (i + 4.3578);
+      u1.a[i] = DEFAULT_VALUE;
+      u2.a[i] = DEFAULT_VALUE;
+      u3.a[i] = DEFAULT_VALUE;
+    }
+
+  u1.x = INTRINSIC (_shuffle_i64x2) (s1.x, s2.x, imm);
+  u2.x = INTRINSIC (_mask_shuffle_i64x2) (u2.x, mask, s1.x, s2.x, imm);
+  u3.x = INTRINSIC (_maskz_shuffle_i64x2) (mask, s1.x, s2.x, imm);
+
+  CALC (e, s1, s2, imm);
+
+  if (UNION_CHECK (AVX512F_LEN, i_q) (u1, e))
+    abort ();
+
+  MASK_MERGE (i_q) (e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (u2, e))
+    abort ();
+
+  MASK_ZERO (i_q) (e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, i_q) (u3, e))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshufpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vshufpd-1.c
new file mode 100644
index 00000000000..420a6cfd7be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vshufpd-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vshufpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vshufpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vshufpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+__m512d x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_shuffle_pd (x, x, 56);
+  x = _mm512_mask_shuffle_pd (x, 2, x, x, 56);
+  x = _mm512_maskz_shuffle_pd (2, x, x, 56);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshufpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vshufpd-2.c
new file mode 100644
index 00000000000..d70228af17e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vshufpd-2.c
@@ -0,0 +1,61 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+void static
+CALC (double *e, UNION_TYPE (AVX512F_LEN, d) s1,
+      UNION_TYPE (AVX512F_LEN, d) s2, int imm)
+{
+  e[0] = (imm & (1 << 0)) ? s1.a[1] : s1.a[0];
+  e[1] = (imm & (1 << 1)) ? s2.a[1] : s2.a[0];
+#if AVX512F_LEN > 128
+  e[2] = (imm & (1 << 2)) ? s1.a[3] : s1.a[2];
+  e[3] = (imm & (1 << 3)) ? s2.a[3] : s2.a[2];
+#if AVX512F_LEN > 256
+  e[4] = (imm & (1 << 4)) ? s1.a[5] : s1.a[4];
+  e[5] = (imm & (1 << 5)) ? s2.a[5] : s2.a[4];
+  e[6] = (imm & (1 << 6)) ? s1.a[7] : s1.a[6];
+  e[7] = (imm & (1 << 7)) ? s2.a[7] : s2.a[6];
+#endif
+#endif
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) u1, u2, u3, s1, s2;
+  double e[SIZE];
+  MASK_TYPE mask = MASK_VALUE;
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 2134.3343 * i + 54846.4641;
+      s2.a[i] = 856.43576 * i + 1124.209;
+      u1.a[i] = DEFAULT_VALUE;
+      u2.a[i] = DEFAULT_VALUE;
+      u3.a[i] = DEFAULT_VALUE;
+    }
+
+  u1.x = INTRINSIC (_shuffle_pd) (s1.x, s2.x, 120);
+  u2.x = INTRINSIC (_mask_shuffle_pd) (u2.x, mask, s1.x, s2.x, 120);
+  u3.x = INTRINSIC (_maskz_shuffle_pd) (mask, s1.x, s2.x, 120);
+  CALC (e, s1, s2, 120);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (u1, e))
+    abort ();
+
+  MASK_MERGE (d) (e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (u2, e))
+    abort ();
+
+  MASK_ZERO (d) (e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (u3, e))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshufps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vshufps-1.c
new file mode 100644
index 00000000000..e3dbf0751f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vshufps-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vshufps\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vshufps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vshufps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+__m512 x;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_shuffle_ps (x, x, 56);
+  x = _mm512_mask_shuffle_ps (x, 2, x, x, 56);
+  x = _mm512_maskz_shuffle_ps (2, x, x, 56);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vshufps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vshufps-2.c
new file mode 100644
index 00000000000..ed378d1c40b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vshufps-2.c
@@ -0,0 +1,74 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+void
+CALC (float *e, UNION_TYPE (AVX512F_LEN,) s1, UNION_TYPE (AVX512F_LEN,) s2,
+      int imm)
+{
+  e[0] = s1.a[(imm >> 0) & 0x3];
+  e[1] = s1.a[(imm >> 2) & 0x3];
+  e[2] = s2.a[(imm >> 4) & 0x3];
+  e[3] = s2.a[(imm >> 6) & 0x3];
+#if AVX512F_LEN > 128
+  e[4] = s1.a[4 + ((imm >> 0) & 0x3)];
+  e[5] = s1.a[4 + ((imm >> 2) & 0x3)];
+  e[6] = s2.a[4 + ((imm >> 4) & 0x3)];
+  e[7] = s2.a[4 + ((imm >> 6) & 0x3)];
+#if AVX512F_LEN > 256
+  e[8] = s1.a[8 + ((imm >> 0) & 0x3)];
+  e[9] = s1.a[8 + ((imm >> 2) & 0x3)];
+  e[10] = s2.a[8 + ((imm >> 4) & 0x3)];
+  e[11] = s2.a[8 + ((imm >> 6) & 0x3)];
+  e[12] = s1.a[12 + ((imm >> 0) & 0x3)];
+  e[13] = s1.a[12 + ((imm >> 2) & 0x3)];
+  e[14] = s2.a[12 + ((imm >> 4) & 0x3)];
+  e[15] = s2.a[12 + ((imm >> 6) & 0x3)];
+#endif
+#endif
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN,) u1, u2, u3, s1, s2;
+  float e[SIZE];
+  int i, sign;
+  MASK_TYPE mask = MASK_VALUE;
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = 1.5 + 34.67 * i * sign;
+      s2.a[i] = -22.17 * i * sign;
+      u1.a[i] = DEFAULT_VALUE;
+      u2.a[i] = DEFAULT_VALUE;
+      u3.a[i] = DEFAULT_VALUE;
+      sign = sign * -1;
+    }
+
+
+  u1.x = INTRINSIC (_shuffle_ps) (s1.x, s2.x, 203);
+  u2.x = INTRINSIC (_mask_shuffle_ps) (u2.x, mask, s1.x, s2.x, 203);
+  u3.x = INTRINSIC (_maskz_shuffle_ps) (mask, s1.x, s2.x, 203);
+
+  CALC (e, s1, s2, 203);
+
+  if (UNION_CHECK (AVX512F_LEN,) (u1, e))
+    abort ();
+
+  MASK_MERGE ()(e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (u2, e))
+    abort ();
+
+  MASK_ZERO ()(e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (u3, e))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtpd-1.c
new file mode 100644
index 00000000000..8b5a3d4cbcf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtpd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sqrt_pd (x);
+  x = _mm512_mask_sqrt_pd (x, m, x);
+  x = _mm512_maskz_sqrt_pd (m, x);
+  x = _mm512_sqrt_round_pd (x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_sqrt_round_pd (x, m, x, _MM_FROUND_TO_NEG_INF);
+  x = _mm512_maskz_sqrt_round_pd (m, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtpd-2.c
new file mode 100644
index 00000000000..27b649157f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtpd-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#include <math.h>
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (double *s, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = sqrt(s[i]);
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 123.456 * (i + 2000);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_sqrt_pd) (s.x);
+  res2.x = INTRINSIC (_mask_sqrt_pd) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_sqrt_pd) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_FP_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_FP_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_FP_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtps-1.c
new file mode 100644
index 00000000000..f4fdf5590f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sqrt_ps (x);
+  x = _mm512_mask_sqrt_ps (x, m, x);
+  x = _mm512_maskz_sqrt_ps (m, x);
+  x = _mm512_sqrt_round_ps (x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_sqrt_round_ps (x, m, x, _MM_FROUND_TO_POS_INF);
+  x = _mm512_maskz_sqrt_round_ps (m, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtps-2.c
new file mode 100644
index 00000000000..4fc45e3953f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtps-2.c
@@ -0,0 +1,54 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#include <math.h>
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+static void
+CALC (float *s, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = sqrt(s[i]);
+    }
+}
+
+static void
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN,) s, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s.a[i] = 123.456 * (i + 2000);
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_sqrt_ps) (s.x);
+  res2.x = INTRINSIC (_mask_sqrt_ps) (res2.x, mask, s.x);
+  res3.x = INTRINSIC (_maskz_sqrt_ps) (mask, s.x);
+
+  CALC (s.a, res_ref);
+
+  if (UNION_FP_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_FP_CHECK (AVX512F_LEN,) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_FP_CHECK (AVX512F_LEN,) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtsd-1.c
new file mode 100644
index 00000000000..5814e3ce7f0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtsd-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vsqrtsd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_sqrt_round_sd (x1, x2, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtss-1.c
new file mode 100644
index 00000000000..81e8a0ecde7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vsqrtss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_sqrt_round_ss (x1, x2, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsubpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vsubpd-1.c
new file mode 100644
index 00000000000..47a78c34047
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vsubpd-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sub_pd (x, x);
+  x = _mm512_mask_sub_pd (x, m, x, x);
+  x = _mm512_maskz_sub_pd (m, x, x);
+  x = _mm512_sub_round_pd (x, x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_sub_round_pd (x, m, x, x, _MM_FROUND_TO_NEG_INF);
+  x = _mm512_maskz_sub_round_pd (m, x, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsubpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vsubpd-2.c
new file mode 100644
index 00000000000..a462631b2c3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vsubpd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+CALC (double *r, double *s1, double *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] - s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN, d) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_sub_pd) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_sub_pd) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_sub_pd) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsubps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vsubps-1.c
new file mode 100644
index 00000000000..6d2db1e67d4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vsubps-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\{\]" 6 } } */
+/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 2 } } */
+/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 2 } } */
+/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%zmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x;
+volatile __mmask16 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_sub_ps (x, x);
+  x = _mm512_mask_sub_ps (x, m, x, x);
+  x = _mm512_maskz_sub_ps (m, x, x);
+  x = _mm512_sub_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT);
+  x = _mm512_mask_sub_round_ps (x, m, x, x, _MM_FROUND_TO_POS_INF);
+  x = _mm512_maskz_sub_round_ps (m, x, x, _MM_FROUND_TO_ZERO);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsubps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vsubps-2.c
new file mode 100644
index 00000000000..366b7e74436
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vsubps-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+CALC (float *r, float *s1, float *s2)
+{
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      r[i] = s1[i] - s2[i];
+    }
+}
+
+void static
+TEST (void)
+{
+  int i, sign;
+  UNION_TYPE (AVX512F_LEN,) res1, res2, res3, src1, src2;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+
+  sign = -1;
+  for (i = 0; i < SIZE; i++)
+    {
+      src1.a[i] = 1.5 + 34.67 * i * sign;
+      src2.a[i] = -22.17 * i * sign;
+      sign = sign * -1;
+    }
+  for (i = 0; i < SIZE; i++)
+    res2.a[i] = DEFAULT_VALUE;
+
+  res1.x = INTRINSIC (_sub_ps) (src1.x, src2.x);
+  res2.x = INTRINSIC (_mask_sub_ps) (res2.x, mask, src1.x, src2.x);
+  res3.x = INTRINSIC (_maskz_sub_ps) (mask, src1.x, src2.x);
+
+  CALC (res_ref, src1.a, src2.a);
+
+  if (UNION_CHECK (AVX512F_LEN,) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN,) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsubsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vsubsd-1.c
new file mode 100644
index 00000000000..511ceb40f0e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vsubsd-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vsubsd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128d x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_sub_round_sd (x1, x2, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsubss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vsubss-1.c
new file mode 100644
index 00000000000..618662fcc93
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vsubss-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vsubss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128 x1, x2;
+
+void extern
+avx512f_test (void)
+{
+  x1 = _mm_sub_round_ss (x1, x2, _MM_FROUND_TO_NEAREST_INT);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vucomisd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vucomisd-1.c
new file mode 100644
index 00000000000..da0df762002
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vucomisd-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "vucomisd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm"  } } */
+
+#include <immintrin.h>
+
+volatile __m128d x;
+volatile int res;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm_comi_round_sd (x, x, _CMP_NLE_UQ, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vucomiss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vucomiss-1.c
new file mode 100644
index 00000000000..d4355de0c30
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vucomiss-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "vucomiss\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm"  } } */
+
+#include <immintrin.h>
+
+volatile __m128 x;
+volatile int res;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm_comi_round_ss (x, x, _CMP_EQ_OQ, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vunpckhpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vunpckhpd-1.c
new file mode 100644
index 00000000000..2ce55e4469f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vunpckhpd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vunpckhpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vunpckhpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vunpckhpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x, y, z;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_unpackhi_pd (y, z);
+  x = _mm512_mask_unpackhi_pd (x, m, y, z);
+  x = _mm512_maskz_unpackhi_pd (m, y, z);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vunpckhpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vunpckhpd-2.c
new file mode 100644
index 00000000000..60898bbf22c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vunpckhpd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+void static
+CALC (double *s1, double *s2, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE / 2; i++)
+    {
+      r[2 * i] = s1[2 * i + 1];
+      r[2 * i + 1] = s2[2 * i + 1];
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s1, s2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i * 123.2 + 32.6;
+      s2.a[i] = i + 2.5;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_unpackhi_pd) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_unpackhi_pd) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_unpackhi_pd) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vunpckhps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vunpckhps-1.c
new file mode 100644
index 00000000000..9567272c90a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vunpckhps-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vunpckhps\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vunpckhps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vunpckhps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x, y, z;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_unpackhi_ps (y, z);
+  x = _mm512_mask_unpackhi_ps (x, m, y, z);
+  x = _mm512_maskz_unpackhi_ps (m, y, z);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vunpckhps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vunpckhps-2.c
new file mode 100644
index 00000000000..6047985bc70
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vunpckhps-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+void static
+CALC (float *s1, float *s2, float *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE / 4; i++)
+    {
+      r[4 * i] = s1[4 * i + 2];
+      r[4 * i + 1] = s2[4 * i + 2];
+      r[4 * i + 2] = s1[4 * i + 3];
+      r[4 * i + 3] = s2[4 * i + 3];
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, ) s1, s2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  float res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i * 123.2 + 32.6;
+      s2.a[i] = i + 2.5;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_unpackhi_ps) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_unpackhi_ps) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_unpackhi_ps) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, ) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO () (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vunpcklpd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vunpcklpd-1.c
new file mode 100644
index 00000000000..5a73037846d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vunpcklpd-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vunpcklpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vunpcklpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vunpcklpd\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d x, y, z;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_unpacklo_pd (y, z);
+  x = _mm512_mask_unpacklo_pd (x, m, y, z);
+  x = _mm512_maskz_unpacklo_pd (m, y, z);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vunpcklpd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vunpcklpd-2.c
new file mode 100644
index 00000000000..3317e4acff9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vunpcklpd-2.c
@@ -0,0 +1,55 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 64)
+#include "avx512f-mask-type.h"
+
+void static
+CALC (double *s1, double *s2, double *r)
+{
+  int i;
+
+  for (i = 0; i < SIZE / 2; i++)
+    {
+      r[2 * i] = s1[2 * i];
+      r[2 * i + 1] = s2[2 * i];
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN, d) s1, s2, res1, res2, res3;
+  MASK_TYPE mask = MASK_VALUE;
+  double res_ref[SIZE];
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i * 123.2 + 32.6;
+      s2.a[i] = i + 2.5;
+      res2.a[i] = DEFAULT_VALUE;
+    }
+
+  res1.x = INTRINSIC (_unpacklo_pd) (s1.x, s2.x);
+  res2.x = INTRINSIC (_mask_unpacklo_pd) (res2.x, mask, s1.x, s2.x);
+  res3.x = INTRINSIC (_maskz_unpacklo_pd) (mask, s1.x, s2.x);
+
+  CALC (s1.a, s2.a, res_ref);
+
+  if (UNION_CHECK (AVX512F_LEN, d) (res1, res_ref))
+    abort ();
+
+  MASK_MERGE (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res2, res_ref))
+    abort ();
+
+  MASK_ZERO (d) (res_ref, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, d) (res3, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vunpcklps-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vunpcklps-1.c
new file mode 100644
index 00000000000..a007a050b05
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vunpcklps-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler-times "vunpcklps\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "vunpcklps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\{z\}" 1 } } */
+/* { dg-final { scan-assembler-times "vunpcklps\[ \\t\]+\[^\n\]*%zmm\[0-9\]\{%k\[1-7\]\}\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 x, y, z;
+
+void extern
+avx512f_test (void)
+{
+  x = _mm512_unpacklo_ps (y, z);
+  x = _mm512_mask_unpacklo_ps (x, 2, y, z);
+  x = _mm512_maskz_unpacklo_ps (2, y, z);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vunpcklps-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vunpcklps-2.c
new file mode 100644
index 00000000000..538a9fa80ec
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vunpcklps-2.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 32)
+#include "avx512f-mask-type.h"
+
+void static
+CALC (float *e, float *s1, float *s2)
+{
+  int i;
+  for (i = 0; i < SIZE / 4; i++)
+    {
+      e[4 * i] = s1[4 * i];
+      e[4 * i + 1] = s2[4 * i];
+      e[4 * i + 2] = s1[4 * i + 1];
+      e[4 * i + 3] = s2[4 * i + 1];
+    }
+}
+
+void static
+TEST (void)
+{
+  UNION_TYPE (AVX512F_LEN,) s1, s2, u1, u2, u3;
+  MASK_TYPE mask = MASK_VALUE;
+  float e[SIZE];
+  int i;
+  for (i = 0; i < SIZE; i++)
+    {
+      s1.a[i] = i * 123.2 + 32.6;
+      s2.a[i] = i + 2.5;
+      u1.a[i]= DEFAULT_VALUE;
+      u2.a[i]= DEFAULT_VALUE;
+      u3.a[i]= DEFAULT_VALUE;
+    }
+
+  u1.x = INTRINSIC (_unpacklo_ps) (s1.x, s2.x);
+  u2.x = INTRINSIC (_mask_unpacklo_ps) (u2.x, mask, s1.x, s2.x);
+  u3.x = INTRINSIC (_maskz_unpacklo_ps) (mask, s1.x, s2.x);
+
+  CALC (e, s1.a, s2.a);
+
+  if (UNION_CHECK (AVX512F_LEN,) (u1, e))
+    abort ();
+
+  MASK_MERGE () (e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (u2, e))
+    abort ();
+
+  MASK_ZERO () (e, mask, SIZE);
+  if (UNION_CHECK (AVX512F_LEN, ) (u3, e))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f_cond_move.c b/gcc/testsuite/gcc.target/i386/avx512f_cond_move.c
new file mode 100644
index 00000000000..c06ee263174
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f_cond_move.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mavx512f" } */
+/* { dg-final { scan-assembler "(vpblendmd|vmovdqa32)" } } */
+
+unsigned int x[128];
+unsigned int y[128];
+
+void
+foo () 
+{
+  int i;
+  for (i = 0; i < 128; i++)
+    x[i] = y[i] > 3 ? 2 : 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f_evex_reg_asm-1.c b/gcc/testsuite/gcc.target/i386/avx512f_evex_reg_asm-1.c
new file mode 100644
index 00000000000..34a43537841
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f_evex_reg_asm-1.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f -ffixed-xmm0 -ffixed-xmm1 -ffixed-xmm2 -ffixed-xmm3 -ffixed-xmm4 -ffixed-xmm5 -ffixed-xmm6 -ffixed-xmm7 -ffixed-xmm8 -ffixed-xmm9 -ffixed-xmm10 -ffixed-xmm11 -ffixed-xmm12 -ffixed-xmm13 -ffixed-xmm14 -ffixed-xmm15" } */
+
+volatile float a,b,c,d;
+
+void foo()
+{
+     __asm__ __volatile__( "vcmpss $1,%1, %2,%3;" : "=x"(c) : "x"(a),"x"(b),"x"(d) );/* { dg-error "inconsistent operand constraints" } */
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f_evex_reg_asm-2.c b/gcc/testsuite/gcc.target/i386/avx512f_evex_reg_asm-2.c
new file mode 100644
index 00000000000..a0a268559a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f_evex_reg_asm-2.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-O2 -mavx512f -ffixed-xmm0 -ffixed-xmm1 -ffixed-xmm2 -ffixed-xmm3 -ffixed-xmm4 -ffixed-xmm5 -ffixed-xmm6 -ffixed-xmm7 -ffixed-xmm8 -ffixed-xmm9 -ffixed-xmm10 -ffixed-xmm11 -ffixed-xmm12 -ffixed-xmm13 -ffixed-xmm14 -ffixed-xmm15" } */
+/* { dg-final { scan-assembler "vaddss\[ \\t\]+\[^\n\]*%xmm(1\[6-9\]|2\[0-9\]|3\[0-1\])\[^\{\]" } } */
+
+volatile float a, b, c, d;
+
+void foo()
+{
+  __asm__ __volatile__( "vaddss %1, %2, %3;" : "=v"(c) : "v"(a),"v"(b),"v"(d) );
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vgatherpf0dps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vgatherpf0dps-1.c
new file mode 100644
index 00000000000..a688beceb90
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vgatherpf0dps-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512pf -O2" } */
+/* { dg-final { scan-assembler-times "vgatherpf0dps\[ \\t\]+\[^\n\]*\{%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i idx;
+volatile __mmask16 m16;
+int *base;
+
+void extern
+avx512pf_test (void)
+{
+  _mm512_mask_prefetch_i32gather_ps (idx, m16, base, 8, 0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vgatherpf0qps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vgatherpf0qps-1.c
new file mode 100644
index 00000000000..9501adf74e9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vgatherpf0qps-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512pf -O2" } */
+/* { dg-final { scan-assembler-times "vgatherpf0qps\[ \\t\]+\[^\n\]*\{%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i idx;
+volatile __mmask8 m8;
+int *base;
+
+void extern
+avx512pf_test (void)
+{
+  _mm512_mask_prefetch_i64gather_ps (idx, m8, base, 8, 0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vgatherpf1dps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vgatherpf1dps-1.c
new file mode 100644
index 00000000000..6557afd1466
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vgatherpf1dps-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512pf -O2" } */
+/* { dg-final { scan-assembler-times "vgatherpf1dps\[ \\t\]+\[^\n\]*\{%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i idx;
+volatile __mmask16 m16;
+int *base;
+
+void extern
+avx512pf_test (void)
+{
+  _mm512_mask_prefetch_i32gather_ps (idx, m16, base, 8, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vgatherpf1qps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vgatherpf1qps-1.c
new file mode 100644
index 00000000000..b0bdfa77b0b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vgatherpf1qps-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512pf -O2" } */
+/* { dg-final { scan-assembler-times "vgatherpf1qps\[ \\t\]+\[^\n\]*\{%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i idx;
+volatile __mmask8 m8;
+int *base;
+
+void extern
+avx512pf_test (void)
+{
+  _mm512_mask_prefetch_i64gather_ps (idx, m8, base, 8, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dps-1.c
new file mode 100644
index 00000000000..7ad7544a928
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dps-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512pf -O2" } */
+/* { dg-final { scan-assembler-times "vscatterpf0dps\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vscatterpf0dps\[ \\t\]+\[^\n\]*\{%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i idx;
+volatile __mmask16 m16;
+int *base;
+
+void extern
+avx512pf_test (void)
+{
+  _mm512_prefetch_i32scatter_ps (base, idx, 8, 0);
+  _mm512_mask_prefetch_i32scatter_ps (base, m16, idx, 8, 0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qps-1.c
new file mode 100644
index 00000000000..5d143c5f65e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qps-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512pf -O2" } */
+/* { dg-final { scan-assembler-times "vscatterpf0qps\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vscatterpf0qps\[ \\t\]+\[^\n\]*\{%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i idx;
+volatile __mmask8 m8;
+int *base;
+
+void extern
+avx512pf_test (void)
+{
+  _mm512_prefetch_i64scatter_ps (base, idx, 8, 0);
+  _mm512_mask_prefetch_i64scatter_ps (base, m8, idx, 8, 0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dps-1.c
new file mode 100644
index 00000000000..b97c38db5d5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dps-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512pf -O2" } */
+/* { dg-final { scan-assembler-times "vscatterpf1dps\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vscatterpf1dps\[ \\t\]+\[^\n\]*\{%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i idx;
+volatile __mmask16 m16;
+int *base;
+
+void extern
+avx512pf_test (void)
+{
+  _mm512_prefetch_i32scatter_ps (base, idx, 8, 1);
+  _mm512_mask_prefetch_i32scatter_ps (base, m16, idx, 8, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qps-1.c
new file mode 100644
index 00000000000..6d6be11e451
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qps-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512pf -O2" } */
+/* { dg-final { scan-assembler-times "vscatterpf1qps\[ \\t\]+\[^\n\]*%zmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "vscatterpf1qps\[ \\t\]+\[^\n\]*\{%k\[1-7\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i idx;
+volatile __mmask8 m8;
+int *base;
+
+void extern
+avx512pf_test (void)
+{
+  _mm512_prefetch_i64scatter_ps (base, idx, 8, 1);
+  _mm512_mask_prefetch_i64scatter_ps (base, m8, idx, 8, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/funcspec-5.c b/gcc/testsuite/gcc.target/i386/funcspec-5.c
index df97a2d7bdb..0acfe000da7 100644
--- a/gcc/testsuite/gcc.target/i386/funcspec-5.c
+++ b/gcc/testsuite/gcc.target/i386/funcspec-5.c
@@ -17,7 +17,9 @@ extern void test_sse4 (void)			__attribute__((__target__("sse4")));
 extern void test_sse4_1 (void)			__attribute__((__target__("sse4.1")));
 extern void test_sse4_2 (void)			__attribute__((__target__("sse4.2")));
 extern void test_sse4a (void)			__attribute__((__target__("sse4a")));
+extern void test_fma (void)			__attribute__((__target__("fma")));
 extern void test_fma4 (void)			__attribute__((__target__("fma4")));
+extern void test_xop (void)			__attribute__((__target__("xop")));
 extern void test_ssse3 (void)			__attribute__((__target__("ssse3")));
 extern void test_tbm (void)			__attribute__((__target__("tbm")));
 extern void test_avx (void)			__attribute__((__target__("avx")));
@@ -37,7 +39,9 @@ extern void test_no_sse4 (void)			__attribute__((__target__("no-sse4")));
 extern void test_no_sse4_1 (void)		__attribute__((__target__("no-sse4.1")));
 extern void test_no_sse4_2 (void)		__attribute__((__target__("no-sse4.2")));
 extern void test_no_sse4a (void)		__attribute__((__target__("no-sse4a")));
+extern void test_no_fma (void)			__attribute__((__target__("no-fma")));
 extern void test_no_fma4 (void)			__attribute__((__target__("no-fma4")));
+extern void test_no_xop (void)			__attribute__((__target__("no-xop")));
 extern void test_no_ssse3 (void)		__attribute__((__target__("no-ssse3")));
 extern void test_no_tbm (void)			__attribute__((__target__("no-tbm")));
 extern void test_no_avx (void)			__attribute__((__target__("no-avx")));
@@ -63,6 +67,9 @@ extern void test_arch_pentium4m (void)		__attribute__((__target__("arch=pentium4
 extern void test_arch_prescott (void)		__attribute__((__target__("arch=prescott")));
 extern void test_arch_nocona (void)		__attribute__((__target__("arch=nocona")));
 extern void test_arch_core2 (void)		__attribute__((__target__("arch=core2")));
+extern void test_arch_corei7 (void)		__attribute__((__target__("arch=corei7")));
+extern void test_arch_corei7_avx (void)		__attribute__((__target__("arch=corei7-avx")));
+extern void test_arch_core_avx2 (void)		__attribute__((__target__("arch=core-avx2")));
 extern void test_arch_geode (void)		__attribute__((__target__("arch=geode")));
 extern void test_arch_k6 (void)			__attribute__((__target__("arch=k6")));
 extern void test_arch_k6_2 (void)		__attribute__((__target__("arch=k6-2")));
@@ -81,6 +88,9 @@ extern void test_arch_athlon64_sse3 (void)	__attribute__((__target__("arch=athlo
 extern void test_arch_athlon_fx (void)		__attribute__((__target__("arch=athlon-fx")));
 extern void test_arch_amdfam10 (void)		__attribute__((__target__("arch=amdfam10")));
 extern void test_arch_barcelona (void)		__attribute__((__target__("arch=barcelona")));
+extern void test_arch_bdver1 (void)		__attribute__((__target__("arch=bdver1")));
+extern void test_arch_bdver2 (void)		__attribute__((__target__("arch=bdver2")));
+extern void test_arch_bdver3 (void)		__attribute__((__target__("arch=bdver3")));
 extern void test_arch_foo (void)		__attribute__((__target__("arch=foo"))); /* { dg-error "bad value" } */
 
 extern void test_tune_i386 (void)		__attribute__((__target__("tune=i386")));
@@ -103,6 +113,9 @@ extern void test_tune_pentium4m (void)		__attribute__((__target__("tune=pentium4
 extern void test_tune_prescott (void)		__attribute__((__target__("tune=prescott")));
 extern void test_tune_nocona (void)		__attribute__((__target__("tune=nocona")));
 extern void test_tune_core2 (void)		__attribute__((__target__("tune=core2")));
+extern void test_tune_corei7 (void)		__attribute__((__target__("tune=corei7")));
+extern void test_tune_corei7_avx (void)		__attribute__((__target__("tune=corei7-avx")));
+extern void test_tune_core_avx2 (void)		__attribute__((__target__("tune=core-avx2")));
 extern void test_tune_geode (void)		__attribute__((__target__("tune=geode")));
 extern void test_tune_k6 (void)			__attribute__((__target__("tune=k6")));
 extern void test_tune_k6_2 (void)		__attribute__((__target__("tune=k6-2")));
@@ -121,6 +134,9 @@ extern void test_tune_athlon64_sse3 (void)	__attribute__((__target__("tune=athlo
 extern void test_tune_athlon_fx (void)		__attribute__((__target__("tune=athlon-fx")));
 extern void test_tune_amdfam10 (void)		__attribute__((__target__("tune=amdfam10")));
 extern void test_tune_barcelona (void)		__attribute__((__target__("tune=barcelona")));
+extern void test_tune_bdver1 (void)		__attribute__((__target__("tune=bdver1")));
+extern void test_tune_bdver2 (void)		__attribute__((__target__("tune=bdver2")));
+extern void test_tune_bdver3 (void)		__attribute__((__target__("tune=bdver3")));
 extern void test_tune_generic (void)		__attribute__((__target__("tune=generic")));
 extern void test_tune_foo (void)		__attribute__((__target__("tune=foo"))); /* { dg-error "bad value" } */
 
diff --git a/gcc/testsuite/gcc.target/i386/i386.exp b/gcc/testsuite/gcc.target/i386/i386.exp
index c7c26766bc2..080e302b782 100644
--- a/gcc/testsuite/gcc.target/i386/i386.exp
+++ b/gcc/testsuite/gcc.target/i386/i386.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 1997-2013 Free Software Foundation, Inc.
+# Copyright (C) 1997-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
@@ -253,6 +253,60 @@ proc check_effective_target_rtm { } {
     } "-mrtm" ]
 }
 
+# Return 1 if avx512f instructions can be compiled.
+proc check_effective_target_avx512f { } {
+    return [check_no_compiler_messages avx512f object {
+	typedef long long __v8di __attribute__ ((__vector_size__ (64)));
+	__v8di
+	mm512_and_epi64  (__v8di __X, __v8di __Y)
+	{
+            __v8di __W;
+            return __builtin_ia32_pandq512_mask (__X, __Y, __W, -1);
+	}
+    } "-mavx512f" ]
+}
+
+# Return 1 if avx512cd instructions can be compiled.
+proc check_effective_target_avx512cd { } {
+    return [check_no_compiler_messages avx512cd_trans object {
+	typedef long long __v8di __attribute__ ((__vector_size__ (64)));
+	__v8di
+	_mm512_conflict_epi64 (__v8di __W, __v8di __A)
+	{
+	  return (__v8di) __builtin_ia32_vpconflictdi_512_mask ((__v8di) __A,
+		  						 (__v8di) __W,
+			  					 -1);
+	}
+   } "-Wno-psabi -mavx512cd" ]
+}
+
+# Return 1 if avx512er instructions can be compiled.
+proc check_effective_target_avx512er { } {
+    return [check_no_compiler_messages avx512er_trans object {
+	typedef float __v16sf __attribute__ ((__vector_size__ (64)));
+	__v16sf
+	mm512_exp2a23_ps  (__v16sf __X)
+	{
+        __v16sf __W;
+	    return __builtin_ia32_exp2ps_mask (__X, __W, -1, 4);
+	}
+   } "-Wno-psabi -mavx512er" ]
+}
+
+# Return 1 if sha instructions can be compiled.
+proc check_effective_target_sha { } {
+    return [check_no_compiler_messages sha object {
+	typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+	typedef int __v4si __attribute__ ((__vector_size__ (16)));
+
+	__m128i _mm_sha1msg1_epu32 (__m128i __X, __m128i __Y)
+	{
+            return (__m128i) __builtin_ia32_sha1msg1 ((__v4si)__X,
+						      (__v4si)__Y);
+	}
+    } "-O2 -msha" ]
+}
+
 # If the linker used understands -M <mapfile>, pass it to clear hardware
 # capabilities set by the Sun assembler.
 # Try mapfile syntax v2 first which is the only way to clear hwcap_2 flags.
diff --git a/gcc/testsuite/gcc.target/i386/m128-check.h b/gcc/testsuite/gcc.target/i386/m128-check.h
index 4e2deecb172..6336717280f 100644
--- a/gcc/testsuite/gcc.target/i386/m128-check.h
+++ b/gcc/testsuite/gcc.target/i386/m128-check.h
@@ -164,3 +164,26 @@ union ieee754_double
    } bits __attribute__((packed));
 };
 #endif
+
+#define CHECK_FP_EXP(UINON_TYPE, VALUE_TYPE, ESP, FMT)		\
+static int							\
+__attribute__((noinline, unused))				\
+check_fp_##UINON_TYPE (UINON_TYPE u, const VALUE_TYPE *v)	\
+{								\
+  int i;							\
+  int err = 0;							\
+								\
+  for (i = 0; i < ARRAY_SIZE (u.a); i++)			\
+    if (u.a[i] > (v[i] + (ESP)) || u.a[i] < (v[i] - (ESP)))	\
+      {								\
+	err++;							\
+	PRINTF ("%i: " FMT " != " FMT "\n",			\
+		i, v[i], u.a[i]);				\
+      }								\
+  return err;							\
+}
+
+CHECK_FP_EXP (union128, float, ESP_FLOAT, "%f")
+#ifdef __SSE2__
+CHECK_FP_EXP (union128d, double, ESP_DOUBLE, "%f")
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/m512-check.h b/gcc/testsuite/gcc.target/i386/m512-check.h
new file mode 100644
index 00000000000..3209039d6d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/m512-check.h
@@ -0,0 +1,73 @@
+#include <immintrin.h>
+#include "m256-check.h"
+
+typedef union
+{
+  __m512i x;
+  char a[64];
+} union512i_b;
+
+typedef union
+{
+  __m512i x;
+  short a[32];
+} union512i_w;
+
+typedef union
+{
+  __m512i x;
+  int a[16];
+} union512i_d;
+
+typedef union
+{
+  __m512i x;
+  long long a[8];
+} union512i_q;
+
+typedef union
+{
+  __m512 x;
+  float a[16];
+} union512;
+
+typedef union
+{
+  __m512d x;
+  double a[8];
+} union512d;
+
+CHECK_EXP (union512i_b, char, "%d")
+CHECK_EXP (union512i_w, short, "%d")
+CHECK_EXP (union512i_d, int, "0x%x")
+CHECK_EXP (union512i_q, long long, "0x%llx")
+CHECK_EXP (union512, float, "%f")
+CHECK_EXP (union512d, double, "%f")
+
+CHECK_FP_EXP (union512, float, ESP_FLOAT, "%f")
+CHECK_FP_EXP (union512d, double, ESP_DOUBLE, "%f")
+
+#define CHECK_ROUGH_EXP(UINON_TYPE, VALUE_TYPE, FMT)		\
+static int							\
+__attribute__((noinline, unused))				\
+check_rough_##UINON_TYPE (UINON_TYPE u, const VALUE_TYPE *v,	\
+			  VALUE_TYPE eps)			\
+{								\
+  int i;							\
+  int err = 0;							\
+								\
+  for (i = 0; i < ARRAY_SIZE (u.a); i++)			\
+    {								\
+      VALUE_TYPE rel_err = (u.a[i] - v[i]) / v[i];		\
+      if (((rel_err < 0) ? -rel_err : rel_err) > eps)		\
+	{							\
+	  err++;						\
+	  PRINTF ("%i: " FMT " != " FMT "\n",			\
+		  i, v[i], u.a[i]);				\
+	}							\
+    }								\
+  return err;							\
+}
+
+CHECK_ROUGH_EXP (union512, float, "%f")
+CHECK_ROUGH_EXP (union512d, double, "%f")
diff --git a/gcc/testsuite/gcc.target/i386/math-torture/math-torture.exp b/gcc/testsuite/gcc.target/i386/math-torture/math-torture.exp
index bea35516c73..112fb33add1 100644
--- a/gcc/testsuite/gcc.target/i386/math-torture/math-torture.exp
+++ b/gcc/testsuite/gcc.target/i386/math-torture/math-torture.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2006-2013 Free Software Foundation, Inc.
+# Copyright (C) 2006-2014 Free Software Foundation, Inc.
 #
 # This file is part of GCC.
 #
diff --git a/gcc/testsuite/gcc.target/i386/pr49002-2.c b/gcc/testsuite/gcc.target/i386/pr49002-2.c
index 9f21a2d17d9..dfb83b4a75d 100644
--- a/gcc/testsuite/gcc.target/i386/pr49002-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr49002-2.c
@@ -12,4 +12,4 @@ void foo(const __m128d from, __m256d *to)
 /* Ensure we store ymm, not xmm.  */
 /* { dg-final { scan-assembler-not "vmovapd\[\t \]*%xmm\[0-9\]\+,\[^,\]*" } } */
 /* { dg-final { scan-assembler-not "vmovaps\[\t \]*%xmm\[0-9\]\+,\[^,\]*" } } */
-/* { dg-final { scan-assembler "vmovaps\[\t \]*%ymm\[0-9\]\+,\[^,\]*" } } */
+/* { dg-final { scan-assembler "vmovap\[sd\]\[\t \]*%ymm\[0-9\]\+,\[^,\]*" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-1.c b/gcc/testsuite/gcc.target/i386/pr59501-1.c
new file mode 100644
index 00000000000..6a104eef1ad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-1.c
@@ -0,0 +1,30 @@
+/* PR target/59501 */
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx -mno-accumulate-outgoing-args" } */
+
+#define CHECK_H "avx-check.h"
+#define TEST avx_test
+
+#include CHECK_H
+
+typedef double V __attribute__ ((vector_size (32)));
+
+__attribute__((noinline, noclone)) V
+foo (double *x, unsigned *y)
+{
+  V r = { x[y[0]], x[y[1]], x[y[2]], x[y[3]] };
+  return r;
+}
+
+static void
+TEST (void)
+{
+  double a[16];
+  unsigned b[4] = { 5, 0, 15, 7 };
+  int i;
+  for (i = 0; i < 16; i++)
+    a[i] = 0.5 + i;
+  V v = foo (a, b);
+  if (v[0] != 5.5 || v[1] != 0.5 || v[2] != 15.5 || v[3] != 7.5)
+    __builtin_abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-1a.c b/gcc/testsuite/gcc.target/i386/pr59501-1a.c
new file mode 100644
index 00000000000..5b468e55635
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-1a.c
@@ -0,0 +1,17 @@
+/* PR target/59501 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mavx -mno-accumulate-outgoing-args" } */
+
+typedef double V __attribute__ ((vector_size (32)));
+
+V
+foo (double *x, unsigned *y)
+{
+  V r = { x[y[0]], x[y[1]], x[y[2]], x[y[3]] };
+  return r;
+}
+
+/* Verify no dynamic realignment is performed.  */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*sp" } } */
+/* And DRAP isn't needed either.  */
+/* { dg-final { scan-assembler-not "r10" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-2.c b/gcc/testsuite/gcc.target/i386/pr59501-2.c
new file mode 100644
index 00000000000..8ce177deb8e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-2.c
@@ -0,0 +1,5 @@
+/* PR target/59501 */
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx -maccumulate-outgoing-args" } */
+
+#include "pr59501-1.c"
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-2a.c b/gcc/testsuite/gcc.target/i386/pr59501-2a.c
new file mode 100644
index 00000000000..c0fe3626961
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-2a.c
@@ -0,0 +1,10 @@
+/* PR target/59501 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mavx -maccumulate-outgoing-args" } */
+
+#include "pr59501-1a.c"
+
+/* Verify no dynamic realignment is performed.  */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*sp" } } */
+/* And DRAP isn't needed either.  */
+/* { dg-final { scan-assembler-not "r10" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-3.c b/gcc/testsuite/gcc.target/i386/pr59501-3.c
new file mode 100644
index 00000000000..0bf5ef6139a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-3.c
@@ -0,0 +1,30 @@
+/* PR target/59501 */
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx -mno-accumulate-outgoing-args" } */
+
+#define CHECK_H "avx-check.h"
+#define TEST avx_test
+
+#include CHECK_H
+
+typedef double V __attribute__ ((vector_size (32)));
+
+__attribute__((noinline, noclone)) V
+foo (double *x, int a, int b, int c, int d, int e, int f, unsigned *y)
+{
+  V r = { x[y[0]], x[y[1]], x[y[2]], x[y[3]] };
+  return r;
+}
+
+static void
+TEST (void)
+{
+  double a[16];
+  unsigned b[4] = { 5, 0, 15, 7 };
+  int i;
+  for (i = 0; i < 16; i++)
+    a[i] = 0.5 + i;
+  V v = foo (a, 0, 0, 0, 0, 0, 0, b);
+  if (v[0] != 5.5 || v[1] != 0.5 || v[2] != 15.5 || v[3] != 7.5)
+    __builtin_abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-3a.c b/gcc/testsuite/gcc.target/i386/pr59501-3a.c
new file mode 100644
index 00000000000..ded4336fc88
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-3a.c
@@ -0,0 +1,15 @@
+/* PR target/59501 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mavx -mno-accumulate-outgoing-args" } */
+
+typedef double V __attribute__ ((vector_size (32)));
+
+V
+foo (double *x, int a, int b, int c, int d, int e, int f, unsigned *y)
+{
+  V r = { x[y[0]], x[y[1]], x[y[2]], x[y[3]] };
+  return r;
+}
+
+/* Verify no dynamic realignment is performed.  */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*sp" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-4.c b/gcc/testsuite/gcc.target/i386/pr59501-4.c
new file mode 100644
index 00000000000..43a5ad2428a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-4.c
@@ -0,0 +1,5 @@
+/* PR target/59501 */
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx -maccumulate-outgoing-args" } */
+
+#include "pr59501-3.c"
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-4a.c b/gcc/testsuite/gcc.target/i386/pr59501-4a.c
new file mode 100644
index 00000000000..5c3cb683a2e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-4a.c
@@ -0,0 +1,8 @@
+/* PR target/59501 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mavx -maccumulate-outgoing-args" } */
+
+#include "pr59501-3a.c"
+
+/* Verify no dynamic realignment is performed.  */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*sp" { xfail *-*-* } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-5.c b/gcc/testsuite/gcc.target/i386/pr59501-5.c
new file mode 100644
index 00000000000..f2feca8ec4f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-5.c
@@ -0,0 +1,39 @@
+/* PR target/59501 */
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx -mno-accumulate-outgoing-args" } */
+
+#define CHECK_H "avx-check.h"
+#define TEST avx_test
+
+#include CHECK_H
+
+typedef double V __attribute__ ((vector_size (32)));
+
+__attribute__((noinline, noclone)) void
+bar (char *p)
+{
+  p[0] = 1;
+  p[37] = 2;
+  asm volatile ("" : : "r" (p) : "memory");
+}
+
+__attribute__((noinline, noclone)) V
+foo (double *x, int a, int b, int c, int d, int e, int f, unsigned *y)
+{
+  bar (__builtin_alloca (a + b + c + d + e + f));
+  V r = { x[y[0]], x[y[1]], x[y[2]], x[y[3]] };
+  return r;
+}
+
+static void
+TEST (void)
+{
+  double a[16];
+  unsigned b[4] = { 5, 0, 15, 7 };
+  int i;
+  for (i = 0; i < 16; i++)
+    a[i] = 0.5 + i;
+  V v = foo (a, 0, 30, 0, 0, 8, 0, b);
+  if (v[0] != 5.5 || v[1] != 0.5 || v[2] != 15.5 || v[3] != 7.5)  
+    __builtin_abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-6.c b/gcc/testsuite/gcc.target/i386/pr59501-6.c
new file mode 100644
index 00000000000..d0ac2425b90
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-6.c
@@ -0,0 +1,5 @@
+/* PR target/59501 */
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx -maccumulate-outgoing-args" } */
+
+#include "pr59501-5.c"
diff --git a/gcc/testsuite/gcc.target/i386/pr59539-1.c b/gcc/testsuite/gcc.target/i386/pr59539-1.c
new file mode 100644
index 00000000000..9b34053c4cb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59539-1.c
@@ -0,0 +1,16 @@
+/* PR target/59539 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx" } */
+
+#include <immintrin.h>
+
+int
+foo (void *p1, void *p2)
+{
+  __m128i d1 = _mm_loadu_si128 ((__m128i *) p1);
+  __m128i d2 = _mm_loadu_si128 ((__m128i *) p2);
+  __m128i result = _mm_cmpeq_epi16 (d1, d2);
+  return _mm_movemask_epi8 (result);
+}
+
+/* { dg-final { scan-assembler-times "vmovdqu" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr59539-2.c b/gcc/testsuite/gcc.target/i386/pr59539-2.c
new file mode 100644
index 00000000000..b53b8c407ab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59539-2.c
@@ -0,0 +1,16 @@
+/* PR target/59539 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx2" } */
+
+#include <immintrin.h>
+
+int
+foo (void *p1, void *p2)
+{
+  __m256i d1 = _mm256_loadu_si256 ((__m256i *) p1);
+  __m256i d2 = _mm256_loadu_si256 ((__m256i *) p2);
+  __m256i result = _mm256_cmpeq_epi16 (d1, d2);
+  return _mm256_movemask_epi8 (result);
+}
+
+/* { dg-final { scan-assembler-times "vmovdqu" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr59544.c b/gcc/testsuite/gcc.target/i386/pr59544.c
new file mode 100644
index 00000000000..5499a53d954
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59544.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx -ftree-vectorize -fdump-tree-vect-details" } */
+
+void test1(short * __restrict__ x, short * __restrict__ y, short * __restrict__ z)
+{
+    int i;
+    for (i=127; i>=0; i--) {
+	x[i] = y[127-i] + z[127-i];
+    }
+}
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr59588-1.c b/gcc/testsuite/gcc.target/i386/pr59588-1.c
new file mode 100644
index 00000000000..6f5fb7238ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59588-1.c
@@ -0,0 +1,7 @@
+/* { dg-do preprocess } */
+/* { dg-require-effective-target ia32 } */
+/* { dg-options "-march=i686" } */
+
+#ifndef __tune_i686__
+#error "__tune_i686__ should be defined for this test"
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/pr59588-2.c b/gcc/testsuite/gcc.target/i386/pr59588-2.c
new file mode 100644
index 00000000000..7c427e3e1cb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59588-2.c
@@ -0,0 +1,7 @@
+/* { dg-do preprocess } */
+/* { dg-require-effective-target ia32 } */
+/* { dg-options "-mtune=i686" } */
+
+#ifndef __tune_i686__
+#error "__tune_i686__ should be defined for this test"
+#endif
diff --git a/gcc/testsuite/gcc.target/i386/pr59591-1.c b/gcc/testsuite/gcc.target/i386/pr59591-1.c
new file mode 100644
index 00000000000..a88c6fd9365
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59591-1.c
@@ -0,0 +1,17 @@
+/* PR tree-optimization/59591 */
+/* { dg-do run } */
+/* { dg-options "-O2 -fopenmp-simd -mavx2 -fno-vect-cost-model" } */
+/* { dg-require-effective-target avx2 } */
+
+#define CHECK_H "avx2-check.h"
+#define TEST avx2_test
+
+#include "../../gcc.dg/vect/pr59591-1.c"
+
+#include CHECK_H
+
+static void
+TEST (void)
+{
+  bar ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr59591-2.c b/gcc/testsuite/gcc.target/i386/pr59591-2.c
new file mode 100644
index 00000000000..c0323649b49
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59591-2.c
@@ -0,0 +1,17 @@
+/* PR tree-optimization/59591 */
+/* { dg-do run } */
+/* { dg-options "-O2 -fopenmp-simd -mavx2 -fno-vect-cost-model" } */
+/* { dg-require-effective-target avx2 } */
+
+#define CHECK_H "avx2-check.h"
+#define TEST avx2_test
+
+#include "../../gcc.dg/vect/pr59591-2.c"
+
+#include CHECK_H
+
+static void
+TEST (void)
+{
+  bar ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr59625.c b/gcc/testsuite/gcc.target/i386/pr59625.c
new file mode 100644
index 00000000000..8e1a7794bc4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59625.c
@@ -0,0 +1,36 @@
+/* PR target/59625 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=atom" } */
+
+int
+foo (void)
+{
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  asm goto ("" : : : : lab);
+  return 0;
+lab:
+  return 1;
+}
+
+/* Verify we don't consider asm goto as a jump for four jumps limit
+   optimization.  asm goto doesn't have to contain a jump at all,
+   the branching to labels can happen through different means.  */
+/* { dg-final { scan-assembler-not "(p2align\[^\n\r\]*\[\n\r]*\[^\n\r\]*){8}p2align" } } */
diff --git a/gcc/testsuite/gcc.target/i386/sha-check.h b/gcc/testsuite/gcc.target/i386/sha-check.h
new file mode 100644
index 00000000000..e0a18076e15
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha-check.h
@@ -0,0 +1,37 @@
+#include <stdlib.h>
+#include "cpuid.h"
+
+static void sha_test (void);
+
+static void
+__attribute__ ((noinline))
+do_test (void)
+{
+  sha_test ();
+}
+
+int
+main ()
+{
+  unsigned int eax, ebx, ecx, edx;
+
+  if (__get_cpuid_max (0, NULL) >= 7)
+    {
+      __cpuid_count (7, 0, eax, ebx, ecx, edx);
+
+      /* Run SHA test only if host has SHA support.  */
+      if (ebx & bit_SHA)
+	{
+	  do_test ();
+#ifdef DEBUG
+	  printf ("PASSED\n");
+#endif
+	  return 0;
+	}
+    }
+
+#ifdef DEBUG
+  printf ("SKIPPED\n");
+#endif
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha1msg1-1.c b/gcc/testsuite/gcc.target/i386/sha1msg1-1.c
new file mode 100644
index 00000000000..808f3617f8e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha1msg1-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-final { scan-assembler "sha1msg1\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+volatile __m128i x;
+
+void extern
+sha_test (void)
+{
+  x = _mm_sha1msg1_epu32 (x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha1msg1-2.c b/gcc/testsuite/gcc.target/i386/sha1msg1-2.c
new file mode 100644
index 00000000000..35a60571f86
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha1msg1-2.c
@@ -0,0 +1,42 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-require-effective-target sha } */
+
+#include "sha-check.h"
+#include "m128-check.h"
+#include <immintrin.h>
+
+static void
+compute_sha1msg1 (int *s1, int *s2, int *r)
+{
+  int w0, w1, w2, w3, w4, w5;
+
+  w0 = s1[3];
+  w1 = s1[2];
+  w2 = s1[1];
+  w3 = s1[0];
+  w4 = s2[3];
+  w5 = s2[2];
+
+  r[0] = w5 ^ w3;
+  r[1] = w4 ^ w2;
+  r[2] = w3 ^ w1;
+  r[3] = w2 ^ w0;
+}
+
+static void
+sha_test (void)
+{
+  union128i_d s1, s2, res;
+  int res_ref[4];
+
+  s1.x = _mm_set_epi32 (111, 222, 333, 444);
+  s2.x = _mm_set_epi32 (555, 666, 0, 0);
+
+  res.x = _mm_sha1msg1_epu32 (s1.x, s2.x);
+
+  compute_sha1msg1 (s1.a, s2.a, res_ref);
+
+  if (check_union128i_d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha1msg2-1.c b/gcc/testsuite/gcc.target/i386/sha1msg2-1.c
new file mode 100644
index 00000000000..9c0ffc13f6d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha1msg2-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-final { scan-assembler "sha1msg2\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+volatile __m128i x;
+
+void extern
+sha_test (void)
+{
+  x = _mm_sha1msg2_epu32 (x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha1msg2-2.c b/gcc/testsuite/gcc.target/i386/sha1msg2-2.c
new file mode 100644
index 00000000000..21eaf8dd9fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha1msg2-2.c
@@ -0,0 +1,44 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-require-effective-target sha } */
+
+#include "sha-check.h"
+#include "m128-check.h"
+#include <x86intrin.h>
+#include <immintrin.h>
+
+static void
+compute_sha1msg2 (int *s1, int *s2, int *r)
+{
+  int w13, w14, w15, w16, w17, w18, w19;
+
+  w13 = s2[2];
+  w14 = s2[1];
+  w15 = s2[0];
+  w16 = __rold (s1[3] ^ w13, 1);
+  w17 = __rold (s1[2] ^ w14, 1);
+  w18 = __rold (s1[1] ^ w15, 1);
+  w19 = __rold (s1[0] ^ w16, 1);
+
+  r[0] = w19;
+  r[1] = w18;
+  r[2] = w17;
+  r[3] = w16;
+}
+
+static void
+sha_test (void)
+{
+  union128i_d s1, s2, res;
+  int res_ref[4];
+
+  s1.x = _mm_set_epi32 (111, 222, 333, 444);
+  s2.x = _mm_set_epi32 (555, 666, 777, 0);
+
+  res.x = _mm_sha1msg2_epu32 (s1.x, s2.x);
+
+  compute_sha1msg2 (s1.a, s2.a, res_ref);
+
+  if (check_union128i_d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha1nexte-1.c b/gcc/testsuite/gcc.target/i386/sha1nexte-1.c
new file mode 100644
index 00000000000..40edc780ffe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha1nexte-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-final { scan-assembler "sha1nexte\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+volatile __m128i x;
+
+void extern
+sha_test (void)
+{
+  x = _mm_sha1nexte_epu32 (x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha1nexte-2.c b/gcc/testsuite/gcc.target/i386/sha1nexte-2.c
new file mode 100644
index 00000000000..f0dc6cbc6a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha1nexte-2.c
@@ -0,0 +1,36 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-require-effective-target sha } */
+
+#include "sha-check.h"
+#include "m128-check.h"
+#include <x86intrin.h>
+#include <immintrin.h>
+
+static void
+compute_sha1nexte (int *s1, int *s2, int *r)
+{
+  int tmp = __rold (s1[3], 30);
+
+  r[0] = s2[0];
+  r[1] = s2[1];
+  r[2] = s2[2];
+  r[3] = s2[3] + tmp;
+}
+
+static void
+sha_test (void)
+{
+  union128i_d s1, s2, res;
+  int res_ref[4];
+
+  s1.x = _mm_set_epi32 (111, 0, 0, 0);
+  s2.x = _mm_set_epi32 (222, 333, 444, 555);
+
+  res.x = _mm_sha1nexte_epu32 (s1.x, s2.x);
+
+  compute_sha1nexte (s1.a, s2.a, res_ref);
+
+  if (check_union128i_d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha1rnds4-1.c b/gcc/testsuite/gcc.target/i386/sha1rnds4-1.c
new file mode 100644
index 00000000000..c9da57df000
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha1rnds4-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-final { scan-assembler "sha1rnds4\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+volatile __m128i x;
+
+void extern
+sha_test (void)
+{
+  x = _mm_sha1rnds4_epu32 (x, x, 3);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha1rnds4-2.c b/gcc/testsuite/gcc.target/i386/sha1rnds4-2.c
new file mode 100644
index 00000000000..91210b1f0a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha1rnds4-2.c
@@ -0,0 +1,93 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-require-effective-target sha } */
+
+#include "sha-check.h"
+#include "m128-check.h"
+#include <x86intrin.h>
+#include <immintrin.h>
+
+static int
+f0 (int b, int c, int d)
+{
+  return (b & c) ^ (~b & d);
+}
+
+static int
+f1 (int b, int c, int d)
+{
+  return b ^ c ^ d;
+}
+
+static int
+f2 (int b, int c, int d)
+{
+  return (b & c) ^ (b & d) ^ (c & d);
+}
+
+int (*f_arr[4])(int, int, int) = { f0, f1, f2, f1 };
+const int k_arr[4] = { 0x5A827999, 0x6ED9EBA1, 0x8F1BBCDC, 0xCA62C1D6 };
+
+
+static void
+compute_sha1rnds4 (int *src1, int *src2, int imm, int *res)
+{
+  int k = k_arr[imm];
+  int (*f)(int, int, int) = f_arr[imm];
+
+  int w[4] = { src2[3], src2[2], src2[1], src2[0] };
+  int a[5], b[5], c[5], d[5], e[5];
+
+  a[0] = src1[3];
+  b[0] = src1[2];
+  c[0] = src1[1];
+  d[0] = src1[0];
+  e[0] = 0;
+
+  int i;
+  for (i = 0; i <= 3; i++)
+    {
+      a[i+1] = f(b[i], c[i], d[i]) + __rold (a[i], 5) + w[i] + e[i] + k;
+      b[i+1] = a[i];
+      c[i+1] = __rold (b[i], 30);
+      d[i+1] = c[i];
+      e[i+1] = d[i];
+    }
+
+  res[0] = d[4];
+  res[1] = c[4];
+  res[2] = b[4];
+  res[3] = a[4];
+}
+
+
+static void
+sha_test (void)
+{
+  int imm;
+  union128i_d s1, s2, res;
+  int res_ref[4];
+
+  s1.x = _mm_set_epi32 (111, 222, 333, 444);
+  s2.x = _mm_set_epi32 (555, 666, 777, 888);
+
+  res.x = _mm_sha1rnds4_epu32 (s1.x, s2.x, 0);
+  compute_sha1rnds4 (s1.a, s2.a, 0, res_ref);
+  if (check_union128i_d (res, res_ref))
+    abort ();
+
+  res.x = _mm_sha1rnds4_epu32 (s1.x, s2.x, 1);
+  compute_sha1rnds4 (s1.a, s2.a, 1, res_ref);
+  if (check_union128i_d (res, res_ref))
+    abort ();
+
+  res.x = _mm_sha1rnds4_epu32 (s1.x, s2.x, 2);
+  compute_sha1rnds4 (s1.a, s2.a, 2, res_ref);
+  if (check_union128i_d (res, res_ref))
+    abort ();
+
+  res.x = _mm_sha1rnds4_epu32 (s1.x, s2.x, 3);
+  compute_sha1rnds4 (s1.a, s2.a, 3, res_ref);
+  if (check_union128i_d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha256msg1-1.c b/gcc/testsuite/gcc.target/i386/sha256msg1-1.c
new file mode 100644
index 00000000000..020874e4a4f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha256msg1-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-final { scan-assembler "sha256msg1\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+volatile __m128i x;
+
+void extern
+sha_test (void)
+{
+  x = _mm_sha256msg1_epu32 (x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha256msg1-2.c b/gcc/testsuite/gcc.target/i386/sha256msg1-2.c
new file mode 100644
index 00000000000..2b70920b029
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha256msg1-2.c
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-require-effective-target sha } */
+
+#include "sha-check.h"
+#include "m128-check.h"
+#include <x86intrin.h>
+#include <immintrin.h>
+
+static int
+s0 (int w)
+{
+  return __rord (w, 7) ^ __rord (w, 18) ^ (w >> 3);
+}
+
+static void
+compute_sha256msg1 (int *src1, int *src2, int *res)
+{
+  int w0, w1, w2, w3, w4;
+
+  w0 = src1[0];
+  w1 = src1[1];
+  w2 = src1[2];
+  w3 = src1[3];
+  w4 = src2[0];
+
+  res[0] = w0 + s0 (w1);
+  res[1] = w1 + s0 (w2);
+  res[2] = w2 + s0 (w3);
+  res[3] = w3 + s0 (w4);
+}
+
+static void
+sha_test (void)
+{
+  union128i_d s1, s2, res;
+  int res_ref[4];
+
+  s1.x = _mm_set_epi32 (111, 222, 333, 444);
+  s2.x = _mm_set_epi32 (0, 0, 0, 555);
+
+  res.x = _mm_sha256msg1_epu32 (s1.x, s2.x);
+
+  compute_sha256msg1 (s1.a, s2.a, res_ref);
+
+  if (check_union128i_d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha256msg2-1.c b/gcc/testsuite/gcc.target/i386/sha256msg2-1.c
new file mode 100644
index 00000000000..88a9a03e4e8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha256msg2-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-final { scan-assembler "sha256msg2\[ \\t\]+\[^\n\]*%xmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+volatile __m128i x;
+
+void extern
+sha_test (void)
+{
+  x = _mm_sha256msg2_epu32 (x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha256msg2-2.c b/gcc/testsuite/gcc.target/i386/sha256msg2-2.c
new file mode 100644
index 00000000000..ffb0c2582bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha256msg2-2.c
@@ -0,0 +1,49 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-require-effective-target sha } */
+
+#include "sha-check.h"
+#include "m128-check.h"
+#include <x86intrin.h>
+#include <immintrin.h>
+
+static int
+s1 (int w)
+{
+  return __rord (w, 17) ^ __rord (w, 19) ^ (w >> 10);
+}
+
+static void
+compute_sha256msg2 (int *src1, int *src2, int *res)
+{
+  int w14, w15, w16, w17, w18, w19;
+
+  w14 = src2[2];
+  w15 = src2[3];
+  w16 = src1[0] + s1 (w14);
+  w17 = src1[1] + s1 (w15);
+  w18 = src1[2] + s1 (w16);
+  w19 = src1[3] + s1 (w17);
+
+  res[0] = w16;
+  res[1] = w17;
+  res[2] = w18;
+  res[3] = w19;
+}
+
+static void
+sha_test (void)
+{
+  union128i_d s1, s2, res;
+  int res_ref[4];
+
+  s1.x = _mm_set_epi32 (111, 222, 333, 444);
+  s2.x = _mm_set_epi32 (555, 666, 0, 0);
+
+  res.x = _mm_sha256msg2_epu32 (s1.x, s2.x);
+
+  compute_sha256msg2 (s1.a, s2.a, res_ref);
+
+  if (check_union128i_d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha256rnds2-1.c b/gcc/testsuite/gcc.target/i386/sha256rnds2-1.c
new file mode 100644
index 00000000000..8bdf6642078
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha256rnds2-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-final { scan-assembler "sha256rnds2\[ \\t\]+\[^\n\]*%xmm0\[^\n\]*%xmm\[0-9\]" } } */
+
+#include <immintrin.h>
+
+volatile __m128i x;
+
+void extern
+sha_test (void)
+{
+  x = _mm_sha256rnds2_epu32 (x, x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sha256rnds2-2.c b/gcc/testsuite/gcc.target/i386/sha256rnds2-2.c
new file mode 100644
index 00000000000..4e586749def
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sha256rnds2-2.c
@@ -0,0 +1,85 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -msha" } */
+/* { dg-require-effective-target sha } */
+
+#include "sha-check.h"
+#include "m128-check.h"
+#include <x86intrin.h>
+#include <immintrin.h>
+
+static int
+ch (int e, int f, int g)
+{
+  return (e & f) ^ (~e & g);
+}
+
+static int
+maj (int a, int b, int c)
+{
+  return (a & b) ^ (a & c) ^ (b & c);
+}
+
+static int
+s0 (int a)
+{
+  return __rord (a, 2) ^ __rord (a, 13) ^ __rord (a, 22);
+}
+
+static int
+s1 (int e)
+{
+  return __rord (e, 6) ^ __rord (e, 11) ^ __rord (e, 25);
+}
+
+static void
+compute_sha256rnds2 (int *src0, int *src1, int *src2, int *res)
+{
+  int wk[2] = { src0[0], src0[1] };
+  int a[3], b[3], c[3], d[3], e[3], f[3], g[3], h[3];
+
+  a[0] = src2[3];
+  b[0] = src2[2];
+  c[0] = src1[3];
+  d[0] = src1[2];
+  e[0] = src2[1];
+  f[0] = src2[0];
+  g[0] = src1[1];
+  h[0] = src1[0];
+
+  int i;
+  for (i = 0; i <= 1; i++)
+    {
+      a[i+1] = ch (e[i], f[i], g[i]) + s1 (e[i]) + wk[i] + h[i]
+	       + maj (a[i], b[i], c[i]) + s0 (a[i]);
+      b[i+1] = a[i];
+      c[i+1] = b[i];
+      d[i+1] = c[i];
+      e[i+1] = ch (e[i], f[i], g[i]) + s1 (e[i]) + wk[i] + h[i] + d[i];
+      f[i+1] = e[i];
+      g[i+1] = f[i];
+      h[i+1] = g[i];
+    }
+
+  res[0] = f[2];
+  res[1] = e[2];
+  res[2] = b[2];
+  res[3] = a[2];
+}
+
+static void
+sha_test (void)
+{
+  union128i_d s0, s1, s2, res;
+  int res_ref[4];
+
+  s0.x = _mm_set_epi32 (0, 0, 111, 222);
+  s1.x = _mm_set_epi32 (333, 444, 555, 666);
+  s2.x = _mm_set_epi32 (777, 888, 999, 123);
+
+  res.x = _mm_sha256rnds2_epu32 (s1.x, s2.x, s0.x);
+
+  compute_sha256rnds2 (s0.a, s1.a, s2.a, res_ref);
+
+  if (check_union128i_d (res, res_ref))
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c
index c1c5745ef0b..aa362428879 100644
--- a/gcc/testsuite/gcc.target/i386/sse-12.c
+++ b/gcc/testsuite/gcc.target/i386/sse-12.c
@@ -3,7 +3,7 @@
    popcntintrin.h and mm_malloc.h are usable
    with -O -std=c89 -pedantic-errors.  */
 /* { dg-do compile } */
-/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt" } */
+/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f" } */
 
 #include <x86intrin.h>
 
diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c
index 1d777d12e4f..569eacf0450 100644
--- a/gcc/testsuite/gcc.target/i386/sse-13.c
+++ b/gcc/testsuite/gcc.target/i386/sse-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt" } */
+/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f" } */
 
 #include <mm_malloc.h>
 
@@ -55,6 +55,20 @@
 #define __builtin_ia32_vcvtps2ph(A, I) __builtin_ia32_vcvtps2ph(A, 1)
 #define __builtin_ia32_vcvtps2ph256(A, I) __builtin_ia32_vcvtps2ph256(A, 1)
 
+/* avx512pfintrin.h */
+#define __builtin_ia32_gatherpfdps(A, B, C, D, E) __builtin_ia32_gatherpfdps (A, B, C, 1, 1)
+#define __builtin_ia32_gatherpfqps(A, B, C, D, E) __builtin_ia32_gatherpfqps (A, B, C, 1, 1)
+#define __builtin_ia32_scatterpfdps(A, B, C, D, E) __builtin_ia32_scatterpfdps (A, B, C, 1, 1)
+#define __builtin_ia32_scatterpfqps(A, B, C, D, E) __builtin_ia32_scatterpfqps (A, B, C, 1, 1)
+
+/* avx512erintrin.h */
+#define __builtin_ia32_exp2pd_mask(A, B, C, D) __builtin_ia32_exp2pd_mask (A, B, C, 1)
+#define __builtin_ia32_exp2ps_mask(A, B, C, D) __builtin_ia32_exp2ps_mask (A, B, C, 1)
+#define __builtin_ia32_rcp28pd_mask(A, B, C, D) __builtin_ia32_rcp28pd_mask (A, B, C, 1)
+#define __builtin_ia32_rcp28ps_mask(A, B, C, D) __builtin_ia32_rcp28ps_mask (A, B, C, 1)
+#define __builtin_ia32_rsqrt28pd_mask(A, B, C, D) __builtin_ia32_rsqrt28pd_mask (A, B, C, 1)
+#define __builtin_ia32_rsqrt28ps_mask(A, B, C, D) __builtin_ia32_rsqrt28ps_mask (A, B, C, 1)
+
 /* wmmintrin.h */
 #define __builtin_ia32_aeskeygenassist128(X, C) __builtin_ia32_aeskeygenassist128(X, 1)
 #define __builtin_ia32_pclmulqdq128(X, Y, I) __builtin_ia32_pclmulqdq128(X, Y, 1)
@@ -182,3 +196,189 @@
 
 /* rtmintrin.h */
 #define __builtin_ia32_xabort (N) __builtin_ia32_xabort (1)
+
+/* avx512fintrin.h */
+#define __builtin_ia32_addpd512_mask(A, B, C, D, E) __builtin_ia32_addpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_addps512_mask(A, B, C, D, E) __builtin_ia32_addps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_addsd_mask(A, B, C, D, E) __builtin_ia32_addsd_mask(A, B, C, D, 1)
+#define __builtin_ia32_addss_mask(A, B, C, D, E) __builtin_ia32_addss_mask(A, B, C, D, 1)
+#define __builtin_ia32_alignd512_mask(A, B, F, D, E) __builtin_ia32_alignd512_mask(A, B, 1, D, E)
+#define __builtin_ia32_alignq512_mask(A, B, F, D, E) __builtin_ia32_alignq512_mask(A, B, 1, D, E)
+#define __builtin_ia32_cmpd512_mask(A, B, E, D) __builtin_ia32_cmpd512_mask(A, B, 1, D)
+#define __builtin_ia32_cmppd512_mask(A, B, F, D, E) __builtin_ia32_cmppd512_mask(A, B, 1, D, 5)
+#define __builtin_ia32_cmpps512_mask(A, B, F, D, E) __builtin_ia32_cmpps512_mask(A, B, 1, D, 5)
+#define __builtin_ia32_cmpq512_mask(A, B, E, D) __builtin_ia32_cmpq512_mask(A, B, 1, D)
+#define __builtin_ia32_cmpsd_mask(A, B, F, D, E) __builtin_ia32_cmpsd_mask(A, B, 1, D, 5)
+#define __builtin_ia32_cmpss_mask(A, B, F, D, E) __builtin_ia32_cmpss_mask(A, B, 1, D, 5)
+#define __builtin_ia32_cvtdq2ps512_mask(A, B, C, D) __builtin_ia32_cvtdq2ps512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtpd2dq512_mask(A, B, C, D) __builtin_ia32_cvtpd2dq512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtpd2ps512_mask(A, B, C, D) __builtin_ia32_cvtpd2ps512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtpd2udq512_mask(A, B, C, D) __builtin_ia32_cvtpd2udq512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtps2dq512_mask(A, B, C, D) __builtin_ia32_cvtps2dq512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtps2pd512_mask(A, B, C, D) __builtin_ia32_cvtps2pd512_mask(A, B, C, 5)
+#define __builtin_ia32_cvtps2udq512_mask(A, B, C, D) __builtin_ia32_cvtps2udq512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtsd2ss_mask(A, B, C, D, E) __builtin_ia32_cvtsd2ss_mask(A, B, C, D, 1)
+#define __builtin_ia32_cvtsi2sd64(A, B, C) __builtin_ia32_cvtsi2sd64(A, B, 1)
+#define __builtin_ia32_cvtsi2ss32(A, B, C) __builtin_ia32_cvtsi2ss32(A, B, 1)
+#define __builtin_ia32_cvtsi2ss64(A, B, C) __builtin_ia32_cvtsi2ss64(A, B, 1)
+#define __builtin_ia32_cvtss2sd_mask(A, B, C, D, E) __builtin_ia32_cvtss2sd_mask(A, B, C, D, 5)
+#define __builtin_ia32_cvttpd2dq512_mask(A, B, C, D) __builtin_ia32_cvttpd2dq512_mask(A, B, C, 5)
+#define __builtin_ia32_cvttpd2udq512_mask(A, B, C, D) __builtin_ia32_cvttpd2udq512_mask(A, B, C, 5)
+#define __builtin_ia32_cvttps2dq512_mask(A, B, C, D) __builtin_ia32_cvttps2dq512_mask(A, B, C, 5)
+#define __builtin_ia32_cvttps2udq512_mask(A, B, C, D) __builtin_ia32_cvttps2udq512_mask(A, B, C, 5)
+#define __builtin_ia32_cvtudq2ps512_mask(A, B, C, D) __builtin_ia32_cvtudq2ps512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtusi2sd64(A, B, C) __builtin_ia32_cvtusi2sd64(A, B, 1)
+#define __builtin_ia32_cvtusi2ss32(A, B, C) __builtin_ia32_cvtusi2ss32(A, B, 1)
+#define __builtin_ia32_cvtusi2ss64(A, B, C) __builtin_ia32_cvtusi2ss64(A, B, 1)
+#define __builtin_ia32_divpd512_mask(A, B, C, D, E) __builtin_ia32_divpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_divps512_mask(A, B, C, D, E) __builtin_ia32_divps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_divsd_mask(A, B, C, D, E) __builtin_ia32_divsd_mask(A, B, C, D, 1)
+#define __builtin_ia32_divss_mask(A, B, C, D, E) __builtin_ia32_divss_mask(A, B, C, D, 1)
+#define __builtin_ia32_extractf32x4_mask(A, E, C, D) __builtin_ia32_extractf32x4_mask(A, 1, C, D)
+#define __builtin_ia32_extractf64x4_mask(A, E, C, D) __builtin_ia32_extractf64x4_mask(A, 1, C, D)
+#define __builtin_ia32_extracti32x4_mask(A, E, C, D) __builtin_ia32_extracti32x4_mask(A, 1, C, D)
+#define __builtin_ia32_extracti64x4_mask(A, E, C, D) __builtin_ia32_extracti64x4_mask(A, 1, C, D)
+#define __builtin_ia32_fixupimmpd512_mask(A, B, C, I, E, F) __builtin_ia32_fixupimmpd512_mask(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmpd512_maskz(A, B, C, I, E, F) __builtin_ia32_fixupimmpd512_maskz(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmps512_mask(A, B, C, I, E, F) __builtin_ia32_fixupimmps512_mask(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmps512_maskz(A, B, C, I, E, F) __builtin_ia32_fixupimmps512_maskz(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmsd_mask(A, B, C, I, E, F) __builtin_ia32_fixupimmsd_mask(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmsd_maskz(A, B, C, I, E, F) __builtin_ia32_fixupimmsd_maskz(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmss_mask(A, B, C, I, E, F) __builtin_ia32_fixupimmss_mask(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmss_maskz(A, B, C, I, E, F) __builtin_ia32_fixupimmss_maskz(A, B, C, 1, E, 5)
+#define __builtin_ia32_gatherdiv8df(A, B, C, D, F) __builtin_ia32_gatherdiv8df(A, B, C, D, 1)
+#define __builtin_ia32_gatherdiv8di(A, B, C, D, F) __builtin_ia32_gatherdiv8di(A, B, C, D, 1)
+#define __builtin_ia32_gatherdiv16sf(A, B, C, D, F) __builtin_ia32_gatherdiv16sf(A, B, C, D, 1)
+#define __builtin_ia32_gatherdiv16si(A, B, C, D, F) __builtin_ia32_gatherdiv16si(A, B, C, D, 1)
+#define __builtin_ia32_gathersiv16sf(A, B, C, D, F) __builtin_ia32_gathersiv16sf(A, B, C, D, 1)
+#define __builtin_ia32_gathersiv16si(A, B, C, D, F) __builtin_ia32_gathersiv16si(A, B, C, D, 1)
+#define __builtin_ia32_gathersiv8df(A, B, C, D, F) __builtin_ia32_gathersiv8df(A, B, C, D, 1)
+#define __builtin_ia32_gathersiv8di(A, B, C, D, F) __builtin_ia32_gathersiv8di(A, B, C, D, 1)
+#define __builtin_ia32_getexppd512_mask(A, B, C, D) __builtin_ia32_getexppd512_mask(A, B, C, 5)
+#define __builtin_ia32_getexpps512_mask(A, B, C, D) __builtin_ia32_getexpps512_mask(A, B, C, 5)
+#define __builtin_ia32_getexpsd128_mask(A, B, C, D, E) __builtin_ia32_getexpsd128_mask(A, B, C, D, 5)
+#define __builtin_ia32_getexpss128_mask(A, B, C, D, E) __builtin_ia32_getexpss128_mask(A, B, C, D, 5)
+#define __builtin_ia32_getmantpd512_mask(A, F, C, D, E) __builtin_ia32_getmantpd512_mask(A, 1, C, D, 5)
+#define __builtin_ia32_getmantps512_mask(A, F, C, D, E) __builtin_ia32_getmantps512_mask(A, 1, C, D, 5)
+#define __builtin_ia32_getmantsd_mask(A, B, I, D, E, F) __builtin_ia32_getmantsd_mask(A, B, 1, D, E, 5)
+#define __builtin_ia32_getmantss_mask(A, B, I, D, E, F) __builtin_ia32_getmantss_mask(A, B, 1, D, E, 5)
+#define __builtin_ia32_insertf32x4_mask(A, B, F, D, E) __builtin_ia32_insertf32x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_insertf64x4_mask(A, B, F, D, E) __builtin_ia32_insertf64x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_inserti32x4_mask(A, B, F, D, E) __builtin_ia32_inserti32x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_inserti64x4_mask(A, B, F, D, E) __builtin_ia32_inserti64x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_maxpd512_mask(A, B, C, D, E) __builtin_ia32_maxpd512_mask(A, B, C, D, 5)
+#define __builtin_ia32_maxps512_mask(A, B, C, D, E) __builtin_ia32_maxps512_mask(A, B, C, D, 5)
+#define __builtin_ia32_maxsd_mask(A, B, C, D, E) __builtin_ia32_maxsd_mask(A, B, C, D, 5)
+#define __builtin_ia32_maxss_mask(A, B, C, D, E) __builtin_ia32_maxss_mask(A, B, C, D, 5)
+#define __builtin_ia32_minpd512_mask(A, B, C, D, E) __builtin_ia32_minpd512_mask(A, B, C, D, 5)
+#define __builtin_ia32_minps512_mask(A, B, C, D, E) __builtin_ia32_minps512_mask(A, B, C, D, 5)
+#define __builtin_ia32_minsd_mask(A, B, C, D, E) __builtin_ia32_minsd_mask(A, B, C, D, 5)
+#define __builtin_ia32_minss_mask(A, B, C, D, E) __builtin_ia32_minss_mask(A, B, C, D, 5)
+#define __builtin_ia32_mulpd512_mask(A, B, C, D, E) __builtin_ia32_mulpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_mulps512_mask(A, B, C, D, E) __builtin_ia32_mulps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_mulsd_mask(A, B, C, D, E) __builtin_ia32_mulsd_mask(A, B, C, D, 1)
+#define __builtin_ia32_mulss_mask(A, B, C, D, E) __builtin_ia32_mulss_mask(A, B, C, D, 1)
+#define __builtin_ia32_permdf512_mask(A, E, C, D) __builtin_ia32_permdf512_mask(A, 1, C, D)
+#define __builtin_ia32_permdi512_mask(A, E, C, D) __builtin_ia32_permdi512_mask(A, 1, C, D)
+#define __builtin_ia32_prold512_mask(A, E, C, D) __builtin_ia32_prold512_mask(A, 1, C, D)
+#define __builtin_ia32_prolq512_mask(A, E, C, D) __builtin_ia32_prolq512_mask(A, 1, C, D)
+#define __builtin_ia32_prord512_mask(A, E, C, D) __builtin_ia32_prord512_mask(A, 1, C, D)
+#define __builtin_ia32_prorq512_mask(A, E, C, D) __builtin_ia32_prorq512_mask(A, 1, C, D)
+#define __builtin_ia32_pshufd512_mask(A, E, C, D) __builtin_ia32_pshufd512_mask(A, 1, C, D)
+#define __builtin_ia32_pslldi512_mask(A, E, C, D) __builtin_ia32_pslldi512_mask(A, 1, C, D)
+#define __builtin_ia32_psllqi512_mask(A, E, C, D) __builtin_ia32_psllqi512_mask(A, 1, C, D)
+#define __builtin_ia32_psradi512_mask(A, E, C, D) __builtin_ia32_psradi512_mask(A, 1, C, D)
+#define __builtin_ia32_psraqi512_mask(A, E, C, D) __builtin_ia32_psraqi512_mask(A, 1, C, D)
+#define __builtin_ia32_psrldi512_mask(A, E, C, D) __builtin_ia32_psrldi512_mask(A, 1, C, D)
+#define __builtin_ia32_psrlqi512_mask(A, E, C, D) __builtin_ia32_psrlqi512_mask(A, 1, C, D)
+#define __builtin_ia32_pternlogd512_mask(A, B, C, F, E) __builtin_ia32_pternlogd512_mask(A, B, C, 1, E)
+#define __builtin_ia32_pternlogd512_maskz(A, B, C, F, E) __builtin_ia32_pternlogd512_maskz(A, B, C, 1, E)
+#define __builtin_ia32_pternlogq512_mask(A, B, C, F, E) __builtin_ia32_pternlogq512_mask(A, B, C, 1, E)
+#define __builtin_ia32_pternlogq512_maskz(A, B, C, F, E) __builtin_ia32_pternlogq512_maskz(A, B, C, 1, E)
+#define __builtin_ia32_rndscalepd_mask(A, F, C, D, E) __builtin_ia32_rndscalepd_mask(A, 1, C, D, 5)
+#define __builtin_ia32_rndscaleps_mask(A, F, C, D, E) __builtin_ia32_rndscaleps_mask(A, 1, C, D, 5)
+#define __builtin_ia32_rndscalesd_mask(A, B, I, D, E, F) __builtin_ia32_rndscalesd_mask(A, B, 1, D, E, 5)
+#define __builtin_ia32_rndscaless_mask(A, B, I, D, E, F) __builtin_ia32_rndscaless_mask(A, B, 1, D, E, 5)
+#define __builtin_ia32_scalefpd512_mask(A, B, C, D, E) __builtin_ia32_scalefpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_scalefps512_mask(A, B, C, D, E) __builtin_ia32_scalefps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_scalefsd_mask(A, B, C, D, E) __builtin_ia32_scalefsd_mask(A, B, C, D, 1)
+#define __builtin_ia32_scalefss_mask(A, B, C, D, E) __builtin_ia32_scalefss_mask(A, B, C, D, 1)
+#define __builtin_ia32_scatterdiv8df(A, B, C, D, F) __builtin_ia32_scatterdiv8df(A, B, C, D, 1)
+#define __builtin_ia32_scatterdiv8di(A, B, C, D, F) __builtin_ia32_scatterdiv8di(A, B, C, D, 1)
+#define __builtin_ia32_scatterdiv16sf(A, B, C, D, F) __builtin_ia32_scatterdiv16sf(A, B, C, D, 1)
+#define __builtin_ia32_scatterdiv16si(A, B, C, D, F) __builtin_ia32_scatterdiv16si(A, B, C, D, 1)
+#define __builtin_ia32_scattersiv16sf(A, B, C, D, F) __builtin_ia32_scattersiv16sf(A, B, C, D, 1)
+#define __builtin_ia32_scattersiv16si(A, B, C, D, F) __builtin_ia32_scattersiv16si(A, B, C, D, 1)
+#define __builtin_ia32_scattersiv8df(A, B, C, D, F) __builtin_ia32_scattersiv8df(A, B, C, D, 1)
+#define __builtin_ia32_scattersiv8di(A, B, C, D, F) __builtin_ia32_scattersiv8di(A, B, C, D, 1)
+#define __builtin_ia32_shuf_f32x4_mask(A, B, F, D, E) __builtin_ia32_shuf_f32x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_shuf_f64x2_mask(A, B, F, D, E) __builtin_ia32_shuf_f64x2_mask(A, B, 1, D, E)
+#define __builtin_ia32_shuf_i32x4_mask(A, B, F, D, E) __builtin_ia32_shuf_i32x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_shuf_i64x2_mask(A, B, F, D, E) __builtin_ia32_shuf_i64x2_mask(A, B, 1, D, E)
+#define __builtin_ia32_shufpd512_mask(A, B, F, D, E) __builtin_ia32_shufpd512_mask(A, B, 1, D, E)
+#define __builtin_ia32_shufps512_mask(A, B, F, D, E) __builtin_ia32_shufps512_mask(A, B, 1, D, E)
+#define __builtin_ia32_sqrtpd512_mask(A, B, C, D) __builtin_ia32_sqrtpd512_mask(A, B, C, 1)
+#define __builtin_ia32_sqrtps512_mask(A, B, C, D) __builtin_ia32_sqrtps512_mask(A, B, C, 1)
+#define __builtin_ia32_sqrtsd_mask(A, B, C, D, E) __builtin_ia32_sqrtsd_mask(A, B, C, D, 1)
+#define __builtin_ia32_sqrtss_mask(A, B, C, D, E) __builtin_ia32_sqrtss_mask(A, B, C, D, 1)
+#define __builtin_ia32_subpd512_mask(A, B, C, D, E) __builtin_ia32_subpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_subps512_mask(A, B, C, D, E) __builtin_ia32_subps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_subsd_mask(A, B, C, D, E) __builtin_ia32_subsd_mask(A, B, C, D, 1)
+#define __builtin_ia32_subss_mask(A, B, C, D, E) __builtin_ia32_subss_mask(A, B, C, D, 1)
+#define __builtin_ia32_ucmpd512_mask(A, B, E, D) __builtin_ia32_ucmpd512_mask(A, B, 1, D)
+#define __builtin_ia32_ucmpq512_mask(A, B, E, D) __builtin_ia32_ucmpq512_mask(A, B, 1, D)
+#define __builtin_ia32_vcomisd(A, B, C, D) __builtin_ia32_vcomisd(A, B, 1, 5)
+#define __builtin_ia32_vcomiss(A, B, C, D) __builtin_ia32_vcomiss(A, B, 1, 5)
+#define __builtin_ia32_vcvtph2ps512_mask(A, B, C, D) __builtin_ia32_vcvtph2ps512_mask(A, B, C, 5)
+#define __builtin_ia32_vcvtps2ph512_mask(A, E, C, D) __builtin_ia32_vcvtps2ph512_mask(A, 1, C, D)
+#define __builtin_ia32_vcvtsd2si32(A, B) __builtin_ia32_vcvtsd2si32(A, 1)
+#define __builtin_ia32_vcvtsd2si64(A, B) __builtin_ia32_vcvtsd2si64(A, 1)
+#define __builtin_ia32_vcvtsd2usi32(A, B) __builtin_ia32_vcvtsd2usi32(A, 1)
+#define __builtin_ia32_vcvtsd2usi64(A, B) __builtin_ia32_vcvtsd2usi64(A, 1)
+#define __builtin_ia32_vcvtss2si32(A, B) __builtin_ia32_vcvtss2si32(A, 1)
+#define __builtin_ia32_vcvtss2si64(A, B) __builtin_ia32_vcvtss2si64(A, 1)
+#define __builtin_ia32_vcvtss2usi32(A, B) __builtin_ia32_vcvtss2usi32(A, 1)
+#define __builtin_ia32_vcvtss2usi64(A, B) __builtin_ia32_vcvtss2usi64(A, 1)
+#define __builtin_ia32_vcvttsd2si32(A, B) __builtin_ia32_vcvttsd2si32(A, 5)
+#define __builtin_ia32_vcvttsd2si64(A, B) __builtin_ia32_vcvttsd2si64(A, 5)
+#define __builtin_ia32_vcvttsd2usi32(A, B) __builtin_ia32_vcvttsd2usi32(A, 5)
+#define __builtin_ia32_vcvttsd2usi64(A, B) __builtin_ia32_vcvttsd2usi64(A, 5)
+#define __builtin_ia32_vcvttss2si32(A, B) __builtin_ia32_vcvttss2si32(A, 5)
+#define __builtin_ia32_vcvttss2si64(A, B) __builtin_ia32_vcvttss2si64(A, 5)
+#define __builtin_ia32_vcvttss2usi32(A, B) __builtin_ia32_vcvttss2usi32(A, 5)
+#define __builtin_ia32_vcvttss2usi64(A, B) __builtin_ia32_vcvttss2usi64(A, 5)
+#define __builtin_ia32_vfmaddpd512_mask(A, B, C, D, E) __builtin_ia32_vfmaddpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddpd512_mask3(A, B, C, D, E) __builtin_ia32_vfmaddpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddpd512_maskz(A, B, C, D, E) __builtin_ia32_vfmaddpd512_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddps512_mask(A, B, C, D, E) __builtin_ia32_vfmaddps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddps512_mask3(A, B, C, D, E) __builtin_ia32_vfmaddps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddps512_maskz(A, B, C, D, E) __builtin_ia32_vfmaddps512_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsd3_mask(A, B, C, D, E) __builtin_ia32_vfmaddsd3_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsd3_mask3(A, B, C, D, E) __builtin_ia32_vfmaddsd3_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsd3_maskz(A, B, C, D, E) __builtin_ia32_vfmaddsd3_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddss3_mask(A, B, C, D, E) __builtin_ia32_vfmaddss3_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddss3_mask3(A, B, C, D, E) __builtin_ia32_vfmaddss3_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddss3_maskz(A, B, C, D, E) __builtin_ia32_vfmaddss3_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubpd512_mask(A, B, C, D, E) __builtin_ia32_vfmaddsubpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubpd512_mask3(A, B, C, D, E) __builtin_ia32_vfmaddsubpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubpd512_maskz(A, B, C, D, E) __builtin_ia32_vfmaddsubpd512_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubps512_mask(A, B, C, D, E) __builtin_ia32_vfmaddsubps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubps512_mask3(A, B, C, D, E) __builtin_ia32_vfmaddsubps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubps512_maskz(A, B, C, D, E) __builtin_ia32_vfmaddsubps512_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubaddpd512_mask3(A, B, C, D, E) __builtin_ia32_vfmsubaddpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubaddps512_mask3(A, B, C, D, E) __builtin_ia32_vfmsubaddps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubpd512_mask3(A, B, C, D, E) __builtin_ia32_vfmsubpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubps512_mask3(A, B, C, D, E) __builtin_ia32_vfmsubps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubsd3_mask3(A, B, C, D, E) __builtin_ia32_vfmsubsd3_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubss3_mask3(A, B, C, D, E) __builtin_ia32_vfmsubss3_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfnmaddpd512_mask(A, B, C, D, E) __builtin_ia32_vfnmaddpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfnmaddps512_mask(A, B, C, D, E) __builtin_ia32_vfnmaddps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfnmsubpd512_mask(A, B, C, D, E) __builtin_ia32_vfnmsubpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfnmsubpd512_mask3(A, B, C, D, E) __builtin_ia32_vfnmsubpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfnmsubps512_mask(A, B, C, D, E) __builtin_ia32_vfnmsubps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfnmsubps512_mask3(A, B, C, D, E) __builtin_ia32_vfnmsubps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vpermilpd512_mask(A, E, C, D) __builtin_ia32_vpermilpd512_mask(A, 1, C, D)
+#define __builtin_ia32_vpermilps512_mask(A, E, C, D) __builtin_ia32_vpermilps512_mask(A, 1, C, D)
+
+/* shaintrin.h */
+#define __builtin_ia32_sha1rnds4(A, B, C) __builtin_ia32_sha1rnds4(A, B, 1)
diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c
index 331be0e1987..c5d8876b471 100644
--- a/gcc/testsuite/gcc.target/i386/sse-14.c
+++ b/gcc/testsuite/gcc.target/i386/sse-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt" } */
+/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er  -mavx512pf -mavx512cd -msha" } */
 
 #include <mm_malloc.h>
 
@@ -31,6 +31,10 @@
   type _CONCAT(_,func) (op1_type A, int const I, int const L)		\
   { return func (A, imm1, imm2); }
 
+#define test_1y(func, type, op1_type, imm1, imm2, imm3)			\
+  type _CONCAT(_,func) (op1_type A, int const I, int const L, int const R)\
+  { return func (A, imm1, imm2, imm3); }
+
 #define test_2(func, type, op1_type, op2_type, imm)			\
   type _CONCAT(_,func) (op1_type A, op2_type B, int const I)		\
   { return func (A, B, imm); }
@@ -39,16 +43,60 @@
   type _CONCAT(_,func) (op1_type A, op2_type B, int const I, int const L) \
   { return func (A, B, imm1, imm2); }
 
+#define test_2y(func, type, op1_type, op2_type, imm1, imm2, imm3)	 \
+  type _CONCAT(_,func) (op1_type A, op2_type B, int const I, int const L,\
+			int const R)					 \
+  { return func (A, B, imm1, imm2, imm3); }
+
+#define test_2vx(func, op1_type, op2_type, imm1, imm2)     \
+  _CONCAT(_,func) (op1_type A, op2_type B, int const I, int const L) \
+  { func (A, B, imm1, imm2); }
+
 #define test_3(func, type, op1_type, op2_type, op3_type, imm)		\
   type _CONCAT(_,func) (op1_type A, op2_type B,				\
 			op3_type C, int const I)			\
   { return func (A, B, C, imm); }
 
+#define test_3x(func, type, op1_type, op2_type, op3_type, imm1, imm2)		\
+  type _CONCAT(_,func) (op1_type A, op2_type B,				\
+			op3_type C, int const I, int const L)			\
+  { return func (A, B, C, imm1, imm2); }
+
+#define test_3y(func, type, op1_type, op2_type, op3_type, imm1, imm2, imm3)	\
+  type _CONCAT(_,func) (op1_type A, op2_type B,				\
+			op3_type C, int const I, int const L, int const R)	\
+  { return func (A, B, C, imm1, imm2, imm3); }
+
+#define test_3v(func, op1_type, op2_type, op3_type, imm)		\
+  _CONCAT(_,func) (op1_type A, op2_type B,				\
+		   op3_type C, int const I)				\
+  { func (A, B, C, imm); }
+
+#define test_3vx(func, op1_type, op2_type, op3_type, imm1, imm2)   \
+  _CONCAT(_,func) (op1_type A, op2_type B,             \
+           op3_type C, int const I, int const L)       \
+  { func (A, B, C, imm1, imm2); }
+
 #define test_4(func, type, op1_type, op2_type, op3_type, op4_type, imm)	\
   type _CONCAT(_,func) (op1_type A, op2_type B,				\
 			op3_type C, op4_type D, int const I)		\
   { return func (A, B, C, D, imm); }
 
+#define test_4x(func, type, op1_type, op2_type, op3_type, op4_type, imm1, imm2)	\
+  type _CONCAT(_,func) (op1_type A, op2_type B,				\
+			op3_type C, op4_type D, int const I, int const L)		\
+  { return func (A, B, C, D, imm1, imm2); }
+
+#define test_4y(func, type, op1_type, op2_type, op3_type, op4_type, imm1, imm2, imm3)	\
+  type _CONCAT(_,func) (op1_type A, op2_type B,	op3_type C,		\
+			op4_type D, int const I, int const L, int const R)		\
+  { return func (A, B, C, D, imm1, imm2, imm3); }
+
+#define test_4v(func, op1_type, op2_type, op3_type, op4_type, imm)	\
+  _CONCAT(_,func) (op1_type A, op2_type B,				\
+		   op3_type C, op4_type D, int const I)			\
+  { func (A, B, C, D, imm); }
+
 
 /* Following intrinsics require immediate arguments.  They
    are defined as macros for non-optimized compilations. */
@@ -100,6 +148,404 @@ test_1 (_cvtss_sh, unsigned short, float, 1)
 test_1 (_mm_cvtps_ph, __m128i, __m128, 1)
 test_1 (_mm256_cvtps_ph, __m128i, __m256, 1)
 test_0 (_xabort, void, 1)
+test_1 (_mm512_cvt_roundepi32_ps, __m512, __m512i, 1)
+test_1 (_mm512_cvt_roundepu32_ps, __m512, __m512i, 1)
+test_1 (_mm512_cvt_roundpd_epi32, __m256i, __m512d, 1)
+test_1 (_mm512_cvt_roundpd_epu32, __m256i, __m512d, 1)
+test_1 (_mm512_cvt_roundpd_ps, __m256, __m512d, 1)
+test_1 (_mm512_cvt_roundph_ps, __m512, __m256i, 5)
+test_1 (_mm512_cvt_roundps_epi32, __m512i, __m512, 1)
+test_1 (_mm512_cvt_roundps_epu32, __m512i, __m512, 1)
+test_1 (_mm512_cvt_roundps_pd, __m512d, __m256, 5)
+test_1 (_mm512_cvtps_ph, __m256i, __m512, 1)
+test_1 (_mm512_cvtt_roundpd_epi32, __m256i, __m512d, 5)
+test_1 (_mm512_cvtt_roundpd_epu32, __m256i, __m512d, 5)
+test_1 (_mm512_cvtt_roundps_epi32, __m512i, __m512, 5)
+test_1 (_mm512_cvtt_roundps_epu32, __m512i, __m512, 5)
+test_1 (_mm512_extractf32x4_ps, __m128, __m512, 1)
+test_1 (_mm512_extractf64x4_pd, __m256d, __m512d, 1)
+test_1 (_mm512_extracti32x4_epi32, __m128i, __m512i, 1)
+test_1 (_mm512_extracti64x4_epi64, __m256i, __m512i, 1)
+test_1 (_mm512_getexp_round_pd, __m512d, __m512d, 5)
+test_1 (_mm512_getexp_round_ps, __m512, __m512, 5)
+test_1y (_mm512_getmant_round_pd, __m512d, __m512d, 1, 1, 5)
+test_1y (_mm512_getmant_round_ps, __m512, __m512, 1, 1, 5)
+test_1 (_mm512_permute_pd, __m512d, __m512d, 1)
+test_1 (_mm512_permute_ps, __m512, __m512, 1)
+test_1 (_mm512_permutex_epi64, __m512i, __m512i, 1)
+test_1 (_mm512_permutex_pd, __m512d, __m512d, 1)
+test_1 (_mm512_rol_epi32, __m512i, __m512i, 1)
+test_1 (_mm512_rol_epi64, __m512i, __m512i, 1)
+test_1 (_mm512_ror_epi32, __m512i, __m512i, 1)
+test_1 (_mm512_ror_epi64, __m512i, __m512i, 1)
+test_1 (_mm512_shuffle_epi32, __m512i, __m512i, 1)
+test_1 (_mm512_slli_epi32, __m512i, __m512i, 1)
+test_1 (_mm512_slli_epi64, __m512i, __m512i, 1)
+test_1 (_mm512_sqrt_round_pd, __m512d, __m512d, 1)
+test_1 (_mm512_sqrt_round_ps, __m512, __m512, 1)
+test_1 (_mm512_srai_epi32, __m512i, __m512i, 1)
+test_1 (_mm512_srai_epi64, __m512i, __m512i, 1)
+test_1 (_mm512_srli_epi32, __m512i, __m512i, 1)
+test_1 (_mm512_srli_epi64, __m512i, __m512i, 1)
+test_1 (_mm_cvt_roundsd_i32, int, __m128d, 1)
+test_1 (_mm_cvt_roundsd_u32, unsigned, __m128d, 1)
+test_1 (_mm_cvt_roundss_i32, int, __m128, 1)
+test_1 (_mm_cvt_roundss_u32, unsigned, __m128, 1)
+test_1 (_mm_cvtt_roundsd_i32, int, __m128d, 5)
+test_1 (_mm_cvtt_roundsd_u32, unsigned, __m128d, 5)
+test_1 (_mm_cvtt_roundss_i32, int, __m128, 5)
+test_1 (_mm_cvtt_roundss_u32, unsigned, __m128, 5)
+test_1x (_mm512_getmant_pd, __m512d, __m512d, 1, 1)
+test_1x (_mm512_getmant_ps, __m512, __m512, 1, 1)
+test_1x (_mm512_roundscale_round_pd, __m512d, __m512d, 1, 5)
+test_1x (_mm512_roundscale_round_ps, __m512, __m512, 1, 5)
+test_1x (_mm_cvt_roundi32_ss, __m128, __m128, 1, 1)
+test_2 (_mm512_add_round_pd, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_add_round_ps, __m512, __m512, __m512, 1)
+test_2 (_mm512_alignr_epi32, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_alignr_epi64, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_cmp_epi32_mask, __mmask16, __m512i, __m512i, 1)
+test_2 (_mm512_cmp_epi64_mask, __mmask8, __m512i, __m512i, 1)
+test_2 (_mm512_cmp_epu32_mask, __mmask16, __m512i, __m512i, 1)
+test_2 (_mm512_cmp_epu64_mask, __mmask8, __m512i, __m512i, 1)
+test_2 (_mm512_cmp_pd_mask, __mmask8, __m512d, __m512d, 1)
+test_2 (_mm512_cmp_ps_mask, __mmask16, __m512, __m512, 1)
+test_2 (_mm512_div_round_pd, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_div_round_ps, __m512, __m512, __m512, 1)
+test_2 (_mm512_i32gather_epi32, __m512i, __m512i, void const *, 1)
+test_2 (_mm512_i32gather_epi64, __m512i, __m256i, void const *, 1)
+test_2 (_mm512_i32gather_pd, __m512d, __m256i, void const *, 1)
+test_2 (_mm512_i32gather_ps, __m512, __m512i, void const *, 1)
+test_2 (_mm512_i64gather_epi32, __m256i, __m512i, void const *, 1)
+test_2 (_mm512_i64gather_epi64, __m512i, __m512i, void const *, 1)
+test_2 (_mm512_i64gather_pd, __m512d, __m512i, void const *, 1)
+test_2 (_mm512_i64gather_ps, __m256, __m512i, void const *, 1)
+test_2 (_mm512_insertf32x4, __m512, __m512, __m128, 1)
+test_2 (_mm512_insertf64x4, __m512d, __m512d, __m256d, 1)
+test_2 (_mm512_inserti32x4, __m512i, __m512i, __m128i, 1)
+test_2 (_mm512_inserti64x4, __m512i, __m512i, __m256i, 1)
+test_2 (_mm512_maskz_cvt_roundepi32_ps, __m512, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_cvt_roundepu32_ps, __m512, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_cvt_roundpd_epi32, __m256i, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_cvt_roundpd_epu32, __m256i, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_cvt_roundpd_ps, __m256, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_cvt_roundph_ps, __m512, __mmask16, __m256i, 5)
+test_2 (_mm512_maskz_cvt_roundps_epi32, __m512i, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_cvt_roundps_epu32, __m512i, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_cvt_roundps_pd, __m512d, __mmask8, __m256, 5)
+test_2 (_mm512_maskz_cvtps_ph, __m256i, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_cvtt_roundpd_epi32, __m256i, __mmask8, __m512d, 5)
+test_2 (_mm512_maskz_cvtt_roundpd_epu32, __m256i, __mmask8, __m512d, 5)
+test_2 (_mm512_maskz_cvtt_roundps_epi32, __m512i, __mmask16, __m512, 5)
+test_2 (_mm512_maskz_cvtt_roundps_epu32, __m512i, __mmask16, __m512, 5)
+test_2 (_mm512_maskz_extractf32x4_ps, __m128, __mmask8, __m512, 1)
+test_2 (_mm512_maskz_extractf64x4_pd, __m256d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_extracti32x4_epi32, __m128i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_extracti64x4_epi64, __m256i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_getexp_round_pd, __m512d, __mmask8, __m512d, 5)
+test_2 (_mm512_maskz_getexp_round_ps, __m512, __mmask16, __m512, 5)
+test_2y (_mm512_maskz_getmant_round_pd, __m512d, __mmask8, __m512d, 1, 1, 5)
+test_2y (_mm512_maskz_getmant_round_ps, __m512, __mmask16, __m512, 1, 1, 5)
+test_2 (_mm512_maskz_permute_pd, __m512d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_permute_ps, __m512, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_permutex_epi64, __m512i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_permutex_pd, __m512d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_rol_epi32, __m512i, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_rol_epi64, __m512i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_ror_epi32, __m512i, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_ror_epi64, __m512i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_shuffle_epi32, __m512i, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_slli_epi32, __m512i, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_slli_epi64, __m512i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_sqrt_round_pd, __m512d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_sqrt_round_ps, __m512, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_srai_epi32, __m512i, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_srai_epi64, __m512i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_srli_epi32, __m512i, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_srli_epi64, __m512i, __mmask8, __m512i, 1)
+test_2 (_mm512_max_round_pd, __m512d, __m512d, __m512d, 5)
+test_2 (_mm512_max_round_ps, __m512, __m512, __m512, 5)
+test_2 (_mm512_min_round_pd, __m512d, __m512d, __m512d, 5)
+test_2 (_mm512_min_round_ps, __m512, __m512, __m512, 5)
+test_2 (_mm512_mul_round_pd, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_mul_round_ps, __m512, __m512, __m512, 1)
+test_2 (_mm512_scalef_round_pd, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_scalef_round_ps, __m512, __m512, __m512, 1)
+test_2 (_mm512_shuffle_f32x4, __m512, __m512, __m512, 1)
+test_2 (_mm512_shuffle_f64x2, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_shuffle_i32x4, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_shuffle_i64x2, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_shuffle_pd, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_shuffle_ps, __m512, __m512, __m512, 1)
+test_2 (_mm512_sub_round_pd, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_sub_round_ps, __m512, __m512, __m512, 1)
+test_2 (_mm_add_round_sd, __m128d, __m128d, __m128d, 1)
+test_2 (_mm_add_round_ss, __m128, __m128, __m128, 1)
+test_2 (_mm_cmp_sd_mask, __mmask8, __m128d, __m128d, 1)
+test_2 (_mm_cmp_ss_mask, __mmask8, __m128, __m128, 1)
+#ifdef __x86_64__
+test_2 (_mm_cvt_roundi64_sd, __m128d, __m128d, long long, 1)
+test_2 (_mm_cvt_roundi64_ss, __m128, __m128, long long, 1)
+#endif
+test_2 (_mm_cvt_roundsd_ss, __m128, __m128, __m128d, 1)
+test_2 (_mm_cvt_roundss_sd, __m128d, __m128d, __m128, 5)
+test_2 (_mm_cvt_roundu32_ss, __m128, __m128, unsigned, 1)
+#ifdef __x86_64__
+test_2 (_mm_cvt_roundu64_sd, __m128d, __m128d, unsigned long long, 1)
+test_2 (_mm_cvt_roundu64_ss, __m128, __m128, unsigned long long, 1)
+#endif
+test_2 (_mm_div_round_sd, __m128d, __m128d, __m128d, 1)
+test_2 (_mm_div_round_ss, __m128, __m128, __m128, 1)
+test_2 (_mm_getexp_round_sd, __m128d, __m128d, __m128d, 5)
+test_2 (_mm_getexp_round_ss, __m128, __m128, __m128, 5)
+test_2y (_mm_getmant_round_sd, __m128d, __m128d, __m128d, 1, 1, 5)
+test_2y (_mm_getmant_round_ss, __m128, __m128, __m128, 1, 1, 5)
+test_2 (_mm_mul_round_sd, __m128d, __m128d, __m128d, 1)
+test_2 (_mm_mul_round_ss, __m128, __m128, __m128, 1)
+test_2 (_mm_scalef_round_sd, __m128d, __m128d, __m128d, 1)
+test_2 (_mm_scalef_round_ss, __m128, __m128, __m128, 1)
+test_2 (_mm_sqrt_round_sd, __m128d, __m128d, __m128d, 1)
+test_2 (_mm_sqrt_round_ss, __m128, __m128, __m128, 1)
+test_2 (_mm_sub_round_sd, __m128d, __m128d, __m128d, 1)
+test_2 (_mm_sub_round_ss, __m128, __m128, __m128, 1)
+test_2x (_mm512_cmp_round_pd_mask, __mmask8, __m512d, __m512d, 1, 5)
+test_2x (_mm512_cmp_round_ps_mask, __mmask16, __m512, __m512, 1, 5)
+test_2x (_mm512_maskz_roundscale_round_pd, __m512d, __mmask8, __m512d, 1, 5)
+test_2x (_mm512_maskz_roundscale_round_ps, __m512, __mmask16, __m512, 1, 5)
+test_2x (_mm_cmp_round_sd_mask, __mmask8, __m128d, __m128d, 1, 5)
+test_2x (_mm_cmp_round_ss_mask, __mmask8, __m128, __m128, 1, 5)
+test_2x (_mm_comi_round_sd, int, __m128d, __m128d, 1, 5)
+test_2x (_mm_comi_round_ss, int, __m128, __m128, 1, 5)
+test_2x (_mm_roundscale_round_sd, __m128d, __m128d, __m128d, 1, 5)
+test_2x (_mm_roundscale_round_ss, __m128, __m128, __m128, 1, 5)
+test_3 (_mm512_fmadd_round_pd, __m512d, __m512d, __m512d, __m512d, 1)
+test_3 (_mm512_fmadd_round_ps, __m512, __m512, __m512, __m512, 1)
+test_3 (_mm512_fmaddsub_round_pd, __m512d, __m512d, __m512d, __m512d, 1)
+test_3 (_mm512_fmaddsub_round_ps, __m512, __m512, __m512, __m512, 1)
+test_3 (_mm512_fmsub_round_pd, __m512d, __m512d, __m512d, __m512d, 1)
+test_3 (_mm512_fmsub_round_ps, __m512, __m512, __m512, __m512, 1)
+test_3 (_mm512_fmsubadd_round_pd, __m512d, __m512d, __m512d, __m512d, 1)
+test_3 (_mm512_fmsubadd_round_ps, __m512, __m512, __m512, __m512, 1)
+test_3 (_mm512_fnmadd_round_pd, __m512d, __m512d, __m512d, __m512d, 1)
+test_3 (_mm512_fnmadd_round_ps, __m512, __m512, __m512, __m512, 1)
+test_3 (_mm512_fnmsub_round_pd, __m512d, __m512d, __m512d, __m512d, 1)
+test_3 (_mm512_fnmsub_round_ps, __m512, __m512, __m512, __m512, 1)
+test_3 (_mm512_mask_cmp_epi32_mask, __mmask16, __mmask16, __m512i, __m512i, 1)
+test_3 (_mm512_mask_cmp_epi64_mask, __mmask8, __mmask8, __m512i, __m512i, 1)
+test_3 (_mm512_mask_cmp_epu32_mask, __mmask16, __mmask16, __m512i, __m512i, 1)
+test_3 (_mm512_mask_cmp_epu64_mask, __mmask8, __mmask8, __m512i, __m512i, 1)
+test_3 (_mm512_mask_cmp_pd_mask, __mmask8, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_mask_cmp_ps_mask, __mmask16, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_mask_cvt_roundepi32_ps, __m512, __m512, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_cvt_roundepu32_ps, __m512, __m512, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_cvt_roundpd_epi32, __m256i, __m256i, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_cvt_roundpd_epu32, __m256i, __m256i, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_cvt_roundpd_ps, __m256, __m256, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_cvt_roundph_ps, __m512, __m512, __mmask16, __m256i, 5)
+test_3 (_mm512_mask_cvt_roundps_epi32, __m512i, __m512i, __mmask16, __m512, 1)
+test_3 (_mm512_mask_cvt_roundps_epu32, __m512i, __m512i, __mmask16, __m512, 1)
+test_3 (_mm512_mask_cvt_roundps_pd, __m512d, __m512d, __mmask8, __m256, 5)
+test_3 (_mm512_mask_cvtps_ph, __m256i, __m256i, __mmask16, __m512, 1)
+test_3 (_mm512_mask_cvtt_roundpd_epi32, __m256i, __m256i, __mmask8, __m512d, 5)
+test_3 (_mm512_mask_cvtt_roundpd_epu32, __m256i, __m256i, __mmask8, __m512d, 5)
+test_3 (_mm512_mask_cvtt_roundps_epi32, __m512i, __m512i, __mmask16, __m512, 5)
+test_3 (_mm512_mask_cvtt_roundps_epu32, __m512i, __m512i, __mmask16, __m512, 5)
+test_3 (_mm512_mask_extractf32x4_ps, __m128, __m128, __mmask8, __m512, 1)
+test_3 (_mm512_mask_extractf64x4_pd, __m256d, __m256d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_extracti32x4_epi32, __m128i, __m128i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_extracti64x4_epi64, __m256i, __m256i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_getexp_round_pd, __m512d, __m512d, __mmask8, __m512d, 5)
+test_3 (_mm512_mask_getexp_round_ps, __m512, __m512, __mmask16, __m512, 5)
+test_3y (_mm512_mask_getmant_round_pd, __m512d, __m512d, __mmask8, __m512d, 1, 1, 5)
+test_3y (_mm512_mask_getmant_round_ps, __m512, __m512, __mmask16, __m512, 1, 1, 5)
+test_3 (_mm512_mask_permute_pd, __m512d, __m512d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_permute_ps, __m512, __m512, __mmask16, __m512, 1)
+test_3 (_mm512_mask_permutex_epi64, __m512i, __m512i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_permutex_pd, __m512d, __m512d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_rol_epi32, __m512i, __m512i, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_rol_epi64, __m512i, __m512i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_ror_epi32, __m512i, __m512i, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_ror_epi64, __m512i, __m512i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_shuffle_epi32, __m512i, __m512i, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_slli_epi32, __m512i, __m512i, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_slli_epi64, __m512i, __m512i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_sqrt_round_pd, __m512d, __m512d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_sqrt_round_ps, __m512, __m512, __mmask16, __m512, 1)
+test_3 (_mm512_mask_srai_epi32, __m512i, __m512i, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_srai_epi64, __m512i, __m512i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_srli_epi32, __m512i, __m512i, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_srli_epi64, __m512i, __m512i, __mmask8, __m512i, 1)
+test_3 (_mm512_maskz_add_round_pd, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_add_round_ps, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_maskz_alignr_epi32, __m512i, __mmask16, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_alignr_epi64, __m512i, __mmask8, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_div_round_pd, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_div_round_ps, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_maskz_insertf32x4, __m512, __mmask16, __m512, __m128, 1)
+test_3 (_mm512_maskz_insertf64x4, __m512d, __mmask8, __m512d, __m256d, 1)
+test_3 (_mm512_maskz_inserti32x4, __m512i, __mmask16, __m512i, __m128i, 1)
+test_3 (_mm512_maskz_inserti64x4, __m512i, __mmask8, __m512i, __m256i, 1)
+test_3 (_mm512_maskz_max_round_pd, __m512d, __mmask8, __m512d, __m512d, 5)
+test_3 (_mm512_maskz_max_round_ps, __m512, __mmask16, __m512, __m512, 5)
+test_3 (_mm512_maskz_min_round_pd, __m512d, __mmask8, __m512d, __m512d, 5)
+test_3 (_mm512_maskz_min_round_ps, __m512, __mmask16, __m512, __m512, 5)
+test_3 (_mm512_maskz_mul_round_pd, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_mul_round_ps, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_maskz_scalef_round_pd, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_scalef_round_ps, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_maskz_shuffle_f32x4, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_maskz_shuffle_f64x2, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_shuffle_i32x4, __m512i, __mmask16, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_shuffle_i64x2, __m512i, __mmask8, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_shuffle_pd, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_shuffle_ps, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_maskz_sub_round_pd, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_sub_round_ps, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_ternarylogic_epi32, __m512i, __m512i, __m512i, __m512i, 1)
+test_3 (_mm512_ternarylogic_epi64, __m512i, __m512i, __m512i, __m512i, 1)
+test_3 (_mm_fmadd_round_sd, __m128d, __m128d, __m128d, __m128d, 1)
+test_3 (_mm_fmadd_round_ss, __m128, __m128, __m128, __m128, 1)
+test_3 (_mm_fmsub_round_sd, __m128d, __m128d, __m128d, __m128d, 1)
+test_3 (_mm_fmsub_round_ss, __m128, __m128, __m128, __m128, 1)
+test_3 (_mm_fnmadd_round_sd, __m128d, __m128d, __m128d, __m128d, 1)
+test_3 (_mm_fnmadd_round_ss, __m128, __m128, __m128, __m128, 1)
+test_3 (_mm_fnmsub_round_sd, __m128d, __m128d, __m128d, __m128d, 1)
+test_3 (_mm_fnmsub_round_ss, __m128, __m128, __m128, __m128, 1)
+test_3 (_mm_mask_cmp_sd_mask, __mmask8, __mmask8, __m128d, __m128d, 1)
+test_3 (_mm_mask_cmp_ss_mask, __mmask8, __mmask8, __m128, __m128, 1)
+test_3v (_mm512_i32scatter_epi32, void *, __m512i, __m512i, 1)
+test_3v (_mm512_i32scatter_epi64, void *, __m256i, __m512i, 1)
+test_3v (_mm512_i32scatter_pd, void *, __m256i, __m512d, 1)
+test_3v (_mm512_i32scatter_ps, void *, __m512i, __m512, 1)
+test_3v (_mm512_i64scatter_epi32, void *, __m512i, __m256i, 1)
+test_3v (_mm512_i64scatter_epi64, void *, __m512i, __m512i, 1)
+test_3v (_mm512_i64scatter_pd, void *, __m512i, __m512d, 1)
+test_3v (_mm512_i64scatter_ps, void *, __m512i, __m256, 1)
+test_3x (_mm512_mask_roundscale_round_pd, __m512d, __m512d, __mmask8, __m512d, 1, 5)
+test_3x (_mm512_mask_roundscale_round_ps, __m512, __m512, __mmask16, __m512, 1, 5)
+test_3x (_mm_fixupimm_round_sd, __m128d, __m128d, __m128d, __m128i, 1, 5)
+test_3x (_mm_fixupimm_round_ss, __m128, __m128, __m128, __m128i, 1, 5)
+test_3x (_mm_mask_cmp_round_sd_mask, __mmask8, __mmask8, __m128d, __m128d, 1, 5)
+test_3x (_mm_mask_cmp_round_ss_mask, __mmask8, __mmask8, __m128, __m128, 1, 5)
+test_4 (_mm512_mask3_fmadd_round_pd, __m512d, __m512d, __m512d, __m512d, __mmask8, 1)
+test_4 (_mm512_mask3_fmadd_round_ps, __m512, __m512, __m512, __m512, __mmask16, 1)
+test_4 (_mm512_mask3_fmaddsub_round_pd, __m512d, __m512d, __m512d, __m512d, __mmask8, 1)
+test_4 (_mm512_mask3_fmaddsub_round_ps, __m512, __m512, __m512, __m512, __mmask16, 1)
+test_4 (_mm512_mask3_fmsub_round_pd, __m512d, __m512d, __m512d, __m512d, __mmask8, 1)
+test_4 (_mm512_mask3_fmsub_round_ps, __m512, __m512, __m512, __m512, __mmask16, 1)
+test_4 (_mm512_mask3_fmsubadd_round_pd, __m512d, __m512d, __m512d, __m512d, __mmask8, 1)
+test_4 (_mm512_mask3_fmsubadd_round_ps, __m512, __m512, __m512, __m512, __mmask16, 1)
+test_4 (_mm512_mask3_fnmadd_round_pd, __m512d, __m512d, __m512d, __m512d, __mmask8, 1)
+test_4 (_mm512_mask3_fnmadd_round_ps, __m512, __m512, __m512, __m512, __mmask16, 1)
+test_4 (_mm512_mask3_fnmsub_round_pd, __m512d, __m512d, __m512d, __m512d, __mmask8, 1)
+test_4 (_mm512_mask3_fnmsub_round_ps, __m512, __m512, __m512, __m512, __mmask16, 1)
+test_4 (_mm512_mask_add_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_add_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_alignr_epi32, __m512i, __m512i, __mmask16, __m512i, __m512i, 1)
+test_4 (_mm512_mask_alignr_epi64, __m512i, __m512i, __mmask8, __m512i, __m512i, 1)
+test_4 (_mm512_mask_div_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_div_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_fmadd_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_fmadd_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_fmaddsub_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_fmaddsub_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_fmsub_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_fmsub_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_fmsubadd_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_fmsubadd_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_fnmadd_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_fnmadd_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_fnmsub_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_fnmsub_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_i32gather_epi32, __m512i, __m512i, __mmask16, __m512i, void const *, 1)
+test_4 (_mm512_mask_i32gather_epi64, __m512i, __m512i, __mmask8, __m256i, void const *, 1)
+test_4 (_mm512_mask_i32gather_pd, __m512d, __m512d, __mmask8, __m256i, void const *, 1)
+test_4 (_mm512_mask_i32gather_ps, __m512, __m512, __mmask16, __m512i, void const *, 1)
+test_4 (_mm512_mask_i64gather_epi32, __m256i, __m256i, __mmask8, __m512i, void const *, 1)
+test_4 (_mm512_mask_i64gather_epi64, __m512i, __m512i, __mmask8, __m512i, void const *, 1)
+test_4 (_mm512_mask_i64gather_pd, __m512d, __m512d, __mmask8, __m512i, void const *, 1)
+test_4 (_mm512_mask_i64gather_ps, __m256, __m256, __mmask8, __m512i, void const *, 1)
+test_4 (_mm512_mask_insertf32x4, __m512, __m512, __mmask16, __m512, __m128, 1)
+test_4 (_mm512_mask_insertf64x4, __m512d, __m512d, __mmask8, __m512d, __m256d, 1)
+test_4 (_mm512_mask_inserti32x4, __m512i, __m512i, __mmask16, __m512i, __m128i, 1)
+test_4 (_mm512_mask_inserti64x4, __m512i, __m512i, __mmask8, __m512i, __m256i, 1)
+test_4 (_mm512_mask_max_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 5)
+test_4 (_mm512_mask_max_round_ps, __m512, __m512, __mmask16, __m512, __m512, 5)
+test_4 (_mm512_mask_min_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 5)
+test_4 (_mm512_mask_min_round_ps, __m512, __m512, __mmask16, __m512, __m512, 5)
+test_4 (_mm512_mask_mul_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_mul_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_scalef_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_scalef_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_shuffle_f32x4, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_shuffle_f64x2, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_shuffle_i32x4, __m512i, __m512i, __mmask16, __m512i, __m512i, 1)
+test_4 (_mm512_mask_shuffle_i64x2, __m512i, __m512i, __mmask8, __m512i, __m512i, 1)
+test_4 (_mm512_mask_shuffle_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_shuffle_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_sub_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_sub_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_ternarylogic_epi32, __m512i, __m512i, __mmask16, __m512i, __m512i, 1)
+test_4 (_mm512_mask_ternarylogic_epi64, __m512i, __m512i, __mmask8, __m512i, __m512i, 1)
+test_4 (_mm512_maskz_fmadd_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512d, 1)
+test_4 (_mm512_maskz_fmadd_round_ps, __m512, __mmask16, __m512, __m512, __m512, 1)
+test_4 (_mm512_maskz_fmaddsub_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512d, 1)
+test_4 (_mm512_maskz_fmaddsub_round_ps, __m512, __mmask16, __m512, __m512, __m512, 1)
+test_4 (_mm512_maskz_fmsub_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512d, 1)
+test_4 (_mm512_maskz_fmsub_round_ps, __m512, __mmask16, __m512, __m512, __m512, 1)
+test_4 (_mm512_maskz_fmsubadd_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512d, 1)
+test_4 (_mm512_maskz_fmsubadd_round_ps, __m512, __mmask16, __m512, __m512, __m512, 1)
+test_4 (_mm512_maskz_fnmadd_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512d, 1)
+test_4 (_mm512_maskz_fnmadd_round_ps, __m512, __mmask16, __m512, __m512, __m512, 1)
+test_4 (_mm512_maskz_fnmsub_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512d, 1)
+test_4 (_mm512_maskz_fnmsub_round_ps, __m512, __mmask16, __m512, __m512, __m512, 1)
+test_4 (_mm512_maskz_ternarylogic_epi32, __m512i, __mmask16, __m512i, __m512i, __m512i, 1)
+test_4 (_mm512_maskz_ternarylogic_epi64, __m512i, __mmask8, __m512i, __m512i, __m512i, 1)
+test_4v (_mm512_mask_i32scatter_epi32, void *, __mmask16, __m512i, __m512i, 1)
+test_4v (_mm512_mask_i32scatter_epi64, void *, __mmask8, __m256i, __m512i, 1)
+test_4v (_mm512_mask_i32scatter_pd, void *, __mmask8, __m256i, __m512d, 1)
+test_4v (_mm512_mask_i32scatter_ps, void *, __mmask16, __m512i, __m512, 1)
+test_4v (_mm512_mask_i64scatter_epi32, void *, __mmask8, __m512i, __m256i, 1)
+test_4v (_mm512_mask_i64scatter_epi64, void *, __mmask8, __m512i, __m512i, 1)
+test_4v (_mm512_mask_i64scatter_pd, void *, __mmask8, __m512i, __m512d, 1)
+test_4v (_mm512_mask_i64scatter_ps, void *, __mmask8, __m512i, __m256, 1)
+test_4x (_mm512_mask_fixupimm_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512i, 1, 5)
+test_4x (_mm512_mask_fixupimm_round_ps, __m512, __m512, __mmask16, __m512, __m512i, 1, 5)
+test_4x (_mm512_maskz_fixupimm_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512i, 1, 5)
+test_4x (_mm512_maskz_fixupimm_round_ps, __m512, __mmask16, __m512, __m512, __m512i, 1, 5)
+test_4x (_mm_mask_fixupimm_round_sd, __m128d, __m128d, __mmask8, __m128d, __m128i, 1, 5)
+test_4x (_mm_mask_fixupimm_round_ss, __m128, __m128, __mmask8, __m128, __m128i, 1, 5)
+test_4x (_mm_maskz_fixupimm_round_sd, __m128d, __mmask8, __m128d, __m128d, __m128i, 1, 5)
+test_4x (_mm_maskz_fixupimm_round_ss, __m128, __mmask8, __m128, __m128, __m128i, 1, 5)
+
+/* avx512pfintrin.h */
+test_3vx (_mm512_mask_prefetch_i32gather_ps, __m512i, __mmask16, void const *, 1, 1)
+test_3vx (_mm512_mask_prefetch_i32scatter_ps, void const *, __mmask16, __m512i, 1, 1)
+test_3vx (_mm512_mask_prefetch_i64gather_ps, __m512i, __mmask8, void const *, 1, 1)
+test_3vx (_mm512_mask_prefetch_i64scatter_ps, void const *, __mmask8, __m512i, 1, 1)
+
+/* avx512erintrin.h */
+test_1 (_mm512_exp2a23_round_pd, __m512d, __m512d, 1)
+test_1 (_mm512_exp2a23_round_ps, __m512, __m512, 1)
+test_1 (_mm512_rcp28_round_pd, __m512d, __m512d, 1)
+test_1 (_mm512_rcp28_round_ps, __m512, __m512, 1)
+test_1 (_mm512_rsqrt28_round_pd, __m512d, __m512d, 1)
+test_1 (_mm512_rsqrt28_round_ps, __m512, __m512, 1)
+test_2 (_mm512_maskz_exp2a23_round_pd, __m512d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_exp2a23_round_ps, __m512, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_rcp28_round_pd, __m512d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_rcp28_round_ps, __m512, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_rsqrt28_round_pd, __m512d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_rsqrt28_round_ps, __m512, __mmask16, __m512, 1)
+test_3 (_mm512_mask_exp2a23_round_pd, __m512d, __m512d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_exp2a23_round_ps, __m512, __m512, __mmask16, __m512, 1)
+test_3 (_mm512_mask_rcp28_round_pd, __m512d, __m512d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_rcp28_round_ps, __m512, __m512, __mmask16, __m512, 1)
+test_3 (_mm512_mask_rsqrt28_round_pd, __m512d, __m512d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_rsqrt28_round_ps, __m512, __m512, __mmask16, __m512, 1)
+
+/* shaintrin.h */
+test_2 (_mm_sha1rnds4_epu32, __m128i, __m128i, __m128i, 1)
 
 /* wmmintrin.h */
 test_1 (_mm_aeskeygenassist_si128, __m128i, __m128i, 1)
diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c
index 8e4c4bd3ebd..05b4af0a875 100644
--- a/gcc/testsuite/gcc.target/i386/sse-22.c
+++ b/gcc/testsuite/gcc.target/i386/sse-22.c
@@ -30,6 +30,10 @@
   type _CONCAT(_,func) (op1_type A, int const I, int const L)		\
   { return func (A, imm1, imm2); }
 
+#define test_1y(func, type, op1_type, imm1, imm2, imm3)			\
+  type _CONCAT(_,func) (op1_type A, int const I, int const L, int const R)\
+  { return func (A, imm1, imm2, imm3); }
+
 #define test_2(func, type, op1_type, op2_type, imm)			\
   type _CONCAT(_,func) (op1_type A, op2_type B, int const I)		\
   { return func (A, B, imm); }
@@ -38,19 +42,64 @@
   type _CONCAT(_,func) (op1_type A, op2_type B, int const I, int const L) \
   { return func (A, B, imm1, imm2); }
 
+#define test_2y(func, type, op1_type, op2_type, imm1, imm2, imm3)	 \
+  type _CONCAT(_,func) (op1_type A, op2_type B, int const I, int const L,\
+			int const R)					 \
+  { return func (A, B, imm1, imm2, imm3); }
+
+#define test_2vx(func, op1_type, op2_type, imm1, imm2)     \
+  _CONCAT(_,func) (op1_type A, op2_type B, int const I, int const L) \
+  { func (A, B, imm1, imm2); }
+
 #define test_3(func, type, op1_type, op2_type, op3_type, imm)		\
   type _CONCAT(_,func) (op1_type A, op2_type B,				\
 			op3_type C, int const I)			\
   { return func (A, B, C, imm); }
 
+#define test_3x(func, type, op1_type, op2_type, op3_type, imm1, imm2)		\
+  type _CONCAT(_,func) (op1_type A, op2_type B,				\
+			op3_type C, int const I, int const L)			\
+  { return func (A, B, C, imm1, imm2); }
+
+#define test_3y(func, type, op1_type, op2_type, op3_type, imm1, imm2, imm3)	\
+  type _CONCAT(_,func) (op1_type A, op2_type B,				\
+			op3_type C, int const I, int const L, int const R)	\
+  { return func (A, B, C, imm1, imm2, imm3); }
+
+#define test_3v(func, op1_type, op2_type, op3_type, imm)		\
+  _CONCAT(_,func) (op1_type A, op2_type B,				\
+		   op3_type C, int const I)				\
+  { func (A, B, C, imm); }
+
+#define test_3vx(func, op1_type, op2_type, op3_type, imm1, imm2)   \
+  _CONCAT(_,func) (op1_type A, op2_type B,             \
+           op3_type C, int const I, int const L)       \
+  { func (A, B, C, imm1, imm2); }
+
 #define test_4(func, type, op1_type, op2_type, op3_type, op4_type, imm)	\
   type _CONCAT(_,func) (op1_type A, op2_type B,				\
 			op3_type C, op4_type D, int const I)		\
   { return func (A, B, C, D, imm); }
 
+#define test_4x(func, type, op1_type, op2_type, op3_type, op4_type, imm1, imm2)	\
+  type _CONCAT(_,func) (op1_type A, op2_type B,				\
+			op3_type C, op4_type D, int const I, int const L)		\
+  { return func (A, B, C, D, imm1, imm2); }
+
+#define test_4y(func, type, op1_type, op2_type, op3_type, op4_type, imm1, imm2, imm3)	\
+  type _CONCAT(_,func) (op1_type A, op2_type B,	op3_type C,		\
+			op4_type D, int const I, int const L, int const R)		\
+  { return func (A, B, C, D, imm1, imm2, imm3); }
+
+
+#define test_4v(func, op1_type, op2_type, op3_type, op4_type, imm)	\
+  _CONCAT(_,func) (op1_type A, op2_type B,				\
+		   op3_type C, op4_type D, int const I)			\
+  { func (A, B, C, D, imm); }
+
 
 #ifndef DIFFERENT_PRAGMAS
-#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt")
+#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512pf,avx512er,avx512cd,sha")
 #endif
 
 /* Following intrinsics require immediate arguments.  They
@@ -163,9 +212,9 @@ test_4 (_mm_cmpestro, int, __m128i, int, __m128i, int, 1)
 test_4 (_mm_cmpestrs, int, __m128i, int, __m128i, int, 1)
 test_4 (_mm_cmpestrz, int, __m128i, int, __m128i, int, 1)
 
-/* immintrin.h (AVX/AVX2/RDRND/FSGSBASE/F16C/RTM) */
+/* immintrin.h (AVX/AVX2/RDRND/FSGSBASE/F16C/RTM/AVX512F/SHA) */
 #ifdef DIFFERENT_PRAGMAS
-#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm")
+#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha")
 #endif
 #include <immintrin.h>
 test_1 (_cvtss_sh, unsigned short, float, 1)
@@ -248,6 +297,378 @@ test_2 ( _mm256_i64gather_epi32, __m128i, int const *, __m256i, 1)
 /* rtmintrin.h */
 test_0 ( _xabort, void, 1)
 
+/* avx512fintrin.h */
+test_1 (_mm512_cvt_roundepi32_ps, __m512, __m512i, 1)
+test_1 (_mm512_cvt_roundepu32_ps, __m512, __m512i, 1)
+test_1 (_mm512_cvt_roundpd_epi32, __m256i, __m512d, 1)
+test_1 (_mm512_cvt_roundpd_epu32, __m256i, __m512d, 1)
+test_1 (_mm512_cvt_roundpd_ps, __m256, __m512d, 1)
+test_1 (_mm512_cvt_roundph_ps, __m512, __m256i, 5)
+test_1 (_mm512_cvt_roundps_epi32, __m512i, __m512, 1)
+test_1 (_mm512_cvt_roundps_epu32, __m512i, __m512, 1)
+test_1 (_mm512_cvt_roundps_pd, __m512d, __m256, 5)
+test_1 (_mm512_cvtps_ph, __m256i, __m512, 1)
+test_1 (_mm512_cvtt_roundpd_epi32, __m256i, __m512d, 5)
+test_1 (_mm512_cvtt_roundpd_epu32, __m256i, __m512d, 5)
+test_1 (_mm512_cvtt_roundps_epi32, __m512i, __m512, 5)
+test_1 (_mm512_cvtt_roundps_epu32, __m512i, __m512, 5)
+test_1 (_mm512_extractf32x4_ps, __m128, __m512, 1)
+test_1 (_mm512_extractf64x4_pd, __m256d, __m512d, 1)
+test_1 (_mm512_extracti32x4_epi32, __m128i, __m512i, 1)
+test_1 (_mm512_extracti64x4_epi64, __m256i, __m512i, 1)
+test_1 (_mm512_getexp_round_pd, __m512d, __m512d, 5)
+test_1 (_mm512_getexp_round_ps, __m512, __m512, 5)
+test_1y (_mm512_getmant_round_pd, __m512d, __m512d, 1, 1, 5)
+test_1y (_mm512_getmant_round_ps, __m512, __m512, 1, 1, 5)
+test_1 (_mm512_permute_pd, __m512d, __m512d, 1)
+test_1 (_mm512_permute_ps, __m512, __m512, 1)
+test_1 (_mm512_permutex_epi64, __m512i, __m512i, 1)
+test_1 (_mm512_permutex_pd, __m512d, __m512d, 1)
+test_1 (_mm512_rol_epi32, __m512i, __m512i, 1)
+test_1 (_mm512_rol_epi64, __m512i, __m512i, 1)
+test_1 (_mm512_ror_epi32, __m512i, __m512i, 1)
+test_1 (_mm512_ror_epi64, __m512i, __m512i, 1)
+test_1 (_mm512_shuffle_epi32, __m512i, __m512i, 1)
+test_1 (_mm512_slli_epi32, __m512i, __m512i, 1)
+test_1 (_mm512_slli_epi64, __m512i, __m512i, 1)
+test_1 (_mm512_sqrt_round_pd, __m512d, __m512d, 1)
+test_1 (_mm512_sqrt_round_ps, __m512, __m512, 1)
+test_1 (_mm512_srai_epi32, __m512i, __m512i, 1)
+test_1 (_mm512_srai_epi64, __m512i, __m512i, 1)
+test_1 (_mm512_srli_epi32, __m512i, __m512i, 1)
+test_1 (_mm512_srli_epi64, __m512i, __m512i, 1)
+test_1 (_mm_cvt_roundsd_i32, int, __m128d, 1)
+test_1 (_mm_cvt_roundsd_u32, unsigned, __m128d, 1)
+test_1 (_mm_cvt_roundss_i32, int, __m128, 1)
+test_1 (_mm_cvt_roundss_u32, unsigned, __m128, 1)
+test_1 (_mm_cvtt_roundsd_i32, int, __m128d, 5)
+test_1 (_mm_cvtt_roundsd_u32, unsigned, __m128d, 5)
+test_1 (_mm_cvtt_roundss_i32, int, __m128, 5)
+test_1 (_mm_cvtt_roundss_u32, unsigned, __m128, 5)
+test_1x (_mm512_getmant_pd, __m512d, __m512d, 1, 1)
+test_1x (_mm512_getmant_ps, __m512, __m512, 1, 1)
+test_1x (_mm_cvt_roundi32_ss, __m128, __m128, 1, 1)
+test_2 (_mm512_add_round_pd, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_add_round_ps, __m512, __m512, __m512, 1)
+test_2 (_mm512_alignr_epi32, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_alignr_epi64, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_cmp_epi32_mask, __mmask16, __m512i, __m512i, 1)
+test_2 (_mm512_cmp_epi64_mask, __mmask8, __m512i, __m512i, 1)
+test_2 (_mm512_cmp_epu32_mask, __mmask16, __m512i, __m512i, 1)
+test_2 (_mm512_cmp_epu64_mask, __mmask8, __m512i, __m512i, 1)
+test_2 (_mm512_cmp_pd_mask, __mmask8, __m512d, __m512d, 1)
+test_2 (_mm512_cmp_ps_mask, __mmask16, __m512, __m512, 1)
+test_2 (_mm512_div_round_pd, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_div_round_ps, __m512, __m512, __m512, 1)
+test_2 (_mm512_i32gather_epi32, __m512i, __m512i, void const *, 1)
+test_2 (_mm512_i32gather_epi64, __m512i, __m256i, void const *, 1)
+test_2 (_mm512_i32gather_pd, __m512d, __m256i, void const *, 1)
+test_2 (_mm512_i32gather_ps, __m512, __m512i, void const *, 1)
+test_2 (_mm512_i64gather_epi32, __m256i, __m512i, void const *, 1)
+test_2 (_mm512_i64gather_epi64, __m512i, __m512i, void const *, 1)
+test_2 (_mm512_i64gather_pd, __m512d, __m512i, void const *, 1)
+test_2 (_mm512_i64gather_ps, __m256, __m512i, void const *, 1)
+test_2 (_mm512_insertf32x4, __m512, __m512, __m128, 1)
+test_2 (_mm512_insertf64x4, __m512d, __m512d, __m256d, 1)
+test_2 (_mm512_inserti32x4, __m512i, __m512i, __m128i, 1)
+test_2 (_mm512_inserti64x4, __m512i, __m512i, __m256i, 1)
+test_2 (_mm512_maskz_cvt_roundepi32_ps, __m512, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_cvt_roundepu32_ps, __m512, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_cvt_roundpd_epi32, __m256i, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_cvt_roundpd_epu32, __m256i, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_cvt_roundpd_ps, __m256, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_cvt_roundph_ps, __m512, __mmask16, __m256i, 5)
+test_2 (_mm512_maskz_cvt_roundps_epi32, __m512i, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_cvt_roundps_epu32, __m512i, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_cvt_roundps_pd, __m512d, __mmask8, __m256, 5)
+test_2 (_mm512_maskz_cvtps_ph, __m256i, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_cvtt_roundpd_epi32, __m256i, __mmask8, __m512d, 5)
+test_2 (_mm512_maskz_cvtt_roundpd_epu32, __m256i, __mmask8, __m512d, 5)
+test_2 (_mm512_maskz_cvtt_roundps_epi32, __m512i, __mmask16, __m512, 5)
+test_2 (_mm512_maskz_cvtt_roundps_epu32, __m512i, __mmask16, __m512, 5)
+test_2 (_mm512_maskz_extractf32x4_ps, __m128, __mmask8, __m512, 1)
+test_2 (_mm512_maskz_extractf64x4_pd, __m256d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_extracti32x4_epi32, __m128i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_extracti64x4_epi64, __m256i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_getexp_round_pd, __m512d, __mmask8, __m512d, 5)
+test_2 (_mm512_maskz_getexp_round_ps, __m512, __mmask16, __m512, 5)
+test_2y (_mm512_maskz_getmant_round_pd, __m512d, __mmask8, __m512d, 1, 1, 5)
+test_2y (_mm512_maskz_getmant_round_ps, __m512, __mmask16, __m512, 1, 1, 5)
+test_2 (_mm512_maskz_permute_pd, __m512d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_permute_ps, __m512, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_permutex_epi64, __m512i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_permutex_pd, __m512d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_rol_epi32, __m512i, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_rol_epi64, __m512i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_ror_epi32, __m512i, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_ror_epi64, __m512i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_shuffle_epi32, __m512i, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_slli_epi32, __m512i, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_slli_epi64, __m512i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_sqrt_round_pd, __m512d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_sqrt_round_ps, __m512, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_srai_epi32, __m512i, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_srai_epi64, __m512i, __mmask8, __m512i, 1)
+test_2 (_mm512_maskz_srli_epi32, __m512i, __mmask16, __m512i, 1)
+test_2 (_mm512_maskz_srli_epi64, __m512i, __mmask8, __m512i, 1)
+test_2 (_mm512_max_round_pd, __m512d, __m512d, __m512d, 5)
+test_2 (_mm512_max_round_ps, __m512, __m512, __m512, 5)
+test_2 (_mm512_min_round_pd, __m512d, __m512d, __m512d, 5)
+test_2 (_mm512_min_round_ps, __m512, __m512, __m512, 5)
+test_2 (_mm512_mul_round_pd, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_mul_round_ps, __m512, __m512, __m512, 1)
+test_2 (_mm512_scalef_round_pd, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_scalef_round_ps, __m512, __m512, __m512, 1)
+test_2 (_mm512_shuffle_f32x4, __m512, __m512, __m512, 1)
+test_2 (_mm512_shuffle_f64x2, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_shuffle_i32x4, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_shuffle_i64x2, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_shuffle_pd, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_shuffle_ps, __m512, __m512, __m512, 1)
+test_2 (_mm512_sub_round_pd, __m512d, __m512d, __m512d, 1)
+test_2 (_mm512_sub_round_ps, __m512, __m512, __m512, 1)
+test_2 (_mm_cmp_sd_mask, __mmask8, __m128d, __m128d, 1)
+test_2 (_mm_cmp_ss_mask, __mmask8, __m128, __m128, 1)
+#ifdef __x86_64__
+test_2 (_mm_cvt_roundi64_sd, __m128d, __m128d, long long, 1)
+test_2 (_mm_cvt_roundi64_ss, __m128, __m128, long long, 1)
+#endif
+test_2 (_mm_cvt_roundu32_ss, __m128, __m128, unsigned, 1)
+#ifdef __x86_64__
+test_2 (_mm_cvt_roundu64_sd, __m128d, __m128d, unsigned long long, 1)
+test_2 (_mm_cvt_roundu64_ss, __m128, __m128, unsigned long long, 1)
+#endif
+test_2x (_mm512_cmp_round_pd_mask, __mmask8, __m512d, __m512d, 1, 5)
+test_2x (_mm512_cmp_round_ps_mask, __mmask16, __m512, __m512, 1, 5)
+test_2x (_mm512_maskz_roundscale_round_pd, __m512d, __mmask8, __m512d, 1, 5)
+test_2x (_mm512_maskz_roundscale_round_ps, __m512, __mmask16, __m512, 1, 5)
+test_2x (_mm_cmp_round_sd_mask, __mmask8, __m128d, __m128d, 1, 5)
+test_2x (_mm_cmp_round_ss_mask, __mmask8, __m128, __m128, 1, 5)
+test_2x (_mm_comi_round_sd, int, __m128d, __m128d, 1, 5)
+test_2x (_mm_comi_round_ss, int, __m128, __m128, 1, 5)
+test_3 (_mm512_fmadd_round_pd, __m512d, __m512d, __m512d, __m512d, 1)
+test_3 (_mm512_fmadd_round_ps, __m512, __m512, __m512, __m512, 1)
+test_3 (_mm512_fmaddsub_round_pd, __m512d, __m512d, __m512d, __m512d, 1)
+test_3 (_mm512_fmaddsub_round_ps, __m512, __m512, __m512, __m512, 1)
+test_3 (_mm512_fmsub_round_pd, __m512d, __m512d, __m512d, __m512d, 1)
+test_3 (_mm512_fmsub_round_ps, __m512, __m512, __m512, __m512, 1)
+test_3 (_mm512_fmsubadd_round_pd, __m512d, __m512d, __m512d, __m512d, 1)
+test_3 (_mm512_fmsubadd_round_ps, __m512, __m512, __m512, __m512, 1)
+test_3 (_mm512_fnmadd_round_pd, __m512d, __m512d, __m512d, __m512d, 1)
+test_3 (_mm512_fnmadd_round_ps, __m512, __m512, __m512, __m512, 1)
+test_3 (_mm512_fnmsub_round_pd, __m512d, __m512d, __m512d, __m512d, 1)
+test_3 (_mm512_fnmsub_round_ps, __m512, __m512, __m512, __m512, 1)
+test_3 (_mm512_mask_cmp_epi32_mask, __mmask16, __mmask16, __m512i, __m512i, 1)
+test_3 (_mm512_mask_cmp_epi64_mask, __mmask8, __mmask8, __m512i, __m512i, 1)
+test_3 (_mm512_mask_cmp_epu32_mask, __mmask16, __mmask16, __m512i, __m512i, 1)
+test_3 (_mm512_mask_cmp_epu64_mask, __mmask8, __mmask8, __m512i, __m512i, 1)
+test_3 (_mm512_mask_cmp_pd_mask, __mmask8, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_mask_cmp_ps_mask, __mmask16, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_mask_cvt_roundepi32_ps, __m512, __m512, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_cvt_roundepu32_ps, __m512, __m512, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_cvt_roundpd_epi32, __m256i, __m256i, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_cvt_roundpd_epu32, __m256i, __m256i, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_cvt_roundpd_ps, __m256, __m256, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_cvt_roundph_ps, __m512, __m512, __mmask16, __m256i, 5)
+test_3 (_mm512_mask_cvt_roundps_epi32, __m512i, __m512i, __mmask16, __m512, 1)
+test_3 (_mm512_mask_cvt_roundps_epu32, __m512i, __m512i, __mmask16, __m512, 1)
+test_3 (_mm512_mask_cvt_roundps_pd, __m512d, __m512d, __mmask8, __m256, 5)
+test_3 (_mm512_mask_cvtps_ph, __m256i, __m256i, __mmask16, __m512, 1)
+test_3 (_mm512_mask_cvtt_roundpd_epi32, __m256i, __m256i, __mmask8, __m512d, 5)
+test_3 (_mm512_mask_cvtt_roundpd_epu32, __m256i, __m256i, __mmask8, __m512d, 5)
+test_3 (_mm512_mask_cvtt_roundps_epi32, __m512i, __m512i, __mmask16, __m512, 5)
+test_3 (_mm512_mask_cvtt_roundps_epu32, __m512i, __m512i, __mmask16, __m512, 5)
+test_3 (_mm512_mask_extractf32x4_ps, __m128, __m128, __mmask8, __m512, 1)
+test_3 (_mm512_mask_extractf64x4_pd, __m256d, __m256d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_extracti32x4_epi32, __m128i, __m128i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_extracti64x4_epi64, __m256i, __m256i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_getexp_round_pd, __m512d, __m512d, __mmask8, __m512d, 5)
+test_3 (_mm512_mask_getexp_round_ps, __m512, __m512, __mmask16, __m512, 5)
+test_3y (_mm512_mask_getmant_round_pd, __m512d, __m512d, __mmask8, __m512d, 1, 1, 5)
+test_3y (_mm512_mask_getmant_round_ps, __m512, __m512, __mmask16, __m512, 1, 1, 5)
+test_3 (_mm512_mask_permute_pd, __m512d, __m512d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_permute_ps, __m512, __m512, __mmask16, __m512, 1)
+test_3 (_mm512_mask_permutex_epi64, __m512i, __m512i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_permutex_pd, __m512d, __m512d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_rol_epi32, __m512i, __m512i, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_rol_epi64, __m512i, __m512i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_ror_epi32, __m512i, __m512i, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_ror_epi64, __m512i, __m512i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_shuffle_epi32, __m512i, __m512i, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_slli_epi32, __m512i, __m512i, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_slli_epi64, __m512i, __m512i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_sqrt_round_pd, __m512d, __m512d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_sqrt_round_ps, __m512, __m512, __mmask16, __m512, 1)
+test_3 (_mm512_mask_srai_epi32, __m512i, __m512i, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_srai_epi64, __m512i, __m512i, __mmask8, __m512i, 1)
+test_3 (_mm512_mask_srli_epi32, __m512i, __m512i, __mmask16, __m512i, 1)
+test_3 (_mm512_mask_srli_epi64, __m512i, __m512i, __mmask8, __m512i, 1)
+test_3 (_mm512_maskz_add_round_pd, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_add_round_ps, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_maskz_alignr_epi32, __m512i, __mmask16, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_alignr_epi64, __m512i, __mmask8, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_div_round_pd, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_div_round_ps, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_maskz_insertf32x4, __m512, __mmask16, __m512, __m128, 1)
+test_3 (_mm512_maskz_insertf64x4, __m512d, __mmask8, __m512d, __m256d, 1)
+test_3 (_mm512_maskz_inserti32x4, __m512i, __mmask16, __m512i, __m128i, 1)
+test_3 (_mm512_maskz_inserti64x4, __m512i, __mmask8, __m512i, __m256i, 1)
+test_3 (_mm512_maskz_max_round_pd, __m512d, __mmask8, __m512d, __m512d, 5)
+test_3 (_mm512_maskz_max_round_ps, __m512, __mmask16, __m512, __m512, 5)
+test_3 (_mm512_maskz_min_round_pd, __m512d, __mmask8, __m512d, __m512d, 5)
+test_3 (_mm512_maskz_min_round_ps, __m512, __mmask16, __m512, __m512, 5)
+test_3 (_mm512_maskz_mul_round_pd, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_mul_round_ps, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_maskz_scalef_round_pd, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_scalef_round_ps, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_maskz_shuffle_f32x4, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_maskz_shuffle_f64x2, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_shuffle_i32x4, __m512i, __mmask16, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_shuffle_i64x2, __m512i, __mmask8, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_shuffle_pd, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_shuffle_ps, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_maskz_sub_round_pd, __m512d, __mmask8, __m512d, __m512d, 1)
+test_3 (_mm512_maskz_sub_round_ps, __m512, __mmask16, __m512, __m512, 1)
+test_3 (_mm512_ternarylogic_epi32, __m512i, __m512i, __m512i, __m512i, 1)
+test_3 (_mm512_ternarylogic_epi64, __m512i, __m512i, __m512i, __m512i, 1)
+test_3 (_mm_mask_cmp_sd_mask, __mmask8, __mmask8, __m128d, __m128d, 1)
+test_3 (_mm_mask_cmp_ss_mask, __mmask8, __mmask8, __m128, __m128, 1)
+test_3v (_mm512_i32scatter_epi32, void *, __m512i, __m512i, 1)
+test_3v (_mm512_i32scatter_epi64, void *, __m256i, __m512i, 1)
+test_3v (_mm512_i32scatter_pd, void *, __m256i, __m512d, 1)
+test_3v (_mm512_i32scatter_ps, void *, __m512i, __m512, 1)
+test_3v (_mm512_i64scatter_epi32, void *, __m512i, __m256i, 1)
+test_3v (_mm512_i64scatter_epi64, void *, __m512i, __m512i, 1)
+test_3v (_mm512_i64scatter_pd, void *, __m512i, __m512d, 1)
+test_3v (_mm512_i64scatter_ps, void *, __m512i, __m256, 1)
+test_3x (_mm512_mask_roundscale_round_pd, __m512d, __m512d, __mmask8, __m512d, 1, 5)
+test_3x (_mm512_mask_roundscale_round_ps, __m512, __m512, __mmask16, __m512, 1, 5)
+test_3x (_mm512_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m512d, __m512d, 1, 5)
+test_3x (_mm512_mask_cmp_round_ps_mask, __mmask16, __mmask16, __m512, __m512, 1, 5)
+test_3x (_mm_fixupimm_round_sd, __m128d, __m128d, __m128d, __m128i, 1, 5)
+test_3x (_mm_fixupimm_round_ss, __m128, __m128, __m128, __m128i, 1, 5)
+test_3x (_mm_mask_cmp_round_sd_mask, __mmask8, __mmask8, __m128d, __m128d, 1, 5)
+test_3x (_mm_mask_cmp_round_ss_mask, __mmask8, __mmask8, __m128, __m128, 1, 5)
+test_4 (_mm512_mask3_fmadd_round_pd, __m512d, __m512d, __m512d, __m512d, __mmask8, 1)
+test_4 (_mm512_mask3_fmadd_round_ps, __m512, __m512, __m512, __m512, __mmask16, 1)
+test_4 (_mm512_mask3_fmaddsub_round_pd, __m512d, __m512d, __m512d, __m512d, __mmask8, 1)
+test_4 (_mm512_mask3_fmaddsub_round_ps, __m512, __m512, __m512, __m512, __mmask16, 1)
+test_4 (_mm512_mask3_fmsub_round_pd, __m512d, __m512d, __m512d, __m512d, __mmask8, 1)
+test_4 (_mm512_mask3_fmsub_round_ps, __m512, __m512, __m512, __m512, __mmask16, 1)
+test_4 (_mm512_mask3_fmsubadd_round_pd, __m512d, __m512d, __m512d, __m512d, __mmask8, 1)
+test_4 (_mm512_mask3_fmsubadd_round_ps, __m512, __m512, __m512, __m512, __mmask16, 1)
+test_4 (_mm512_mask3_fnmadd_round_pd, __m512d, __m512d, __m512d, __m512d, __mmask8, 1)
+test_4 (_mm512_mask3_fnmadd_round_ps, __m512, __m512, __m512, __m512, __mmask16, 1)
+test_4 (_mm512_mask3_fnmsub_round_pd, __m512d, __m512d, __m512d, __m512d, __mmask8, 1)
+test_4 (_mm512_mask3_fnmsub_round_ps, __m512, __m512, __m512, __m512, __mmask16, 1)
+test_4 (_mm512_mask_add_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_add_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_alignr_epi32, __m512i, __m512i, __mmask16, __m512i, __m512i, 1)
+test_4 (_mm512_mask_alignr_epi64, __m512i, __m512i, __mmask8, __m512i, __m512i, 1)
+test_4 (_mm512_mask_div_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_div_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_fmadd_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_fmadd_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_fmaddsub_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_fmaddsub_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_fmsub_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_fmsub_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_fmsubadd_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_fmsubadd_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_fnmadd_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_fnmadd_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_fnmsub_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_fnmsub_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_i32gather_epi32, __m512i, __m512i, __mmask16, __m512i, void const *, 1)
+test_4 (_mm512_mask_i32gather_epi64, __m512i, __m512i, __mmask8, __m256i, void const *, 1)
+test_4 (_mm512_mask_i32gather_pd, __m512d, __m512d, __mmask8, __m256i, void const *, 1)
+test_4 (_mm512_mask_i32gather_ps, __m512, __m512, __mmask16, __m512i, void const *, 1)
+test_4 (_mm512_mask_i64gather_epi32, __m256i, __m256i, __mmask8, __m512i, void const *, 1)
+test_4 (_mm512_mask_i64gather_epi64, __m512i, __m512i, __mmask8, __m512i, void const *, 1)
+test_4 (_mm512_mask_i64gather_pd, __m512d, __m512d, __mmask8, __m512i, void const *, 1)
+test_4 (_mm512_mask_i64gather_ps, __m256, __m256, __mmask8, __m512i, void const *, 1)
+test_4 (_mm512_mask_insertf32x4, __m512, __m512, __mmask16, __m512, __m128, 1)
+test_4 (_mm512_mask_insertf64x4, __m512d, __m512d, __mmask8, __m512d, __m256d, 1)
+test_4 (_mm512_mask_inserti32x4, __m512i, __m512i, __mmask16, __m512i, __m128i, 1)
+test_4 (_mm512_mask_inserti64x4, __m512i, __m512i, __mmask8, __m512i, __m256i, 1)
+test_4 (_mm512_mask_max_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 5)
+test_4 (_mm512_mask_max_round_ps, __m512, __m512, __mmask16, __m512, __m512, 5)
+test_4 (_mm512_mask_min_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 5)
+test_4 (_mm512_mask_min_round_ps, __m512, __m512, __mmask16, __m512, __m512, 5)
+test_4 (_mm512_mask_mul_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_mul_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_scalef_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_scalef_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_shuffle_f32x4, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_shuffle_f64x2, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_shuffle_i32x4, __m512i, __m512i, __mmask16, __m512i, __m512i, 1)
+test_4 (_mm512_mask_shuffle_i64x2, __m512i, __m512i, __mmask8, __m512i, __m512i, 1)
+test_4 (_mm512_mask_shuffle_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_shuffle_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_sub_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512d, 1)
+test_4 (_mm512_mask_sub_round_ps, __m512, __m512, __mmask16, __m512, __m512, 1)
+test_4 (_mm512_mask_ternarylogic_epi32, __m512i, __m512i, __mmask16, __m512i, __m512i, 1)
+test_4 (_mm512_mask_ternarylogic_epi64, __m512i, __m512i, __mmask8, __m512i, __m512i, 1)
+test_4 (_mm512_maskz_fmadd_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512d, 1)
+test_4 (_mm512_maskz_fmadd_round_ps, __m512, __mmask16, __m512, __m512, __m512, 1)
+test_4 (_mm512_maskz_fmaddsub_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512d, 1)
+test_4 (_mm512_maskz_fmaddsub_round_ps, __m512, __mmask16, __m512, __m512, __m512, 1)
+test_4 (_mm512_maskz_fmsub_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512d, 1)
+test_4 (_mm512_maskz_fmsub_round_ps, __m512, __mmask16, __m512, __m512, __m512, 1)
+test_4 (_mm512_maskz_fmsubadd_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512d, 1)
+test_4 (_mm512_maskz_fmsubadd_round_ps, __m512, __mmask16, __m512, __m512, __m512, 1)
+test_4 (_mm512_maskz_fnmadd_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512d, 1)
+test_4 (_mm512_maskz_fnmadd_round_ps, __m512, __mmask16, __m512, __m512, __m512, 1)
+test_4 (_mm512_maskz_fnmsub_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512d, 1)
+test_4 (_mm512_maskz_fnmsub_round_ps, __m512, __mmask16, __m512, __m512, __m512, 1)
+test_4 (_mm512_maskz_ternarylogic_epi32, __m512i, __mmask16, __m512i, __m512i, __m512i, 1)
+test_4 (_mm512_maskz_ternarylogic_epi64, __m512i, __mmask8, __m512i, __m512i, __m512i, 1)
+test_4v (_mm512_mask_i32scatter_epi32, void *, __mmask16, __m512i, __m512i, 1)
+test_4v (_mm512_mask_i32scatter_epi64, void *, __mmask8, __m256i, __m512i, 1)
+test_4v (_mm512_mask_i32scatter_pd, void *, __mmask8, __m256i, __m512d, 1)
+test_4v (_mm512_mask_i32scatter_ps, void *, __mmask16, __m512i, __m512, 1)
+test_4v (_mm512_mask_i64scatter_epi32, void *, __mmask8, __m512i, __m256i, 1)
+test_4v (_mm512_mask_i64scatter_epi64, void *, __mmask8, __m512i, __m512i, 1)
+test_4v (_mm512_mask_i64scatter_pd, void *, __mmask8, __m512i, __m512d, 1)
+test_4v (_mm512_mask_i64scatter_ps, void *, __mmask8, __m512i, __m256, 1)
+test_4x (_mm512_mask_fixupimm_round_pd, __m512d, __m512d, __mmask8, __m512d, __m512i, 1, 5)
+test_4x (_mm512_mask_fixupimm_round_ps, __m512, __m512, __mmask16, __m512, __m512i, 1, 5)
+test_4x (_mm512_maskz_fixupimm_round_pd, __m512d, __mmask8, __m512d, __m512d, __m512i, 1, 5)
+test_4x (_mm512_maskz_fixupimm_round_ps, __m512, __mmask16, __m512, __m512, __m512i, 1, 5)
+test_4x (_mm_mask_fixupimm_round_sd, __m128d, __m128d, __mmask8, __m128d, __m128i, 1, 5)
+test_4x (_mm_mask_fixupimm_round_ss, __m128, __m128, __mmask8, __m128, __m128i, 1, 5)
+test_4x (_mm_maskz_fixupimm_round_sd, __m128d, __mmask8, __m128d, __m128d, __m128i, 1, 5)
+test_4x (_mm_maskz_fixupimm_round_ss, __m128, __mmask8, __m128, __m128, __m128i, 1, 5)
+
+/* avx512pfintrin.h */
+test_3vx (_mm512_mask_prefetch_i32gather_ps, __m512i, __mmask16, void const *, 1, 1)
+test_3vx (_mm512_mask_prefetch_i32scatter_ps, void const *, __mmask16, __m512i, 1, 1)
+test_3vx (_mm512_mask_prefetch_i64gather_ps, __m512i, __mmask8, void const *, 1, 1)
+test_3vx (_mm512_mask_prefetch_i64scatter_ps, void const *, __mmask8, __m512i, 1, 1)
+
+/* avx512erintrin.h */
+test_1 (_mm512_exp2a23_round_pd, __m512d, __m512d, 1)
+test_1 (_mm512_exp2a23_round_ps, __m512, __m512, 1)
+test_1 (_mm512_rcp28_round_pd, __m512d, __m512d, 1)
+test_1 (_mm512_rcp28_round_ps, __m512, __m512, 1)
+test_1 (_mm512_rsqrt28_round_pd, __m512d, __m512d, 1)
+test_1 (_mm512_rsqrt28_round_ps, __m512, __m512, 1)
+test_2 (_mm512_maskz_exp2a23_round_pd, __m512d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_exp2a23_round_ps, __m512, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_rcp28_round_pd, __m512d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_rcp28_round_ps, __m512, __mmask16, __m512, 1)
+test_2 (_mm512_maskz_rsqrt28_round_pd, __m512d, __mmask8, __m512d, 1)
+test_2 (_mm512_maskz_rsqrt28_round_ps, __m512, __mmask16, __m512, 1)
+test_3 (_mm512_mask_exp2a23_round_pd, __m512d, __m512d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_exp2a23_round_ps, __m512, __m512, __mmask16, __m512, 1)
+test_3 (_mm512_mask_rcp28_round_pd, __m512d, __m512d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_rcp28_round_ps, __m512, __m512, __mmask16, __m512, 1)
+test_3 (_mm512_mask_rsqrt28_round_pd, __m512d, __m512d, __mmask8, __m512d, 1)
+test_3 (_mm512_mask_rsqrt28_round_ps, __m512, __m512, __mmask16, __m512, 1)
+
+/* shaintrin.h */
+test_2 (_mm_sha1rnds4_epu32, __m128i, __m128i, __m128i, 1)
+
 /* wmmintrin.h (AES/PCLMUL).  */
 #ifdef DIFFERENT_PRAGMAS
 #pragma GCC target ("aes,pclmul")
diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c
index 069f8e7cb80..a6a7b392319 100644
--- a/gcc/testsuite/gcc.target/i386/sse-23.c
+++ b/gcc/testsuite/gcc.target/i386/sse-23.c
@@ -183,7 +183,201 @@
 /* rtmintrin.h */
 #define __builtin_ia32_xabort(M) __builtin_ia32_xabort(1)
 
-#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt")
+/* avx512fintrin.h */
+#define __builtin_ia32_addpd512_mask(A, B, C, D, E) __builtin_ia32_addpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_addps512_mask(A, B, C, D, E) __builtin_ia32_addps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_addsd_round(A, B, C) __builtin_ia32_addsd_round(A, B, 1)
+#define __builtin_ia32_addss_round(A, B, C) __builtin_ia32_addss_round(A, B, 1)
+#define __builtin_ia32_alignd512_mask(A, B, F, D, E) __builtin_ia32_alignd512_mask(A, B, 1, D, E)
+#define __builtin_ia32_alignq512_mask(A, B, F, D, E) __builtin_ia32_alignq512_mask(A, B, 1, D, E)
+#define __builtin_ia32_cmpd512_mask(A, B, E, D) __builtin_ia32_cmpd512_mask(A, B, 1, D)
+#define __builtin_ia32_cmppd512_mask(A, B, F, D, E) __builtin_ia32_cmppd512_mask(A, B, 1, D, 5)
+#define __builtin_ia32_cmpps512_mask(A, B, F, D, E) __builtin_ia32_cmpps512_mask(A, B, 1, D, 5)
+#define __builtin_ia32_cmpq512_mask(A, B, E, D) __builtin_ia32_cmpq512_mask(A, B, 1, D)
+#define __builtin_ia32_cmpsd_mask(A, B, F, D, E) __builtin_ia32_cmpsd_mask(A, B, 1, D, 5)
+#define __builtin_ia32_cmpss_mask(A, B, F, D, E) __builtin_ia32_cmpss_mask(A, B, 1, D, 5)
+#define __builtin_ia32_cvtdq2ps512_mask(A, B, C, D) __builtin_ia32_cvtdq2ps512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtpd2dq512_mask(A, B, C, D) __builtin_ia32_cvtpd2dq512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtpd2ps512_mask(A, B, C, D) __builtin_ia32_cvtpd2ps512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtpd2udq512_mask(A, B, C, D) __builtin_ia32_cvtpd2udq512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtps2dq512_mask(A, B, C, D) __builtin_ia32_cvtps2dq512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtps2pd512_mask(A, B, C, D) __builtin_ia32_cvtps2pd512_mask(A, B, C, 5)
+#define __builtin_ia32_cvtps2udq512_mask(A, B, C, D) __builtin_ia32_cvtps2udq512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtsd2ss_round(A, B, C) __builtin_ia32_cvtsd2ss_round(A, B, 1)
+#define __builtin_ia32_cvtss2sd_round(A, B, C) __builtin_ia32_cvtss2sd_round(A, B, 4)
+#define __builtin_ia32_cvtsi2sd64(A, B, C) __builtin_ia32_cvtsi2sd64(A, B, 1)
+#define __builtin_ia32_cvtsi2ss32(A, B, C) __builtin_ia32_cvtsi2ss32(A, B, 1)
+#define __builtin_ia32_cvtsi2ss64(A, B, C) __builtin_ia32_cvtsi2ss64(A, B, 1)
+#define __builtin_ia32_cvttpd2dq512_mask(A, B, C, D) __builtin_ia32_cvttpd2dq512_mask(A, B, C, 5)
+#define __builtin_ia32_cvttpd2udq512_mask(A, B, C, D) __builtin_ia32_cvttpd2udq512_mask(A, B, C, 5)
+#define __builtin_ia32_cvttps2dq512_mask(A, B, C, D) __builtin_ia32_cvttps2dq512_mask(A, B, C, 5)
+#define __builtin_ia32_cvttps2udq512_mask(A, B, C, D) __builtin_ia32_cvttps2udq512_mask(A, B, C, 5)
+#define __builtin_ia32_cvtudq2ps512_mask(A, B, C, D) __builtin_ia32_cvtudq2ps512_mask(A, B, C, 1)
+#define __builtin_ia32_cvtusi2sd64(A, B, C) __builtin_ia32_cvtusi2sd64(A, B, 1)
+#define __builtin_ia32_cvtusi2ss32(A, B, C) __builtin_ia32_cvtusi2ss32(A, B, 1)
+#define __builtin_ia32_cvtusi2ss64(A, B, C) __builtin_ia32_cvtusi2ss64(A, B, 1)
+#define __builtin_ia32_divpd512_mask(A, B, C, D, E) __builtin_ia32_divpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_divps512_mask(A, B, C, D, E) __builtin_ia32_divps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_divsd_round(A, B, C) __builtin_ia32_divsd_round(A, B, 1)
+#define __builtin_ia32_divss_round(A, B, C) __builtin_ia32_divss_round(A, B, 1)
+#define __builtin_ia32_extractf32x4_mask(A, E, C, D) __builtin_ia32_extractf32x4_mask(A, 1, C, D)
+#define __builtin_ia32_extractf64x4_mask(A, E, C, D) __builtin_ia32_extractf64x4_mask(A, 1, C, D)
+#define __builtin_ia32_extracti32x4_mask(A, E, C, D) __builtin_ia32_extracti32x4_mask(A, 1, C, D)
+#define __builtin_ia32_extracti64x4_mask(A, E, C, D) __builtin_ia32_extracti64x4_mask(A, 1, C, D)
+#define __builtin_ia32_fixupimmpd512_mask(A, B, C, I, E, F) __builtin_ia32_fixupimmpd512_mask(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmpd512_maskz(A, B, C, I, E, F) __builtin_ia32_fixupimmpd512_maskz(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmps512_mask(A, B, C, I, E, F) __builtin_ia32_fixupimmps512_mask(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmps512_maskz(A, B, C, I, E, F) __builtin_ia32_fixupimmps512_maskz(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmsd_mask(A, B, C, I, E, F) __builtin_ia32_fixupimmsd_mask(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmsd_maskz(A, B, C, I, E, F) __builtin_ia32_fixupimmsd_maskz(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmss_mask(A, B, C, I, E, F) __builtin_ia32_fixupimmss_mask(A, B, C, 1, E, 5)
+#define __builtin_ia32_fixupimmss_maskz(A, B, C, I, E, F) __builtin_ia32_fixupimmss_maskz(A, B, C, 1, E, 5)
+#define __builtin_ia32_gatherdiv8df(A, B, C, D, F) __builtin_ia32_gatherdiv8df(A, B, C, D, 1)
+#define __builtin_ia32_gatherdiv8di(A, B, C, D, F) __builtin_ia32_gatherdiv8di(A, B, C, D, 1)
+#define __builtin_ia32_gatherdiv16sf(A, B, C, D, F) __builtin_ia32_gatherdiv16sf(A, B, C, D, 1)
+#define __builtin_ia32_gatherdiv16si(A, B, C, D, F) __builtin_ia32_gatherdiv16si(A, B, C, D, 1)
+#define __builtin_ia32_gathersiv16sf(A, B, C, D, F) __builtin_ia32_gathersiv16sf(A, B, C, D, 1)
+#define __builtin_ia32_gathersiv16si(A, B, C, D, F) __builtin_ia32_gathersiv16si(A, B, C, D, 1)
+#define __builtin_ia32_gathersiv8df(A, B, C, D, F) __builtin_ia32_gathersiv8df(A, B, C, D, 1)
+#define __builtin_ia32_gathersiv8di(A, B, C, D, F) __builtin_ia32_gathersiv8di(A, B, C, D, 1)
+#define __builtin_ia32_getexppd512_mask(A, B, C, D) __builtin_ia32_getexppd512_mask(A, B, C, 5)
+#define __builtin_ia32_getexpps512_mask(A, B, C, D) __builtin_ia32_getexpps512_mask(A, B, C, 5)
+#define __builtin_ia32_getexpsd128_round(A, B, C) __builtin_ia32_getexpsd128_round(A, B, 4)
+#define __builtin_ia32_getexpss128_round(A, B, C) __builtin_ia32_getexpss128_round(A, B, 4)
+#define __builtin_ia32_getmantpd512_mask(A, F, C, D, E) __builtin_ia32_getmantpd512_mask(A, 1, C, D, 5)
+#define __builtin_ia32_getmantps512_mask(A, F, C, D, E) __builtin_ia32_getmantps512_mask(A, 1, C, D, 5)
+#define __builtin_ia32_getmantsd_round(A, B, C, D) __builtin_ia32_getmantsd_round(A, B, 1, 4)
+#define __builtin_ia32_getmantss_round(A, B, C, D) __builtin_ia32_getmantss_round(A, B, 1, 4)
+#define __builtin_ia32_insertf32x4_mask(A, B, F, D, E) __builtin_ia32_insertf32x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_insertf64x4_mask(A, B, F, D, E) __builtin_ia32_insertf64x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_inserti32x4_mask(A, B, F, D, E) __builtin_ia32_inserti32x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_inserti64x4_mask(A, B, F, D, E) __builtin_ia32_inserti64x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_maxpd512_mask(A, B, C, D, E) __builtin_ia32_maxpd512_mask(A, B, C, D, 5)
+#define __builtin_ia32_maxps512_mask(A, B, C, D, E) __builtin_ia32_maxps512_mask(A, B, C, D, 5)
+#define __builtin_ia32_maxsd_round(A, B, C) __builtin_ia32_maxsd_round(A, B, 4)
+#define __builtin_ia32_maxss_round(A, B, C) __builtin_ia32_maxss_round(A, B, 4)
+#define __builtin_ia32_minpd512_mask(A, B, C, D, E) __builtin_ia32_minpd512_mask(A, B, C, D, 5)
+#define __builtin_ia32_minps512_mask(A, B, C, D, E) __builtin_ia32_minps512_mask(A, B, C, D, 5)
+#define __builtin_ia32_minsd_round(A, B, C) __builtin_ia32_minsd_round(A, B, 4)
+#define __builtin_ia32_minss_round(A, B, C) __builtin_ia32_minss_round(A, B, 4)
+#define __builtin_ia32_mulpd512_mask(A, B, C, D, E) __builtin_ia32_mulpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_mulps512_mask(A, B, C, D, E) __builtin_ia32_mulps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_mulsd_round(A, B, C) __builtin_ia32_mulsd_round(A, B, 1)
+#define __builtin_ia32_mulss_round(A, B, C) __builtin_ia32_mulss_round(A, B, 1)
+#define __builtin_ia32_permdf512_mask(A, E, C, D) __builtin_ia32_permdf512_mask(A, 1, C, D)
+#define __builtin_ia32_permdi512_mask(A, E, C, D) __builtin_ia32_permdi512_mask(A, 1, C, D)
+#define __builtin_ia32_prold512_mask(A, E, C, D) __builtin_ia32_prold512_mask(A, 1, C, D)
+#define __builtin_ia32_prolq512_mask(A, E, C, D) __builtin_ia32_prolq512_mask(A, 1, C, D)
+#define __builtin_ia32_prord512_mask(A, E, C, D) __builtin_ia32_prord512_mask(A, 1, C, D)
+#define __builtin_ia32_prorq512_mask(A, E, C, D) __builtin_ia32_prorq512_mask(A, 1, C, D)
+#define __builtin_ia32_pshufd512_mask(A, E, C, D) __builtin_ia32_pshufd512_mask(A, 1, C, D)
+#define __builtin_ia32_pslldi512_mask(A, E, C, D) __builtin_ia32_pslldi512_mask(A, 1, C, D)
+#define __builtin_ia32_psllqi512_mask(A, E, C, D) __builtin_ia32_psllqi512_mask(A, 1, C, D)
+#define __builtin_ia32_psradi512_mask(A, E, C, D) __builtin_ia32_psradi512_mask(A, 1, C, D)
+#define __builtin_ia32_psraqi512_mask(A, E, C, D) __builtin_ia32_psraqi512_mask(A, 1, C, D)
+#define __builtin_ia32_psrldi512_mask(A, E, C, D) __builtin_ia32_psrldi512_mask(A, 1, C, D)
+#define __builtin_ia32_psrlqi512_mask(A, E, C, D) __builtin_ia32_psrlqi512_mask(A, 1, C, D)
+#define __builtin_ia32_pternlogd512_mask(A, B, C, F, E) __builtin_ia32_pternlogd512_mask(A, B, C, 1, E)
+#define __builtin_ia32_pternlogd512_maskz(A, B, C, F, E) __builtin_ia32_pternlogd512_maskz(A, B, C, 1, E)
+#define __builtin_ia32_pternlogq512_mask(A, B, C, F, E) __builtin_ia32_pternlogq512_mask(A, B, C, 1, E)
+#define __builtin_ia32_pternlogq512_maskz(A, B, C, F, E) __builtin_ia32_pternlogq512_maskz(A, B, C, 1, E)
+#define __builtin_ia32_rndscalepd_mask(A, F, C, D, E) __builtin_ia32_rndscalepd_mask(A, 1, C, D, 5)
+#define __builtin_ia32_rndscaleps_mask(A, F, C, D, E) __builtin_ia32_rndscaleps_mask(A, 1, C, D, 5)
+#define __builtin_ia32_rndscalesd_round(A, B, C, D) __builtin_ia32_rndscalesd_round(A, B, 1, 4)
+#define __builtin_ia32_rndscaless_round(A, B, C, D) __builtin_ia32_rndscaless_round(A, B, 1, 4)
+#define __builtin_ia32_scalefpd512_mask(A, B, C, D, E) __builtin_ia32_scalefpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_scalefps512_mask(A, B, C, D, E) __builtin_ia32_scalefps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_scalefsd_round(A, B, C) __builtin_ia32_scalefsd_round(A, B, 1)
+#define __builtin_ia32_scalefss_round(A, B, C) __builtin_ia32_scalefss_round(A, B, 1)
+#define __builtin_ia32_scatterdiv8df(A, B, C, D, F) __builtin_ia32_scatterdiv8df(A, B, C, D, 1)
+#define __builtin_ia32_scatterdiv8di(A, B, C, D, F) __builtin_ia32_scatterdiv8di(A, B, C, D, 1)
+#define __builtin_ia32_scatterdiv16sf(A, B, C, D, F) __builtin_ia32_scatterdiv16sf(A, B, C, D, 1)
+#define __builtin_ia32_scatterdiv16si(A, B, C, D, F) __builtin_ia32_scatterdiv16si(A, B, C, D, 1)
+#define __builtin_ia32_scattersiv16sf(A, B, C, D, F) __builtin_ia32_scattersiv16sf(A, B, C, D, 1)
+#define __builtin_ia32_scattersiv16si(A, B, C, D, F) __builtin_ia32_scattersiv16si(A, B, C, D, 1)
+#define __builtin_ia32_scattersiv8df(A, B, C, D, F) __builtin_ia32_scattersiv8df(A, B, C, D, 1)
+#define __builtin_ia32_scattersiv8di(A, B, C, D, F) __builtin_ia32_scattersiv8di(A, B, C, D, 1)
+#define __builtin_ia32_shuf_f32x4_mask(A, B, F, D, E) __builtin_ia32_shuf_f32x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_shuf_f64x2_mask(A, B, F, D, E) __builtin_ia32_shuf_f64x2_mask(A, B, 1, D, E)
+#define __builtin_ia32_shuf_i32x4_mask(A, B, F, D, E) __builtin_ia32_shuf_i32x4_mask(A, B, 1, D, E)
+#define __builtin_ia32_shuf_i64x2_mask(A, B, F, D, E) __builtin_ia32_shuf_i64x2_mask(A, B, 1, D, E)
+#define __builtin_ia32_shufpd512_mask(A, B, F, D, E) __builtin_ia32_shufpd512_mask(A, B, 1, D, E)
+#define __builtin_ia32_shufps512_mask(A, B, F, D, E) __builtin_ia32_shufps512_mask(A, B, 1, D, E)
+#define __builtin_ia32_sqrtpd512_mask(A, B, C, D) __builtin_ia32_sqrtpd512_mask(A, B, C, 1)
+#define __builtin_ia32_sqrtps512_mask(A, B, C, D) __builtin_ia32_sqrtps512_mask(A, B, C, 1)
+#define __builtin_ia32_sqrtss_round(A, B, C) __builtin_ia32_sqrtss_round(A, B, 1)
+#define __builtin_ia32_sqrtsd_round(A, B, C) __builtin_ia32_sqrtsd_round(A, B, 1)
+#define __builtin_ia32_subpd512_mask(A, B, C, D, E) __builtin_ia32_subpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_subps512_mask(A, B, C, D, E) __builtin_ia32_subps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_subsd_round(A, B, C) __builtin_ia32_subsd_round(A, B, 1)
+#define __builtin_ia32_subss_round(A, B, C) __builtin_ia32_subss_round(A, B, 1)
+#define __builtin_ia32_ucmpd512_mask(A, B, E, D) __builtin_ia32_ucmpd512_mask(A, B, 1, D)
+#define __builtin_ia32_ucmpq512_mask(A, B, E, D) __builtin_ia32_ucmpq512_mask(A, B, 1, D)
+#define __builtin_ia32_vcomisd(A, B, C, D) __builtin_ia32_vcomisd(A, B, 1, 5)
+#define __builtin_ia32_vcomiss(A, B, C, D) __builtin_ia32_vcomiss(A, B, 1, 5)
+#define __builtin_ia32_vcvtph2ps512_mask(A, B, C, D) __builtin_ia32_vcvtph2ps512_mask(A, B, C, 5)
+#define __builtin_ia32_vcvtps2ph512_mask(A, E, C, D) __builtin_ia32_vcvtps2ph512_mask(A, 1, C, D)
+#define __builtin_ia32_vcvtsd2si32(A, B) __builtin_ia32_vcvtsd2si32(A, 1)
+#define __builtin_ia32_vcvtsd2si64(A, B) __builtin_ia32_vcvtsd2si64(A, 1)
+#define __builtin_ia32_vcvtsd2usi32(A, B) __builtin_ia32_vcvtsd2usi32(A, 1)
+#define __builtin_ia32_vcvtsd2usi64(A, B) __builtin_ia32_vcvtsd2usi64(A, 1)
+#define __builtin_ia32_vcvtss2si32(A, B) __builtin_ia32_vcvtss2si32(A, 1)
+#define __builtin_ia32_vcvtss2si64(A, B) __builtin_ia32_vcvtss2si64(A, 1)
+#define __builtin_ia32_vcvtss2usi32(A, B) __builtin_ia32_vcvtss2usi32(A, 1)
+#define __builtin_ia32_vcvtss2usi64(A, B) __builtin_ia32_vcvtss2usi64(A, 1)
+#define __builtin_ia32_vcvttsd2si32(A, B) __builtin_ia32_vcvttsd2si32(A, 5)
+#define __builtin_ia32_vcvttsd2si64(A, B) __builtin_ia32_vcvttsd2si64(A, 5)
+#define __builtin_ia32_vcvttsd2usi32(A, B) __builtin_ia32_vcvttsd2usi32(A, 5)
+#define __builtin_ia32_vcvttsd2usi64(A, B) __builtin_ia32_vcvttsd2usi64(A, 5)
+#define __builtin_ia32_vcvttss2si32(A, B) __builtin_ia32_vcvttss2si32(A, 5)
+#define __builtin_ia32_vcvttss2si64(A, B) __builtin_ia32_vcvttss2si64(A, 5)
+#define __builtin_ia32_vcvttss2usi32(A, B) __builtin_ia32_vcvttss2usi32(A, 5)
+#define __builtin_ia32_vcvttss2usi64(A, B) __builtin_ia32_vcvttss2usi64(A, 5)
+#define __builtin_ia32_vfmaddpd512_mask(A, B, C, D, E) __builtin_ia32_vfmaddpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddpd512_mask3(A, B, C, D, E) __builtin_ia32_vfmaddpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddpd512_maskz(A, B, C, D, E) __builtin_ia32_vfmaddpd512_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddps512_mask(A, B, C, D, E) __builtin_ia32_vfmaddps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddps512_mask3(A, B, C, D, E) __builtin_ia32_vfmaddps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddps512_maskz(A, B, C, D, E) __builtin_ia32_vfmaddps512_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsd3_round(A, B, C, D) __builtin_ia32_vfmaddsd3_round(A, B, C, 1)
+#define __builtin_ia32_vfmaddss3_round(A, B, C, D) __builtin_ia32_vfmaddss3_round(A, B, C, 1)
+#define __builtin_ia32_vfmaddsubpd512_mask(A, B, C, D, E) __builtin_ia32_vfmaddsubpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubpd512_mask3(A, B, C, D, E) __builtin_ia32_vfmaddsubpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubpd512_maskz(A, B, C, D, E) __builtin_ia32_vfmaddsubpd512_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubps512_mask(A, B, C, D, E) __builtin_ia32_vfmaddsubps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubps512_mask3(A, B, C, D, E) __builtin_ia32_vfmaddsubps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmaddsubps512_maskz(A, B, C, D, E) __builtin_ia32_vfmaddsubps512_maskz(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubaddpd512_mask3(A, B, C, D, E) __builtin_ia32_vfmsubaddpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubaddps512_mask3(A, B, C, D, E) __builtin_ia32_vfmsubaddps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubpd512_mask3(A, B, C, D, E) __builtin_ia32_vfmsubpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfmsubps512_mask3(A, B, C, D, E) __builtin_ia32_vfmsubps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfnmaddpd512_mask(A, B, C, D, E) __builtin_ia32_vfnmaddpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfnmaddps512_mask(A, B, C, D, E) __builtin_ia32_vfnmaddps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfnmsubpd512_mask(A, B, C, D, E) __builtin_ia32_vfnmsubpd512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfnmsubpd512_mask3(A, B, C, D, E) __builtin_ia32_vfnmsubpd512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vfnmsubps512_mask(A, B, C, D, E) __builtin_ia32_vfnmsubps512_mask(A, B, C, D, 1)
+#define __builtin_ia32_vfnmsubps512_mask3(A, B, C, D, E) __builtin_ia32_vfnmsubps512_mask3(A, B, C, D, 1)
+#define __builtin_ia32_vpermilpd512_mask(A, E, C, D) __builtin_ia32_vpermilpd512_mask(A, 1, C, D)
+#define __builtin_ia32_vpermilps512_mask(A, E, C, D) __builtin_ia32_vpermilps512_mask(A, 1, C, D)
+
+/* avx512pfintrin.h */
+#define __builtin_ia32_gatherpfdps(A, B, C, D, E) __builtin_ia32_gatherpfdps(A, B, C, 1, 1)
+#define __builtin_ia32_gatherpfqps(A, B, C, D, E) __builtin_ia32_gatherpfqps(A, B, C, 1, 1)
+#define __builtin_ia32_scatterpfdps(A, B, C, D, E) __builtin_ia32_scatterpfdps(A, B, C, 1, 1)
+#define __builtin_ia32_scatterpfqps(A, B, C, D, E) __builtin_ia32_scatterpfqps(A, B, C, 1, 1)
+
+/* avx512erintrin.h */
+#define __builtin_ia32_exp2pd_mask(A, B, C, D) __builtin_ia32_exp2pd_mask (A, B, C, 1)
+#define __builtin_ia32_exp2ps_mask(A, B, C, D) __builtin_ia32_exp2ps_mask (A, B, C, 1)
+#define __builtin_ia32_rcp28pd_mask(A, B, C, D) __builtin_ia32_rcp28pd_mask (A, B, C, 1)
+#define __builtin_ia32_rcp28ps_mask(A, B, C, D) __builtin_ia32_rcp28ps_mask (A, B, C, 1)
+#define __builtin_ia32_rsqrt28pd_mask(A, B, C, D) __builtin_ia32_rsqrt28pd_mask (A, B, C, 1)
+#define __builtin_ia32_rsqrt28ps_mask(A, B, C, D) __builtin_ia32_rsqrt28ps_mask (A, B, C, 1)
+
+/* shaintrin.h */
+#define __builtin_ia32_sha1rnds4(A, B, C) __builtin_ia32_sha1rnds4(A, B, 1)
+
+#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512pf,avx512cd,sha")
 #include <wmmintrin.h>
 #include <smmintrin.h>
 #include <mm3dnow.h>
diff --git a/gcc/testsuite/gcc.target/i386/stackalign/stackalign.exp b/gcc/testsuite/gcc.target/i386/stackalign/stackalign.exp
index db7a49427b5..0e0d55bf7bc 100644
--- a/gcc/testsuite/gcc.target/i386/stackalign/stackalign.exp
+++ b/gcc/testsuite/gcc.target/i386/stackalign/stackalign.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2008-2013 Free Software Foundation, Inc.
+# Copyright (C) 2008-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/i386/testimm-10.c b/gcc/testsuite/gcc.target/i386/testimm-10.c
new file mode 100644
index 00000000000..d744e1c08ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/testimm-10.c
@@ -0,0 +1,192 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -mavx512f" } */
+
+#include <x86intrin.h>
+
+__m512i m512i;
+__m512d m512d;
+__m512  m512;
+__m256i m256i;
+__m256d m256d;
+__m256  m256;
+__m128i m128i;
+__m128d m128d;
+__m128  m128;
+__mmask8 mmask8;
+__mmask16 mmask16;
+
+void
+test8bit (void)
+{
+  m512i = _mm512_permutex_epi64 (m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_mask_permutex_epi64 (m512i, mmask8, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_maskz_permutex_epi64 (mmask8, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512i = _mm512_ternarylogic_epi64 (m512i, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_mask_ternarylogic_epi64 (m512i, mmask8, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_maskz_ternarylogic_epi64 (mmask8, m512i, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_ternarylogic_epi32 (m512i, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_mask_ternarylogic_epi32 (m512i, mmask16, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_maskz_ternarylogic_epi32 (mmask16, m512i, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512i = _mm512_shuffle_epi32 (m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_mask_shuffle_epi32 (m512i, mmask16, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_maskz_shuffle_epi32 (mmask16, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512i = _mm512_shuffle_i64x2 (m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_mask_shuffle_i64x2 (m512i, mmask8, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_maskz_shuffle_i64x2 (mmask8, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512i = _mm512_shuffle_i32x4 (m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_mask_shuffle_i32x4 (m512i, mmask16, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_maskz_shuffle_i32x4 (mmask16, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512d = _mm512_shuffle_f64x2 (m512d, m512d, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512d = _mm512_mask_shuffle_f64x2 (m512d, mmask8, m512d, m512d, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512d = _mm512_maskz_shuffle_f64x2 (mmask8, m512d, m512d, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512  = _mm512_shuffle_f32x4 (m512, m512, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512  = _mm512_mask_shuffle_f32x4 (m512, mmask16, m512, m512, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512  = _mm512_maskz_shuffle_f32x4 (mmask16, m512, m512, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512d = _mm512_permutex_pd (m512d, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512d = _mm512_mask_permutex_pd (m512d, mmask8, m512d, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512d = _mm512_maskz_permutex_pd (mmask8, m512d, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512d = _mm512_permute_pd (m512d, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512d = _mm512_mask_permute_pd (m512d, mmask8, m512d, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512d = _mm512_maskz_permute_pd (mmask8, m512d, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512  = _mm512_permute_ps (m512, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512  = _mm512_mask_permute_ps (m512, mmask16, m512, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512  = _mm512_maskz_permute_ps (mmask16, m512, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512d = _mm512_shuffle_pd (m512d, m512d, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512d = _mm512_mask_shuffle_pd (m512d, mmask8, m512d, m512d, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512d = _mm512_maskz_shuffle_pd (mmask8, m512d, m512d, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512  = _mm512_shuffle_ps (m512, m512, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512  = _mm512_mask_shuffle_ps (m512, mmask16, m512, m512, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512  = _mm512_maskz_shuffle_ps (mmask16, m512, m512, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512d = _mm512_fixupimm_pd (m512d, m512d, m512i, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m512d = _mm512_mask_fixupimm_pd (m512d, mmask8, m512d, m512i, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m512d = _mm512_maskz_fixupimm_pd (mmask8, m512d, m512d, m512i, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+
+  m512  = _mm512_fixupimm_ps (m512, m512, m512i, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m512  = _mm512_mask_fixupimm_ps (m512, mmask16, m512, m512i, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m512  = _mm512_maskz_fixupimm_ps (mmask16, m512, m512, m512i, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+
+  m128d = _mm_fixupimm_sd (m128d, m128d, m128i, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m128d = _mm_mask_fixupimm_sd (m128d, mmask8, m128d, m128i, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m128d = _mm_maskz_fixupimm_sd (mmask8, m128d, m128d, m128i, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+
+  m128  = _mm_fixupimm_ss (m128, m128, m128i, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m128  = _mm_mask_fixupimm_ss (m128, mmask8, m128, m128i, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m128  = _mm_maskz_fixupimm_ss (mmask8, m128, m128, m128i, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+
+  m512i = _mm512_rol_epi32 (m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_mask_rol_epi32 (m512i, mmask16, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_maskz_rol_epi32 (mmask16, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512i = _mm512_ror_epi32 (m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_mask_ror_epi32 (m512i, mmask16, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_maskz_ror_epi32 (mmask16, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512i = _mm512_rol_epi64 (m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_mask_rol_epi64 (m512i, mmask8, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_maskz_rol_epi64 (mmask8, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512i = _mm512_ror_epi64 (m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_mask_ror_epi64 (m512i, mmask8, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_maskz_ror_epi64 (mmask8, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m256i = _mm512_cvtps_ph (m512, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m256i = _mm512_mask_cvtps_ph (m256i, mmask16, m512, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m256i = _mm512_maskz_cvtps_ph (mmask16, m512, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  m512d = _mm512_roundscale_pd (m512d, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m512d = _mm512_mask_roundscale_pd (m512d, mmask8, m512d, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m512d = _mm512_maskz_roundscale_pd (mmask8, m512d, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+
+  m512  = _mm512_roundscale_ps (m512, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m512  = _mm512_mask_roundscale_ps (m512, mmask16, m512, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m512  = _mm512_maskz_roundscale_ps (mmask16, m512, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+
+  m128d = _mm_roundscale_sd (m128d, m128d, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+  m128  = _mm_roundscale_ss (m128, m128, 256); /* { dg-error "the immediate argument must be an 8-bit immediate" } */
+
+  m512i = _mm512_alignr_epi32 (m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_mask_alignr_epi32 (m512i, mmask16, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_maskz_alignr_epi32 (mmask16, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_alignr_epi64 (m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_mask_alignr_epi64 (m512i, mmask8, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+  m512i = _mm512_maskz_alignr_epi64 (mmask8, m512i, m512i, 256); /* { dg-error "the last argument must be an 8-bit immediate" } */
+
+  mmask8 = _mm512_cmp_epi64_mask (m512i, m512i, 256); /* { dg-error "the last argument must be a 3-bit immediate" } */
+  mmask8 = _mm512_cmp_epi32_mask (m512i, m512i, 256); /* { dg-error "the last argument must be a 3-bit immediate" } */
+  mmask8 = _mm512_cmp_epu64_mask (m512i, m512i, 256); /* { dg-error "the last argument must be a 3-bit immediate" } */
+  mmask8 = _mm512_cmp_epu32_mask (m512i, m512i, 256); /* { dg-error "the last argument must be a 3-bit immediate" } */
+  mmask8 = _mm512_cmp_pd_mask (m512d, m512d, 256); /* { dg-error "the immediate argument must be a 5-bit immediate" } */
+  mmask8 = _mm512_cmp_ps_mask (m512, m512, 256); /* { dg-error "the immediate argument must be a 5-bit immediate" } */
+  mmask8 = _mm512_mask_cmp_epi64_mask (2, m512i, m512i, 256); /* { dg-error "the last argument must be a 3-bit immediate" } */
+  mmask8 = _mm512_mask_cmp_epi32_mask (2, m512i, m512i, 256); /* { dg-error "the last argument must be a 3-bit immediate" } */
+  mmask8 = _mm512_mask_cmp_epu64_mask (2, m512i, m512i, 256); /* { dg-error "the last argument must be a 3-bit immediate" } */
+  mmask8 = _mm512_mask_cmp_epu32_mask (2, m512i, m512i, 256); /* { dg-error "the last argument must be a 3-bit immediate" } */
+  mmask8 = _mm512_mask_cmp_pd_mask (2, m512d, m512d, 256); /* { dg-error "the immediate argument must be a 5-bit immediate" } */
+  mmask8 = _mm512_mask_cmp_ps_mask (2, m512, m512, 256); /* { dg-error "the immediate argument must be a 5-bit immediate" } */
+  mmask8 = _mm_cmp_sd_mask (m128d, m128d, 256); /* { dg-error "the immediate argument must be a 5-bit immediate" } */
+  mmask8 = _mm_cmp_ss_mask (m128, m128, 256); /* { dg-error "the immediate argument must be a 5-bit immediate" } */
+  mmask8 = _mm_mask_cmp_sd_mask (1, m128d, m128d, 256); /* { dg-error "the immediate argument must be a 5-bit immediate" } */
+  mmask8 = _mm_mask_cmp_ss_mask (1, m128, m128, 256); /* { dg-error "the immediate argument must be a 5-bit immediate" } */
+
+}
+
+test1bit (void) {
+  m256d = _mm512_extractf64x4_pd (m512d, 256); /* { dg-error "the last argument must be a 1-bit immediate" } */
+  m256d = _mm512_mask_extractf64x4_pd (m256d, mmask8, m512d, 256); /* { dg-error "the last argument must be a 1-bit immediate" } */
+  m256d = _mm512_maskz_extractf64x4_pd (mmask8, m512d, 256); /* { dg-error "the last argument must be a 1-bit immediate" } */
+
+  m256i = _mm512_extracti64x4_epi64 (m512i, 256); /* { dg-error "the last argument must be a 1-bit immediate" } */
+  m256i = _mm512_mask_extracti64x4_epi64 (m256i, mmask8, m512i, 256); /* { dg-error "the last argument must be a 1-bit immediate" } */
+  m256i = _mm512_maskz_extracti64x4_epi64 (mmask8, m512i, 256); /* { dg-error "the last argument must be a 1-bit immediate" } */
+
+  m512d = _mm512_insertf64x4 (m512d, m256d, 256); /* { dg-error "the last argument must be a 1-bit immediate" } */
+  m512d = _mm512_mask_insertf64x4 (m512d, mmask8, m512d, m256d, 256); /* { dg-error "the last argument must be a 1-bit immediate" } */
+  m512d = _mm512_maskz_insertf64x4 (mmask8, m512d, m256d, 256); /* { dg-error "the last argument must be a 1-bit immediate" } */
+
+  m512i = _mm512_inserti64x4 (m512i, m256i, 256); /* { dg-error "the last argument must be a 1-bit immediate" } */
+  m512i = _mm512_mask_inserti64x4 (m512i, mmask8, m512i, m256i, 256); /* { dg-error "the last argument must be a 1-bit immediate" } */
+  m512i = _mm512_maskz_inserti64x4 (mmask8, m512i, m256i, 256); /* { dg-error "the last argument must be a 1-bit immediate" } */
+}
+
+test2bit (void) {
+  m128  = _mm512_extractf32x4_ps(m512, 256); /* { dg-error "the last argument must be a 2-bit immediate" } */
+  m128  = _mm512_mask_extractf32x4_ps(m128, mmask8, m512, 256); /* { dg-error "the last argument must be a 2-bit immediate" } */
+  m128  = _mm512_maskz_extractf32x4_ps(mmask8, m512, 256); /* { dg-error "the last argument must be a 2-bit immediate" } */
+
+  m128i = _mm512_extracti32x4_epi32 (m512i, 256); /* { dg-error "the last argument must be a 2-bit immediate" } */
+  m128i = _mm512_mask_extracti32x4_epi32 (m128i, mmask8, m512i, 256); /* { dg-error "the last argument must be a 2-bit immediate" } */
+  m128i = _mm512_maskz_extracti32x4_epi32 (mmask8, m512i, 256); /* { dg-error "the last argument must be a 2-bit immediate" } */
+
+  m512  = _mm512_insertf32x4 (m512, m128, 256); /* { dg-error "the last argument must be a 2-bit immediate" } */
+  m512  = _mm512_mask_insertf32x4 (m512, mmask16, m512, m128, 256); /* { dg-error "the last argument must be a 2-bit immediate" } */
+  m512  = _mm512_maskz_insertf32x4 (mmask16, m512, m128, 256); /* { dg-error "the last argument must be a 2-bit immediate" } */
+
+  m512i = _mm512_inserti32x4 (m512i, m128i, 256); /* { dg-error "the last argument must be a 2-bit immediate" } */
+  m512i = _mm512_mask_inserti32x4 (m512i, mmask16, m512i, m128i, 256); /* { dg-error "the last argument must be a 2-bit immediate" } */
+  m512i = _mm512_maskz_inserti32x4 (mmask16, m512i, m128i, 256); /* { dg-error "the last argument must be a 2-bit immediate" } */
+}
+
+test4bit (void) {
+  m512d = _mm512_getmant_pd (m512d, 1, 64); /* { dg-error "the immediate argument must be a 4-bit immediate" } */
+  m512d = _mm512_mask_getmant_pd (m512d, mmask8, m512d, 1, 64); /* { dg-error "the immediate argument must be a 4-bit immediate" } */
+  m512d = _mm512_maskz_getmant_pd (mmask8, m512d, 1, 64); /* { dg-error "the immediate argument must be a 4-bit immediate" } */
+
+  m512  = _mm512_getmant_ps (m512, 1, 64); /* { dg-error "the immediate argument must be a 4-bit immediate" } */
+  m512  = _mm512_mask_getmant_ps (m512, mmask16, m512, 1, 64); /* { dg-error "the immediate argument must be a 4-bit immediate" } */
+  m512  = _mm512_maskz_getmant_ps (mmask16, m512, 1, 64); /* { dg-error "the immediate argument must be a 4-bit immediate" } */
+
+  m128d = _mm_getmant_sd (m128d, m128d, 1, 64); /* { dg-error "the immediate argument must be a 4-bit immediate" } */
+  m128  = _mm_getmant_ss (m128, m128, 1, 64); /* { dg-error "the immediate argument must be a 4-bit immediate" } */
+}
diff --git a/gcc/testsuite/gcc.target/i386/testround-1.c b/gcc/testsuite/gcc.target/i386/testround-1.c
new file mode 100644
index 00000000000..20c039ab0ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/testround-1.c
@@ -0,0 +1,507 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -mavx512f" } */
+
+#include <x86intrin.h>
+
+int i;
+unsigned int ui;
+__m512i m512i;
+__m512d m512d;
+__m512  m512;
+__m256i m256i;
+__m256  m256;
+__m128i m128i;
+__m128d m128d;
+__m128  m128;
+__mmask8 mmask8;
+__mmask16 mmask16;
+
+void
+test_round (void)
+{
+  m128d = _mm_add_round_sd (m128d, m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_add_round_ss (m128, m128, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_sub_round_sd (m128d, m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_sub_round_ss (m128, m128, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_sqrt_round_pd (m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_sqrt_round_pd (m512d, mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_sqrt_round_pd (mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_sqrt_round_ps (m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_sqrt_round_ps (m512, mmask16, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_sqrt_round_ps (mmask16, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_sqrt_round_sd (m128d, m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_sqrt_round_ss (m128, m128, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_add_round_pd (m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_add_round_pd (m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_add_round_pd (mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_add_round_ps (m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_add_round_ps (m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_add_round_ps (mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_sub_round_pd (m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_sub_round_pd (m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_sub_round_pd (mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_sub_round_ps (m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_sub_round_ps (m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_sub_round_ps (mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_mul_round_pd (m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_mul_round_pd (m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_mul_round_pd (mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mul_round_ps (m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_mul_round_ps (m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_mul_round_ps (mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_div_round_pd (m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_div_round_pd (m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_div_round_pd (mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_div_round_ps (m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_div_round_ps (m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_div_round_ps (mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_mul_round_sd (m128d, m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_mul_round_ss (m128, m128, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_div_round_sd (m128d, m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_div_round_ss (m128, m128, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_scalef_round_pd(m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_scalef_round_pd(m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_scalef_round_pd(mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_scalef_round_ps(m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_scalef_round_ps(m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_scalef_round_ps(mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_scalef_round_sd (m128d, m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_scalef_round_ss (m128, m128, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_fmadd_round_pd (m512d, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fmadd_round_pd (m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask3_fmadd_round_pd (m512d, m512d, m512d, mmask8, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fmadd_round_pd (mmask8, m512d, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fmadd_round_ps (m512, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fmadd_round_ps (m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask3_fmadd_round_ps (m512, m512, m512, mmask16, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fmadd_round_ps (mmask16, m512, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_fmsub_round_pd (m512d, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fmsub_round_pd (m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask3_fmsub_round_pd (m512d, m512d, m512d, mmask8, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fmsub_round_pd (mmask8, m512d, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fmsub_round_ps (m512, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fmsub_round_ps (m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask3_fmsub_round_ps (m512, m512, m512, mmask16, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fmsub_round_ps (mmask16, m512, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_fmaddsub_round_pd (m512d, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fmaddsub_round_pd (m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask3_fmaddsub_round_pd (m512d, m512d, m512d, mmask8, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fmaddsub_round_pd (mmask8, m512d, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fmaddsub_round_ps (m512, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fmaddsub_round_ps (m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask3_fmaddsub_round_ps (m512, m512, m512, mmask16, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fmaddsub_round_ps (mmask16, m512, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_fmsubadd_round_pd (m512d, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fmsubadd_round_pd (m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask3_fmsubadd_round_pd (m512d, m512d, m512d, mmask8, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fmsubadd_round_pd (mmask8, m512d, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fmsubadd_round_ps (m512, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fmsubadd_round_ps (m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask3_fmsubadd_round_ps (m512, m512, m512, mmask16, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fmsubadd_round_ps (mmask16, m512, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_fnmadd_round_pd (m512d, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fnmadd_round_pd (m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask3_fnmadd_round_pd (m512d, m512d, m512d, mmask8, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fnmadd_round_pd (mmask8, m512d, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fnmadd_round_ps (m512, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fnmadd_round_ps (m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask3_fnmadd_round_ps (m512, m512, m512, mmask16, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fnmadd_round_ps (mmask16, m512, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_fnmsub_round_pd (m512d, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fnmsub_round_pd (m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask3_fnmsub_round_pd (m512d, m512d, m512d, mmask8, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fnmsub_round_pd (mmask8, m512d, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fnmsub_round_ps (m512, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fnmsub_round_ps (m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask3_fnmsub_round_ps (m512, m512, m512, mmask16, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fnmsub_round_ps (mmask16, m512, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m256i = _mm512_cvt_roundpd_epi32 (m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_mask_cvt_roundpd_epi32 (m256i, mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_maskz_cvt_roundpd_epi32 (mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_cvt_roundpd_epu32 (m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_mask_cvt_roundpd_epu32 (m256i, mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_maskz_cvt_roundpd_epu32 (mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m512i = _mm512_cvt_roundps_epi32 (m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_mask_cvt_roundps_epi32 (m512i, mmask16, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_maskz_cvt_roundps_epi32 (mmask16, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_cvt_roundps_epu32 (m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_mask_cvt_roundps_epu32 (m512i, mmask16, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_maskz_cvt_roundps_epu32 (mmask16, m512, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m128 = _mm_cvt_roundu32_ss (m128, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_cvt_roundi32_ss (m128, 4, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m512 = _mm512_cvt_roundepi32_ps (m512i, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_cvt_roundepi32_ps (m512, mmask16, m512i, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_cvt_roundepi32_ps (mmask16, m512i, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_cvt_roundepu32_ps (m512i, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_cvt_roundepu32_ps (m512, mmask16, m512i, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_cvt_roundepu32_ps (mmask16, m512i, 7); /* { dg-error "incorrect rounding operand" } */
+
+  ui = _mm_cvt_roundss_u32 (m128, 7); /* { dg-error "incorrect rounding operand" } */
+  i = _mm_cvt_roundss_i32 (m128, 7); /* { dg-error "incorrect rounding operand" } */
+
+  ui = _mm_cvt_roundsd_u32 (m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  i = _mm_cvt_roundsd_i32 (m128d, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m256 = _mm512_cvt_roundpd_ps (m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m256 = _mm512_mask_cvt_roundpd_ps (m256, mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m256 = _mm512_maskz_cvt_roundpd_ps (mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_cvt_roundsd_ss (m128, m128d, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m128d = _mm_fmadd_round_sd (m128d, m128d, m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_fmadd_round_ss (m128, m128, m128, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_fmsub_round_sd (m128d, m128d, m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_fmsub_round_ss (m128, m128, m128, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_fnmadd_round_sd (m128d, m128d, m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_fnmadd_round_ss (m128, m128, m128, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_fnmsub_round_sd (m128d, m128d, m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_fnmsub_round_ss (m128, m128, m128, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_max_round_pd (m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_max_round_pd (m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_max_round_pd (mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_max_round_ps (m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_max_round_ps (m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_max_round_ps (mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_min_round_pd (m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_min_round_pd (m512d, mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_min_round_pd (mmask8, m512d, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_min_round_ps (m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_min_round_ps (m512, mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_min_round_ps (mmask16, m512, m512, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m256i = _mm512_cvtt_roundpd_epi32 (m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_mask_cvtt_roundpd_epi32 (m256i, mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_maskz_cvtt_roundpd_epi32 (mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_cvtt_roundpd_epu32 (m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_mask_cvtt_roundpd_epu32 (m256i, mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_maskz_cvtt_roundpd_epu32 (mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m512i = _mm512_cvtt_roundps_epi32 (m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_mask_cvtt_roundps_epi32 (m512i, mmask16, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_maskz_cvtt_roundps_epi32 (mmask16, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_cvtt_roundps_epu32 (m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_mask_cvtt_roundps_epu32 (m512i, mmask16, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_maskz_cvtt_roundps_epu32 (mmask16, m512, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_fixupimm_round_pd (m512d, m512d, m512i, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fixupimm_round_pd (m512d, mmask8, m512d, m512i, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fixupimm_round_pd (mmask8, m512d, m512d, m512i, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fixupimm_round_ps (m512, m512, m512i, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fixupimm_round_ps (m512, mmask16, m512, m512i, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fixupimm_round_ps (mmask16, m512, m512, m512i, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_fixupimm_round_sd (m128d, m128d, m128i, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_mask_fixupimm_round_sd (m128d, mmask8, m128d, m128i, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_maskz_fixupimm_round_sd (mmask8, m128d, m128d, m128i, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_fixupimm_round_ss (m128, m128, m128i, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_mask_fixupimm_round_ss (m128, mmask8, m128, m128i, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_maskz_fixupimm_round_ss (mmask8, m128, m128, m128i, 4, 7); /* { dg-error "incorrect rounding operand" } */
+
+  ui = _mm_cvtt_roundss_u32 (m128, 7); /* { dg-error "incorrect rounding operand" } */
+  i = _mm_cvtt_roundss_i32 (m128, 7); /* { dg-error "incorrect rounding operand" } */
+
+  ui = _mm_cvtt_roundsd_u32 (m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  i = _mm_cvtt_roundsd_i32 (m128d, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_cvt_roundps_pd (m256, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_cvt_roundps_pd (m512d, mmask8, m256, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_cvt_roundps_pd (mmask8, m256, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_cvt_roundph_ps (m256i, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_cvt_roundph_ps (m512, mmask16, m256i, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_cvt_roundph_ps (mmask16, m256i, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m128d = _mm_cvt_roundss_sd (m128d, m128, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m128 = _mm_getexp_round_ss (m128, m128, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_getexp_round_sd (m128d, m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_getexp_round_ps (m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_getexp_round_ps (m512, mmask16, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_getexp_round_ps (mmask16, m512, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_getexp_round_pd (m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_getexp_round_pd (m512d, mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_getexp_round_pd (mmask8, m512d, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_getmant_round_pd (m512d, 0, 0, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_getmant_round_pd (m512d, mmask8, m512d, 0, 0, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_getmant_round_pd (mmask8, m512d, 0, 0, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_getmant_round_ps (m512, 0, 0, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_getmant_round_ps (m512, mmask16, m512, 0, 0, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_getmant_round_ps (mmask16, m512, 0, 0, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_getmant_round_sd (m128d, m128d, 0, 0, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_getmant_round_ss (m128, m128, 0, 0, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m512 = _mm512_roundscale_round_ps (m512, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_roundscale_round_ps (m512, mmask16, m512, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_roundscale_round_ps (mmask16, m512, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_roundscale_round_pd (m512d, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_roundscale_round_pd (m512d, mmask8, m512d, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_roundscale_round_pd (mmask8, m512d, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_roundscale_round_ss (m128, m128, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_roundscale_round_sd (m128d, m128d, 4, 7); /* { dg-error "incorrect rounding operand" } */
+
+  mmask8 = _mm512_cmp_round_pd_mask (m512d, m512d, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  mmask16 = _mm512_cmp_round_ps_mask (m512, m512, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  mmask8 = _mm512_mask_cmp_round_pd_mask (mmask8, m512d, m512d, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  mmask16 = _mm512_mask_cmp_round_ps_mask (mmask16, m512, m512, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  mmask8 = _mm_cmp_round_sd_mask (m128d, m128d, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  mmask8 = _mm_mask_cmp_round_sd_mask (mmask8, m128d, m128d, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  mmask16 = _mm_cmp_round_ss_mask (m128, m128, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  mmask16 = _mm_mask_cmp_round_ss_mask (mmask8, m128, m128, 4, 7); /* { dg-error "incorrect rounding operand" } */
+
+  i = _mm_comi_round_ss (m128, m128, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  i = _mm_comi_round_sd (m128d, m128d, 4, 7); /* { dg-error "incorrect rounding operand" } */
+}
+
+void
+test_round_sae (void)
+{
+  m128d = _mm_add_round_sd (m128d, m128d, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_add_round_ss (m128, m128, 5); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_sub_round_sd (m128d, m128d, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_sub_round_ss (m128, m128, 5); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_sqrt_round_pd (m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_sqrt_round_pd (m512d, mmask8, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_sqrt_round_pd (mmask8, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_sqrt_round_ps (m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_sqrt_round_ps (m512, mmask16, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_sqrt_round_ps (mmask16, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_sqrt_round_sd (m128d, m128d, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_sqrt_round_ss (m128, m128, 5); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_add_round_pd (m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_add_round_pd (m512d, mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_add_round_pd (mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_add_round_ps (m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_add_round_ps (m512, mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_add_round_ps (mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_sub_round_pd (m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_sub_round_pd (m512d, mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_sub_round_pd (mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_sub_round_ps (m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_sub_round_ps (m512, mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_sub_round_ps (mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_mul_round_pd (m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_mul_round_pd (m512d, mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_mul_round_pd (mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mul_round_ps (m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_mul_round_ps (m512, mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_mul_round_ps (mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_div_round_pd (m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_div_round_pd (m512d, mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_div_round_pd (mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_div_round_ps (m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_div_round_ps (m512, mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_div_round_ps (mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_mul_round_sd (m128d, m128d, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_mul_round_ss (m128, m128, 5); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_div_round_sd (m128d, m128d, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_div_round_ss (m128, m128, 5); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_scalef_round_pd(m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_scalef_round_pd(m512d, mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_scalef_round_pd(mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_scalef_round_ps(m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_scalef_round_ps(m512, mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_scalef_round_ps(mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_scalef_round_sd (m128d, m128d, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_scalef_round_ss (m128, m128, 5); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_fmadd_round_pd (m512d, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fmadd_round_pd (m512d, mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask3_fmadd_round_pd (m512d, m512d, m512d, mmask8, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fmadd_round_pd (mmask8, m512d, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fmadd_round_ps (m512, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fmadd_round_ps (m512, mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask3_fmadd_round_ps (m512, m512, m512, mmask16, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fmadd_round_ps (mmask16, m512, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_fmsub_round_pd (m512d, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fmsub_round_pd (m512d, mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask3_fmsub_round_pd (m512d, m512d, m512d, mmask8, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fmsub_round_pd (mmask8, m512d, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fmsub_round_ps (m512, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fmsub_round_ps (m512, mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask3_fmsub_round_ps (m512, m512, m512, mmask16, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fmsub_round_ps (mmask16, m512, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_fmaddsub_round_pd (m512d, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fmaddsub_round_pd (m512d, mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask3_fmaddsub_round_pd (m512d, m512d, m512d, mmask8, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fmaddsub_round_pd (mmask8, m512d, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fmaddsub_round_ps (m512, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fmaddsub_round_ps (m512, mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask3_fmaddsub_round_ps (m512, m512, m512, mmask16, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fmaddsub_round_ps (mmask16, m512, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_fmsubadd_round_pd (m512d, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fmsubadd_round_pd (m512d, mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask3_fmsubadd_round_pd (m512d, m512d, m512d, mmask8, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fmsubadd_round_pd (mmask8, m512d, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fmsubadd_round_ps (m512, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fmsubadd_round_ps (m512, mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask3_fmsubadd_round_ps (m512, m512, m512, mmask16, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fmsubadd_round_ps (mmask16, m512, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_fnmadd_round_pd (m512d, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fnmadd_round_pd (m512d, mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask3_fnmadd_round_pd (m512d, m512d, m512d, mmask8, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fnmadd_round_pd (mmask8, m512d, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fnmadd_round_ps (m512, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fnmadd_round_ps (m512, mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask3_fnmadd_round_ps (m512, m512, m512, mmask16, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fnmadd_round_ps (mmask16, m512, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_fnmsub_round_pd (m512d, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fnmsub_round_pd (m512d, mmask8, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask3_fnmsub_round_pd (m512d, m512d, m512d, mmask8, 5); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fnmsub_round_pd (mmask8, m512d, m512d, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fnmsub_round_ps (m512, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fnmsub_round_ps (m512, mmask16, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask3_fnmsub_round_ps (m512, m512, m512, mmask16, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fnmsub_round_ps (mmask16, m512, m512, m512, 5); /* { dg-error "incorrect rounding operand" } */
+
+  m256i = _mm512_cvt_roundpd_epi32 (m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_mask_cvt_roundpd_epi32 (m256i, mmask8, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_maskz_cvt_roundpd_epi32 (mmask8, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_cvt_roundpd_epu32 (m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_mask_cvt_roundpd_epu32 (m256i, mmask8, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_maskz_cvt_roundpd_epu32 (mmask8, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+
+  m512i = _mm512_cvt_roundps_epi32 (m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_mask_cvt_roundps_epi32 (m512i, mmask16, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_maskz_cvt_roundps_epi32 (mmask16, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_cvt_roundps_epu32 (m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_mask_cvt_roundps_epu32 (m512i, mmask16, m512, 5); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_maskz_cvt_roundps_epu32 (mmask16, m512, 5); /* { dg-error "incorrect rounding operand" } */
+
+  m128 = _mm_cvt_roundu32_ss (m128, 4, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_cvt_roundi32_ss (m128, 4, 5); /* { dg-error "incorrect rounding operand" } */
+
+  m512 = _mm512_cvt_roundepi32_ps (m512i, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_cvt_roundepi32_ps (m512, mmask16, m512i, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_cvt_roundepi32_ps (mmask16, m512i, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_cvt_roundepu32_ps (m512i, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_cvt_roundepu32_ps (m512, mmask16, m512i, 5); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_cvt_roundepu32_ps (mmask16, m512i, 5); /* { dg-error "incorrect rounding operand" } */
+
+  ui = _mm_cvt_roundss_u32 (m128, 5); /* { dg-error "incorrect rounding operand" } */
+  i = _mm_cvt_roundss_i32 (m128, 5); /* { dg-error "incorrect rounding operand" } */
+
+  ui = _mm_cvt_roundsd_u32 (m128d, 5); /* { dg-error "incorrect rounding operand" } */
+  i = _mm_cvt_roundsd_i32 (m128d, 5); /* { dg-error "incorrect rounding operand" } */
+
+  m256 = _mm512_cvt_roundpd_ps (m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m256 = _mm512_mask_cvt_roundpd_ps (m256, mmask8, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m256 = _mm512_maskz_cvt_roundpd_ps (mmask8, m512d, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_cvt_roundsd_ss (m128, m128d, 5); /* { dg-error "incorrect rounding operand" } */
+
+  m128d = _mm_fmadd_round_sd (m128d, m128d, m128d, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_fmadd_round_ss (m128, m128, m128, 5); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_fmsub_round_sd (m128d, m128d, m128d, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_fmsub_round_ss (m128, m128, m128, 5); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_fnmadd_round_sd (m128d, m128d, m128d, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_fnmadd_round_ss (m128, m128, m128, 5); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_fnmsub_round_sd (m128d, m128d, m128d, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_fnmsub_round_ss (m128, m128, m128, 5); /* { dg-error "incorrect rounding operand" } */
+}
+
+void
+test_sae_only (void)
+{
+  m512d = _mm512_max_round_pd (m512d, m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_max_round_pd (m512d, mmask8, m512d, m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_max_round_pd (mmask8, m512d, m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_max_round_ps (m512, m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_max_round_ps (m512, mmask16, m512, m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_max_round_ps (mmask16, m512, m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_min_round_pd (m512d, m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_min_round_pd (m512d, mmask8, m512d, m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_min_round_pd (mmask8, m512d, m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_min_round_ps (m512, m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_min_round_ps (m512, mmask16, m512, m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_min_round_ps (mmask16, m512, m512, 3); /* { dg-error "incorrect rounding operand" } */
+
+  m256i = _mm512_cvtt_roundpd_epi32 (m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_mask_cvtt_roundpd_epi32 (m256i, mmask8, m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_maskz_cvtt_roundpd_epi32 (mmask8, m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_cvtt_roundpd_epu32 (m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_mask_cvtt_roundpd_epu32 (m256i, mmask8, m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m256i = _mm512_maskz_cvtt_roundpd_epu32 (mmask8, m512d, 3); /* { dg-error "incorrect rounding operand" } */
+
+  m512i = _mm512_cvtt_roundps_epi32 (m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_mask_cvtt_roundps_epi32 (m512i, mmask16, m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_maskz_cvtt_roundps_epi32 (mmask16, m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_cvtt_roundps_epu32 (m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_mask_cvtt_roundps_epu32 (m512i, mmask16, m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512i = _mm512_maskz_cvtt_roundps_epu32 (mmask16, m512, 3); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_fixupimm_round_pd (m512d, m512d, m512i, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_fixupimm_round_pd (m512d, mmask8, m512d, m512i, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_fixupimm_round_pd (mmask8, m512d, m512d, m512i, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_fixupimm_round_ps (m512, m512, m512i, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_fixupimm_round_ps (m512, mmask16, m512, m512i, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_fixupimm_round_ps (mmask16, m512, m512, m512i, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_fixupimm_round_sd (m128d, m128d, m128i, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_mask_fixupimm_round_sd (m128d, mmask8, m128d, m128i, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_maskz_fixupimm_round_sd (mmask8, m128d, m128d, m128i, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_fixupimm_round_ss (m128, m128, m128i, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_mask_fixupimm_round_ss (m128, mmask8, m128, m128i, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_maskz_fixupimm_round_ss (mmask8, m128, m128, m128i, 4, 3); /* { dg-error "incorrect rounding operand" } */
+
+  ui = _mm_cvtt_roundss_u32 (m128, 3); /* { dg-error "incorrect rounding operand" } */
+  i = _mm_cvtt_roundss_i32 (m128, 3); /* { dg-error "incorrect rounding operand" } */
+
+  ui = _mm_cvtt_roundsd_u32 (m128d, 3); /* { dg-error "incorrect rounding operand" } */
+  i = _mm_cvtt_roundsd_i32 (m128d, 3); /* { dg-error "incorrect rounding operand" } */
+
+  m512d = _mm512_cvt_roundps_pd (m256, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_cvt_roundps_pd (m512d, mmask8, m256, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_cvt_roundps_pd (mmask8, m256, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_cvt_roundph_ps (m256i, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_cvt_roundph_ps (m512, mmask16, m256i, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_cvt_roundph_ps (mmask16, m256i, 3); /* { dg-error "incorrect rounding operand" } */
+
+  m128d = _mm_cvt_roundss_sd (m128d, m128, 3); /* { dg-error "incorrect rounding operand" } */
+
+  m128 = _mm_getexp_round_ss (m128, m128, 3); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_getexp_round_sd (m128d, m128d, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_getexp_round_ps (m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_getexp_round_ps (m512, mmask16, m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_getexp_round_ps (mmask16, m512, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_getexp_round_pd (m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_getexp_round_pd (m512d, mmask8, m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_getexp_round_pd (mmask8, m512d, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_getmant_round_pd (m512d, 0, 0, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_getmant_round_pd (m512d, mmask8, m512d, 0, 0, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_getmant_round_pd (mmask8, m512d, 0, 0, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_getmant_round_ps (m512, 0, 0, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_getmant_round_ps (m512, mmask16, m512, 0, 0, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_getmant_round_ps (mmask16, m512, 0, 0, 3); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_getmant_round_sd (m128d, m128d, 0, 0, 3); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_getmant_round_ss (m128, m128, 0, 0, 3); /* { dg-error "incorrect rounding operand" } */
+
+  m512 = _mm512_roundscale_round_ps (m512, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_mask_roundscale_round_ps (m512, mmask16, m512, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m512 = _mm512_maskz_roundscale_round_ps (mmask16, m512, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_roundscale_round_pd (m512d, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_mask_roundscale_round_pd (m512d, mmask8, m512d, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m512d = _mm512_maskz_roundscale_round_pd (mmask8, m512d, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_roundscale_round_ss (m128, m128, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_roundscale_round_sd (m128d, m128d, 4, 3); /* { dg-error "incorrect rounding operand" } */
+
+  mmask8 = _mm512_cmp_round_pd_mask (m512d, m512d, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  mmask16 = _mm512_cmp_round_ps_mask (m512, m512, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  mmask8 = _mm512_mask_cmp_round_pd_mask (mmask8, m512d, m512d, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  mmask16 = _mm512_mask_cmp_round_ps_mask (mmask16, m512, m512, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  mmask8 = _mm_cmp_round_sd_mask (m128d, m128d, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  mmask8 = _mm_mask_cmp_round_sd_mask (mmask8, m128d, m128d, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  mmask16 = _mm_cmp_round_ss_mask (m128, m128, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  mmask16 = _mm_mask_cmp_round_ss_mask (mmask8, m128, m128, 4, 3); /* { dg-error "incorrect rounding operand" } */
+
+  i = _mm_comi_round_ss (m128, m128, 4, 3); /* { dg-error "incorrect rounding operand" } */
+  i = _mm_comi_round_sd (m128d, m128d, 4, 3); /* { dg-error "incorrect rounding operand" } */
+}
diff --git a/gcc/testsuite/gcc.target/i386/testround-2.c b/gcc/testsuite/gcc.target/i386/testround-2.c
new file mode 100644
index 00000000000..7236bfb9b22
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/testround-2.c
@@ -0,0 +1,57 @@
+/* { dg-do compile { target { ! { ia32 } } } } */
+/* { dg-options "-O0 -mavx512f" } */
+
+#include <x86intrin.h>
+
+long long l;
+unsigned long long ul;
+__m128d m128d;
+__m128  m128;
+
+void
+test_round_64 (void)
+{
+  m128d = _mm_cvt_roundu64_sd (m128d, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_cvt_roundi64_sd (m128d, 4, 7); /* { dg-error "incorrect rounding operand" } */
+
+  m128 = _mm_cvt_roundu64_ss (m128, 4, 7); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_cvt_roundi64_ss (m128, 4, 7); /* { dg-error "incorrect rounding operand" } */
+
+  ul = _mm_cvt_roundss_u64 (m128, 7); /* { dg-error "incorrect rounding operand" } */
+  l = _mm_cvt_roundss_i64 (m128, 7); /* { dg-error "incorrect rounding operand" } */
+
+  ul = _mm_cvt_roundsd_u64 (m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  l = _mm_cvt_roundsd_i64 (m128d, 7); /* { dg-error "incorrect rounding operand" } */
+
+  ul = _mm_cvtt_roundss_u64 (m128, 7); /* { dg-error "incorrect rounding operand" } */
+  l = _mm_cvtt_roundss_i64 (m128, 7); /* { dg-error "incorrect rounding operand" } */
+
+  ul = _mm_cvtt_roundsd_u64 (m128d, 7); /* { dg-error "incorrect rounding operand" } */
+  l = _mm_cvtt_roundsd_i64 (m128d, 7); /* { dg-error "incorrect rounding operand" } */
+}
+
+void
+test_round_sae_64 (void)
+{
+  m128d = _mm_cvt_roundu64_sd (m128d, 4, 5); /* { dg-error "incorrect rounding operand" } */
+  m128d = _mm_cvt_roundi64_sd (m128d, 4, 5); /* { dg-error "incorrect rounding operand" } */
+
+  m128 = _mm_cvt_roundu64_ss (m128, 4, 5); /* { dg-error "incorrect rounding operand" } */
+  m128 = _mm_cvt_roundi64_ss (m128, 4, 5); /* { dg-error "incorrect rounding operand" } */
+
+  ul = _mm_cvt_roundss_u64 (m128, 5); /* { dg-error "incorrect rounding operand" } */
+  l = _mm_cvt_roundss_i64 (m128, 5); /* { dg-error "incorrect rounding operand" } */
+
+  ul = _mm_cvt_roundsd_u64 (m128d, 5); /* { dg-error "incorrect rounding operand" } */
+  l = _mm_cvt_roundsd_i64 (m128d, 5); /* { dg-error "incorrect rounding operand" } */
+}
+
+void
+test_sae_only_64 (void)
+{
+  ul = _mm_cvtt_roundss_u64 (m128, 3); /* { dg-error "incorrect rounding operand" } */
+  l = _mm_cvtt_roundss_i64 (m128, 3); /* { dg-error "incorrect rounding operand" } */
+
+  ul = _mm_cvtt_roundsd_u64 (m128d, 3); /* { dg-error "incorrect rounding operand" } */
+  l = _mm_cvtt_roundsd_i64 (m128d, 3); /* { dg-error "incorrect rounding operand" } */
+}
diff --git a/gcc/testsuite/gcc.target/ia64/ia64.exp b/gcc/testsuite/gcc.target/ia64/ia64.exp
index 329fcac59aa..d70e990c392 100644
--- a/gcc/testsuite/gcc.target/ia64/ia64.exp
+++ b/gcc/testsuite/gcc.target/ia64/ia64.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 1997-2013 Free Software Foundation, Inc.
+#   Copyright (C) 1997-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/m68k/m68k.exp b/gcc/testsuite/gcc.target/m68k/m68k.exp
index 2ba17b9622e..a917898ab30 100644
--- a/gcc/testsuite/gcc.target/m68k/m68k.exp
+++ b/gcc/testsuite/gcc.target/m68k/m68k.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 1997-2013 Free Software Foundation, Inc.
+# Copyright (C) 1997-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/microblaze/microblaze.exp b/gcc/testsuite/gcc.target/microblaze/microblaze.exp
index 7766297bd7e..f3431814159 100644
--- a/gcc/testsuite/gcc.target/microblaze/microblaze.exp
+++ b/gcc/testsuite/gcc.target/microblaze/microblaze.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2009-2013 Free Software Foundation, Inc.
+#   Copyright (C) 2009-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/mips/inter/mips16-inter.exp b/gcc/testsuite/gcc.target/mips/inter/mips16-inter.exp
index 54631ad4c7f..cfa64b1929b 100644
--- a/gcc/testsuite/gcc.target/mips/inter/mips16-inter.exp
+++ b/gcc/testsuite/gcc.target/mips/inter/mips16-inter.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2007-2013 Free Software Foundation, Inc.
+# Copyright (C) 2007-2014 Free Software Foundation, Inc.
 #
 # This file is part of GCC.
 #
diff --git a/gcc/testsuite/gcc.target/mips/mips-nonpic/README b/gcc/testsuite/gcc.target/mips/mips-nonpic/README
index ddffaa59f0d..b7a46e4b006 100644
--- a/gcc/testsuite/gcc.target/mips/mips-nonpic/README
+++ b/gcc/testsuite/gcc.target/mips/mips-nonpic/README
@@ -20,7 +20,7 @@ main-15.c	address and call	address taken only	Neither (* But creating a PLT entr
 main-16.c	address and call	address and call	PLT entry
 
 
-Copyright (C) 2008-2013 Free Software Foundation, Inc.
+Copyright (C) 2008-2014 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright
diff --git a/gcc/testsuite/gcc.target/mips/mips-nonpic/mips-nonpic.exp b/gcc/testsuite/gcc.target/mips/mips-nonpic/mips-nonpic.exp
index 27c9f1d10cc..d99b3d183e8 100644
--- a/gcc/testsuite/gcc.target/mips/mips-nonpic/mips-nonpic.exp
+++ b/gcc/testsuite/gcc.target/mips/mips-nonpic/mips-nonpic.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2008-2013 Free Software Foundation, Inc.
+#   Copyright (C) 2008-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/mips/mips.exp b/gcc/testsuite/gcc.target/mips/mips.exp
index 1f0d0d6223f..8c72cff7223 100644
--- a/gcc/testsuite/gcc.target/mips/mips.exp
+++ b/gcc/testsuite/gcc.target/mips/mips.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 1997-2013 Free Software Foundation, Inc.
+# Copyright (C) 1997-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/nds32/nds32.exp b/gcc/testsuite/gcc.target/nds32/nds32.exp
index e88d0222729..14665653a93 100644
--- a/gcc/testsuite/gcc.target/nds32/nds32.exp
+++ b/gcc/testsuite/gcc.target/nds32/nds32.exp
@@ -1,5 +1,5 @@
 # Target test cases of Andes NDS32 cpu for GNU compiler
-# Copyright (C) 2012-2013 Free Software Foundation, Inc.
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
 # Contributed by Andes Technology Corporation.
 #
 # This file is part of GCC.
diff --git a/gcc/testsuite/gcc.target/nios2/custom-fp-1.c b/gcc/testsuite/gcc.target/nios2/custom-fp-1.c
new file mode 100644
index 00000000000..c9afa682977
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/custom-fp-1.c
@@ -0,0 +1,22 @@
+/* Test specification of custom instructions via command-line options.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O1 -ffinite-math-only -mcustom-fmaxs=246 -mcustom-fmins=247 -mcustom-fsqrts=251" } */
+
+/* -O1 in the options is significant.  Without it FP operations may not be
+   optimized to custom instructions.  */
+
+#include <stdio.h> 
+#include <math.h>
+
+void
+custom_fp (float operand_a, float operand_b, float *result)
+{
+  result[0] = fmaxf (operand_a, operand_b);
+  result[1] = fminf (operand_a, operand_b);
+  result[2] = sqrtf (operand_a);
+}
+
+/* { dg-final { scan-assembler "custom\\t246, .* # fmaxs .*" } } */
+/* { dg-final { scan-assembler "custom\\t247, .* # fmins .*" } } */
+/* { dg-final { scan-assembler "custom\\t251, .* # fsqrts .*" } } */
diff --git a/gcc/testsuite/gcc.target/nios2/custom-fp-2.c b/gcc/testsuite/gcc.target/nios2/custom-fp-2.c
new file mode 100644
index 00000000000..fc7c643705e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/custom-fp-2.c
@@ -0,0 +1,26 @@
+/* Test specification of custom instructions via pragmas.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O1 -ffinite-math-only" } */
+
+/* -O1 in the options is significant.  Without it FP operations may not be
+   optimized to custom instructions.  */
+
+#include <stdio.h> 
+#include <math.h>
+
+#pragma GCC target ("custom-fmaxs=246")
+#pragma GCC target ("custom-fmins=247")
+#pragma GCC target ("custom-fsqrts=251")
+
+void
+custom_fp (float operand_a, float operand_b, float *result)
+{
+  result[0] = fmaxf (operand_a, operand_b);
+  result[1] = fminf (operand_a, operand_b);
+  result[2] = sqrtf (operand_a);
+}
+
+/* { dg-final { scan-assembler "custom\\t246, .* # fmaxs .*" } } */
+/* { dg-final { scan-assembler "custom\\t247, .* # fmins .*" } } */
+/* { dg-final { scan-assembler "custom\\t251, .* # fsqrts .*" } } */
diff --git a/gcc/testsuite/gcc.target/nios2/custom-fp-3.c b/gcc/testsuite/gcc.target/nios2/custom-fp-3.c
new file mode 100644
index 00000000000..703bc9fa5bd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/custom-fp-3.c
@@ -0,0 +1,26 @@
+/* Test specification of custom instructions via function attributes.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O1 -ffinite-math-only" } */
+
+/* -O1 in the options is significant.  Without it FP operations may not be
+   optimized to custom instructions.  */
+
+#include <stdio.h> 
+#include <math.h>
+
+extern void
+custom_fp (float operand_a, float operand_b, float *result)
+  __attribute__ ((target ("custom-fmaxs=246,custom-fmins=247,custom-fsqrts=251")));
+
+void
+custom_fp (float operand_a, float operand_b, float *result)
+{
+  result[0] = fmaxf (operand_a, operand_b);
+  result[1] = fminf (operand_a, operand_b);
+  result[2] = sqrtf (operand_a);
+}
+
+/* { dg-final { scan-assembler "custom\\t246, .* # fmaxs .*" } } */
+/* { dg-final { scan-assembler "custom\\t247, .* # fmins .*" } } */
+/* { dg-final { scan-assembler "custom\\t251, .* # fsqrts .*" } } */
diff --git a/gcc/testsuite/gcc.target/nios2/custom-fp-4.c b/gcc/testsuite/gcc.target/nios2/custom-fp-4.c
new file mode 100644
index 00000000000..6c5f2a24be4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/custom-fp-4.c
@@ -0,0 +1,29 @@
+/* Test conflict between pragma and attribute specification of custom
+   instructions.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O1 -ffinite-math-only" } */
+
+/* -O1 in the options is significant.  Without it FP operations may not be
+   optimized to custom instructions.  */
+
+#include <stdio.h> 
+#include <math.h>
+
+/* This test case is expected to cause an error because GCC does not know
+   how to merge different custom instruction attribute sets.  The extern
+   declaration sees the options specified by both the pragma and the function
+   attribute, but the function definition sees only the pragma options.  */
+
+#pragma GCC target ("custom-fmaxs=246")
+
+extern void
+custom_fp (float operand_a, float operand_b, float *result)
+  __attribute__ ((target ("custom-fmins=247")));
+
+void
+custom_fp (float operand_a, float operand_b, float *result)
+{   /* { dg-error "conflicting" } */
+  result[0] = fmaxf (operand_a, operand_b);
+  result[1] = fminf (operand_a, operand_b);
+}
diff --git a/gcc/testsuite/gcc.target/nios2/custom-fp-5.c b/gcc/testsuite/gcc.target/nios2/custom-fp-5.c
new file mode 100644
index 00000000000..1dba87a4e44
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/custom-fp-5.c
@@ -0,0 +1,26 @@
+/* Test that forward declaration and definition don't conflict when used
+   with pragma specification of custom instructions.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O1 -ffinite-math-only" } */
+
+/* -O1 in the options is significant.  Without it FP operations may not be
+   optimized to custom instructions.  */
+
+#include <stdio.h> 
+#include <math.h>
+
+#pragma GCC target ("custom-fmaxs=246,custom-fmins=247")
+
+extern void
+custom_fp (float operand_a, float operand_b, float *result);
+
+void
+custom_fp (float operand_a, float operand_b, float *result)
+{
+  result[0] = fmaxf (operand_a, operand_b);
+  result[1] = fminf (operand_a, operand_b);
+}
+
+/* { dg-final { scan-assembler "custom\\t246, .* # fmaxs .*" } } */
+/* { dg-final { scan-assembler "custom\\t247, .* # fmins .*" } } */
diff --git a/gcc/testsuite/gcc.target/nios2/custom-fp-6.c b/gcc/testsuite/gcc.target/nios2/custom-fp-6.c
new file mode 100644
index 00000000000..7540c57b282
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/custom-fp-6.c
@@ -0,0 +1,30 @@
+/* Test conflict between pragma and attribute specification of custom
+   instructions.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O1 -ffinite-math-only" } */
+
+/* -O1 in the options is significant.  Without it FP operations may not be
+   optimized to custom instructions.  */
+
+#include <stdio.h> 
+#include <math.h>
+
+/* This test case is expected to cause an error because GCC does not know
+   how to merge different custom instruction attribute sets, even if they
+   do not overlap.  */
+
+extern void
+custom_fp (float operand_a, float operand_b, float *result)
+  __attribute__ ((target ("custom-fmaxs=246")));
+
+extern void
+custom_fp (float operand_a, float operand_b, float *result)
+  __attribute__ ((target ("custom-fmins=247")));    /* { dg-error "conflicting" } */
+
+void
+custom_fp (float operand_a, float operand_b, float *result)
+{
+  result[0] = fmaxf (operand_a, operand_b);
+  result[1] = fminf (operand_a, operand_b);
+}
diff --git a/gcc/testsuite/gcc.target/nios2/custom-fp-7.c b/gcc/testsuite/gcc.target/nios2/custom-fp-7.c
new file mode 100644
index 00000000000..6f17336fbb9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/custom-fp-7.c
@@ -0,0 +1,33 @@
+/* Test that duplicate declarations with the same custom insn attributes
+   don't cause an error.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O1 -ffinite-math-only" } */
+
+/* -O1 in the options is significant.  Without it FP operations may not be
+   optimized to custom instructions.  */
+
+#include <stdio.h> 
+#include <math.h>
+
+/* This test case is expected to cause an error because GCC does not know
+   how to merge different custom instruction attribute sets, even if they
+   do not overlap.  */
+
+extern void
+custom_fp (float operand_a, float operand_b, float *result)
+  __attribute__ ((target ("custom-fmaxs=246,custom-fmins=247")));
+
+extern void
+custom_fp (float operand_a, float operand_b, float *result)
+  __attribute__ ((target ("custom-fmaxs=246,custom-fmins=247")));
+
+void
+custom_fp (float operand_a, float operand_b, float *result)
+{
+  result[0] = fmaxf (operand_a, operand_b);
+  result[1] = fminf (operand_a, operand_b);
+}
+
+/* { dg-final { scan-assembler "custom\\t246, .* # fmaxs .*" } } */
+/* { dg-final { scan-assembler "custom\\t247, .* # fmins .*" } } */
diff --git a/gcc/testsuite/gcc.target/nios2/custom-fp-8.c b/gcc/testsuite/gcc.target/nios2/custom-fp-8.c
new file mode 100644
index 00000000000..32f8a041479
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/custom-fp-8.c
@@ -0,0 +1,24 @@
+/* Test whitespace skipping in target attributes.  */
+
+/* { dg-do compile } */
+
+#pragma GCC target ("custom-fdivs=246")
+#pragma GCC target (" custom-fdivs=246")
+#pragma GCC target ("custom-fdivs =246")
+#pragma GCC target ("custom-fdivs= 246")
+#pragma GCC target ("custom-fdivs=246 ")
+
+#pragma GCC target ("custom-fdivs=246,custom-fabss=247")
+#pragma GCC target ("custom-fdivs=246 ,custom-fabss=247")
+#pragma GCC target ("custom-fdivs=246, custom-fabss=247")
+#pragma GCC target ("custom-fdivs=246 , custom-fabss=247")
+
+void foo (void) __attribute__ ((target ("custom-fcmpnes=226,custom-fcmpeqs=227")));
+void foo (void) __attribute__ ((target ("custom-fcmpnes =226 ,custom-fcmpeqs=227")));
+void foo (void) __attribute__ ((target ("custom-fcmpnes= 226, custom-fcmpeqs=227")));
+void foo (void) __attribute__ ((target (" custom-fcmpnes=226 , custom-fcmpeqs = 227")));
+void foo (void) __attribute__ ((target (" custom-fcmpnes=226 ,custom-fcmpeqs =227 ")));
+
+#pragma GCC target ("custom-fpu-cfg=60-1")
+#pragma GCC target ("custom-fpu-cfg =60-1 ")
+#pragma GCC target (" custom-fpu-cfg= 60-1 ")
diff --git a/gcc/testsuite/gcc.target/nios2/custom-fp-cmp-1.c b/gcc/testsuite/gcc.target/nios2/custom-fp-cmp-1.c
new file mode 100644
index 00000000000..b290c41e475
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/custom-fp-cmp-1.c
@@ -0,0 +1,53 @@
+/* Test generation of floating-point compare custom instructions.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+
+/* -O1 in the options is significant.  Without it FP operations may not be
+   optimized to custom instructions.  */
+
+#pragma GCC target ("custom-frdxhi=40")
+#pragma GCC target ("custom-frdxlo=41")
+#pragma GCC target ("custom-frdy=42")
+#pragma GCC target ("custom-fwrx=43")
+#pragma GCC target ("custom-fwry=44")
+
+#pragma GCC target ("custom-fcmpeqs=200")
+
+int
+test_fcmpeqs (float a, float b)
+{
+  return (a == b);
+}
+
+/* { dg-final { scan-assembler "custom\\t200, .* # fcmpeqs .*" } } */
+
+#pragma GCC target ("custom-fcmpgtd=201")
+
+int
+test_fcmpgtd (double a, double b)
+{
+  return (a > b);
+}
+
+/* { dg-final { scan-assembler "custom\\t201, .* # fcmpgtd .*" } } */
+
+#pragma GCC target ("custom-fcmples=202")
+
+int
+test_fcmples (float a, float b)
+{
+  return (a <= b);
+}
+
+/* { dg-final { scan-assembler "custom\\t202, .* # fcmples .*" } } */
+
+#pragma GCC target ("custom-fcmpned=203")
+
+int
+test_fcmpned (double a, double b)
+{
+  return (a != b);
+}
+
+/* { dg-final { scan-assembler "custom\\t203, .* # fcmpned .*" } } */
diff --git a/gcc/testsuite/gcc.target/nios2/custom-fp-conversion.c b/gcc/testsuite/gcc.target/nios2/custom-fp-conversion.c
new file mode 100644
index 00000000000..20b2159960e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/custom-fp-conversion.c
@@ -0,0 +1,66 @@
+/* Test generation of conversion custom instructions.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O1 -ffinite-math-only -funsafe-math-optimizations" } */
+
+/* -O1 in the options is significant.  Without it FP operations may not be
+   optimized to custom instructions.  */
+
+#include <stdio.h> 
+#include <math.h>
+
+#pragma GCC target ("custom-frdxhi=40")
+#pragma GCC target ("custom-frdxlo=41")
+#pragma GCC target ("custom-frdy=42")
+#pragma GCC target ("custom-fwrx=43")
+#pragma GCC target ("custom-fwry=44")
+
+#pragma GCC target ("custom-fextsd=100")
+#pragma GCC target ("custom-fixdi=101")
+#pragma GCC target ("custom-fixdu=102")
+#pragma GCC target ("custom-fixsi=103")
+#pragma GCC target ("custom-fixsu=104")
+#pragma GCC target ("custom-floatid=105")
+#pragma GCC target ("custom-floatis=106")
+#pragma GCC target ("custom-floatud=107")
+#pragma GCC target ("custom-floatus=108")
+#pragma GCC target ("custom-ftruncds=109")
+
+typedef struct data {
+  double fextsd;
+  int fixdi;
+  unsigned fixdu;
+  int fixsi;
+  unsigned fixsu;
+  double floatid;
+  float floatis;
+  double floatud;
+  float floatus;
+  float ftruncds;
+} data_t;
+
+void
+custom_fp (int i, unsigned u, float f, double d, data_t *out)
+{
+  out->fextsd = (double) f;
+  out->fixdi = (int) d;
+  out->fixdu = (unsigned) d;
+  out->fixsi = (int) f;
+  out->fixsu = (unsigned) f;
+  out->floatid = (double) i;
+  out->floatis = (float) i;
+  out->floatud = (double) u;
+  out->floatus = (float) u;
+  out->ftruncds = (float) d;
+}
+
+/* { dg-final { scan-assembler "custom\\t100, .* # fextsd .*" } } */
+/* { dg-final { scan-assembler "custom\\t101, .* # fixdi .*" } } */
+/* { dg-final { scan-assembler "custom\\t102, .* # fixdu .*" } } */
+/* { dg-final { scan-assembler "custom\\t103, .* # fixsi .*" } } */
+/* { dg-final { scan-assembler "custom\\t104, .* # fixsu .*" } } */
+/* { dg-final { scan-assembler "custom\\t105, .* # floatid .*" } } */
+/* { dg-final { scan-assembler "custom\\t106, .* # floatis .*" } } */
+/* { dg-final { scan-assembler "custom\\t107, .* # floatud .*" } } */
+/* { dg-final { scan-assembler "custom\\t108, .* # floatus .*" } } */
+/* { dg-final { scan-assembler "custom\\t109, .* # ftruncds .*" } } */
diff --git a/gcc/testsuite/gcc.target/nios2/custom-fp-double.c b/gcc/testsuite/gcc.target/nios2/custom-fp-double.c
new file mode 100644
index 00000000000..d907c572af1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/custom-fp-double.c
@@ -0,0 +1,86 @@
+/* Test generation of all double-float custom instructions.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O1 -ffinite-math-only -funsafe-math-optimizations" } */
+
+/* -O1 in the options is significant.  Without it FP operations may not be
+   optimized to custom instructions.  */
+
+#include <stdio.h> 
+#include <math.h>
+
+#pragma GCC target ("custom-frdxhi=40")
+#pragma GCC target ("custom-frdxlo=41")
+#pragma GCC target ("custom-frdy=42")
+#pragma GCC target ("custom-fwrx=43")
+#pragma GCC target ("custom-fwry=44")
+
+#pragma GCC target ("custom-fabsd=100")
+#pragma GCC target ("custom-faddd=101")
+#pragma GCC target ("custom-fatand=102")
+#pragma GCC target ("custom-fcosd=103")
+#pragma GCC target ("custom-fdivd=104")
+#pragma GCC target ("custom-fexpd=105")
+#pragma GCC target ("custom-flogd=106")
+#pragma GCC target ("custom-fmaxd=107")
+#pragma GCC target ("custom-fmind=108")
+#pragma GCC target ("custom-fmuld=109")
+#pragma GCC target ("custom-fnegd=110")
+#pragma GCC target ("custom-fsind=111")
+#pragma GCC target ("custom-fsqrtd=112")
+#pragma GCC target ("custom-fsubd=113")
+#pragma GCC target ("custom-ftand=114")
+#pragma GCC target ("custom-fcmpeqd=200")
+#pragma GCC target ("custom-fcmpged=201")
+#pragma GCC target ("custom-fcmpgtd=202")
+#pragma GCC target ("custom-fcmpled=203")
+#pragma GCC target ("custom-fcmpltd=204")
+#pragma GCC target ("custom-fcmpned=205")
+
+void
+custom_fp (double a, double b, double *fp, int *ip)
+{
+  fp[0] = fabs (a);
+  fp[1] = a + b;
+  fp[2] = atan (a);
+  fp[3] = cos (a);
+  fp[4] = a / b;
+  fp[5] = exp (a);
+  fp[6] = log (a);
+  fp[7] = fmax (a, b);
+  fp[8] = fmin (a, b);
+  fp[9] = a * b;
+  fp[10] = -b;
+  fp[11] = sin (b);
+  fp[12] = sqrt (a);
+  fp[13] = a - b;
+  fp[14] = tan (a);
+  ip[0] = (a == fp[0]);
+  ip[1] = (a >= fp[1]);
+  ip[2] = (a > fp[2]);
+  ip[3] = (a <= fp[3]);
+  ip[4] = (a < fp[4]);
+  ip[5] = (a != fp[5]);
+}
+
+/* { dg-final { scan-assembler "custom\\t100, .* # fabsd .*" } } */
+/* { dg-final { scan-assembler "custom\\t101, .* # faddd .*" } } */
+/* { dg-final { scan-assembler "custom\\t102, .* # fatand .*" } } */
+/* { dg-final { scan-assembler "custom\\t103, .* # fcosd .*" } } */
+/* { dg-final { scan-assembler "custom\\t104, .* # fdivd .*" } } */
+/* { dg-final { scan-assembler "custom\\t105, .* # fexpd .*" } } */
+/* { dg-final { scan-assembler "custom\\t106, .* # flogd .*" } } */
+/* { dg-final { scan-assembler "custom\\t107, .* # fmaxd .*" } } */
+/* { dg-final { scan-assembler "custom\\t108, .* # fmind .*" } } */
+/* { dg-final { scan-assembler "custom\\t109, .* # fmuld .*" } } */
+/* { dg-final { scan-assembler "custom\\t110, .* # fnegd .*" } } */
+/* { dg-final { scan-assembler "custom\\t111, .* # fsind .*" } } */
+/* { dg-final { scan-assembler "custom\\t112, .* # fsqrtd .*" } } */
+/* { dg-final { scan-assembler "custom\\t113, .* # fsubd .*" } } */
+/* { dg-final { scan-assembler "custom\\t114, .* # ftand .*" } } */
+/* { dg-final { scan-assembler "custom\\t200, .* # fcmpeqd .*" } } */
+/* { dg-final { scan-assembler "custom\\t201, .* # fcmpged .*" } } */
+/* { dg-final { scan-assembler "custom\\t202, .* # fcmpgtd .*" } } */
+/* { dg-final { scan-assembler "custom\\t203, .* # fcmpled .*" } } */
+/* { dg-final { scan-assembler "custom\\t204, .* # fcmpltd .*" } } */
+/* { dg-final { scan-assembler "custom\\t205, .* # fcmpned .*" } } */
diff --git a/gcc/testsuite/gcc.target/nios2/custom-fp-float.c b/gcc/testsuite/gcc.target/nios2/custom-fp-float.c
new file mode 100644
index 00000000000..26919d2f20e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/custom-fp-float.c
@@ -0,0 +1,80 @@
+/* Test generation of all single-float custom instructions.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O1 -ffinite-math-only -funsafe-math-optimizations" } */
+
+/* -O1 in the options is significant.  Without it FP operations may not be
+   optimized to custom instructions.  */
+
+#include <stdio.h> 
+#include <math.h>
+
+#pragma GCC target ("custom-fabss=100")
+#pragma GCC target ("custom-fadds=101")
+#pragma GCC target ("custom-fatans=102")
+#pragma GCC target ("custom-fcoss=103")
+#pragma GCC target ("custom-fdivs=104")
+#pragma GCC target ("custom-fexps=105")
+#pragma GCC target ("custom-flogs=106")
+#pragma GCC target ("custom-fmaxs=107")
+#pragma GCC target ("custom-fmins=108")
+#pragma GCC target ("custom-fmuls=109")
+#pragma GCC target ("custom-fnegs=110")
+#pragma GCC target ("custom-fsins=111")
+#pragma GCC target ("custom-fsqrts=112")
+#pragma GCC target ("custom-fsubs=113")
+#pragma GCC target ("custom-ftans=114")
+#pragma GCC target ("custom-fcmpeqs=200")
+#pragma GCC target ("custom-fcmpges=201")
+#pragma GCC target ("custom-fcmpgts=202")
+#pragma GCC target ("custom-fcmples=203")
+#pragma GCC target ("custom-fcmplts=204")
+#pragma GCC target ("custom-fcmpnes=205")
+
+void
+custom_fp (float a, float b, float *fp, int *ip)
+{
+  fp[0] = fabsf (a);
+  fp[1] = a + b;
+  fp[2] = atanf (a);
+  fp[3] = cosf (a);
+  fp[4] = a / b;
+  fp[5] = expf (a);
+  fp[6] = logf (a);
+  fp[7] = fmaxf (a, b);
+  fp[8] = fminf (a, b);
+  fp[9] = a * b;
+  fp[10] = -b;
+  fp[11] = sinf (b);
+  fp[12] = sqrtf (a);
+  fp[13] = a - b;
+  fp[14] = tanf (a);
+  ip[0] = (a == fp[0]);
+  ip[1] = (a >= fp[1]);
+  ip[2] = (a > fp[2]);
+  ip[3] = (a <= fp[3]);
+  ip[4] = (a < fp[4]);
+  ip[5] = (a != fp[5]);
+}
+
+/* { dg-final { scan-assembler "custom\\t100, .* # fabss .*" } } */
+/* { dg-final { scan-assembler "custom\\t101, .* # fadds .*" } } */
+/* { dg-final { scan-assembler "custom\\t102, .* # fatans .*" } } */
+/* { dg-final { scan-assembler "custom\\t103, .* # fcoss .*" } } */
+/* { dg-final { scan-assembler "custom\\t104, .* # fdivs .*" } } */
+/* { dg-final { scan-assembler "custom\\t105, .* # fexps .*" } } */
+/* { dg-final { scan-assembler "custom\\t106, .* # flogs .*" } } */
+/* { dg-final { scan-assembler "custom\\t107, .* # fmaxs .*" } } */
+/* { dg-final { scan-assembler "custom\\t108, .* # fmins .*" } } */
+/* { dg-final { scan-assembler "custom\\t109, .* # fmuls .*" } } */
+/* { dg-final { scan-assembler "custom\\t110, .* # fnegs .*" } } */
+/* { dg-final { scan-assembler "custom\\t111, .* # fsins .*" } } */
+/* { dg-final { scan-assembler "custom\\t112, .* # fsqrts .*" } } */
+/* { dg-final { scan-assembler "custom\\t113, .* # fsubs .*" } } */
+/* { dg-final { scan-assembler "custom\\t114, .* # ftans .*" } } */
+/* { dg-final { scan-assembler "custom\\t200, .* # fcmpeqs .*" } } */
+/* { dg-final { scan-assembler "custom\\t201, .* # fcmpges .*" } } */
+/* { dg-final { scan-assembler "custom\\t202, .* # fcmpgts .*" } } */
+/* { dg-final { scan-assembler "custom\\t203, .* # fcmples .*" } } */
+/* { dg-final { scan-assembler "custom\\t204, .* # fcmplts .*" } } */
+/* { dg-final { scan-assembler "custom\\t205, .* # fcmpnes .*" } } */
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-ashlsi3-one_shift.c b/gcc/testsuite/gcc.target/nios2/nios2-ashlsi3-one_shift.c
new file mode 100644
index 00000000000..6af6d4f9cb0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-ashlsi3-one_shift.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options " " } */
+/* { dg-final { scan-assembler-not "slli" } } */
+
+int x;
+
+void foo(void)
+{
+  x <<= 1;
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-builtin-custom.c b/gcc/testsuite/gcc.target/nios2/nios2-builtin-custom.c
new file mode 100644
index 00000000000..18399facc00
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-builtin-custom.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-final { scan-assembler "custom" } } */
+
+/* This test case used to cause an unrecognizable insn crash.  */
+
+void foo (void)
+{
+  int offset = __builtin_custom_in(0x1);
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-builtin-io.c b/gcc/testsuite/gcc.target/nios2/nios2-builtin-io.c
new file mode 100644
index 00000000000..58bc83f8abc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-builtin-io.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-final { scan-assembler "ldbio" } } */
+/* { dg-final { scan-assembler "ldbuio" } } */
+/* { dg-final { scan-assembler "ldhio" } } */
+/* { dg-final { scan-assembler "ldhuio" } } */
+/* { dg-final { scan-assembler "ldwio" } } */
+/* { dg-final { scan-assembler "stbio" } } */
+/* { dg-final { scan-assembler "sthio" } } */
+/* { dg-final { scan-assembler "stwio" } } */
+
+volatile char b;
+volatile short h;
+volatile int w;
+
+void x ()
+{
+  __builtin_ldbio (&b);
+  __builtin_ldbuio (&b);
+  __builtin_ldhio (&h);
+  __builtin_ldhuio (&h);
+  __builtin_ldwio (&w);
+
+  __builtin_stbio (&b, 42);
+  __builtin_sthio (&h, 43);
+  __builtin_stwio (&w, 44);
+} 
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-cache-1.c b/gcc/testsuite/gcc.target/nios2/nios2-cache-1.c
new file mode 100644
index 00000000000..5516a1367ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-cache-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "ldwio" } } */
+/* { dg-final { scan-assembler-not "stwio" } } */
+
+/* Make sure the default behavior is not to generate I/O variants of
+   the load and stores to foo.  */
+
+extern volatile int foo;
+
+int
+read_foo (void)
+{
+  return foo;
+}
+
+void
+write_foo (int x)
+{
+  foo = x;
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-cache-2.c b/gcc/testsuite/gcc.target/nios2/nios2-cache-2.c
new file mode 100644
index 00000000000..239c600ac56
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-cache-2.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-cache-volatile" } */
+/* { dg-final { scan-assembler "ldwio" } } */
+/* { dg-final { scan-assembler "stwio" } } */
+
+/* Make sure -mno-cache-volatile generates I/O variants of the load and
+   stores to foo.  */
+
+extern volatile int foo;
+
+int
+read_foo (void)
+{
+  return foo;
+}
+
+void
+write_foo (int x)
+{
+  foo = x;
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-custom-1.c b/gcc/testsuite/gcc.target/nios2/nios2-custom-1.c
new file mode 100644
index 00000000000..c6e4b517e71
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-custom-1.c
@@ -0,0 +1,64 @@
+/* { dg-do compile } */
+
+float fres, f1, f2;
+int ires, i1, i2;
+void *pres, *p1, *p2;
+
+void x ()
+{
+  __builtin_custom_n (0);
+  __builtin_custom_ni (1, i1);
+  __builtin_custom_nf (2, f1);
+  __builtin_custom_np (3, p1);
+  __builtin_custom_nii (4, i1, i2);
+  __builtin_custom_nif (5, i1, f2);
+  __builtin_custom_nip (6, i1, p2);
+  __builtin_custom_nfi (7, f1, i2);
+  __builtin_custom_nff (8, f1, f2);
+  __builtin_custom_nfp (9, f1, p2);
+  __builtin_custom_npi (10, p1, i2);
+  __builtin_custom_npf (11, p1, f2);
+  __builtin_custom_npp (12, p1, p2);
+
+  ires = __builtin_custom_in (13+0);
+  ires = __builtin_custom_ini (13+1, i1);
+  ires = __builtin_custom_inf (13+2, f1);
+  ires = __builtin_custom_inp (13+3, p1);
+  ires = __builtin_custom_inii (13+4, i1, i2);
+  ires = __builtin_custom_inif (13+5, i1, f2);
+  ires = __builtin_custom_inip (13+6, i1, p2);
+  ires = __builtin_custom_infi (13+7, f1, i2);
+  ires = __builtin_custom_inff (13+8, f1, f2);
+  ires = __builtin_custom_infp (13+9, f1, p2);
+  ires = __builtin_custom_inpi (13+10, p1, i2);
+  ires = __builtin_custom_inpf (13+11, p1, f2);
+  ires = __builtin_custom_inpp (13+12, p1, p2);
+
+  fres = __builtin_custom_fn (26+0);
+  fres = __builtin_custom_fni (26+1, i1);
+  fres = __builtin_custom_fnf (26+2, f1);
+  fres = __builtin_custom_fnp (26+3, p1);
+  fres = __builtin_custom_fnii (26+4, i1, i2);
+  fres = __builtin_custom_fnif (26+5, i1, f2);
+  fres = __builtin_custom_fnip (26+6, i1, p2);
+  fres = __builtin_custom_fnfi (26+7, f1, i2);
+  fres = __builtin_custom_fnff (26+8, f1, f2);
+  fres = __builtin_custom_fnfp (26+9, f1, p2);
+  fres = __builtin_custom_fnpi (26+10, p1, i2);
+  fres = __builtin_custom_fnpf (26+11, p1, f2);
+  fres = __builtin_custom_fnpp (26+12, p1, p2);
+
+  pres = __builtin_custom_pn (39+0);
+  pres = __builtin_custom_pni (39+1, i1);
+  pres = __builtin_custom_pnf (39+2, f1);
+  pres = __builtin_custom_pnp (39+3, p1);
+  pres = __builtin_custom_pnii (39+4, i1, i2);
+  pres = __builtin_custom_pnif (39+5, i1, f2);
+  pres = __builtin_custom_pnip (39+6, i1, p2);
+  pres = __builtin_custom_pnfi (39+7, f1, i2);
+  pres = __builtin_custom_pnff (39+8, f1, f2);
+  pres = __builtin_custom_pnfp (39+9, f1, p2);
+  pres = __builtin_custom_pnpi (39+10, p1, i2);
+  pres = __builtin_custom_pnpf (39+11, p1, f2);
+  pres = __builtin_custom_pnpp (39+12, p1, p2);
+} 
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-custom-2.c b/gcc/testsuite/gcc.target/nios2/nios2-custom-2.c
new file mode 100644
index 00000000000..7f5d21a5440
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-custom-2.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+
+float foo (float) __attribute__ ((target ("custom-fsqrts=128")));
+float foo (float x)
+{
+  return __builtin_custom_fsqrts (x) + __builtin_custom_fnf (128, x);
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-int-types.c b/gcc/testsuite/gcc.target/nios2/nios2-int-types.c
new file mode 100644
index 00000000000..21b4a02be9f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-int-types.c
@@ -0,0 +1,34 @@
+/* Test that various types are all derived from int.  */
+/* { dg-do compile } */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <sys/types.h>
+
+extern size_t a;
+unsigned int a;
+extern unsigned int aa;
+size_t aa;
+
+extern ssize_t b;
+int b;
+extern int bb;
+ssize_t bb;
+
+extern ptrdiff_t c;
+int c;
+extern int cc;
+ptrdiff_t cc;
+
+extern intptr_t d;
+int d;
+extern int dd;
+intptr_t dd;
+
+extern uintptr_t e;
+unsigned int e;
+extern unsigned int ee;
+uintptr_t ee;
+
+
+
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-mul-options-1.c b/gcc/testsuite/gcc.target/nios2/nios2-mul-options-1.c
new file mode 100644
index 00000000000..b639482bfa6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-mul-options-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "" } */
+/* { dg-final { scan-assembler "__muldi3" } } */
+
+long long x, y, z;
+
+void test()
+{
+  x = y * z;
+}
+  
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-mul-options-2.c b/gcc/testsuite/gcc.target/nios2/nios2-mul-options-2.c
new file mode 100644
index 00000000000..f93b4e7c585
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-mul-options-2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mhw-mulx" } */
+/* { dg-final { scan-assembler-not "__muldi3" } } */
+
+long long x, y, z;
+
+void test()
+{
+  x = y * z;
+}
+  
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-mul-options-3.c b/gcc/testsuite/gcc.target/nios2/nios2-mul-options-3.c
new file mode 100644
index 00000000000..2da74ba6b3b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-mul-options-3.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "" } */
+/* { dg-final { scan-assembler-not "__mulsi3" } } */
+
+int x, y, z;
+
+void test()
+{
+  x = y * z;
+}
+  
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-mul-options-4.c b/gcc/testsuite/gcc.target/nios2/nios2-mul-options-4.c
new file mode 100644
index 00000000000..7794f6d8756
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-mul-options-4.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-hw-mul" } */
+/* { dg-final { scan-assembler "__mulsi3" } } */
+
+int x, y, z;
+
+void test()
+{
+  x = y * z;
+}
+  
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-nor.c b/gcc/testsuite/gcc.target/nios2/nios2-nor.c
new file mode 100644
index 00000000000..3a1911e326d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-nor.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-O" } */
+/* { dg-final { scan-assembler "nor" } } */
+
+int foo (int x, int y)
+{
+  return ~(x | y);
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-rdctl.c b/gcc/testsuite/gcc.target/nios2/nios2-rdctl.c
new file mode 100644
index 00000000000..6b44d88e65a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-rdctl.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-final { scan-assembler "rdctl" } } */
+
+int x ()
+{
+  __builtin_rdctl (0);
+  return 0;
+} 
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-rdwrctl-1.c b/gcc/testsuite/gcc.target/nios2/nios2-rdwrctl-1.c
new file mode 100644
index 00000000000..922942ab980
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-rdwrctl-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+
+volatile int res;
+
+void x ()
+{
+  __builtin_wrctl (0, res);
+  __builtin_wrctl (15, res);
+  __builtin_wrctl (31, res);
+
+  res = __builtin_rdctl (0);
+  res = __builtin_rdctl (15);
+  res = __builtin_rdctl (31);
+} 
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-stack-check-1.c b/gcc/testsuite/gcc.target/nios2/nios2-stack-check-1.c
new file mode 100644
index 00000000000..415906fc5ee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-stack-check-1.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-fstack-limit-register=et" } */
+/* { dg-final { scan-assembler "bgeu\\tsp, et" } } */
+/* { dg-final { scan-assembler "break\\t3" } } */
+/* check stack checking */
+void test()
+{
+  int a, b, c;
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-stack-check-2.c b/gcc/testsuite/gcc.target/nios2/nios2-stack-check-2.c
new file mode 100644
index 00000000000..b903db5cdc4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-stack-check-2.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options " " } */
+/* { dg-final { scan-assembler-not "bgeu\\tsp, et" } } */
+/* { dg-final { scan-assembler-not "break\\t3" } } */
+/* check stack checking */
+void test()
+{
+  int a, b, c;
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-stxio.c b/gcc/testsuite/gcc.target/nios2/nios2-stxio.c
new file mode 100644
index 00000000000..af079d641c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-stxio.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+
+void test_stbio (unsigned char* p1, unsigned char* p2)
+{
+  __builtin_stbio (p1, *p2);
+  __builtin_stbio (p2, 0);
+  __builtin_stbio (p2 + 1, 0x80);
+  __builtin_stbio (p2 + 2, 0x7f);
+}
+
+void test_sthio (unsigned short* p1, unsigned short* p2)
+{
+  __builtin_sthio (p1, *p2);
+  __builtin_sthio (p2, 0);
+  __builtin_sthio (p2 + 1, 0x8000);
+  __builtin_sthio (p2 + 2, 0x7fff);
+}
+
+void test_stwio (unsigned int* p1, unsigned int* p2)
+{
+  __builtin_stwio (p1, *p2);
+  __builtin_stwio (p2, 0);
+  __builtin_stwio (p2 + 1, 0x80000000);
+  __builtin_stwio (p2 + 2, 0x7fffffff);
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-trap-insn.c b/gcc/testsuite/gcc.target/nios2/nios2-trap-insn.c
new file mode 100644
index 00000000000..dd881d166c8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-trap-insn.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-final { scan-assembler "break\\t3" } } */
+
+/* Test the nios2 trap instruction */
+void foo(void){
+  __builtin_trap();
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-wrctl-not-zero.c b/gcc/testsuite/gcc.target/nios2/nios2-wrctl-not-zero.c
new file mode 100644
index 00000000000..f32a9ca4e50
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-wrctl-not-zero.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options " " } */
+/* { dg-final { scan-assembler-not "wrctl\\tctl6, zero" } } */
+
+void foo(void){
+  __builtin_wrctl(6,4);
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-wrctl-zero.c b/gcc/testsuite/gcc.target/nios2/nios2-wrctl-zero.c
new file mode 100644
index 00000000000..93f01b07708
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-wrctl-zero.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+/* { dg-final { scan-assembler "wrctl\\tctl6, zero" } } */
+
+void foo(void){
+  __builtin_wrctl(6,0);
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2-wrctl.c b/gcc/testsuite/gcc.target/nios2/nios2-wrctl.c
new file mode 100644
index 00000000000..5ebdc24b8be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2-wrctl.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "" } */
+/* { dg-final { scan-assembler "wrctl" } } */
+
+void foo(void){
+  __builtin_wrctl(6,4);
+}
diff --git a/gcc/testsuite/gcc.target/nios2/nios2.exp b/gcc/testsuite/gcc.target/nios2/nios2.exp
new file mode 100644
index 00000000000..4f027048a9f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nios2/nios2.exp
@@ -0,0 +1,41 @@
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't a Nios II target.
+if ![istarget nios2*-*-*] then {
+  return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+    set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \
+	"" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish
diff --git a/gcc/testsuite/gcc.target/powerpc/powerpc.exp b/gcc/testsuite/gcc.target/powerpc/powerpc.exp
index 355a397e408..bf270d58d11 100644
--- a/gcc/testsuite/gcc.target/powerpc/powerpc.exp
+++ b/gcc/testsuite/gcc.target/powerpc/powerpc.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2005-2013 Free Software Foundation, Inc.
+#   Copyright (C) 2005-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c b/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c
new file mode 100644
index 00000000000..1c78052e6d7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c
@@ -0,0 +1,21 @@
+/* Test accuracy of long double division (glibc bug 15396).  */
+/* { dg-do run { target powerpc*-*-linux* powerpc*-*-darwin* powerpc*-*-aix* rs6000-*-* } } */
+/* { dg-options "-mlong-double-128" } */
+
+extern void exit (int);
+extern void abort (void);
+
+volatile long double a = 0x1p-1024L;
+volatile long double b = 0x3p-53L;
+volatile long double r;
+volatile long double expected = 0x1.55555555555555555555555555p-973L;
+
+int
+main (void)
+{
+  r = a / b;
+  /* Allow error up to 2ulp.  */
+  if (__builtin_fabsl (r - expected) > 0x1p-1073L)
+    abort ();
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/rx/rx.exp b/gcc/testsuite/gcc.target/rx/rx.exp
index 9eaf2b86613..159add18bb7 100644
--- a/gcc/testsuite/gcc.target/rx/rx.exp
+++ b/gcc/testsuite/gcc.target/rx/rx.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2008-2013 Free Software Foundation, Inc.
+# Copyright (C) 2008-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-1.c b/gcc/testsuite/gcc.target/s390/hotpatch-1.c
new file mode 100644
index 00000000000..b9d6139b080
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-1.c
@@ -0,0 +1,20 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */
+
+#include <stdio.h>
+
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+int main (void)
+{
+  return 0;
+}
+
+/* Check number of occurences of certain instructions.  */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 12 } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-10.c b/gcc/testsuite/gcc.target/s390/hotpatch-10.c
new file mode 100644
index 00000000000..b91b3478ee3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-10.c
@@ -0,0 +1,21 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mno-hotpatch --save-temps" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch(2)))
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+int main (void)
+{
+  return 0;
+}
+
+/* Check number of occurences of certain instructions.  */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 2 } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-11.c b/gcc/testsuite/gcc.target/s390/hotpatch-11.c
new file mode 100644
index 00000000000..49167734253
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-11.c
@@ -0,0 +1,20 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch -mno-hotpatch --save-temps" } */
+
+#include <stdio.h>
+
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+int main (void)
+{
+  return 0;
+}
+
+/* Check number of occurences of certain instructions.  */
+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nop\t0" } } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-12.c b/gcc/testsuite/gcc.target/s390/hotpatch-12.c
new file mode 100644
index 00000000000..b3e9427d4e2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-12.c
@@ -0,0 +1,20 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mno-hotpatch -mhotpatch=1 --save-temps" } */
+
+#include <stdio.h>
+
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+int main (void)
+{
+  return 0;
+}
+
+/* Check number of occurences of certain instructions.  */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-2.c b/gcc/testsuite/gcc.target/s390/hotpatch-2.c
new file mode 100644
index 00000000000..6cc29447de4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-2.c
@@ -0,0 +1,20 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch=1 --save-temps" } */
+
+#include <stdio.h>
+
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+int main (void)
+{
+  return 0;
+}
+
+/* Check number of occurences of certain instructions.  */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-3.c b/gcc/testsuite/gcc.target/s390/hotpatch-3.c
new file mode 100644
index 00000000000..9f0b2b756a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-3.c
@@ -0,0 +1,20 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0 --save-temps" } */
+
+#include <stdio.h>
+
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+int main (void)
+{
+  return 0;
+}
+
+/* Check number of occurences of certain instructions.  */
+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-4.c b/gcc/testsuite/gcc.target/s390/hotpatch-4.c
new file mode 100644
index 00000000000..c1dba20a379
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-4.c
@@ -0,0 +1,26 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */
+
+#include <stdio.h>
+
+inline void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((always_inline))
+void hp2(void) /* { dg-warning "always_inline function might not be inlinable" } */
+{
+  printf("hello, world!\n");
+} /* { dg-warning "function 'hp2' with the 'always_inline' attribute is not hotpatchable" } */
+
+int main (void)
+{
+  return 0;
+}
+
+/* Check number of occurences of certain instructions.  */
+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nop\t0" } } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-5.c b/gcc/testsuite/gcc.target/s390/hotpatch-5.c
new file mode 100644
index 00000000000..ec267d65aae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-5.c
@@ -0,0 +1,21 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch))
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+int main (void)
+{
+  return 0;
+}
+
+/* Check number of occurences of certain instructions.  */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 12 } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-6.c b/gcc/testsuite/gcc.target/s390/hotpatch-6.c
new file mode 100644
index 00000000000..5af090d03a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-6.c
@@ -0,0 +1,21 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch(1)))
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+int main (void)
+{
+  return 0;
+}
+
+/* Check number of occurences of certain instructions.  */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-7.c b/gcc/testsuite/gcc.target/s390/hotpatch-7.c
new file mode 100644
index 00000000000..e73a510b4d6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-7.c
@@ -0,0 +1,21 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch(0)))
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+int main (void)
+{
+  return 0;
+}
+
+/* Check number of occurences of certain instructions.  */
+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-8.c b/gcc/testsuite/gcc.target/s390/hotpatch-8.c
new file mode 100644
index 00000000000..399aa7260b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-8.c
@@ -0,0 +1,28 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch))
+inline void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch))
+__attribute__ ((always_inline))
+void hp2(void) /* { dg-warning "always_inline function might not be inlinable" } */
+{
+  printf("hello, world!\n");
+} /* { dg-warning "function 'hp2' with the 'always_inline' attribute is not hotpatchable" } */
+
+int main (void)
+{
+  return 0;
+}
+
+/* Check number of occurences of certain instructions.  */
+/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nop\t0" } } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-9.c b/gcc/testsuite/gcc.target/s390/hotpatch-9.c
new file mode 100644
index 00000000000..5da675866b3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-9.c
@@ -0,0 +1,21 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch=1 --save-temps" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch(2)))
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+int main (void)
+{
+  return 0;
+}
+
+/* Check number of occurences of certain instructions.  */
+/* { dg-final { scan-assembler-times "nopr\t%r7" 2 } } */
+/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c b/gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c
new file mode 100644
index 00000000000..45a2cc5dc20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c
@@ -0,0 +1,27 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch" } */
+
+#include <stdio.h>
+
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+inline void hp2(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((always_inline))
+void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */
+{
+  printf("hello, world!\n");
+} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */
+
+int main (void)
+{
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c b/gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c
new file mode 100644
index 00000000000..5947f564f53
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c
@@ -0,0 +1,27 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch=0" } */
+
+#include <stdio.h>
+
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+inline void hp2(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((always_inline))
+void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */
+{
+  printf("hello, world!\n");
+} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */
+
+int main (void)
+{
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c b/gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c
new file mode 100644
index 00000000000..e0c7f6f52c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c
@@ -0,0 +1,27 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mhotpatch=1" } */
+
+#include <stdio.h>
+
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+inline void hp2(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((always_inline))
+void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */
+{
+  printf("hello, world!\n");
+} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */
+
+int main (void)
+{
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c b/gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c
new file mode 100644
index 00000000000..d9f13425adc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c
@@ -0,0 +1,11 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=-1" } */
+
+int main (void)
+{
+  return 0;
+}
+
+/* { dg-excess-errors "argument to '-mhotpatch=' should be a non-negative integer" } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c b/gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c
new file mode 100644
index 00000000000..53f7eac9e54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c
@@ -0,0 +1,28 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=1000000" } */
+
+#include <stdio.h>
+
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch(1000000)))
+void hp2(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch(1000001)))
+void hp3(void)
+{ /* { dg-error "requested 'hotpatch' attribute is not a non-negative integer constant or too large .max. 1000000." } */
+  printf("hello, world!\n");
+}
+
+int main (void)
+{
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c b/gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c
new file mode 100644
index 00000000000..cb10b66f0d3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c
@@ -0,0 +1,11 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -mhotpatch=1000001" } */
+
+int main (void)
+{
+  return 0;
+}
+
+/* { dg-excess-errors "argument to '-mhotpatch=' is too large .max. 1000000." } */
diff --git a/gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c b/gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c
new file mode 100644
index 00000000000..98ccb42c003
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c
@@ -0,0 +1,68 @@
+/* Functional tests for the function hotpatching feature.  */
+
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -mno-hotpatch" } */
+
+#include <stdio.h>
+
+__attribute__ ((hotpatch))
+void hp1(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch))
+inline void hp2(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch))
+__attribute__ ((always_inline))
+void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */
+{
+  printf("hello, world!\n");
+} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */
+
+__attribute__ ((hotpatch(0)))
+void hp4(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch(0)))
+inline void hp5(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch(0)))
+__attribute__ ((always_inline))
+void hp6(void) /* { dg-warning "always_inline function might not be inlinable" } */
+{
+  printf("hello, world!\n");
+} /* { dg-warning "function 'hp6' with the 'always_inline' attribute is not hotpatchable" } */
+
+__attribute__ ((hotpatch(1)))
+void hp7(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch(1)))
+inline void hp8(void)
+{
+  printf("hello, world!\n");
+}
+
+__attribute__ ((hotpatch(1)))
+__attribute__ ((always_inline))
+void hp9(void) /* { dg-warning "always_inline function might not be inlinable" } */
+{
+  printf("hello, world!\n");
+} /* { dg-warning "function 'hp9' with the 'always_inline' attribute is not hotpatchable" } */
+
+int main (void)
+{
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/s390/s390.exp b/gcc/testsuite/gcc.target/s390/s390.exp
index f7f9ad25607..1b6d94a2313 100644
--- a/gcc/testsuite/gcc.target/s390/s390.exp
+++ b/gcc/testsuite/gcc.target/s390/s390.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2007-2013 Free Software Foundation, Inc.
+# Copyright (C) 2007-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/sh/sh.exp b/gcc/testsuite/gcc.target/sh/sh.exp
index 0ee70c27e1a..ac428cde5b3 100644
--- a/gcc/testsuite/gcc.target/sh/sh.exp
+++ b/gcc/testsuite/gcc.target/sh/sh.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2007-2013 Free Software Foundation, Inc.
+# Copyright (C) 2007-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/sh/torture/sh-torture.exp b/gcc/testsuite/gcc.target/sh/torture/sh-torture.exp
index 6e3d0981fde..8fef587f827 100644
--- a/gcc/testsuite/gcc.target/sh/torture/sh-torture.exp
+++ b/gcc/testsuite/gcc.target/sh/torture/sh-torture.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2012-2013 Free Software Foundation, Inc.
+#   Copyright (C) 2012-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/sparc/sparc.exp b/gcc/testsuite/gcc.target/sparc/sparc.exp
index 6ec8b7fb22c..e8b59fb8616 100644
--- a/gcc/testsuite/gcc.target/sparc/sparc.exp
+++ b/gcc/testsuite/gcc.target/sparc/sparc.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 1997-2013 Free Software Foundation, Inc.
+# Copyright (C) 1997-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/spu/ea/ea.exp b/gcc/testsuite/gcc.target/spu/ea/ea.exp
index 69f796da9ce..2e04f9d77b2 100644
--- a/gcc/testsuite/gcc.target/spu/ea/ea.exp
+++ b/gcc/testsuite/gcc.target/spu/ea/ea.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2008-2013 Free Software Foundation, Inc.
+#   Copyright (C) 2008-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/spu/spu.exp b/gcc/testsuite/gcc.target/spu/spu.exp
index bddd9ea6059..ea99c58024e 100644
--- a/gcc/testsuite/gcc.target/spu/spu.exp
+++ b/gcc/testsuite/gcc.target/spu/spu.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2005-2013 Free Software Foundation, Inc.
+#   Copyright (C) 2005-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/tic6x/builtins/c6x-builtins.exp b/gcc/testsuite/gcc.target/tic6x/builtins/c6x-builtins.exp
index d005a1db194..e3e99acd6a0 100644
--- a/gcc/testsuite/gcc.target/tic6x/builtins/c6x-builtins.exp
+++ b/gcc/testsuite/gcc.target/tic6x/builtins/c6x-builtins.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2009-2013 Free Software Foundation, Inc.
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/tic6x/tic6x.exp b/gcc/testsuite/gcc.target/tic6x/tic6x.exp
index 60245e3a00a..52e5b83fb3f 100644
--- a/gcc/testsuite/gcc.target/tic6x/tic6x.exp
+++ b/gcc/testsuite/gcc.target/tic6x/tic6x.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2010-2013 Free Software Foundation, Inc.
+# Copyright (C) 2010-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/vax/vax.exp b/gcc/testsuite/gcc.target/vax/vax.exp
index 2aec4eec192..9a6148498c1 100644
--- a/gcc/testsuite/gcc.target/vax/vax.exp
+++ b/gcc/testsuite/gcc.target/vax/vax.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2013 Free Software Foundation, Inc.
+# Copyright (C) 2013-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/README.gcc b/gcc/testsuite/gcc.target/x86_64/abi/README.gcc
index b3116a3cd46..e668a4dd8c3 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/README.gcc
+++ b/gcc/testsuite/gcc.target/x86_64/abi/README.gcc
@@ -18,7 +18,7 @@ The current maintainer is:
   matz@suse.de
 
 
-Copyright (C) 2005-2013 Free Software Foundation, Inc.
+Copyright (C) 2005-2014 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/abi-x86_64.exp b/gcc/testsuite/gcc.target/x86_64/abi/abi-x86_64.exp
index 2a6fcf06071..5ecfe4be8db 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/abi-x86_64.exp
+++ b/gcc/testsuite/gcc.target/x86_64/abi/abi-x86_64.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2005-2013 Free Software Foundation, Inc.
+# Copyright (C) 2005-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx/abi-avx.exp b/gcc/testsuite/gcc.target/x86_64/abi/avx/abi-avx.exp
index 5d8a844cc58..d6fc1874f18 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/avx/abi-avx.exp
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx/abi-avx.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2009-2013 Free Software Foundation, Inc.
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512f/abi-avx512f.exp b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/abi-avx512f.exp
new file mode 100644
index 00000000000..cef6fa14154
--- /dev/null
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/abi-avx512f.exp
@@ -0,0 +1,61 @@
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# The x86-64 AVX512F ABI testsuite needs one additional assembler file for most
+# testcases.  For simplicity we will just link it into each test.
+
+load_lib c-torture.exp
+load_lib target-supports.exp
+load_lib torture-options.exp
+
+if { (![istarget x86_64-*-*] && ![istarget i?86-*-*])
+     || ![is-effective-target lp64]
+     || ![is-effective-target avx512f] } then {
+  return
+}
+
+
+# If the linker used understands -M <mapfile>, pass it to clear hardware
+# capabilities set by the Sun assembler.
+set flags ""
+set clearcap_ldflags "-Wl,-M,$srcdir/gcc.target/i386/clearcap.map"
+
+if [check_no_compiler_messages mapfile executable {
+	int main (void) { return 0; }
+  } $clearcap_ldflags ] {
+  set flags $clearcap_ldflags
+}
+
+torture-init
+set-torture-options $C_TORTURE_OPTIONS
+set additional_flags "-W -Wall -mavx512f $flags"
+
+foreach src [lsort [glob -nocomplain $srcdir/$subdir/test_*.c]] {
+    if {[runtest_file_p $runtests $src]} {
+	if { ([istarget *-*-darwin*]) } then {
+	    # FIXME: Darwin isn't tested.
+	    c-torture-execute [list $src \
+				    $srcdir/$subdir/asm-support-darwin.s] \
+				    $additional_flags
+	} else {
+	    c-torture-execute [list $src \
+				    $srcdir/$subdir/asm-support.S] \
+				    $additional_flags
+	}
+    }
+}
+
+torture-finish
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512f/args.h b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/args.h
new file mode 100644
index 00000000000..5e3b265ecea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/args.h
@@ -0,0 +1,184 @@
+#ifndef INCLUDED_ARGS_H
+#define INCLUDED_ARGS_H
+
+#include <immintrin.h>
+#include <string.h>
+
+/* Assertion macro.  */
+#define assert(test) if (!(test)) abort()
+
+#ifdef __GNUC__
+#define ATTRIBUTE_UNUSED __attribute__((__unused__))
+#else
+#define ATTRIBUTE_UNUSED
+#endif
+
+/* This defines the calling sequences for integers and floats.  */
+#define I0 rdi
+#define I1 rsi
+#define I2 rdx
+#define I3 rcx
+#define I4 r8
+#define I5 r9
+#define F0 zmm0
+#define F1 zmm1
+#define F2 zmm2
+#define F3 zmm3
+#define F4 zmm4
+#define F5 zmm5
+#define F6 zmm6
+#define F7 zmm7
+
+typedef union {
+  float _float[16];
+  double _double[8];
+  long _long[8];
+  int _int[16];
+  unsigned long _ulong[8];
+  __m64 _m64[8];
+  __m128 _m128[4];
+  __m256 _m256[2];
+  __m512 _m512[1];
+} ZMM_T;
+
+typedef union {
+  float _float;
+  double _double;
+  long double _ldouble;
+  unsigned long _ulong[2];
+} X87_T;
+extern void (*callthis)(void);
+extern unsigned long rax,rbx,rcx,rdx,rsi,rdi,rsp,rbp,r8,r9,r10,r11,r12,r13,r14,r15;
+ZMM_T zmm_regs[32];
+X87_T x87_regs[8];
+extern volatile unsigned long volatile_var;
+extern void snapshot (void);
+extern void snapshot_ret (void);
+#define WRAP_CALL(N) \
+  (callthis = (void (*)()) (N), (typeof (&N)) snapshot)
+#define WRAP_RET(N) \
+  (callthis = (void (*)()) (N), (typeof (&N)) snapshot_ret)
+
+/* Clear all integer registers.  */
+#define clear_int_hardware_registers \
+  asm __volatile__ ("xor %%rax, %%rax\n\t" \
+		    "xor %%rbx, %%rbx\n\t" \
+		    "xor %%rcx, %%rcx\n\t" \
+		    "xor %%rdx, %%rdx\n\t" \
+		    "xor %%rsi, %%rsi\n\t" \
+		    "xor %%rdi, %%rdi\n\t" \
+		    "xor %%r8, %%r8\n\t" \
+		    "xor %%r9, %%r9\n\t" \
+		    "xor %%r10, %%r10\n\t" \
+		    "xor %%r11, %%r11\n\t" \
+		    "xor %%r12, %%r12\n\t" \
+		    "xor %%r13, %%r13\n\t" \
+		    "xor %%r14, %%r14\n\t" \
+		    "xor %%r15, %%r15\n\t" \
+		    ::: "rax", "rbx", "rcx", "rdx", "rsi", "rdi", "r8", \
+		    "r9", "r10", "r11", "r12", "r13", "r14", "r15");
+
+/* This is the list of registers available for passing arguments. Not all of
+   these are used or even really available.  */
+struct IntegerRegisters
+{
+  unsigned long rax, rbx, rcx, rdx, rsi, rdi, r8, r9, r10, r11, r12, r13, r14, r15;
+};
+struct FloatRegisters
+{
+  double mm0, mm1, mm2, mm3, mm4, mm5, mm6, mm7;
+  long double st0, st1, st2, st3, st4, st5, st6, st7;
+  ZMM_T zmm0, zmm1, zmm2, zmm3, zmm4, zmm5, zmm6, zmm7, zmm8, zmm9,
+        zmm10, zmm11, zmm12, zmm13, zmm14, zmm15, zmm16, zmm17, zmm18,
+	zmm19, zmm20, zmm21, zmm22, zmm23, zmm24, zmm25, zmm26, zmm27,
+	zmm28, zmm29, zmm30, zmm31;
+};
+
+/* Implemented in scalarargs.c  */
+extern struct IntegerRegisters iregs;
+extern struct FloatRegisters fregs;
+extern unsigned int num_iregs, num_fregs;
+
+#define check_int_arguments do { \
+  assert (num_iregs <= 0 || iregs.I0 == I0); \
+  assert (num_iregs <= 1 || iregs.I1 == I1); \
+  assert (num_iregs <= 2 || iregs.I2 == I2); \
+  assert (num_iregs <= 3 || iregs.I3 == I3); \
+  assert (num_iregs <= 4 || iregs.I4 == I4); \
+  assert (num_iregs <= 5 || iregs.I5 == I5); \
+  } while (0)
+
+#define check_char_arguments check_int_arguments
+#define check_short_arguments check_int_arguments
+#define check_long_arguments check_int_arguments
+
+/* Clear register struct.  */
+#define clear_struct_registers \
+  rax = rbx = rcx = rdx = rdi = rsi = rbp = rsp \
+    = r8 = r9 = r10 = r11 = r12 = r13 = r14 = r15 = 0; \
+  memset (&iregs, 0, sizeof (iregs)); \
+  memset (&fregs, 0, sizeof (fregs)); \
+  memset (zmm_regs, 0, sizeof (zmm_regs)); \
+  memset (x87_regs, 0, sizeof (x87_regs));
+
+/* Clear both hardware and register structs for integers.  */
+#define clear_int_registers \
+  clear_struct_registers \
+  clear_int_hardware_registers
+
+/* TODO: Do the checking.  */
+#define check_f_arguments(T) do { \
+  assert (num_fregs <= 0 || fregs.zmm0._ ## T [0] == zmm_regs[0]._ ## T [0]); \
+  assert (num_fregs <= 1 || fregs.zmm1._ ## T [0] == zmm_regs[1]._ ## T [0]); \
+  assert (num_fregs <= 2 || fregs.zmm2._ ## T [0] == zmm_regs[2]._ ## T [0]); \
+  assert (num_fregs <= 3 || fregs.zmm3._ ## T [0] == zmm_regs[3]._ ## T [0]); \
+  assert (num_fregs <= 4 || fregs.zmm4._ ## T [0] == zmm_regs[4]._ ## T [0]); \
+  assert (num_fregs <= 5 || fregs.zmm5._ ## T [0] == zmm_regs[5]._ ## T [0]); \
+  assert (num_fregs <= 6 || fregs.zmm6._ ## T [0] == zmm_regs[6]._ ## T [0]); \
+  assert (num_fregs <= 7 || fregs.zmm7._ ## T [0] == zmm_regs[7]._ ## T [0]); \
+  } while (0)
+
+#define check_float_arguments check_f_arguments(float)
+#define check_double_arguments check_f_arguments(double)
+
+#define check_vector_arguments(T,O) do { \
+  assert (num_fregs <= 0 \
+	  || memcmp (((char *) &fregs.zmm0) + (O), \
+		     &zmm_regs[0], \
+		     sizeof (__ ## T) - (O)) == 0); \
+  assert (num_fregs <= 1 \
+	  || memcmp (((char *) &fregs.zmm1) + (O), \
+		     &zmm_regs[1], \
+		     sizeof (__ ## T) - (O)) == 0); \
+  assert (num_fregs <= 2 \
+	  || memcmp (((char *) &fregs.zmm2) + (O), \
+		     &zmm_regs[2], \
+		     sizeof (__ ## T) - (O)) == 0); \
+  assert (num_fregs <= 3 \
+	  || memcmp (((char *) &fregs.zmm3) + (O), \
+		     &zmm_regs[3], \
+		     sizeof (__ ## T) - (O)) == 0); \
+  assert (num_fregs <= 4 \
+	  || memcmp (((char *) &fregs.zmm4) + (O), \
+		     &zmm_regs[4], \
+		     sizeof (__ ## T) - (O)) == 0); \
+  assert (num_fregs <= 5 \
+	  || memcmp (((char *) &fregs.zmm5) + (O), \
+		     &zmm_regs[5], \
+		     sizeof (__ ## T) - (O)) == 0); \
+  assert (num_fregs <= 6 \
+	  || memcmp (((char *) &fregs.zmm6) + (O), \
+		     &zmm_regs[6], \
+		     sizeof (__ ## T) - (O)) == 0); \
+  assert (num_fregs <= 7 \
+	  || memcmp (((char *) &fregs.zmm7) + (O), \
+		     &zmm_regs[7], \
+		     sizeof (__ ## T) - (O)) == 0); \
+  } while (0)
+
+#define check_m64_arguments check_vector_arguments(m64, 0)
+#define check_m128_arguments check_vector_arguments(m128, 0)
+#define check_m256_arguments check_vector_arguments(m256, 0)
+#define check_m512_arguments check_vector_arguments(m512, 0)
+
+#endif /* INCLUDED_ARGS_H  */
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512f/asm-support.S b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/asm-support.S
new file mode 100644
index 00000000000..e0309aeac12
--- /dev/null
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/asm-support.S
@@ -0,0 +1,98 @@
+	.file	"snapshot.S"
+	.text
+	.p2align 4,,15
+.globl snapshot
+	.type	snapshot, @function
+snapshot:
+.LFB3:
+	movq	%rax, rax(%rip)
+	movq	%rbx, rbx(%rip)
+	movq	%rcx, rcx(%rip)
+	movq	%rdx, rdx(%rip)
+	movq	%rdi, rdi(%rip)
+	movq	%rsi, rsi(%rip)
+	movq	%rbp, rbp(%rip)
+	movq	%rsp, rsp(%rip)
+	movq	%r8, r8(%rip)
+	movq	%r9, r9(%rip)
+	movq	%r10, r10(%rip)
+	movq	%r11, r11(%rip)
+	movq	%r12, r12(%rip)
+	movq	%r13, r13(%rip)
+	movq	%r14, r14(%rip)
+	movq	%r15, r15(%rip)
+	vmovdqu32 %zmm0, zmm_regs+0(%rip)
+	vmovdqu32 %zmm1, zmm_regs+64(%rip)
+	vmovdqu32 %zmm2, zmm_regs+128(%rip)
+	vmovdqu32 %zmm3, zmm_regs+192(%rip)
+	vmovdqu32 %zmm4, zmm_regs+256(%rip)
+	vmovdqu32 %zmm5, zmm_regs+320(%rip)
+	vmovdqu32 %zmm6, zmm_regs+384(%rip)
+	vmovdqu32 %zmm7, zmm_regs+448(%rip)
+	vmovdqu32 %zmm8, zmm_regs+512(%rip)
+	vmovdqu32 %zmm9, zmm_regs+576(%rip)
+	vmovdqu32 %zmm10, zmm_regs+640(%rip)
+	vmovdqu32 %zmm11, zmm_regs+704(%rip)
+	vmovdqu32 %zmm12, zmm_regs+768(%rip)
+	vmovdqu32 %zmm13, zmm_regs+832(%rip)
+	vmovdqu32 %zmm14, zmm_regs+896(%rip)
+	vmovdqu32 %zmm15, zmm_regs+960(%rip)
+	vmovdqu32 %zmm16, zmm_regs+1024(%rip)
+	vmovdqu32 %zmm17, zmm_regs+1088(%rip)
+	vmovdqu32 %zmm18, zmm_regs+1152(%rip)
+	vmovdqu32 %zmm19, zmm_regs+1216(%rip)
+	vmovdqu32 %zmm20, zmm_regs+1280(%rip)
+	vmovdqu32 %zmm21, zmm_regs+1344(%rip)
+	vmovdqu32 %zmm22, zmm_regs+1408(%rip)
+	vmovdqu32 %zmm23, zmm_regs+1472(%rip)
+	vmovdqu32 %zmm24, zmm_regs+1536(%rip)
+	vmovdqu32 %zmm25, zmm_regs+1600(%rip)
+	vmovdqu32 %zmm26, zmm_regs+1664(%rip)
+	vmovdqu32 %zmm27, zmm_regs+1728(%rip)
+	vmovdqu32 %zmm28, zmm_regs+1792(%rip)
+	vmovdqu32 %zmm29, zmm_regs+1856(%rip)
+	vmovdqu32 %zmm30, zmm_regs+1920(%rip)
+	vmovdqu32 %zmm31, zmm_regs+1984(%rip)
+	jmp	*callthis(%rip)
+.LFE3:
+	.size	snapshot, .-snapshot
+
+	.p2align 4,,15
+.globl snapshot_ret
+	.type	snapshot_ret, @function
+snapshot_ret:
+	movq	%rdi, rdi(%rip)
+	subq	$8, %rsp
+	call	*callthis(%rip)
+	addq	$8, %rsp
+	movq	%rax, rax(%rip)
+	movq	%rdx, rdx(%rip)
+	vmovdqu32	%zmm0, zmm_regs+0(%rip)
+	vmovdqu32	%zmm1, zmm_regs+64(%rip)
+	fstpt	x87_regs(%rip)
+	fstpt	x87_regs+16(%rip)
+	fldt	x87_regs+16(%rip)
+	fldt	x87_regs(%rip)
+	ret
+	.size	snapshot_ret, .-snapshot_ret
+
+	.comm	callthis,8,8
+	.comm	rax,8,8
+	.comm	rbx,8,8
+	.comm	rcx,8,8
+	.comm	rdx,8,8
+	.comm	rsi,8,8
+	.comm	rdi,8,8
+	.comm	rsp,8,8
+	.comm	rbp,8,8
+	.comm	r8,8,8
+	.comm	r9,8,8
+	.comm	r10,8,8
+	.comm	r11,8,8
+	.comm	r12,8,8
+	.comm	r13,8,8
+	.comm	r14,8,8
+	.comm	r15,8,8
+	.comm	zmm_regs,2048,64
+	.comm	x87_regs,128,32
+	.comm   volatile_var,8,8
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512f/avx512f-check.h b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/avx512f-check.h
new file mode 100644
index 00000000000..25ce544c4a3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/avx512f-check.h
@@ -0,0 +1,41 @@
+#include <stdlib.h>
+#include "cpuid.h"
+
+static void avx512f_test (void);
+
+int
+main ()
+{
+  unsigned int eax, ebx, ecx, edx;
+
+  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+    return 0;
+
+#define DEBUG
+  /* Run AVX test only if host has AVX support.  */
+  if ((ecx & bit_OSXSAVE) == bit_OSXSAVE)
+    {
+      if (__get_cpuid_max (0, NULL) < 7)
+	return 0;
+
+      __cpuid_count (7, 0, eax, ebx, ecx, edx);
+
+      if ((ebx & bit_AVX512F) == bit_AVX512F)
+	{
+	  avx512f_test ();
+#ifdef DEBUG
+	  printf ("PASSED\n");
+#endif
+	}
+#ifdef DEBUG
+      else
+	printf ("SKIPPED\n");
+#endif
+    }
+#ifdef DEBUG
+  else
+    printf ("SKIPPED\n");
+#endif
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_m512_returning.c b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_m512_returning.c
new file mode 100644
index 00000000000..ee126b5510c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_m512_returning.c
@@ -0,0 +1,32 @@
+#include <stdio.h>
+#include "avx512f-check.h"
+#include "args.h"
+
+struct IntegerRegisters iregs;
+struct FloatRegisters fregs;
+unsigned int num_iregs, num_fregs;
+
+__m512
+fun_test_returning___m512 (void)
+{
+  volatile_var++;
+  return (__m512){73,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
+}
+
+__m512 test_512;
+
+static void
+avx512f_test (void)
+{
+  unsigned failed = 0;
+  ZMM_T zmmt1, zmmt2;
+
+  clear_struct_registers;
+  test_512 = (__m512){73,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
+  zmmt1._m512[0] = test_512;
+  zmmt2._m512[0] = WRAP_RET (fun_test_returning___m512)();
+  if (memcmp (&zmmt1, &zmmt2, sizeof (zmmt2)) != 0)
+    printf ("fail m512\n"), failed++;
+  if (failed)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_passing_m512.c b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_passing_m512.c
new file mode 100644
index 00000000000..ead9c6797e1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_passing_m512.c
@@ -0,0 +1,168 @@
+#include <stdio.h>
+#include "avx512f-check.h"
+#include "args.h"
+
+struct IntegerRegisters iregs;
+struct FloatRegisters fregs;
+unsigned int num_iregs, num_fregs;
+
+/* This struct holds values for argument checking.  */
+struct
+{
+  ZMM_T i0, i1, i2, i3, i4, i5, i6, i7, i8, i9, i10, i11, i12, i13, i14, i15, i16, i17, i18, i19, i20, i21, i22, i23;
+} values;
+
+char *pass;
+int failed = 0;
+
+#undef assert
+#define assert(c) do { \
+  if (!(c)) {failed++; printf ("failed %s\n", pass); } \
+} while (0)
+
+#define compare(X1,X2,T) do { \
+  assert (memcmp (&X1, &X2, sizeof (T)) == 0); \
+} while (0)
+
+fun_check_passing_m512_8_values (__m512 i0 ATTRIBUTE_UNUSED, __m512 i1 ATTRIBUTE_UNUSED, __m512 i2 ATTRIBUTE_UNUSED, __m512 i3 ATTRIBUTE_UNUSED, __m512 i4 ATTRIBUTE_UNUSED, __m512 i5 ATTRIBUTE_UNUSED, __m512 i6 ATTRIBUTE_UNUSED, __m512 i7 ATTRIBUTE_UNUSED)
+{
+  /* Check argument values.  */
+  compare (values.i0, i0, __m512);
+  compare (values.i1, i1, __m512);
+  compare (values.i2, i2, __m512);
+  compare (values.i3, i3, __m512);
+  compare (values.i4, i4, __m512);
+  compare (values.i5, i5, __m512);
+  compare (values.i6, i6, __m512);
+  compare (values.i7, i7, __m512);
+}
+
+void
+fun_check_passing_m512_8_regs (__m512 i0 ATTRIBUTE_UNUSED, __m512 i1 ATTRIBUTE_UNUSED, __m512 i2 ATTRIBUTE_UNUSED, __m512 i3 ATTRIBUTE_UNUSED, __m512 i4 ATTRIBUTE_UNUSED, __m512 i5 ATTRIBUTE_UNUSED, __m512 i6 ATTRIBUTE_UNUSED, __m512 i7 ATTRIBUTE_UNUSED)
+{
+  /* Check register contents.  */
+  check_m512_arguments;
+}
+
+void
+fun_check_passing_m512_20_values (__m512 i0 ATTRIBUTE_UNUSED, __m512 i1 ATTRIBUTE_UNUSED, __m512 i2 ATTRIBUTE_UNUSED, __m512 i3 ATTRIBUTE_UNUSED, __m512 i4 ATTRIBUTE_UNUSED, __m512 i5 ATTRIBUTE_UNUSED, __m512 i6 ATTRIBUTE_UNUSED, __m512 i7 ATTRIBUTE_UNUSED, __m512 i8 ATTRIBUTE_UNUSED, __m512 i9 ATTRIBUTE_UNUSED, __m512 i10 ATTRIBUTE_UNUSED, __m512 i11 ATTRIBUTE_UNUSED, __m512 i12 ATTRIBUTE_UNUSED, __m512 i13 ATTRIBUTE_UNUSED, __m512 i14 ATTRIBUTE_UNUSED, __m512 i15 ATTRIBUTE_UNUSED, __m512 i16 ATTRIBUTE_UNUSED, __m512 i17 ATTRIBUTE_UNUSED, __m512 i18 ATTRIBUTE_UNUSED, __m512 i19 ATTRIBUTE_UNUSED)
+{
+  /* Check argument values.  */
+  compare (values.i0, i0, __m512);
+  compare (values.i1, i1, __m512);
+  compare (values.i2, i2, __m512);
+  compare (values.i3, i3, __m512);
+  compare (values.i4, i4, __m512);
+  compare (values.i5, i5, __m512);
+  compare (values.i6, i6, __m512);
+  compare (values.i7, i7, __m512);
+  compare (values.i8, i8, __m512);
+  compare (values.i9, i9, __m512);
+  compare (values.i10, i10, __m512);
+  compare (values.i11, i11, __m512);
+  compare (values.i12, i12, __m512);
+  compare (values.i13, i13, __m512);
+  compare (values.i14, i14, __m512);
+  compare (values.i15, i15, __m512);
+  compare (values.i16, i16, __m512);
+  compare (values.i17, i17, __m512);
+  compare (values.i18, i18, __m512);
+  compare (values.i19, i19, __m512);
+}
+
+void
+fun_check_passing_m512_20_regs (__m512 i0 ATTRIBUTE_UNUSED, __m512 i1 ATTRIBUTE_UNUSED, __m512 i2 ATTRIBUTE_UNUSED, __m512 i3 ATTRIBUTE_UNUSED, __m512 i4 ATTRIBUTE_UNUSED, __m512 i5 ATTRIBUTE_UNUSED, __m512 i6 ATTRIBUTE_UNUSED, __m512 i7 ATTRIBUTE_UNUSED, __m512 i8 ATTRIBUTE_UNUSED, __m512 i9 ATTRIBUTE_UNUSED, __m512 i10 ATTRIBUTE_UNUSED, __m512 i11 ATTRIBUTE_UNUSED, __m512 i12 ATTRIBUTE_UNUSED, __m512 i13 ATTRIBUTE_UNUSED, __m512 i14 ATTRIBUTE_UNUSED, __m512 i15 ATTRIBUTE_UNUSED, __m512 i16 ATTRIBUTE_UNUSED, __m512 i17 ATTRIBUTE_UNUSED, __m512 i18 ATTRIBUTE_UNUSED, __m512 i19 ATTRIBUTE_UNUSED)
+{
+  /* Check register contents.  */
+  check_m512_arguments;
+}
+
+
+#define def_check_passing8(_i0, _i1, _i2, _i3, _i4, _i5, _i6, _i7, _func1, _func2, TYPE) \
+  values.i0.TYPE[0] = _i0; \
+  values.i1.TYPE[0] = _i1; \
+  values.i2.TYPE[0] = _i2; \
+  values.i3.TYPE[0] = _i3; \
+  values.i4.TYPE[0] = _i4; \
+  values.i5.TYPE[0] = _i5; \
+  values.i6.TYPE[0] = _i6; \
+  values.i7.TYPE[0] = _i7; \
+  WRAP_CALL(_func1) (_i0, _i1, _i2, _i3, _i4, _i5, _i6, _i7); \
+  \
+  clear_struct_registers; \
+  fregs.F0.TYPE[0] = _i0; \
+  fregs.F1.TYPE[0] = _i1; \
+  fregs.F2.TYPE[0] = _i2; \
+  fregs.F3.TYPE[0] = _i3; \
+  fregs.F4.TYPE[0] = _i4; \
+  fregs.F5.TYPE[0] = _i5; \
+  fregs.F6.TYPE[0] = _i6; \
+  fregs.F7.TYPE[0] = _i7; \
+  num_fregs = 8; \
+  WRAP_CALL(_func2) (_i0, _i1, _i2, _i3, _i4, _i5, _i6, _i7);
+
+#define def_check_passing20(_i0, _i1, _i2, _i3, _i4, _i5, _i6, _i7, _i8, _i9, _i10, _i11, _i12, _i13, _i14, _i15, _i16, _i17, _i18, _i19, _func1, _func2, TYPE) \
+  values.i0.TYPE[0] = _i0; \
+  values.i1.TYPE[0] = _i1; \
+  values.i2.TYPE[0] = _i2; \
+  values.i3.TYPE[0] = _i3; \
+  values.i4.TYPE[0] = _i4; \
+  values.i5.TYPE[0] = _i5; \
+  values.i6.TYPE[0] = _i6; \
+  values.i7.TYPE[0] = _i7; \
+  values.i8.TYPE[0] = _i8; \
+  values.i9.TYPE[0] = _i9; \
+  values.i10.TYPE[0] = _i10; \
+  values.i11.TYPE[0] = _i11; \
+  values.i12.TYPE[0] = _i12; \
+  values.i13.TYPE[0] = _i13; \
+  values.i14.TYPE[0] = _i14; \
+  values.i15.TYPE[0] = _i15; \
+  values.i16.TYPE[0] = _i16; \
+  values.i17.TYPE[0] = _i17; \
+  values.i18.TYPE[0] = _i18; \
+  values.i19.TYPE[0] = _i19; \
+  WRAP_CALL(_func1) (_i0, _i1, _i2, _i3, _i4, _i5, _i6, _i7, _i8, _i9, _i10, _i11, _i12, _i13, _i14, _i15, _i16, _i17, _i18, _i19); \
+  \
+  clear_struct_registers; \
+  fregs.F0.TYPE[0] = _i0; \
+  fregs.F1.TYPE[0] = _i1; \
+  fregs.F2.TYPE[0] = _i2; \
+  fregs.F3.TYPE[0] = _i3; \
+  fregs.F4.TYPE[0] = _i4; \
+  fregs.F5.TYPE[0] = _i5; \
+  fregs.F6.TYPE[0] = _i6; \
+  fregs.F7.TYPE[0] = _i7; \
+  num_fregs = 8; \
+  WRAP_CALL(_func2) (_i0, _i1, _i2, _i3, _i4, _i5, _i6, _i7, _i8, _i9, _i10, _i11, _i12, _i13, _i14, _i15, _i16, _i17, _i18, _i19);
+
+void
+test_m512_on_stack ()
+{
+  __m512 x[8];
+  int i;
+  for (i = 0; i < 8; i++)
+    x[i] = (__m512){32+i, 0, 0, 0, 0, 0, 0, 0};
+  pass = "m512-8";
+  def_check_passing8(x[0], x[1], x[2], x[3], x[4], x[5], x[6], x[7], fun_check_passing_m512_8_values, fun_check_passing_m512_8_regs, _m512);
+}
+
+void
+test_too_many_m512 ()
+{
+  __m512 x[20];
+  int i;
+  for (i = 0; i < 20; i++)
+    x[i] = (__m512){32+i, 0, 0, 0, 0, 0, 0, 0};
+  pass = "m512-20";
+  def_check_passing20(x[0], x[1], x[2], x[3], x[4], x[5], x[6], x[7], x[8], x[9], x[10], x[11], x[12], x[13], x[14], x[15], x[16], x[17], x[18], x[19], fun_check_passing_m512_20_values, fun_check_passing_m512_20_regs, _m512);
+}
+
+static void
+avx512f_test (void)
+{
+  test_m512_on_stack ();
+  test_too_many_m512 ();
+  if (failed)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_passing_structs.c b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_passing_structs.c
new file mode 100644
index 00000000000..a5e147734af
--- /dev/null
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_passing_structs.c
@@ -0,0 +1,73 @@
+#include "avx512f-check.h"
+#include "args.h"
+
+struct IntegerRegisters iregs;
+struct FloatRegisters fregs;
+unsigned int num_iregs, num_fregs;
+
+struct m512_struct
+{
+  __m512 x;
+};
+
+struct m512_2_struct
+{
+  __m512 x1, x2;
+};
+
+/* Check that the struct is passed as the individual members in fregs.  */
+void
+check_struct_passing1 (struct m512_struct ms1 ATTRIBUTE_UNUSED,
+		       struct m512_struct ms2 ATTRIBUTE_UNUSED,
+		       struct m512_struct ms3 ATTRIBUTE_UNUSED,
+		       struct m512_struct ms4 ATTRIBUTE_UNUSED,
+		       struct m512_struct ms5 ATTRIBUTE_UNUSED,
+		       struct m512_struct ms6 ATTRIBUTE_UNUSED,
+		       struct m512_struct ms7 ATTRIBUTE_UNUSED,
+		       struct m512_struct ms8 ATTRIBUTE_UNUSED)
+{
+  /* Check the passing on the stack by comparing the address of the
+     stack elements to the expected place on the stack.  */
+  assert ((unsigned long)&ms1.x == rsp+8);
+  assert ((unsigned long)&ms2.x == rsp+72);
+  assert ((unsigned long)&ms3.x == rsp+136);
+  assert ((unsigned long)&ms4.x == rsp+200);
+  assert ((unsigned long)&ms5.x == rsp+264);
+  assert ((unsigned long)&ms6.x == rsp+328);
+  assert ((unsigned long)&ms7.x == rsp+392);
+  assert ((unsigned long)&ms8.x == rsp+456);
+}
+
+void
+check_struct_passing2 (struct m512_2_struct ms ATTRIBUTE_UNUSED)
+{
+  /* Check the passing on the stack by comparing the address of the
+     stack elements to the expected place on the stack.  */
+  assert ((unsigned long)&ms.x1 == rsp+8);
+  assert ((unsigned long)&ms.x2 == rsp+72);
+}
+
+static void
+avx512f_test (void)
+{
+  struct m512_struct m512s [8];
+  struct m512_2_struct m512_2s = {
+      { 48.394, 39.3, -397.9, 3484.9, -8.394, -93.3, 7.9, 84.94,
+	48.3941, 39.31, -397.91, 3484.91, -8.3941, -93.31, 7.91, 84.941 },
+      { -8.394, -3.3, -39.9, 34.9, 7.9, 84.94, -48.394, 39.3,
+	-8.3942, -3.32, -39.92, 34.92, 7.92, 84.942, -48.3942, 39.32 }
+  };
+  int i;
+
+  for (i = 0; i < 8; i++)
+    m512s[i].x = (__m512){32+i, 0, i, 0, -i, 0, i - 12, i + 8,
+			  32+i, 0, i, 0, -i, 0, i - 12, i + 8};
+
+  clear_struct_registers;
+  for (i = 0; i < 8; i++)
+    (&fregs.zmm0)[i]._m512[0] = m512s[i].x;
+  num_fregs = 8;
+  WRAP_CALL (check_struct_passing1)(m512s[0], m512s[1], m512s[2], m512s[3],
+				    m512s[4], m512s[5], m512s[6], m512s[7]);
+  WRAP_CALL (check_struct_passing2)(m512_2s);
+}
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_passing_unions.c b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_passing_unions.c
new file mode 100644
index 00000000000..97122900c47
--- /dev/null
+++ b/gcc/testsuite/gcc.target/x86_64/abi/avx512f/test_passing_unions.c
@@ -0,0 +1,242 @@
+#include "avx512f-check.h"
+#include "args.h"
+
+struct IntegerRegisters iregs;
+struct FloatRegisters fregs;
+unsigned int num_iregs, num_fregs;
+
+union un1
+{
+  __m512 x;
+  float f;
+};
+
+union un2
+{
+  __m512 x;
+  double d;
+};
+
+union un3
+{
+  __m512 x;
+  __m128 v;
+};
+
+union un4
+{
+  __m512 x;
+  long double ld;
+};
+
+union un5
+{
+  __m512 x;
+  int i;
+};
+
+union un6
+{
+  __m512 x;
+  __m256 v;
+};
+
+
+void
+check_union_passing1(union un1 u1 ATTRIBUTE_UNUSED,
+		     union un1 u2 ATTRIBUTE_UNUSED,
+		     union un1 u3 ATTRIBUTE_UNUSED,
+		     union un1 u4 ATTRIBUTE_UNUSED,
+		     union un1 u5 ATTRIBUTE_UNUSED,
+		     union un1 u6 ATTRIBUTE_UNUSED,
+		     union un1 u7 ATTRIBUTE_UNUSED,
+		     union un1 u8 ATTRIBUTE_UNUSED)
+{
+   /* Check the passing on the stack by comparing the address of the
+      stack elements to the expected place on the stack.  */
+  assert ((unsigned long)&u1.x == rsp+8);
+  assert ((unsigned long)&u1.f == rsp+8);
+  assert ((unsigned long)&u2.x == rsp+72);
+  assert ((unsigned long)&u2.f == rsp+72);
+  assert ((unsigned long)&u3.x == rsp+136);
+  assert ((unsigned long)&u3.f == rsp+136);
+  assert ((unsigned long)&u4.x == rsp+200);
+  assert ((unsigned long)&u4.f == rsp+200);
+  assert ((unsigned long)&u5.x == rsp+264);
+  assert ((unsigned long)&u5.f == rsp+264);
+  assert ((unsigned long)&u6.x == rsp+328);
+  assert ((unsigned long)&u6.f == rsp+328);
+  assert ((unsigned long)&u7.x == rsp+392);
+  assert ((unsigned long)&u7.f == rsp+392);
+  assert ((unsigned long)&u8.x == rsp+456);
+  assert ((unsigned long)&u8.f == rsp+456);
+}
+
+void
+check_union_passing2(union un2 u1 ATTRIBUTE_UNUSED,
+		     union un2 u2 ATTRIBUTE_UNUSED,
+		     union un2 u3 ATTRIBUTE_UNUSED,
+		     union un2 u4 ATTRIBUTE_UNUSED,
+		     union un2 u5 ATTRIBUTE_UNUSED,
+		     union un2 u6 ATTRIBUTE_UNUSED,
+		     union un2 u7 ATTRIBUTE_UNUSED,
+		     union un2 u8 ATTRIBUTE_UNUSED)
+{
+   /* Check the passing on the stack by comparing the address of the
+      stack elements to the expected place on the stack.  */
+  assert ((unsigned long)&u1.x == rsp+8);
+  assert ((unsigned long)&u1.d == rsp+8);
+  assert ((unsigned long)&u2.x == rsp+72);
+  assert ((unsigned long)&u2.d == rsp+72);
+  assert ((unsigned long)&u3.x == rsp+136);
+  assert ((unsigned long)&u3.d == rsp+136);
+  assert ((unsigned long)&u4.x == rsp+200);
+  assert ((unsigned long)&u4.d == rsp+200);
+  assert ((unsigned long)&u5.x == rsp+264);
+  assert ((unsigned long)&u5.d == rsp+264);
+  assert ((unsigned long)&u6.x == rsp+328);
+  assert ((unsigned long)&u6.d == rsp+328);
+  assert ((unsigned long)&u7.x == rsp+392);
+  assert ((unsigned long)&u7.d == rsp+392);
+  assert ((unsigned long)&u8.x == rsp+456);
+  assert ((unsigned long)&u8.d == rsp+456);
+}
+
+void
+check_union_passing3(union un3 u1 ATTRIBUTE_UNUSED,
+		     union un3 u2 ATTRIBUTE_UNUSED,
+		     union un3 u3 ATTRIBUTE_UNUSED,
+		     union un3 u4 ATTRIBUTE_UNUSED,
+		     union un3 u5 ATTRIBUTE_UNUSED,
+		     union un3 u6 ATTRIBUTE_UNUSED,
+		     union un3 u7 ATTRIBUTE_UNUSED,
+		     union un3 u8 ATTRIBUTE_UNUSED)
+{
+   /* Check the passing on the stack by comparing the address of the
+      stack elements to the expected place on the stack.  */
+  assert ((unsigned long)&u1.x == rsp+8);
+  assert ((unsigned long)&u1.v == rsp+8);
+  assert ((unsigned long)&u2.x == rsp+72);
+  assert ((unsigned long)&u2.v == rsp+72);
+  assert ((unsigned long)&u3.x == rsp+136);
+  assert ((unsigned long)&u3.v == rsp+136);
+  assert ((unsigned long)&u4.x == rsp+200);
+  assert ((unsigned long)&u4.v == rsp+200);
+  assert ((unsigned long)&u5.x == rsp+264);
+  assert ((unsigned long)&u5.v == rsp+264);
+  assert ((unsigned long)&u6.x == rsp+328);
+  assert ((unsigned long)&u6.v == rsp+328);
+  assert ((unsigned long)&u7.x == rsp+392);
+  assert ((unsigned long)&u7.v == rsp+392);
+  assert ((unsigned long)&u8.x == rsp+456);
+  assert ((unsigned long)&u8.v == rsp+456);
+}
+
+void
+check_union_passing4(union un4 u ATTRIBUTE_UNUSED)
+{
+   /* Check the passing on the stack by comparing the address of the
+      stack elements to the expected place on the stack.  */
+  assert ((unsigned long)&u.x == rsp+8);
+  assert ((unsigned long)&u.ld == rsp+8);
+}
+
+void
+check_union_passing5(union un5 u ATTRIBUTE_UNUSED)
+{
+   /* Check the passing on the stack by comparing the address of the
+      stack elements to the expected place on the stack.  */
+  assert ((unsigned long)&u.x == rsp+8);
+  assert ((unsigned long)&u.i == rsp+8);
+}
+
+void
+check_union_passing6(union un6 u1 ATTRIBUTE_UNUSED,
+		     union un6 u2 ATTRIBUTE_UNUSED,
+		     union un6 u3 ATTRIBUTE_UNUSED,
+		     union un6 u4 ATTRIBUTE_UNUSED,
+		     union un6 u5 ATTRIBUTE_UNUSED,
+		     union un6 u6 ATTRIBUTE_UNUSED,
+		     union un6 u7 ATTRIBUTE_UNUSED,
+		     union un6 u8 ATTRIBUTE_UNUSED)
+{
+  assert ((unsigned long)&u1.x == rsp+8);
+  assert ((unsigned long)&u1.v == rsp+8);
+  assert ((unsigned long)&u2.x == rsp+72);
+  assert ((unsigned long)&u2.v == rsp+72);
+  assert ((unsigned long)&u3.x == rsp+136);
+  assert ((unsigned long)&u3.v == rsp+136);
+  assert ((unsigned long)&u4.x == rsp+200);
+  assert ((unsigned long)&u4.v == rsp+200);
+  assert ((unsigned long)&u5.x == rsp+264);
+  assert ((unsigned long)&u5.v == rsp+264);
+  assert ((unsigned long)&u6.x == rsp+328);
+  assert ((unsigned long)&u6.v == rsp+328);
+  assert ((unsigned long)&u7.x == rsp+392);
+  assert ((unsigned long)&u7.v == rsp+392);
+  assert ((unsigned long)&u8.x == rsp+456);
+  assert ((unsigned long)&u8.v == rsp+456);
+}
+
+#define check_union_passing1 WRAP_CALL(check_union_passing1)
+#define check_union_passing2 WRAP_CALL(check_union_passing2)
+#define check_union_passing3 WRAP_CALL(check_union_passing3)
+#define check_union_passing4 WRAP_CALL(check_union_passing4)
+#define check_union_passing5 WRAP_CALL(check_union_passing5)
+#define check_union_passing6 WRAP_CALL(check_union_passing6)
+
+static void
+avx512f_test (void)
+{
+  union un1 u1[8];
+  union un2 u2[8];
+  union un3 u3[8];
+  union un4 u4;
+  union un5 u5;
+  union un6 u6[8];
+  int i;
+
+  for (i = 0; i < 8; i++)
+    u1[i].x = (__m512){32+i, 0, i, 0, -i, 0, i - 12, i + 8,
+		       32+i, 0, i, 0, -i, 0, i - 12, i + 8};
+
+  clear_struct_registers;
+  for (i = 0; i < 8; i++)
+    (&fregs.zmm0)[i]._m512[0] = u1[i].x;
+  num_fregs = 8;
+  check_union_passing1(u1[0], u1[1], u1[2], u1[3],
+		       u1[4], u1[5], u1[6], u1[7]);
+
+  clear_struct_registers;
+  for (i = 0; i < 8; i++)
+    {
+      u2[i].x = u1[i].x;
+      (&fregs.zmm0)[i]._m512[0] = u2[i].x;
+    }
+  num_fregs = 8;
+  check_union_passing2(u2[0], u2[1], u2[2], u2[3],
+		       u2[4], u2[5], u2[6], u2[7]);
+
+  clear_struct_registers;
+  for (i = 0; i < 8; i++)
+    {
+      u3[i].x = u1[i].x;
+      (&fregs.zmm0)[i]._m512[0] = u3[i].x;
+    }
+  num_fregs = 8;
+  check_union_passing3(u3[0], u3[1], u3[2], u3[3],
+		       u3[4], u3[5], u3[6], u3[7]);
+
+  check_union_passing4(u4);
+  check_union_passing5(u5);
+
+  clear_struct_registers;
+  for (i = 0; i < 8; i++)
+    {
+      u6[i].x = u1[i].x;
+      (&fregs.zmm0)[i]._m512[0] = u6[i].x;
+    }
+  num_fregs = 8;
+  check_union_passing6(u6[0], u6[1], u6[2], u6[3],
+		       u6[4], u6[5], u6[6], u6[7]);
+}
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/callabi/callabi.exp b/gcc/testsuite/gcc.target/x86_64/abi/callabi/callabi.exp
index c13961ab78a..930942b046f 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/callabi/callabi.exp
+++ b/gcc/testsuite/gcc.target/x86_64/abi/callabi/callabi.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 2009-2013 Free Software Foundation, Inc.
+#   Copyright (C) 2009-2014 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2a.c b/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2a.c
index 3b26da6312c..c4135494283 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2a.c
+++ b/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-2a.c
@@ -1,5 +1,5 @@
 /* Test for cross x86_64<->w64 abi standard calls.  */
-/* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */
+/* { dg-do run } */
 /* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin -maccumulate-outgoing-args" } */
 /* { dg-additional-sources "func-2b.c" } */
 
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2a.c b/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2a.c
index ab124660518..f8a4d78b619 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2a.c
+++ b/gcc/testsuite/gcc.target/x86_64/abi/callabi/func-indirect-2a.c
@@ -1,5 +1,5 @@
 /* Test for cross x86_64<->w64 abi standard calls via variable.  */
-/* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */
+/* { dg-do run } */
 /* { dg-options "-O2 -mabi=ms -std=gnu99 -ffast-math -fno-builtin -maccumulate-outgoing-args" } */
 /* { dg-additional-sources "func-indirect-2b.c" } */
 
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4a.c b/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4a.c
index ec63d5acfe3..94f287d964b 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4a.c
+++ b/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-4a.c
@@ -1,5 +1,5 @@
 /* Test for cross x86_64<->w64 abi va_list calls.  */
-/* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */
+/* { dg-do run } */
 /* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin -maccumulate-outgoing-args" } */
 /* { dg-additional-sources "vaarg-4b.c" } */
 
diff --git a/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5a.c b/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5a.c
index 7e56e5d6bab..fc79877d174 100644
--- a/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5a.c
+++ b/gcc/testsuite/gcc.target/x86_64/abi/callabi/vaarg-5a.c
@@ -1,5 +1,5 @@
 /* Test for cross x86_64<->w64 abi va_list calls.  */
-/* { dg-do run { target i?86-*-linux* x86_64-*-linux* } } */
+/* { dg-do run } */
 /* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin -maccumulate-outgoing-args" } */
 /* { dg-additional-sources "vaarg-5b.c" } */
 
diff --git a/gcc/testsuite/gcc.target/xstormy16/xstormy16.exp b/gcc/testsuite/gcc.target/xstormy16/xstormy16.exp
index 6d09fb705c4..c6ed370dc1c 100644
--- a/gcc/testsuite/gcc.target/xstormy16/xstormy16.exp
+++ b/gcc/testsuite/gcc.target/xstormy16/xstormy16.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2004-2013 Free Software Foundation, Inc.
+# Copyright (C) 2004-2014 Free Software Foundation, Inc.
 #
 # This file is part of GCC.
 #