gcc:

	* doc/sourcebuild.texi (Effective-Target Keywords): Document
	sse_runtime, sse2_runtime.

	gcc/testsuite:
	* lib/target-supports.exp (check_sse_os_support_available): New
	proc.
	(check_sse_hw_available): New proc.
	(check_effective_target_sse_runtime): New proc.
	(check_effective_target_sse2_runtime): New proc.
	* lib/fortran-torture.exp (get-fortran-torture-options): Only add
	-msse2 if check_sse_os_support_available.
	* g++.dg/vect/vect.exp: Only run -msse2 tests if
	check_sse_os_support_available.
	* gcc.dg/vect/vect.exp: Likewise.
	* gfortran.dg/vect/vect.exp: Likewise.
	* gcc.target/i386/sol2-check: Renamed to ...
	* gcc.target/i386/sse-os-support.h: ... this.
	(sol2_check): Renamed to ...
	(sse_os_support): ... this.
	Only test movss with xmm registers.
	* gcc.target/i386/sse-check.h: Reflect new header and function names.
	Removed ILL_INSN, ILL_INSN_LEN.
	* gcc.target/i386/sse2-check.h: Likewise.
	* gcc.target/i386/sse3-check.h: Likewise.
	* gcc.dg/pr40550.c: Use dg-require-effective-target sse_runtime.
	Removed cpuid.h, __get_cpuid test.
	* g++.dg/other/i386-1.C: Use dg-require-effective-target sse2_runtime.
	Removed cpuid.h, __get_cpuid test.
	* g++.dg/other/pr40446.C: Likewise.
	* gcc.dg/compat/union-m128-1_main.c: Likewise.
	* gcc.dg/compat/vector-1a_main.c: Likewise.
	* gcc.dg/compat/vector-2a_main.c: Likewise.
	* gcc.dg/pr36584.c: Likewise.
	* gcc.dg/pr37544.c: Likewise.
	* gcc.dg/torture/pr16104-1.c: Likewise.
	* gcc.dg/torture/stackalign/alloca-2.c: Likewise.
	* gcc.dg/torture/stackalign/alloca-3.c: Likewise.
	* gcc.dg/torture/stackalign/push-1.c: Likewise.
	* gcc.dg/torture/stackalign/vararg-3.c: Likewise.
	* gcc.dg/torture/pr35771.h: Removed cpuid.h, __get_cpuid test.
	* gcc.dg/torture/pr35771-1.c: Use dg-require-effective-target
	sse2_runtime.
	* gcc.dg/torture/pr35771-2.c: Likewise.
	* gcc.dg/torture/pr35771-3.c: Likewise.
	* gcc.target/i386/pr39315-2.c: Likewise.
	* gcc.target/i386/pr39315-4.c: Likewise.
	* gcc.target/i386/vperm-v2df.c: Likewise.
	* gcc.target/i386/vperm-v2di.c: Likewise.
	* gcc.target/i386/vperm-v4si-1.c: Likewise.
	* gcc.target/i386/vperm-v4sf-1.c: Use dg-require-effective-target
	sse_runtime.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@162295 138bc75d-0d04-0410-961f-82ee72b054a4

10 files changed, 26 insertions, 29 deletions

diff --git a/gcc/testsuite/gcc.target/i386/pr39315-2.c b/gcc/testsuite/gcc.target/i386/pr39315-2.c
index 5363e97509b..ee74def2246 100644
--- a/gcc/testsuite/gcc.target/i386/pr39315-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr39315-2.c
@@ -2,6 +2,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -msse2 -mtune=generic" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 /* { dg-additional-sources pr39315-check.c } */
 
 typedef float __m128 __attribute__ ((__vector_size__ (16)));
diff --git a/gcc/testsuite/gcc.target/i386/pr39315-4.c b/gcc/testsuite/gcc.target/i386/pr39315-4.c
index 4a62a1d51b9..107933fa0c0 100644
--- a/gcc/testsuite/gcc.target/i386/pr39315-4.c
+++ b/gcc/testsuite/gcc.target/i386/pr39315-4.c
@@ -2,6 +2,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -msse2 -mtune=generic" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 /* { dg-additional-sources pr39315-check.c } */
 
 typedef float __m128 __attribute__ ((__vector_size__ (16)));
diff --git a/gcc/testsuite/gcc.target/i386/sse-check.h b/gcc/testsuite/gcc.target/i386/sse-check.h
index d6c92a35a44..11b71bc3e97 100644
--- a/gcc/testsuite/gcc.target/i386/sse-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse-check.h
@@ -1,13 +1,7 @@
 #include <stdlib.h>
 #include "m128-check.h"
-
 #include "cpuid.h"
-
-/* We need a single SSE instruction here so the handler can safely skip
-   over it.  */
-#define ILL_INSN __asm__ volatile ("movss %xmm2,%xmm1")
-#define ILL_INSN_LEN 4
-#include "sol2-check.h"
+#include "sse-os-support.h"
 
 static void sse_test (void);
 
@@ -27,7 +21,7 @@ main ()
     return 0;
 
   /* Run SSE test only if host has SSE support.  */
-  if ((edx & bit_SSE) && sol2_check ())
+  if ((edx & bit_SSE) && sse_os_support ())
     do_test ();
 
   return 0;
diff --git a/gcc/testsuite/gcc.target/i386/sol2-check.h b/gcc/testsuite/gcc.target/i386/sse-os-support.h
index 25a915e17d1..a2b4e2d3c7e 100644
--- a/gcc/testsuite/gcc.target/i386/sol2-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse-os-support.h
@@ -14,18 +14,23 @@ sigill_hdlr (int sig __attribute((unused)),
   sigill_caught = 1;
   /* Set PC to the instruction after the faulting one to skip over it,
      otherwise we enter an infinite loop.  */
-  ucp->uc_mcontext.gregs[EIP] += ILL_INSN_LEN;
+  ucp->uc_mcontext.gregs[EIP] += 4;
   setcontext (ucp);
 }
 #endif
 
-/* Solaris 2 before Solaris 9 4/04 cannot execute SSE/SSE2 instructions
-   even if the CPU supports them.  Programs receive SIGILL instead, so
-   check for that at runtime.  */
+/* Check if the OS supports executing SSE instructions.  This function is
+   only used in sse-check.h, sse2-check.h, and sse3-check.h so far since
+   Solaris 8 and 9 won't run on newer CPUs anyway.  */
+
 static int
-sol2_check (void)
+sse_os_support (void)
 {
 #if defined(__sun__) && defined(__svr4__)
+  /* Solaris 2 before Solaris 9 4/04 cannot execute SSE instructions
+     even if the CPU supports them.  Programs receive SIGILL instead, so
+     check for that at runtime.  */
+
   struct sigaction act, oact;
 
   act.sa_handler = sigill_hdlr;
@@ -34,7 +39,9 @@ sol2_check (void)
   act.sa_flags = SA_SIGINFO;
   sigaction (SIGILL, &act, &oact);
 
-  ILL_INSN;
+  /* We need a single SSE instruction here so the handler can safely skip
+     over it.  */
+  __asm__ volatile ("movss %xmm2,%xmm1");
 
   sigaction (SIGILL, &oact, NULL);
 
diff --git a/gcc/testsuite/gcc.target/i386/sse2-check.h b/gcc/testsuite/gcc.target/i386/sse2-check.h
index 7e91192f8c3..fd4a6ce1dbf 100644
--- a/gcc/testsuite/gcc.target/i386/sse2-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse2-check.h
@@ -1,12 +1,7 @@
 #include <stdlib.h>
 #include "cpuid.h"
 #include "m128-check.h"
-
-/* We need a single SSE2 instruction here so the handler can safely skip
-   over it.  */
-#define ILL_INSN __asm__ volatile ("unpcklpd %xmm0,%xmm2")
-#define ILL_INSN_LEN 4
-#include "sol2-check.h"
+#include "sse-os-support.h"
 
 static void sse2_test (void);
 
@@ -26,7 +21,7 @@ main ()
     return 0;
 
   /* Run SSE2 test only if host has SSE2 support.  */
-  if ((edx & bit_SSE2) && sol2_check ())
+  if ((edx & bit_SSE2) && sse_os_support ())
     do_test ();
 
   return 0;
diff --git a/gcc/testsuite/gcc.target/i386/sse3-check.h b/gcc/testsuite/gcc.target/i386/sse3-check.h
index c7b1896cf12..5a0a0b1a02e 100644
--- a/gcc/testsuite/gcc.target/i386/sse3-check.h
+++ b/gcc/testsuite/gcc.target/i386/sse3-check.h
@@ -1,13 +1,7 @@
 #include <stdio.h>
 #include <stdlib.h>
-
 #include "cpuid.h"
-
-/* We need a single SSE3 instruction here so the handler can safely skip
-   over it.  */
-#define ILL_INSN __asm__ volatile ("movddup %xmm1,%xmm2")
-#define ILL_INSN_LEN 4
-#include "sol2-check.h"
+#include "sse-os-support.h"
 
 static void sse3_test (void);
 
@@ -27,7 +21,7 @@ main ()
     return 0;
  
   /* Run SSE3 test only if host has SSE3 support.  */
-  if ((ecx & bit_SSE3) && sol2_check ())
+  if ((ecx & bit_SSE3) && sse_os_support ())
     do_test ();
 
   return 0;
diff --git a/gcc/testsuite/gcc.target/i386/vperm-v2df.c b/gcc/testsuite/gcc.target/i386/vperm-v2df.c
index d0394635c59..1a237f04b5d 100644
--- a/gcc/testsuite/gcc.target/i386/vperm-v2df.c
+++ b/gcc/testsuite/gcc.target/i386/vperm-v2df.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include "isa-check.h"
 
diff --git a/gcc/testsuite/gcc.target/i386/vperm-v2di.c b/gcc/testsuite/gcc.target/i386/vperm-v2di.c
index 940de68af19..b587d90b8fb 100644
--- a/gcc/testsuite/gcc.target/i386/vperm-v2di.c
+++ b/gcc/testsuite/gcc.target/i386/vperm-v2di.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include "isa-check.h"
 
diff --git a/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c b/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c
index b9fc9b172fe..d8cb9e6b794 100644
--- a/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c
+++ b/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c
@@ -1,5 +1,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -msse" } */
+/* { dg-require-effective-target sse } */
+/* { dg-require-effective-target sse_runtime } */
 
 #include "isa-check.h"
 
diff --git a/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c b/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c
index 93c25c6826a..3c2717dd751 100644
--- a/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c
+++ b/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-options "-O -msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include "isa-check.h"