* gcc.target/i386/20000609-1.c, gcc.target/i386/20000614-1.c,

	gcc.target/i386/20000614-2.c, gcc.target/i386/20000720-1.c,
	gcc.target/i386/20000807-1.c, gcc.target/i386/20000904-1.c,
	gcc.target/i386/20001127-1.c, gcc.target/i386/20010202-1.c,
	gcc.target/i386/20010520-1.c, gcc.target/i386/20011009-1.c,
	gcc.target/i386/20011029-2.c, gcc.target/i386/20011107-1.c,
	gcc.target/i386/20011119-1.c, gcc.target/i386/20020201-3.c,
	gcc.target/i386/20020218-1.c, gcc.target/i386/20020224-1.c,
	gcc.target/i386/20020426-1.c, gcc.target/i386/20020523-1.c,
	gcc.target/i386/20020523-2.c, gcc.target/i386/20020531-1.c,
	gcc.target/i386/20020616-1.c, gcc.target/i386/20020729-1.c,
	gcc.target/i386/20030217-1.c, gcc.target/i386/20030926-1.c,
	gcc.target/i386/20040112-1.c, gcc.target/i386/20050113-1.c,
	gcc.target/i386/980211-1.c, gcc.target/i386/980226-1.c,
	gcc.target/i386/980414-1.c, gcc.target/i386/980520-1.c,
	gcc.target/i386/980709-1.c, gcc.target/i386/990117-1.c,
	gcc.target/i386/990130-1.c, gcc.target/i386/990213-2.c,
	gcc.target/i386/990214-1.c, gcc.target/i386/990424-1.c,
	gcc.target/i386/990524-1.c, gcc.target/i386/991129-1.c,
	gcc.target/i386/991209-1.c, gcc.target/i386/991214-1.c,
	gcc.target/i386/991230-1.c, gcc.target/i386/pr12092-1.c,
	gcc.target/i386/pr14289-1.c, gcc.target/i386/pr18614-1.c,
	gcc.target/i386/pr19236-1.c, gcc.target/i386/pr20204.c,
	gcc.target/i386/pr23943.c, gcc.target/i386/pr9771-1.c:
	Move from gcc.dg/.
	* gcc.target/i386/387-1.c, gcc.target/i386/387-2.c,
	gcc.target/i386/387-3.c, gcc.target/i386/387-4.c,
	gcc.target/i386/387-5.c, gcc.target/i386/387-6.c,
	gcc.target/i386/387-7.c, gcc.target/i386/387-8.c,
	gcc.target/i386/3dnow-1.c, gcc.target/i386/3dnow-2.c,
	gcc.target/i386/3dnowA-1.c, gcc.target/i386/3dnowA-2.c,
	gcc.target/i386/asm-2.c, gcc.target/i386/asm-3.c,
	gcc.target/i386/asm-4.c, gcc.target/i386/bitfield1.c,
	gcc.target/i386/bitfield2.c, gcc.target/i386/bitfield3.c,
	gcc.target/i386/cadd.c, gcc.target/i386/call-1.c,
	gcc.target/i386/clobbers.c, gcc.target/i386/cmov1.c,
	gcc.target/i386/cmov2.c, gcc.target/i386/cmov3.c,
	gcc.target/i386/cmov4.c, gcc.target/i386/cmov5.c,
	gcc.target/i386/cvt-1.c, gcc.target/i386/fastcall-1.c,
	gcc.target/i386/fpcvt-1.c, gcc.target/i386/fpcvt-2.c,
	gcc.target/i386/fpcvt-3.c, gcc.target/i386/fpcvt-4.c,
	gcc.target/i386/lea.c, gcc.target/i386/local.c,
	gcc.target/i386/local2.c, gcc.target/i386/loop-1.c,
	gcc.target/i386/loop-2.c, gcc.target/i386/loop-3.c,
	gcc.target/i386/memset-1.c, gcc.target/i386/mmx-1.c,
	gcc.target/i386/mmx-2.c, gcc.target/i386/mmx-3.c,
	gcc.target/i386/mmx-4.c, gcc.target/i386/mmx-5.c,
	gcc.target/i386/mmx-6.c, gcc.target/i386/mul.c,
	gcc.target/i386/pentium4-not-mull.c, gcc.target/i386/pic-1.c,
	gcc.target/i386/regparm.c, gcc.target/i386/rotate-1.c,
	gcc.target/i386/sibcall-5.c, gcc.target/i386/signbit-1.c,
	gcc.target/i386/signbit-2.c, gcc.target/i386/signbit-3.c,
	gcc.target/i386/sse-10.c, gcc.target/i386/sse-11.c,
	gcc.target/i386/sse-12.c, gcc.target/i386/sse-5.c,
	gcc.target/i386/sse-6.c, gcc.target/i386/sse-7.c,
	gcc.target/i386/sse-8.c, gcc.target/i386/sse-9.c,
	gcc.target/i386/sse-vect-types.c, gcc.target/i386/ssefn-1.c,
	gcc.target/i386/ssefn-2.c, gcc.target/i386/ssefn-3.c,
	gcc.target/i386/ssefn-4.c, gcc.target/i386/ssefp-1.c,
	gcc.target/i386/ssefp-2.c, gcc.target/i386/ssetype-1.c,
	gcc.target/i386/ssetype-2.c, gcc.target/i386/ssetype-3.c,
	gcc.target/i386/ssetype-4.c, gcc.target/i386/ssetype-5.c,
	gcc.target/i386/unroll-1.c, gcc.target/i386/volatile-1.c,
	gcc.target/i386/xorps.c:  Move from gcc.dg/i386-*.
	* gcc.target/i386/pr23376.c: Move from gcc.target/x86_64/pr23376.c.
	* gcc.target/i386/asm-5.c: Move from gcc.dg/asm-1.c.
	* gcc.target/i386/sse-13.c: Move from gcc.dg/i386-sse-1.c.
	* gcc.target/i386/sse-14.c: Move from gcc.dg/i386-sse-2.c.
	* gcc.target/i386/sse-15.c: Move from gcc.dg/i386-sse-3.c.
	* gcc.target/i386/sse-16.c: Move from gcc.dg/i386-sse-4.c.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@106504 138bc75d-0d04-0410-961f-82ee72b054a4

131 files changed, 4081 insertions, 0 deletions

diff --git a/gcc/testsuite/gcc.target/i386/20000609-1.c b/gcc/testsuite/gcc.target/i386/20000609-1.c
new file mode 100644
index 00000000000..5d452ac9d82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20000609-1.c
@@ -0,0 +1,22 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O1 -ffast-math -march=i686" } */
+
+
+/* Sanity check for fp_jcc_* with TARGET_CMOVE.  */
+
+extern void abort (void);
+
+static int test(double a)
+{
+  if (a)
+    return 0;
+}
+
+static double zero = 0.0;
+
+int main ()
+{
+  test (zero);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/20000614-1.c b/gcc/testsuite/gcc.target/i386/20000614-1.c
new file mode 100644
index 00000000000..507596787a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20000614-1.c
@@ -0,0 +1,24 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2" } */
+
+void bar(char *p)
+{
+}
+
+static inline void foo (unsigned long base, unsigned char val)
+{
+  val ^= (1<<2);
+  bar (val & (1<<5) ? "1" : "2");
+  bar (val & (1<<4) ? "1" : "2");
+  bar (val & (1<<3) ? "1" : "2");
+  bar (val & (1<<2) ? "1" : "2");
+  bar (val & (1<<1) ? "1" : "2");
+  bar (val & (1<<0) ? "1" : "2");
+  asm volatile ("": :"a" (val), "d" (base));
+}
+
+int main (void)
+{
+  foo (23, 1);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/20000614-2.c b/gcc/testsuite/gcc.target/i386/20000614-2.c
new file mode 100644
index 00000000000..eb30fc6cd55
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20000614-2.c
@@ -0,0 +1,33 @@
+/* { dg-do run { target i?86-*-* x86_64-*-*} } */
+/* { dg-options "-O2 -fno-strength-reduce" } */
+
+extern void abort (void);
+extern void exit (int);
+
+char buf[8];
+
+void bar(char *p)
+{
+}
+
+int main()
+{
+  union {
+    unsigned int val;
+    unsigned char p[4];
+  } serial;
+
+  int i;
+  serial.val = 0;
+  bar(buf);
+  for(i = 0; i < 8; i += 4)
+    {
+      serial.p [0] += buf [i + 0];
+      serial.p [1] += buf [i + 1];
+      serial.p [2] += buf [i + 2];
+      serial.p [3] += buf [i + 3];
+    }
+  if (serial.val)
+    abort();
+  exit(0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/20000720-1.c b/gcc/testsuite/gcc.target/i386/20000720-1.c
new file mode 100644
index 00000000000..65bf68544b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20000720-1.c
@@ -0,0 +1,40 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-mpreferred-stack-boundary=2 -march=i586 -O2 -fomit-frame-pointer" } */
+
+extern void *foo(void *a, const void *b, unsigned c);
+
+extern inline void *
+bar(void *a, const void *b, unsigned c)
+{
+  int d0, d1, d2;
+  __asm__ __volatile__(
+    "" :
+    "=&c" (d0), "=&D" (d1), "=&S" (d2) :
+    "0" (c/4), "q" (c), "1" (a), "2" (b) :
+    "memory");
+  return a;
+}
+
+typedef struct {
+  unsigned char a;
+  unsigned b : 2;
+  unsigned c : 4;
+  unsigned d : 2;
+} *baz;
+
+static int
+dead(unsigned short *v, char *w, unsigned char *x, int y, int z)
+{
+  int i = 0;
+  unsigned short j = *v;
+
+  while (y > 0) {
+    ((baz)x)->a = j;
+    ((baz)x)->b = 0;
+    ((baz)x)->c = 0;
+    ((baz)x)->d = 0;
+    __builtin_constant_p(i) ? foo(x, w, i) : bar(x, w, i);
+  }
+  return z - y;
+}
diff --git a/gcc/testsuite/gcc.target/i386/20000807-1.c b/gcc/testsuite/gcc.target/i386/20000807-1.c
new file mode 100644
index 00000000000..360e3245989
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20000807-1.c
@@ -0,0 +1,37 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-Os -fpic" } */
+
+#include <string.h>
+
+typedef struct
+{
+  char *a;
+  char *b;
+} *foo;
+
+void
+bar (foo x)
+{
+  char *c = x->b;
+  char *d = (void *)0;
+  unsigned int e = 0, f = 0, g;
+  while (*c != ':')
+    if (*c == '%')
+      {
+        ++c;
+        switch (*c++)
+          {
+          case 'N':
+            g = strlen (x->a);
+            if (e + g >= f) {
+		char *h = d;
+		f += 256 + g;
+		d = (char *) __builtin_alloca (f);
+		memcpy (d, h, e);
+	    };
+            memcpy (&d[e], x->a, g);
+            e += g;
+            break;
+	  }
+      }
+}
diff --git a/gcc/testsuite/gcc.target/i386/20000904-1.c b/gcc/testsuite/gcc.target/i386/20000904-1.c
new file mode 100644
index 00000000000..31f937cab71
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20000904-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O0 -fpic" } */
+
+static struct {
+  unsigned short a, b, c, d;
+} x[10];
+
+int foo(int i)
+{
+  return ((*((char *)&x[i] + i)) | (*((char *)&x[i] + i)));
+}
diff --git a/gcc/testsuite/gcc.target/i386/20001127-1.c b/gcc/testsuite/gcc.target/i386/20001127-1.c
new file mode 100644
index 00000000000..f63d1149322
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20001127-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2" } */
+
+extern inline float bar (float x)
+{
+  register long double value;
+  asm volatile ("frndint" : "=t" (value) : "0" (x));
+  return value;
+}
+
+float a;
+
+float foo (float b)
+{
+  return a + bar (b);
+}
diff --git a/gcc/testsuite/gcc.target/i386/20010202-1.c b/gcc/testsuite/gcc.target/i386/20010202-1.c
new file mode 100644
index 00000000000..5f789042eba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20010202-1.c
@@ -0,0 +1,27 @@
+/* { dg-do compile { target i?86-*-* sparc*-*-* x86_64-*-* } } */
+/* { dg-options "-O2" } */
+
+extern void abort (void);
+extern void exit (int);
+
+typedef enum { false, true } __attribute__ ((packed)) boolean;
+typedef struct {
+  enum {
+    A0 = 0, A1 = 1, A2 = 2
+  } __attribute__((packed)) A:3;
+  enum {
+    B0 = 0, B1 = 1, B2 = 2
+  } __attribute__((packed)) B:3;
+  boolean C:1;
+  boolean D:1;
+  unsigned char :8;
+} foo;
+foo x = { A2, B1, false, true };
+
+int main(void)
+{
+  if (sizeof (foo) != 2 || __alignof__ (foo) != 1)
+    abort ();
+
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/20010520-1.c b/gcc/testsuite/gcc.target/i386/20010520-1.c
new file mode 100644
index 00000000000..97ee32b0b82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20010520-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-w" } */
+
+void f ()
+{
+  int i __asm__ ("%eax");
+  __asm__ volatile ("" : "=a" (i));
+}
+
+
diff --git a/gcc/testsuite/gcc.target/i386/20011009-1.c b/gcc/testsuite/gcc.target/i386/20011009-1.c
new file mode 100644
index 00000000000..b78d99e997b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20011009-1.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2" } */
+
+extern void abort (void);
+extern void exit (int);
+
+int main ()
+{
+  int x;
+
+  asm ("movl $26, %0 # 26 |-> reg \n\t"
+       "movl $28, %0" : "=r" (x));
+  if (x != 28)
+    abort ();
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/20011029-2.c b/gcc/testsuite/gcc.target/i386/20011029-2.c
new file mode 100644
index 00000000000..07ef1a806fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20011029-2.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2" } */
+
+int foo (int s)
+{
+  for (;;)
+    {
+      int a[32];
+      int y, z;
+      __asm__ __volatile__ ("" : "=c" (y), "=D" (z)
+			    : "a" (0), "0" (32), "1" (a) : "memory");
+      if (({ register char r;
+	     __asm__ __volatile__ ("" : "=q" (r)
+				   : "r" (s % 32), "m" (a[s / 32])
+				   : "cc"); r; }))
+        continue;
+      else if (({ register char r;
+		  __asm__ __volatile__ ("" : "=q" (r)
+					: "r" (0), "m" (a[0])
+					: "cc"); r; }))
+        continue;
+    }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/20011107-1.c b/gcc/testsuite/gcc.target/i386/20011107-1.c
new file mode 100644
index 00000000000..0d09427a0b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20011107-1.c
@@ -0,0 +1,46 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -mtune=k6" } */
+
+void
+foo (unsigned char *x, const unsigned char *y)
+{
+  int a = 6;
+  unsigned char *b;
+  for (;;)
+    {
+      unsigned char *c = x;
+
+      while (1)
+	{
+	  if (c + 2 < y)
+	    c += 3;
+	  else
+	    break;
+	}
+      b = x + a;
+      if (*c == 4 || *c == 5)
+	{
+	  unsigned char d = c[2];
+
+	  if (b[3] == 7 || b[3] == 8)
+	    {
+	      int e = b[3] == 8;
+	      if (d < b[4] * 8 && b[5 + d / 8] & (1 << (d % 8)))
+		e = !e;
+	      if (!e)
+		x[-3] = 26;
+	    }
+	}
+      else if (*c == 7 && b[3] == 8)
+	{
+	  int f;
+	  for (f = 0; f < (int) c[1]; f++)
+	    if (!(c[2 + f] == 0))
+	      break;
+	  if (f == c[1])
+	    x[-3] = 26;
+	}
+      x -= 2;
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/20011119-1.c b/gcc/testsuite/gcc.target/i386/20011119-1.c
new file mode 100644
index 00000000000..bbdf104d1c8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20011119-1.c
@@ -0,0 +1,82 @@
+/* Test for reload failing to eliminate from argp to sp.  */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-skip-if "" { "*-*-*" } { "-fpic" "-fPIC" } { "" } } */
+/* { dg-options "-O2 -fomit-frame-pointer" } */
+
+static int ustrsize (const char *s);
+static int (*ucwidth) (int c);
+static int (*ugetxc) (const char **s);
+static int (*usetc) (char *s, int c);
+
+char *ustrzcat(char *dest, int size, const char *src)
+{
+   int pos = ustrsize(dest);
+   int c;
+
+   size -= pos + ucwidth(0);
+
+   while ((c = ugetxc(&src)) != 0) {
+      size -= ucwidth(c);
+      if (size < 0)
+         break;
+
+      pos += usetc(dest+pos, c);
+   }
+
+   usetc(dest+pos, 0);
+
+   return dest;
+}
+
+static int __attribute__((noinline))
+ustrsize (const char *s)
+{
+  return 0;
+}
+
+static int
+ucwidth_ (int c)
+{
+  return 1;
+}
+
+static int
+ugetxc_ (const char **s)
+{
+  return '\0';
+}
+
+static int
+usetc_ (char *s, int c)
+{
+  return 1;
+}
+
+int
+main()
+{
+  ucwidth = ucwidth_;
+  ugetxc = ugetxc_;
+  usetc = usetc_;
+  
+  /* ??? It is impossible to explicitly modify the hard frame pointer.
+     This will run afoul of code in flow.c that declines to mark regs
+     in eliminate_regs in regs_ever_used.  Apparently, we have to wait
+     for reload to decide that it won't need a frame pointer before a
+     variable can be allocated to %ebp.
+
+     So save, restore, and clobber %ebp by hand.  */
+
+  asm ("pushl %%ebp\n\t"
+       "movl $-1, %%ebp\n\t"
+       "pushl $0\n\t"
+       "pushl $0\n\t"
+       "pushl $0\n\t"
+       "call %P0\n\t"
+       "addl $12, %%esp\n\t"
+       "popl %%ebp"
+       : : "i"(ustrzcat) : "memory" );
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/20020201-3.c b/gcc/testsuite/gcc.target/i386/20020201-3.c
new file mode 100644
index 00000000000..e95c44fbdfb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20020201-3.c
@@ -0,0 +1,16 @@
+/* This testcase ICEd because a SFmode variable was given a MMX register
+   for which there is no movsf exists.  */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -march=i686 -mmmx -fno-strict-aliasing" } */
+
+struct A { unsigned int a, b; };
+
+void foo (struct A *x, int y, int z)
+{
+   const float d = 1.0;
+   float e = (float) y + z;
+
+   x->a = *(unsigned int *) &d;
+   x->b = *(unsigned int *) &e;
+}
diff --git a/gcc/testsuite/gcc.target/i386/20020218-1.c b/gcc/testsuite/gcc.target/i386/20020218-1.c
new file mode 100644
index 00000000000..bef4d66fc13
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20020218-1.c
@@ -0,0 +1,35 @@
+/* Verify that X86-64 only SSE registers aren't restored on IA-32.  */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -msse" } */
+/* { dg-final { scan-assembler-not "xmm8" } } */
+
+extern void abort (void);
+extern void exit (int);
+
+void *bar (void *p, void *q)
+{
+  if (p != (void *) 26 || q != (void *) 35)
+    abort ();
+  return (void *) 76;
+}
+
+void *foo (void **args)
+{
+  void *argcookie = &args[1];
+
+  __builtin_return (__builtin_apply (args[0], &argcookie,
+				     2 * sizeof (void *)));
+}
+
+int main (void)
+{
+  void *args[3];
+
+  args[0] = (void *) bar;
+  args[1] = (void *) 26;
+  args[2] = (void *) 35;
+  if (foo (args) != (void *) 76)
+    abort ();
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/20020224-1.c b/gcc/testsuite/gcc.target/i386/20020224-1.c
new file mode 100644
index 00000000000..c37de2e21b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20020224-1.c
@@ -0,0 +1,41 @@
+/* PR target/5755
+   This testcase failed because the caller of a function returning struct
+   expected the callee to pop up the hidden return structure pointer,
+   while callee was actually not poping it up (as the hidden argument
+   was passed in register).  */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -fomit-frame-pointer" } */
+
+extern void abort (void);
+extern void exit (int);
+
+typedef struct {
+   int a1, a2;
+} A;
+
+A a;
+
+A __attribute__ ((regparm (2)))
+foo (int x)
+{
+  return a;
+}
+
+int __attribute__ ((regparm (2)))
+bar (int x)
+{
+  int r = foo(0).a2;
+  return r;
+}
+
+int
+main ()
+{
+  int f;
+  a.a1 = 530;
+  a.a2 = 980;
+  f = bar (0);
+  if (f != 980)
+    abort ();
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/20020426-1.c b/gcc/testsuite/gcc.target/i386/20020426-1.c
new file mode 100644
index 00000000000..31be74712c0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20020426-1.c
@@ -0,0 +1,7 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-msoft-float -mfp-ret-in-387" } */
+
+void f() {
+  __builtin_apply(0, 0, 0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/20020523-1.c b/gcc/testsuite/gcc.target/i386/20020523-1.c
new file mode 100644
index 00000000000..51ae5ecb689
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20020523-1.c
@@ -0,0 +1,66 @@
+/* PR target/6753
+   This testcase was miscompiled because sse_mov?fcc_const0*
+   patterns were missing earlyclobber.  */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-march=pentium3 -msse -ffast-math -O2" } */
+
+extern void abort (void);
+extern void exit (int);
+
+float one = 1.f;
+
+void bar (float f)
+{
+  if (__builtin_memcmp (&one, &f, sizeof (float)))
+    abort ();
+}
+
+float foo (void)
+{
+  return 1.f;
+}
+
+typedef struct
+{
+  float t;
+} T;
+
+void bail_if_no_sse (void)
+{
+  int fl1, fl2;
+
+  /* See if we can use cpuid.  */
+  __asm__ ("pushfl; pushfl; popl %0; movl %0,%1; xorl %2,%0;"
+	   "pushl %0; popfl; pushfl; popl %0; popfl"
+	   : "=&r" (fl1), "=&r" (fl2)
+	   : "i" (0x00200000));
+  if (((fl1 ^ fl2) & 0x00200000) == 0)
+    exit (0);
+
+  /* See if cpuid gives capabilities.  */
+  __asm__ ("cpuid" : "=a" (fl1) : "0" (0) : "ebx", "ecx", "edx", "cc");
+  if (fl1 == 0)
+    exit (0);
+
+  /* See if capabilities include SSE (25th bit; 26 for SSE2).  */
+  __asm__ ("cpuid" : "=a" (fl1), "=d" (fl2) : "0" (1) : "ebx", "ecx", "cc");
+  if ((fl2 & (1 << 25)) == 0)
+    exit (0);
+}
+
+int main (void)
+{
+  int i;
+  T x[1];
+
+  bail_if_no_sse ();
+  for (i = 0; i < 1; i++)
+    {
+      x[i].t = foo ();
+      x[i].t = 0.f > x[i].t ? 0.f : x[i].t;
+      bar (x[i].t);
+    }
+
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/20020523-2.c b/gcc/testsuite/gcc.target/i386/20020523-2.c
new file mode 100644
index 00000000000..ebe8bb8f5cd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20020523-2.c
@@ -0,0 +1,53 @@
+/* PR target/6753
+   This testcase was miscompiled because sse_mov?fcc_const0*
+   patterns were missing earlyclobber.  */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-march=pentium3 -msse -ffast-math -O2" } */
+
+#include "i386-cpuid.h"
+extern void abort (void);
+extern void exit (int);
+
+float one = 1.f;
+
+void bar (float f)
+{
+  if (__builtin_memcmp (&one, &f, sizeof (float)))
+    abort ();
+}
+
+float foo (void)
+{
+  return 1.f;
+}
+
+typedef struct
+{
+  float t;
+} T;
+
+void bail_if_no_sse (void)
+{
+  unsigned int edx;
+  /* See if capabilities include SSE (25th bit; 26 for SSE2).  */
+  edx = i386_cpuid();
+  if (!(edx & bit_SSE))
+    exit (0);
+}
+
+int main (void)
+{
+  int i;
+  T x[1];
+
+  bail_if_no_sse ();
+  for (i = 0; i < 1; i++)
+    {
+      x[i].t = foo ();
+      x[i].t = 0.f > x[i].t ? 0.f : x[i].t;
+      bar (x[i].t);
+    }
+
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/20020531-1.c b/gcc/testsuite/gcc.target/i386/20020531-1.c
new file mode 100644
index 00000000000..dfefc17c45a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20020531-1.c
@@ -0,0 +1,21 @@
+/* PR optimization/6842
+   This testcase caused ICE when trying to optimize V8QI subreg of VOIDmode
+   CONST_DOUBLE.  */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -mmmx" } */
+
+typedef unsigned char __v8qi __attribute__ ((vector_size (8)));
+extern void abort (void);
+extern void exit (int);
+
+void foo (void)
+{
+  unsigned long long a = 0x0102030405060708LL;
+  unsigned long long b = 0x1020304050607080LL;
+  unsigned long long c;
+
+  c = (unsigned long long) __builtin_ia32_paddusb ((__v8qi) a, (__v8qi) b);
+  __builtin_ia32_emms ();
+  if (c != 0x1122334455667788LL)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/20020616-1.c b/gcc/testsuite/gcc.target/i386/20020616-1.c
new file mode 100644
index 00000000000..6db78425596
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20020616-1.c
@@ -0,0 +1,29 @@
+/* PR opt/6722 */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2" } */
+
+register int k asm("%ebx");
+
+void __attribute__((noinline))
+foo()
+{
+  k = 1;
+}
+
+void test()
+{
+  int i;
+  for (i = 0; i < 10; i += k)
+    {
+      k = 0;
+      foo();
+    }
+}
+
+int main()
+{
+  int old = k;
+  test();
+  k = old;
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/20020729-1.c b/gcc/testsuite/gcc.target/i386/20020729-1.c
new file mode 100644
index 00000000000..eeab6985422
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20020729-1.c
@@ -0,0 +1,52 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -march=k6" } */
+
+static inline void *
+baz (void *s, unsigned long c, unsigned int count)
+{
+  int d0, d1;
+  __asm__ __volatile__ (""
+			: "=&c" (d0), "=&D" (d1)
+			:"a" (c), "q" (count), "0" (count / 4), "1" ((long) s)
+			:"memory");
+  return s;
+}
+
+struct A
+{
+  unsigned long *a;
+};
+
+inline static void *
+bar (struct A *x, int y)
+{
+  char *ptr;
+
+  ptr = (void *) x->a[y >> 12];
+  ptr += y % (1UL << 12);
+  return (void *) ptr;
+}
+
+int
+foo (struct A *x, unsigned int *y, int z, int u)
+{
+  int a, b, c, d, e;
+
+  z += *y;
+  c = z + u;
+  a = (z >> 12) + 1;
+  do
+    {
+      b = (a << 12);
+      d = b - z;
+      e = c - z;
+      if (e < d)
+	d = e;
+      baz (bar (x, z), 0, d);
+      z = b;
+      a++;
+    }
+  while (z < c);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/20030217-1.c b/gcc/testsuite/gcc.target/i386/20030217-1.c
new file mode 100644
index 00000000000..d0cd91316c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20030217-1.c
@@ -0,0 +1,18 @@
+/* Test whether denormal floating point constants in hexadecimal notation
+   are parsed correctly.  */
+/* { dg-do run { target i?86-*-linux* x86_64-*-* } } */
+/* { dg-options "-std=c99" } */
+
+long double d = 0x0.0000003ffffffff00000p-16357L;
+long double e = 0x0.0000003ffffffff00000p-16356L;
+
+extern void abort (void);
+extern void exit (int);
+
+int
+main (void)
+{
+  if (d != e / 2.0)
+    abort ();
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/20030926-1.c b/gcc/testsuite/gcc.target/i386/20030926-1.c
new file mode 100644
index 00000000000..866ebb808d5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20030926-1.c
@@ -0,0 +1,19 @@
+/* PR optimization/11741  */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -minline-all-stringops" } */
+/* { dg-options "-O2 -minline-all-stringops -march=pentium4" { target { i?86-*-* && ilp32 } } } */
+/* { dg-options "-O2 -minline-all-stringops -march=pentium4" { target { x86_64-*-* && ilp32 } } } */
+
+extern void *memcpy (void *, const void *, __SIZE_TYPE__);
+extern __SIZE_TYPE__ strlen (const char *);
+
+void
+foo (char *p)
+{
+  for (;;)
+    {
+      memcpy (p, p + 1, strlen (p));
+      p++;
+    }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/20040112-1.c b/gcc/testsuite/gcc.target/i386/20040112-1.c
new file mode 100644
index 00000000000..83996fe6c23
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20040112-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler "testb" } } */
+ftn (char *sp)
+{
+  char status;
+
+  while (1)
+    {
+      *sp = 0xE8;
+      status = *(volatile char *) sp;
+      if (status & 0x80)
+	break;
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/20050113-1.c b/gcc/testsuite/gcc.target/i386/20050113-1.c
new file mode 100644
index 00000000000..e7f69e36641
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/20050113-1.c
@@ -0,0 +1,6 @@
+/* PR middle-end/19164 */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-mmmx" } */
+
+typedef short int V __attribute__ ((vector_size (8)));
+static V v = (V) 0x00FF00FF00FF00FFLL; /* { dg-error "is not constant" } */
diff --git a/gcc/testsuite/gcc.target/i386/387-1.c b/gcc/testsuite/gcc.target/i386/387-1.c
new file mode 100644
index 00000000000..9b31dcaed55
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/387-1.c
@@ -0,0 +1,21 @@
+/* Verify that -mno-fancy-math-387 works.  */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O -ffast-math -mfpmath=387 -mno-fancy-math-387 -march=i386" } */
+/* { dg-final { scan-assembler "call\t_?sin" } } */
+/* { dg-final { scan-assembler "call\t_?cos" } } */
+/* { dg-final { scan-assembler "call\t_?sqrt" } } */
+/* { dg-final { scan-assembler "call\t_?atan2" } } */
+/* { dg-final { scan-assembler "call\t_?log" } } */
+/* { dg-final { scan-assembler "call\t_?exp" } } */
+/* { dg-final { scan-assembler "call\t_?tan" } } */
+/* { dg-final { scan-assembler "call\t_?fmod" } } */
+
+double f1(double x) { return __builtin_sin(x); }
+double f2(double x) { return __builtin_cos(x); }
+double f3(double x) { return __builtin_sqrt(x); }
+double f4(double x, double y) { return __builtin_atan2(x,y); }
+double f5(double x) { return __builtin_log(x); }
+double f6(double x) { return __builtin_exp(x); }
+double f7(double x) { return __builtin_tan(x); }
+double f8(double x, double y) { return __builtin_fmod(x,y); }
diff --git a/gcc/testsuite/gcc.target/i386/387-2.c b/gcc/testsuite/gcc.target/i386/387-2.c
new file mode 100644
index 00000000000..7358866eceb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/387-2.c
@@ -0,0 +1,21 @@
+/* Verify that -march overrides -mno-fancy-math-387.  */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O -ffast-math -mfpmath=387 -march=i686 -mno-fancy-math-387" } */
+/* { dg-final { scan-assembler "fsin" } } */
+/* { dg-final { scan-assembler "fcos" } } */
+/* { dg-final { scan-assembler "fsqrt" } } */
+/* { dg-final { scan-assembler "fpatan" } } */
+/* { dg-final { scan-assembler "fyl2x" } } */
+/* { dg-final { scan-assembler "f2xm1" } } */
+/* { dg-final { scan-assembler "fptan" } } */
+/* { dg-final { scan-assembler "fprem" } } */
+
+double f1(double x) { return __builtin_sin(x); }
+double f2(double x) { return __builtin_cos(x); }
+double f3(double x) { return __builtin_sqrt(x); }
+double f4(double x, double y) { return __builtin_atan2(x,y); }
+double f5(double x) { return __builtin_log(x); }
+double f6(double x) { return __builtin_exp(x); }
+double f7(double x) { return __builtin_tan(x); }
+double f8(double x, double y) { return __builtin_fmod(x,y); }
diff --git a/gcc/testsuite/gcc.target/i386/387-3.c b/gcc/testsuite/gcc.target/i386/387-3.c
new file mode 100644
index 00000000000..ed80f78187d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/387-3.c
@@ -0,0 +1,11 @@
+/* Verify that 387 mathematical constants are recognized.  */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -march=i686" } */
+/* { dg-final { scan-assembler "fldpi" } } */
+
+long double add_pi(long double x)
+{
+  return x + 3.1415926535897932385128089594061862044L;
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/387-4.c b/gcc/testsuite/gcc.target/i386/387-4.c
new file mode 100644
index 00000000000..55398275570
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/387-4.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -march=i686" } */
+/* { dg-final { scan-assembler "fldpi" } } */
+
+long double atanl (long double);
+
+long double pi()
+{
+  return 4.0 * atanl (1.0);
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/387-5.c b/gcc/testsuite/gcc.target/i386/387-5.c
new file mode 100644
index 00000000000..fd3106e0270
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/387-5.c
@@ -0,0 +1,11 @@
+/* Verify that -mno-fancy-math-387 works.  */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O -ffast-math -mfpmath=387 -mno-fancy-math-387 -march=i386" } */
+/* { dg-final { scan-assembler "call\t_?atan" } } */
+/* { dg-final { scan-assembler "call\t_?log1p" } } */
+/* { dg-final { scan-assembler "call\t_?drem" } } */
+
+double f1(double x) { return __builtin_atan(x); }
+double f2(double x) { return __builtin_log1p(x); }
+double f3(double x, double y) { return __builtin_drem(x,y); }
diff --git a/gcc/testsuite/gcc.target/i386/387-6.c b/gcc/testsuite/gcc.target/i386/387-6.c
new file mode 100644
index 00000000000..b3ad64dac48
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/387-6.c
@@ -0,0 +1,11 @@
+/* Verify that -march overrides -mno-fancy-math-387.  */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O -ffast-math -mfpmath=387 -march=i686 -mno-fancy-math-387" } */
+/* { dg-final { scan-assembler "fpatan" } } */
+/* { dg-final { scan-assembler "fyl2xp1" } } */
+/* { dg-final { scan-assembler "fprem1" } } */
+
+double f1(double x) { return __builtin_atan(x); }
+double f2(double x) { return __builtin_log1p(x); }
+double f3(double x, double y) { return __builtin_drem(x,y); }
diff --git a/gcc/testsuite/gcc.target/i386/387-7.c b/gcc/testsuite/gcc.target/i386/387-7.c
new file mode 100644
index 00000000000..edcdac1ae3f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/387-7.c
@@ -0,0 +1,14 @@
+/* Verify that 387 fsincos instruction is generated.  */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O -ffast-math -march=i686" } */
+/* { dg-final { scan-assembler "fsincos" } } */
+
+extern double sin (double);
+extern double cos (double);
+
+double f1(double x)
+{
+  return sin(x) + cos (x);
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/387-8.c b/gcc/testsuite/gcc.target/i386/387-8.c
new file mode 100644
index 00000000000..6af895998d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/387-8.c
@@ -0,0 +1,15 @@
+/* Verify that 387 fptan instruction is generated. Also check fptan
+   peephole2 optimizer.  */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -ffast-math -march=i686" } */
+/* { dg-final { scan-assembler "fptan" } } */
+/* { dg-final { scan-assembler-not "fld1" } } */
+
+extern double tan (double);
+
+double f1(double x)
+{
+  return 1.0 / tan(x);
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/3dnow-1.c b/gcc/testsuite/gcc.target/i386/3dnow-1.c
new file mode 100644
index 00000000000..a8dcb419c7e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/3dnow-1.c
@@ -0,0 +1,12 @@
+/* { dg-do assemble { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -Werror-implicit-function-declaration -m3dnow" } */
+
+/* Test that the intrinsics compile with optimization.  All of them are
+   defined as inline functions in mmintrin.h that reference the proper
+   builtin functions.  Defining away "static" and "__inline" results in
+   all of them being compiled as proper functions.  */
+
+#define static
+#define __inline
+
+#include <mm3dnow.h>
diff --git a/gcc/testsuite/gcc.target/i386/3dnow-2.c b/gcc/testsuite/gcc.target/i386/3dnow-2.c
new file mode 100644
index 00000000000..d9aa7a56420
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/3dnow-2.c
@@ -0,0 +1,12 @@
+/* { dg-do assemble { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O0 -Werror-implicit-function-declaration -m3dnow" } */
+
+/* Test that the intrinsics compile without optimization.  All of them are
+   defined as inline functions in mmintrin.h that reference the proper
+   builtin functions.  Defining away "static" and "__inline" results in
+   all of them being compiled as proper functions.  */
+
+#define static
+#define __inline
+
+#include <mm3dnow.h>
diff --git a/gcc/testsuite/gcc.target/i386/3dnowA-1.c b/gcc/testsuite/gcc.target/i386/3dnowA-1.c
new file mode 100644
index 00000000000..80209b00c29
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/3dnowA-1.c
@@ -0,0 +1,13 @@
+/* { dg-do assemble { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -Werror-implicit-function-declaration -m3dnow -march=athlon" } */
+
+/* Test that the intrinsics compile with optimization.  All of them are
+   defined as inline functions in mmintrin.h that reference the proper
+   builtin functions.  Defining away "static" and "__inline" results in
+   all of them being compiled as proper functions.  */
+
+#define static
+#define __inline
+
+#include <mm3dnow.h>
diff --git a/gcc/testsuite/gcc.target/i386/3dnowA-2.c b/gcc/testsuite/gcc.target/i386/3dnowA-2.c
new file mode 100644
index 00000000000..0cce3b1318c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/3dnowA-2.c
@@ -0,0 +1,13 @@
+/* { dg-do assemble { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O0 -Werror-implicit-function-declaration -m3dnow -march=athlon" } */
+
+/* Test that the intrinsics compile without optimization.  All of them are
+   defined as inline functions in mmintrin.h that reference the proper
+   builtin functions.  Defining away "static" and "__inline" results in
+   all of them being compiled as proper functions.  */
+
+#define static
+#define __inline
+
+#include <mm3dnow.h>
diff --git a/gcc/testsuite/gcc.target/i386/980211-1.c b/gcc/testsuite/gcc.target/i386/980211-1.c
new file mode 100644
index 00000000000..973a30fbd67
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/980211-1.c
@@ -0,0 +1,29 @@
+/* Test long double on x86 and x86-64. */
+
+/* { dg-do run { target i?86-*-* x86_64-*-*} } */
+/* { dg-options -O2 } */
+
+extern void abort (void);
+
+__inline int
+__signbitl (long double __x)
+{
+  union { long double __l; int __i[3]; } __u = { __l: __x };
+
+  return (__u.__i[2] & 0x8000) != 0;
+}
+
+void
+foo (long double x, long double y)
+{
+  long double z = x / y;
+  if (__signbitl (x) && __signbitl (z))
+    abort ();
+}
+
+int main()
+{
+  if (sizeof (long double) > sizeof (double))
+    foo (-0.0, -1.0);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/980226-1.c b/gcc/testsuite/gcc.target/i386/980226-1.c
new file mode 100644
index 00000000000..52ff614ed3a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/980226-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options -O2 } */
+
+extern int printf (const char *, ...);
+extern double bar (double);
+
+int
+baz (double d)
+{
+  double e = bar (d);
+  asm volatile ("" : : : "st");
+  return printf ("%lg\n", e);
+}
diff --git a/gcc/testsuite/gcc.target/i386/980414-1.c b/gcc/testsuite/gcc.target/i386/980414-1.c
new file mode 100644
index 00000000000..e179c8137c0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/980414-1.c
@@ -0,0 +1,78 @@
+/* Test double on x86. */
+
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options -O2 } */
+
+extern void abort (void);
+
+static __inline  double
+mypow (double __x, double __y)
+{
+  register double __value, __exponent;
+  long __p = (long) __y;
+  if (__y == (double) __p)
+    {
+      double __r = 1.0;
+      if (__p == 0)
+	return 1.0;
+      if (__p < 0)
+	{
+	  __p = -__p;
+	  __x = 1.0 / __x;
+	}
+      while (1)
+	{
+	  if (__p & 1)
+	    __r *= __x;
+	  __p >>= 1;
+	  if (__p == 0)
+	    return __r;
+	  __x *= __x;
+	}
+    }
+  __asm __volatile__
+    ("fmul	%%st(1),%%st\n\t"	/* y * log2(x) */
+     "fst	%%st(1)\n\t"
+     "frndint\n\t"			/* int(y * log2(x)) */
+     "fxch  %%st(1)\n\t"
+     "fsub	%%st(1),%%st\n\t"	/* fract(y * log2(x)) */
+     "f2xm1\n\t"			/* 2^(fract(y * log2(x))) - 1 */
+     : "=t" (__value), "=u" (__exponent) :  "0" (__x), "1" (__y));
+  __value += 1.0;
+  __asm __volatile__
+    ("fscale"
+     : "=t" (__value) : "0" (__value), "u" (__exponent));
+  return __value;
+}
+
+const double E1 = 2.71828182845904523536028747135;
+
+double fact (double x)
+{
+  double corr;
+  corr = 1.0;
+  return corr * mypow(x/E1, x);
+}
+
+int main ()
+{
+  double y, z;
+
+  y = fact (46.2);
+  z = mypow (46.2/E1, 46.2);
+
+#if 0
+  printf ("%26.19e, %26.19e\n", y, z);
+#endif
+
+  if (y > z)
+    y -= z;
+  else
+    y = z - y;
+
+  y /= z;
+  if (y > 0.1)
+    abort ();
+ 
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/980520-1.c b/gcc/testsuite/gcc.target/i386/980520-1.c
new file mode 100644
index 00000000000..b11f0d3a893
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/980520-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options -O2 } */
+
+int bug(void)
+{
+        unsigned long a, b;
+   
+        __asm__(""
+                : "=d" (a)
+                :
+                : "memory");
+        __asm__ __volatile__(""
+                             :
+                             : "g" (b)
+                             : "memory");
+        return a;
+}
diff --git a/gcc/testsuite/gcc.target/i386/980709-1.c b/gcc/testsuite/gcc.target/i386/980709-1.c
new file mode 100644
index 00000000000..01b6bfe358e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/980709-1.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options -O2 } */
+
+extern __inline__ int test_and_set_bit(int nr, volatile void * addr)
+{
+	int oldbit;
+	__asm__ __volatile__( "" 
+		"btsl %2,%1\n\tsbbl %0,%0"
+		:"=r" (oldbit),"=m" (addr)
+		:"ir" (nr));
+	return oldbit;
+}
+struct buffer_head {
+	unsigned long b_state;		 
+};
+extern void lock_buffer(struct buffer_head * bh)
+{
+	while (test_and_set_bit(2 , &bh->b_state))
+		__wait_on_buffer(bh);
+}
diff --git a/gcc/testsuite/gcc.target/i386/990117-1.c b/gcc/testsuite/gcc.target/i386/990117-1.c
new file mode 100644
index 00000000000..24c56f2febf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/990117-1.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -march=pentiumpro" } */
+
+extern __inline  double
+fabs (double __x)
+{
+  register double __value;
+  __asm __volatile__
+    ("fabs"
+     : "=t" (__value) : "0" (__x));
+  return __value;
+}
+int
+foo ()
+{
+  int i, j, k;
+  double x = 0, y = ((i == j) ? 1 : 0);
+  for (i = 0; i < 10; i++)
+    ;
+  fabs (x - y);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/990130-1.c b/gcc/testsuite/gcc.target/i386/990130-1.c
new file mode 100644
index 00000000000..57e046b22a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/990130-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options -O0 } */
+
+typedef 	 int SItype	__attribute__ ((mode (SI)));
+typedef		 int DItype	__attribute__ ((mode (DI)));
+typedef unsigned int USItype	__attribute__ ((mode (SI)));
+  struct DIstruct {SItype low, high;};
+typedef union
+{
+  struct DIstruct s;
+  DItype ll;
+} DIunion;
+DItype
+__muldi3 (DItype u, DItype v)
+{
+  DIunion w;
+  DIunion uu, vv;
+  uu.ll = u,
+  vv.ll = v;
+  w.ll = ({DIunion __w;	__asm__ ("mull %3"	: "=a" ((USItype) (  __w.s.low )),	"=d" ((USItype) ( __w.s.high ))	: "%0" ((USItype) (   uu.s.low  )),	"rm" ((USItype) (    vv.s.low  ))) ;	__w.ll; }) ;
+  w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
+	       + (USItype) uu.s.high * (USItype) vv.s.low);
+  return w.ll;
+}
diff --git a/gcc/testsuite/gcc.target/i386/990213-2.c b/gcc/testsuite/gcc.target/i386/990213-2.c
new file mode 100644
index 00000000000..d095e3723f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/990213-2.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-fPIC" } */
+
+struct normal_encoding {};
+struct unknown_encoding {};
+static const struct normal_encoding latin1_encoding = {};
+
+struct encoding*
+XmlInitUnknownEncoding(void *mem)
+{
+  int i;
+  struct unknown_encoding *e = mem;
+  for (i = 0; i < sizeof(struct normal_encoding); i++)
+    ((char *)mem)[i] = ((char *)&latin1_encoding)[i];
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/990214-1.c b/gcc/testsuite/gcc.target/i386/990214-1.c
new file mode 100644
index 00000000000..b3cb519a471
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/990214-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-fPIC" } */
+
+typedef int int64_t __attribute__ ((__mode__ (  __DI__ ))) ;
+unsigned *
+bar (int64_t which)
+{
+	switch (which & 15 ) {
+	case 0 :
+		break;
+	case 1 :
+	case 5 :
+	case 2 : ;
+	}
+
+	return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/990424-1.c b/gcc/testsuite/gcc.target/i386/990424-1.c
new file mode 100644
index 00000000000..5b5af818076
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/990424-1.c
@@ -0,0 +1,30 @@
+/* Test that stack alignment is preserved with pending_stack_adjust
+   with stdcall functions.  */
+
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options -mpreferred-stack-boundary=4 } */
+
+void __attribute__((stdcall)) foo(int a, int b, int c);
+
+extern void abort (void);
+extern void exit (int);
+
+int
+main ()
+{
+  foo(1, 2, 3);
+  foo(1, 2, 3);
+  exit (0);
+}
+
+void __attribute__((stdcall))
+foo(int a, int b, int c)
+{
+  static int last_align = -1;
+  int dummy, align = (int)&dummy & 15;
+  if (last_align < 0)
+    last_align = align;
+  else if (align != last_align)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/990524-1.c b/gcc/testsuite/gcc.target/i386/990524-1.c
new file mode 100644
index 00000000000..ee4ebd62671
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/990524-1.c
@@ -0,0 +1,39 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -march=pentiumpro" } */
+
+typedef struct t_anim_info {
+   char        *new_filename;
+   long         first_frame_nr; 
+} t_anim_info;
+static int
+p_frames_to_multilayer(t_anim_info *ainfo_ptr,
+                      long range_from, long range_to)
+{
+  long    l_cur_frame_nr;
+  long    l_step, l_begin, l_end;
+  int  l_tmp_image_id;
+  int  l_new_image_id;
+  if(range_from > range_to)
+  {
+    l_step  = -1;      
+    if(range_to < ainfo_ptr->first_frame_nr)
+    { l_begin = ainfo_ptr->first_frame_nr; 
+     }
+  }
+  else
+  {
+    l_step  = 1;       
+  }
+  l_cur_frame_nr = l_begin;
+  while(1)
+  {
+    if(ainfo_ptr->new_filename == ((void *)0) )
+    if(l_tmp_image_id < 0)
+      gimp_image_delete(l_tmp_image_id);
+    if(l_cur_frame_nr == l_end)
+       break;
+    l_cur_frame_nr += l_step;
+  }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/991129-1.c b/gcc/testsuite/gcc.target/i386/991129-1.c
new file mode 100644
index 00000000000..489b7f987fa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/991129-1.c
@@ -0,0 +1,15 @@
+/* Test against a problem in push_reload.  */
+
+/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+/* { dg-options "-O2" } */
+
+unsigned long foo (unsigned long long x, unsigned long y)
+{
+    unsigned long a;
+
+    x += y;
+
+    asm ("" : "=a" (a) : "A" (x), "rm" (y));
+
+    return a;
+}
diff --git a/gcc/testsuite/gcc.target/i386/991209-1.c b/gcc/testsuite/gcc.target/i386/991209-1.c
new file mode 100644
index 00000000000..ab455da098d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/991209-1.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+/* { dg-options "-ansi -pedantic" } */
+
+int foo ()
+{
+  return 1;
+}
+
+register char *stack_ptr __asm ("%esp"); /* { dg-warning "warning: file-scope declaration of 'stack_ptr' specifies 'register'" } */
diff --git a/gcc/testsuite/gcc.target/i386/991214-1.c b/gcc/testsuite/gcc.target/i386/991214-1.c
new file mode 100644
index 00000000000..cfe3a9a4121
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/991214-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+/* { dg-options "-O2" } */
+
+/* Test against a problem with the combiner substituting explicit hard reg
+   references when it shouldn't.  */
+void foo (int, int) __attribute__ ((regparm (3)));
+void __attribute__((regparm(3))) foo (int x, int y)
+{
+  __asm__ __volatile__("" : : "d" (x), "r" (y));
+}
diff --git a/gcc/testsuite/gcc.target/i386/991230-1.c b/gcc/testsuite/gcc.target/i386/991230-1.c
new file mode 100644
index 00000000000..b87d0e2e3cb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/991230-1.c
@@ -0,0 +1,24 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O -ffast-math -mtune=i486" } */
+
+/* Test that floating point greater-than tests are compiled correctly with
+   -ffast-math.  */
+
+extern void abort (void);
+
+static int gt (double a, double b)
+{
+  if (a > b)
+    return 4;
+  return 0;
+}
+
+static double zero = 0.0;
+
+int main ()
+{
+  if (gt (zero, zero))
+    abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/asm-2.c b/gcc/testsuite/gcc.target/i386/asm-2.c
new file mode 100644
index 00000000000..7e9ecb7797d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/asm-2.c
@@ -0,0 +1,62 @@
+/* PR opt/13862 */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O" } */
+
+typedef struct _fame_syntax_t_ {
+} fame_syntax_t;
+
+typedef struct _fame_bitbuffer_t_
+{
+  unsigned char * base;
+  unsigned char * data;
+  unsigned long shift;
+} fame_bitbuffer_t;
+
+#define fast_bitbuffer_write(data, shift, c, l)				\
+{									\
+  int d;								\
+									\
+  asm("add %1, %%ecx\n"            /* ecx = shift + length */		\
+      "shrd %%cl, %2, %3\n"        /* adjust code to fit in */		\
+      "shr %%cl, %2\n"             /* adjust code to fit in */		\
+      "mov %%ecx, %1\n"            /* shift += length */		\
+      "bswap %2\n"                 /* reverse byte order of code */	\
+      "shr $5, %%ecx\n"            /* get dword increment */            \
+      "or %2, (%0)\n"              /* put first 32 bits */		\
+      "bswap %3\n"                 /* reverse byte order of code */	\
+      "lea   (%0, %%ecx, 4), %0\n" /* data += (ecx>32) */		\
+      "andl $31, %1\n"             /* mask shift */			\
+      "orl %3, (%0)\n"             /* put last 32 bits */		\
+      : "=r"(data), "=r"(shift), "=a"(d), "=d"(d), "=c"(d)		\
+      : "0"(data), "1"(shift), "2"((unsigned long) c), "3"(0),		\
+	"c"((unsigned long) l)						\
+      : "memory");							\
+}
+
+#define bitbuffer_write(bb, c, l) \
+  fast_bitbuffer_write((bb)->data, (bb)->shift, c, l)
+
+typedef enum { frame_type_I, frame_type_P } frame_type_t;
+
+typedef struct _fame_syntax_mpeg1_t_ {
+  fame_bitbuffer_t buffer;
+  frame_type_t frame_type;
+} fame_syntax_mpeg1_t;
+
+#define FAME_SYNTAX_MPEG1(x) ((fame_syntax_mpeg1_t *) x)
+
+void mpeg1_start_picture(fame_syntax_t *syntax)
+{
+  fame_syntax_mpeg1_t *syntax_mpeg1 = FAME_SYNTAX_MPEG1(syntax);
+  bitbuffer_write(&syntax_mpeg1->buffer, 0xFFFF, 16); 
+
+  switch(syntax_mpeg1->frame_type) {
+    case frame_type_I:
+      bitbuffer_write(&syntax_mpeg1->buffer, 0, 1);  
+    break;
+    case frame_type_P:
+      bitbuffer_write(&syntax_mpeg1->buffer, 0, 1);
+    break;
+  }
+}
diff --git a/gcc/testsuite/gcc.target/i386/asm-3.c b/gcc/testsuite/gcc.target/i386/asm-3.c
new file mode 100644
index 00000000000..19bf1534521
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/asm-3.c
@@ -0,0 +1,34 @@
+/* PR inline-asm/6806 */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2" } */
+
+extern void abort (void);
+
+volatile int out = 1;
+volatile int a = 2;
+volatile int b = 4;
+volatile int c = 8;
+volatile int d = 16;
+volatile int e = 32;
+volatile int f = 64;
+
+int
+main ()
+{
+  asm volatile ("xorl %%eax, %%eax	\n\t"
+		"xorl %%esi, %%esi	\n\t"
+		"addl %1, %0		\n\t"
+		"addl %2, %0		\n\t"
+		"addl %3, %0		\n\t"
+		"addl %4, %0		\n\t"
+		"addl %5, %0		\n\t"
+		"addl %6, %0"
+		: "+r" (out)
+		: "r" (a), "r" (b), "r" (c), "g" (d), "g" (e), "g" (f)
+		: "%eax", "%esi");
+
+  if (out != 127)
+    abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/asm-4.c b/gcc/testsuite/gcc.target/i386/asm-4.c
new file mode 100644
index 00000000000..c1324388dae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/asm-4.c
@@ -0,0 +1,39 @@
+/* Test if functions marked __attribute__((used)), but with address never
+   taken in C code, don't use alternate calling convention for local
+   functions on IA-32.  */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2" } */
+
+extern void abort (void);
+
+static int foo (int, int, int, int) __asm ("foo");
+static __attribute__((noinline, used)) int
+foo (int i, int j, int k, int l)
+{
+  return i + j + k + l;
+}
+
+void
+bar (void)
+{
+  if (foo (1, 2, 3, 4) != 10)
+    abort ();
+}
+
+int (*fn) (int, int, int, int);
+
+void
+baz (void)
+{
+  __asm ("movl $foo, %k0" : "=r" (fn));
+  if (fn (2, 3, 4, 5) != 14)
+    abort ();
+}
+
+int
+main (void)
+{
+  bar ();
+  baz ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/asm-5.c b/gcc/testsuite/gcc.target/i386/asm-5.c
new file mode 100644
index 00000000000..e871dd9343f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/asm-5.c
@@ -0,0 +1,26 @@
+/* PR inline-asm/11676 */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2" } */
+
+extern void abort (void);
+static int bar(int x) __asm__("bar") __attribute__((regparm(1)));
+static int __attribute__((regparm(1), noinline, used))
+bar(int x)
+{
+  if (x != 0)
+    abort ();
+}
+
+static int __attribute__((regparm(1), noinline))
+foo(int x)
+{
+  x = 0;
+  __asm__ __volatile__("call bar" : "=a"(x) : "a"(x));
+}
+
+int main()
+{
+  foo(1);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/bitfield1.c b/gcc/testsuite/gcc.target/i386/bitfield1.c
new file mode 100644
index 00000000000..e285ba0526a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/bitfield1.c
@@ -0,0 +1,55 @@
+// Test for bitfield alignment in structs on IA-32
+// { dg-do run { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target ilp32 }
+// { dg-options "-O2" }
+// { dg-options "-mno-align-double -mno-ms-bitfields" { target i?86-*-interix* i?86-*-cygwin* i?86-*-mingw*} }
+
+extern void abort (void);
+extern void exit (int);
+
+struct A
+{
+  char a;
+  long long b : 61;
+  char c;
+} a, a4[4];
+
+struct B
+{
+  char d;
+  struct A e;
+  char f;
+} b;
+
+struct C
+{
+  char g;
+  union U
+  {
+    char u1;
+    long long u2;
+    long long u3 : 64;
+  } h;
+  char i;
+} c;
+
+int main (void)
+{
+  if (&a.c - &a.a != 12)
+    abort ();
+  if (sizeof (a) != 16)
+    abort ();
+  if (sizeof (a4) != 4 * 16)
+    abort ();
+  if (sizeof (b) != 2 * 4 + 16)
+    abort ();
+  if (__alignof__ (b.e) != 4)
+    abort ();
+  if (&c.i - &c.g != 12)
+    abort ();
+  if (sizeof (c) != 16)
+    abort ();
+  if (__alignof__ (c.h) != 4)
+    abort ();
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/bitfield2.c b/gcc/testsuite/gcc.target/i386/bitfield2.c
new file mode 100644
index 00000000000..54f5c8dbfd3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/bitfield2.c
@@ -0,0 +1,23 @@
+// Test for bitfield alignment in structs on IA-32
+// { dg-do run { target i?86-*-* x86_64-*-* } }
+// { dg-require-effective-target ilp32 }
+// { dg-options "-O2" }
+// { dg-options "-mno-align-double -mno-ms-bitfields" { target i?86-*-interix* i?86-*-cygwin* i?86-*-mingw* } }
+
+extern void abort (void);
+extern void exit (int);
+
+struct X {
+  char a;
+  long long : 0;
+  char b;
+} x;
+
+int main () {
+  if (&x.b - &x.a != 4)
+    abort ();
+  if (sizeof (x) != 5)
+    abort ();
+  
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/bitfield3.c b/gcc/testsuite/gcc.target/i386/bitfield3.c
new file mode 100644
index 00000000000..111f5f28c42
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/bitfield3.c
@@ -0,0 +1,24 @@
+// Test for bitfield alignment in structs on IA-32
+// { dg-do run { target i?86-*-* x86_64-*-* } }
+// { dg-options "-O2" }
+// { dg-options "-mno-align-double -mno-ms-bitfields" { target *-*-interix* } }
+
+extern void abort (void);
+extern void exit (int);
+
+struct X {
+  int : 32;
+};
+
+struct Y {
+  int i : 32;
+};
+
+int main () {
+  if (__alignof__(struct X) != 1)
+    abort ();
+  if (__alignof__(struct Y) != 4)
+    abort ();
+  
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cadd.c b/gcc/testsuite/gcc.target/i386/cadd.c
new file mode 100644
index 00000000000..2c6360b946b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cadd.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -march=k8" } */
+/* { dg-final { scan-assembler "sbb" } } */
+
+extern void abort (void);
+
+/* Conditional increment is best done using sbb $-1, val.  */
+int t[]={0,0,0,0,1,1,1,1,1,1};
+q()
+{
+  int sum=0;
+  int i;
+  for (i=0;i<10;i++)
+    if (t[i])
+       sum++;
+  if (sum != 6)
+    abort ();
+}
+main()
+{
+  int i;
+  for (i=0;i<10000000;i++)
+    q();
+}
diff --git a/gcc/testsuite/gcc.target/i386/call-1.c b/gcc/testsuite/gcc.target/i386/call-1.c
new file mode 100644
index 00000000000..3c3d642babd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/call-1.c
@@ -0,0 +1,39 @@
+/* PR optimization/11304 */
+/* Originator: <manuel.serrano@sophia.inria.fr> */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O -fomit-frame-pointer" } */
+
+/* Verify that %eax is always restored after a call.  */
+
+extern void abort(void);
+
+volatile int r;
+
+void set_eax(int val)
+{
+  __asm__ __volatile__ ("mov %0, %%eax" : : "m" (val));
+}
+
+void foo(int val)
+{
+  r = val;
+}
+
+int bar(int x)
+{
+  if (x)
+  {
+    set_eax(0);
+    return x;
+  }
+
+  foo(x);
+}
+
+int main(void)
+{
+  if (bar(1) != 1)
+    abort();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/clobbers.c b/gcc/testsuite/gcc.target/i386/clobbers.c
new file mode 100644
index 00000000000..44c46b0bf02
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/clobbers.c
@@ -0,0 +1,29 @@
+/* Test asm clobbers on x86. */
+
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+
+extern void abort (void);
+
+int main ()
+{
+        int i;
+        __asm__ ("movl $1,%0\n\txorl %%eax,%%eax" : "=r" (i) : : "eax");
+        if (i != 1)
+                abort ();
+        __asm__ ("movl $1,%0\n\txorl %%ebx,%%ebx" : "=r" (i) : : "ebx");
+        if (i != 1)
+                abort ();
+        __asm__ ("movl $1,%0\n\txorl %%ecx,%%ecx" : "=r" (i) : : "ecx");
+        if (i != 1)
+                abort ();
+        __asm__ ("movl $1,%0\n\txorl %%edx,%%edx" : "=r" (i) : : "edx");
+        if (i != 1)
+                abort ();
+        __asm__ ("movl $1,%0\n\txorl %%esi,%%esi" : "=r" (i) : : "esi");
+        if (i != 1)
+                abort ();
+        __asm__ ("movl $1,%0\n\txorl %%edi,%%edi" : "=r" (i) : : "edi");
+        if (i != 1)
+                abort ();
+        return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cmov1.c b/gcc/testsuite/gcc.target/i386/cmov1.c
new file mode 100644
index 00000000000..71f03ae9fea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cmov1.c
@@ -0,0 +1,29 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -march=k8" } */
+/* { dg-final { scan-assembler "sar\[^\\n\]*magic_namea" } } */
+/* { dg-final { scan-assembler "sar\[^\\n\]*magic_nameb" } } */
+/* { dg-final { scan-assembler "sar\[^\\n\]*magic_namec" } } */
+/* { dg-final { scan-assembler "shr\[^\\n\]*magic_named" } } */
+/* { dg-final { scan-assembler "shr\[^\\n\]*magic_namee" } } */
+/* { dg-final { scan-assembler "shr\[^\\n\]*magic_namef" } } */
+
+/* Check code generation for several conditional moves doable by single arithmetics.  */
+
+int magic_namea;
+char magic_nameb;
+short magic_namec;
+int magic_named;
+char magic_namee;
+short magic_namef;
+
+unsigned int gen;
+m()
+{
+  magic_namec=magic_namec>=0?0:-1;
+  magic_namea=magic_namea>=0?0:-1;
+  magic_nameb=magic_nameb>=0?0:-1;
+  magic_named=magic_named>=0?0:1;
+  magic_namee=magic_namee>=0?0:1;
+  magic_namef=magic_namef>=0?0:1;
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/cmov2.c b/gcc/testsuite/gcc.target/i386/cmov2.c
new file mode 100644
index 00000000000..cd6457f0d5f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cmov2.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -march=k8" } */
+/* { dg-final { scan-assembler "sbb" } } */
+
+/* This conditional move is fastest to be done using sbb.  */
+t(unsigned int a, unsigned int b)
+{
+  return (a<=b?5:-5);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cmov3.c b/gcc/testsuite/gcc.target/i386/cmov3.c
new file mode 100644
index 00000000000..6ef2675297d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cmov3.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -march=k8" } */
+/* { dg-final { scan-assembler "cmov" } } */
+
+/* This conditional move is fastest to be done using cmov.  */
+t(int a, int b)
+{
+  return (a<=b?5:-5);
+}
diff --git a/gcc/testsuite/gcc.target/i386/cmov4.c b/gcc/testsuite/gcc.target/i386/cmov4.c
new file mode 100644
index 00000000000..e293b34abc1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cmov4.c
@@ -0,0 +1,19 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -march=k8" } */
+/* { dg-final { scan-assembler "cmov" } } */
+
+/* Verify that if conversion happends for memory references.  */
+int ARCHnodes;
+int *nodekind;
+float *nodekindf;
+t()
+{
+int i;
+/* Redefine nodekind to be 1 for all surface nodes */
+
+  for (i = 0; i < ARCHnodes; i++) {
+    nodekind[i] = (int) nodekindf[i];
+    if (nodekind[i] == 3)
+      nodekind[i] = 1;
+  }
+}
diff --git a/gcc/testsuite/gcc.target/i386/cmov5.c b/gcc/testsuite/gcc.target/i386/cmov5.c
new file mode 100644
index 00000000000..112a9933bbc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cmov5.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -march=k8" } */
+/* { dg-final { scan-assembler "sbb" } } */
+
+int
+t(float a, float b)
+{
+	return a<=b?0:-1;
+}
diff --git a/gcc/testsuite/gcc.target/i386/cvt-1.c b/gcc/testsuite/gcc.target/i386/cvt-1.c
new file mode 100644
index 00000000000..d2456f60189
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cvt-1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -march=k8 -mfpmath=sse" } */
+/* { dg-final { scan-assembler "cvttsd2si\[^\\n\]*xmm" } } */
+/* { dg-final { scan-assembler "cvttss2si\[^\\n\]*xmm" } } */
+int a,a1;
+double b;
+float b1;
+t()
+{
+	a=b;
+	a1=b1;
+}
diff --git a/gcc/testsuite/gcc.target/i386/fastcall-1.c b/gcc/testsuite/gcc.target/i386/fastcall-1.c
new file mode 100644
index 00000000000..c286ed3aec7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/fastcall-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target i386-pc-mingw32* i386-pc-cygwin* } } */
+
+void
+__attribute__ ((fastcall))
+f1() { }
+
+void
+_fastcall
+f2() { }
+
+void
+__fastcall
+f3() { }
+
+int
+__attribute__ ((fastcall))
+f4(int x, int y, int z) { }
diff --git a/gcc/testsuite/gcc.target/i386/fpcvt-1.c b/gcc/testsuite/gcc.target/i386/fpcvt-1.c
new file mode 100644
index 00000000000..6e65b104163
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/fpcvt-1.c
@@ -0,0 +1,8 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
+/* { dg-final { scan-assembler-not "cvtss2sd" } } */
+float a,b;
+main()
+{
+  a=b*3.0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/fpcvt-2.c b/gcc/testsuite/gcc.target/i386/fpcvt-2.c
new file mode 100644
index 00000000000..613c2076019
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/fpcvt-2.c
@@ -0,0 +1,8 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
+/* { dg-final { scan-assembler-not "cvtss2sd" } } */
+float a,b;
+main()
+{
+	return a<0.0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/fpcvt-3.c b/gcc/testsuite/gcc.target/i386/fpcvt-3.c
new file mode 100644
index 00000000000..f47cd70ed9a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/fpcvt-3.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
+/* { dg-final { scan-assembler-not "cvtss2sd" } } */
+extern double fabs (double);
+float a,b;
+main()
+{
+	a=fabs(b)+1.0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/fpcvt-4.c b/gcc/testsuite/gcc.target/i386/fpcvt-4.c
new file mode 100644
index 00000000000..9b35c5acc6c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/fpcvt-4.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -march=k8 -mfpmath=sse" } */
+/* { dg-final { scan-assembler "cvtsi2sd" } } */
+/* Check that conversions will get folded.  */
+double
+t(short a)
+{
+  float b=a;
+  return b;
+}
diff --git a/gcc/testsuite/gcc.target/i386/lea.c b/gcc/testsuite/gcc.target/i386/lea.c
new file mode 100644
index 00000000000..61d9955f3e2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/lea.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -march=i686" } */
+/* { dg-final { scan-assembler "leal" } } */
+typedef struct {
+  char **visbuf;
+  char **allbuf;
+} TScreen;
+
+void
+VTallocbuf(TScreen *screen, unsigned long savelines)
+{
+  screen->visbuf = &screen->allbuf[savelines];
+}
diff --git a/gcc/testsuite/gcc.target/i386/local.c b/gcc/testsuite/gcc.target/i386/local.c
new file mode 100644
index 00000000000..2fda2a2fc99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/local.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -funit-at-a-time" } */
+/* { dg-final { scan-assembler "magic\[^\\n\]*eax" { target ilp32 } } } */
+/* { dg-final { scan-assembler "magic\[^\\n\]*edi" { target lp64 } } } */
+
+/* Verify that local calling convention is used.  */
+static t(int) __attribute__ ((noinline));
+m()
+{
+	t(1);
+}
+static t(int a)
+{
+	asm("magic %0"::"g"(a));
+}
diff --git a/gcc/testsuite/gcc.target/i386/local2.c b/gcc/testsuite/gcc.target/i386/local2.c
new file mode 100644
index 00000000000..2225aeea0d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/local2.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -funit-at-a-time -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler-not "sub\[^\\n\]*sp" } } */
+
+static __attribute__ ((noinline)) q ();
+int a;
+
+/* This function should not require any stack manipulation
+   for preferred stack bounday.  */
+void
+e ()
+{
+  if (a)
+  {
+    e ();
+    a--;
+  }
+  q ();
+}
+
+static __attribute__ ((noinline)) q ()
+{
+}
diff --git a/gcc/testsuite/gcc.target/i386/loop-1.c b/gcc/testsuite/gcc.target/i386/loop-1.c
new file mode 100644
index 00000000000..479c80a2d7a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/loop-1.c
@@ -0,0 +1,106 @@
+/* PR optimization/9888 */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-mtune=k6 -O3" } */
+
+/* Verify that GCC doesn't emit out of range 'loop' instructions.  */
+
+extern void abort (void);
+extern void exit (int);
+
+   
+f1 (a)
+     long a;
+{
+  int i;
+  for (i = 0; i < 10; i++)
+    {
+      if (--a == -1)
+	return i;
+    }
+  return -1;
+}
+
+f2 (a)
+     long a;
+{
+  int i;
+  for (i = 0; i < 10; i++)
+    {
+      if (--a != -1)
+	return i;
+    }
+  return -1;
+}
+
+f3 (a)
+     long a;
+{
+  int i;
+  for (i = 0; i < 10; i++)
+    {
+      if (--a == 0)
+	return i;
+    }
+  return -1;
+}
+
+f4 (a)
+     long a;
+{
+  int i;
+  for (i = 0; i < 10; i++)
+    {
+      if (--a != 0)
+	return i;
+    }
+  return -1;
+}
+
+f5 (a)
+     long a;
+{
+  int i;
+  for (i = 0; i < 10; i++)
+    {
+      if (++a == 0)
+	return i;
+    }
+  return -1;
+}
+
+f6 (a)
+     long a;
+{
+  int i;
+  for (i = 0; i < 10; i++)
+    {
+      if (++a != 0)
+	return i;
+    }
+  return -1;
+}
+
+
+int main()
+{
+  if (f1 (5L) != 5)
+    abort ();
+  if (f2 (1L) != 0)
+    abort ();
+  if (f2 (0L) != 1)
+    abort ();
+  if (f3 (5L) != 4)
+    abort ();
+  if (f4 (1L) != 1)
+    abort ();
+  if (f4 (0L) != 0)
+    abort ();
+  if (f5 (-5L) != 4)
+    abort ();
+  if (f6 (-1L) != 1)
+    abort ();
+  if (f6 (0L) != 0)
+    abort ();
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/loop-2.c b/gcc/testsuite/gcc.target/i386/loop-2.c
new file mode 100644
index 00000000000..8994eada46e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/loop-2.c
@@ -0,0 +1,81 @@
+/* PR optimization/9888 */
+/* Originator: Jim Bray <jb@as220.org> */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-mtune=k6 -Os" } */
+
+enum reload_type
+{
+  RELOAD_FOR_INPUT, RELOAD_FOR_OUTPUT, RELOAD_FOR_INSN,
+  RELOAD_FOR_INPUT_ADDRESS, RELOAD_FOR_INPADDR_ADDRESS,
+  RELOAD_FOR_OUTPUT_ADDRESS, RELOAD_FOR_OUTADDR_ADDRESS,
+  RELOAD_FOR_OPERAND_ADDRESS, RELOAD_FOR_OPADDR_ADDR,
+  RELOAD_OTHER, RELOAD_FOR_OTHER_ADDRESS
+};
+
+#define FOO_SIZE 3
+
+/* My results, varying with FOO_SIZE:
+   30: asm error "value of ..fff77 too large:
+   3 to 29: ....ff7d...
+   1 to 2: no error.  */
+
+struct reload
+{
+   int foo[FOO_SIZE];
+   int opnum; 
+   enum reload_type when_needed;
+   unsigned int optional:1; 
+   unsigned int secondary_p:1;
+};
+
+#define N_RELOADS  2
+
+struct reload rld[N_RELOADS];
+int n_reloads = N_RELOADS;
+
+int main(void)
+{
+  int i;
+
+  enum reload_type operand_type[1];
+
+  enum reload_type address_type[1];
+
+  int operand_reloadnum[1];
+  int goal_alternative_matches[1];
+
+  for (i = 0; i < n_reloads; i++)
+    {
+      if (rld[i].secondary_p
+          && rld[i].when_needed == operand_type[rld[i].opnum])
+        rld[i].when_needed = address_type[rld[i].opnum];
+
+      if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
+           || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
+           || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
+           || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
+          && (operand_reloadnum[rld[i].opnum] < 0
+              || rld[operand_reloadnum[rld[i].opnum]].optional))
+        {
+
+          if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
+              || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
+            rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
+          else
+            rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
+        }
+
+      if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
+           || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
+          && operand_reloadnum[rld[i].opnum] >= 0
+          && (rld[operand_reloadnum[rld[i].opnum]].when_needed
+              == RELOAD_OTHER))
+        rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
+
+      if (goal_alternative_matches[rld[i].opnum] >= 0)
+        rld[i].opnum = goal_alternative_matches[rld[i].opnum];
+    }
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/loop-3.c b/gcc/testsuite/gcc.target/i386/loop-3.c
new file mode 100644
index 00000000000..4e046b28acb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/loop-3.c
@@ -0,0 +1,80 @@
+/* PR target/11044 */
+/* Originator: Tim McGrath <misty-@charter.net> */
+/* Testcase contributed by Eric Botcazou <ebotcazou@libertysurf.fr> */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-mtune=k6 -O3 -ffast-math -funroll-loops" } */
+
+extern void *memset (void *, int, __SIZE_TYPE__);
+extern void abort (void);
+
+typedef struct
+{
+        unsigned char colormod;
+} entity_state_t;
+
+typedef struct
+{
+        int num_entities;
+        entity_state_t *entities;
+} packet_entities_t;
+
+typedef struct
+{
+        double senttime;
+        float ping_time;
+        packet_entities_t entities;
+} client_frame_t;
+
+typedef enum
+{
+        cs_free,
+        cs_server,
+        cs_zombie,
+        cs_connected,
+        cs_spawned
+} sv_client_state_t;
+
+typedef struct client_s
+{
+        sv_client_state_t state;
+        int ping;
+        client_frame_t frames[64];
+} client_t;
+
+int CalcPing (client_t *cl)
+{
+        float ping;
+        int count, i;
+        register client_frame_t *frame;
+
+        if (cl->state == cs_server)
+                return cl->ping;
+        ping = 0;
+        count = 0;
+        for (frame = cl->frames, i = 0; i < 64; i++, frame++) {
+                if (frame->ping_time > 0) {
+                        ping += frame->ping_time;
+                        count++;
+                }
+        }
+        if (!count)
+                return 9999;
+        ping /= count;
+
+        return ping * 1000;
+}
+
+int main(void)
+{
+   client_t cl;
+
+   memset(&cl, 0, sizeof(cl));
+
+   cl.frames[0].ping_time = 1.0f;
+
+   if (CalcPing(&cl) != 1000)
+     abort();
+
+   return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/memset-1.c b/gcc/testsuite/gcc.target/i386/memset-1.c
new file mode 100644
index 00000000000..4da21b97ee0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/memset-1.c
@@ -0,0 +1,104 @@
+/* Copyright (C) 2002, 2005  Free Software Foundation.
+
+   Test -minline-all-stringops memset with various combinations of pointer
+   alignments and lengths to make sure builtin optimizations are correct.
+   PR target/6456.
+
+   Written by Michael Meissner, March 9, 2002.
+   Target by Roger Sayle, April 25, 2002.  */
+
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -minline-all-stringops" } */
+
+extern void *memset (void *, int, __SIZE_TYPE__);
+extern void abort (void);
+extern void exit (int);
+
+#ifndef MAX_OFFSET
+#define MAX_OFFSET (sizeof (long long))
+#endif
+
+#ifndef MAX_COPY
+#define MAX_COPY (8 * sizeof (long long))
+#endif
+
+#ifndef MAX_EXTRA
+#define MAX_EXTRA (sizeof (long long))
+#endif
+
+#define MAX_LENGTH (MAX_OFFSET + MAX_COPY + MAX_EXTRA)
+
+static union {
+  char buf[MAX_LENGTH];
+  long long align_int;
+  long double align_fp;
+} u;
+
+char A = 'A';
+
+main ()
+{
+  int off, len, i;
+  char *p, *q;
+
+  for (off = 0; off < MAX_OFFSET; off++)
+    for (len = 1; len < MAX_COPY; len++)
+      {
+	for (i = 0; i < MAX_LENGTH; i++)
+	  u.buf[i] = 'a';
+
+	p = memset (u.buf + off, '\0', len);
+	if (p != u.buf + off)
+	  abort ();
+
+	q = u.buf;
+	for (i = 0; i < off; i++, q++)
+	  if (*q != 'a')
+	    abort ();
+
+	for (i = 0; i < len; i++, q++)
+	  if (*q != '\0')
+	    abort ();
+
+	for (i = 0; i < MAX_EXTRA; i++, q++)
+	  if (*q != 'a')
+	    abort ();
+
+	p = memset (u.buf + off, A, len);
+	if (p != u.buf + off)
+	  abort ();
+
+	q = u.buf;
+	for (i = 0; i < off; i++, q++)
+	  if (*q != 'a')
+	    abort ();
+
+	for (i = 0; i < len; i++, q++)
+	  if (*q != 'A')
+	    abort ();
+
+	for (i = 0; i < MAX_EXTRA; i++, q++)
+	  if (*q != 'a')
+	    abort ();
+
+	p = memset (u.buf + off, 'B', len);
+	if (p != u.buf + off)
+	  abort ();
+
+	q = u.buf;
+	for (i = 0; i < off; i++, q++)
+	  if (*q != 'a')
+	    abort ();
+
+	for (i = 0; i < len; i++, q++)
+	  if (*q != 'B')
+	    abort ();
+
+	for (i = 0; i < MAX_EXTRA; i++, q++)
+	  if (*q != 'a')
+	    abort ();
+      }
+
+  exit(0);
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/mmx-1.c b/gcc/testsuite/gcc.target/i386/mmx-1.c
new file mode 100644
index 00000000000..a658909853c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/mmx-1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -mmmx" } */
+
+/* Test that the intrinsics compile with optimization.  All of them are
+   defined as inline functions in mmintrin.h that reference the proper
+   builtin functions.  Defining away "static" and "__inline" results in
+   all of them being compiled as proper functions.  */
+
+#define static
+#define __inline
+
+#include <mmintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/mmx-2.c b/gcc/testsuite/gcc.target/i386/mmx-2.c
new file mode 100644
index 00000000000..0c38579f893
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/mmx-2.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O0 -mmmx" } */
+
+/* Test that the intrinsics compile without optimization.  All of them are
+   defined as inline functions in mmintrin.h that reference the proper
+   builtin functions.  Defining away "static" and "__inline" results in
+   all of them being compiled as proper functions.  */
+
+#define static
+#define __inline
+
+#include <mmintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/mmx-3.c b/gcc/testsuite/gcc.target/i386/mmx-3.c
new file mode 100644
index 00000000000..d4d61095c8a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/mmx-3.c
@@ -0,0 +1,17 @@
+/* PR target/8870 */
+/* Originator: otaylor@redhat.com */
+/* { dg-do compile { target i?86-*-* x86_64-*-*} } */
+/* { dg-options "-O1 -mmmx -march=k8" } */
+
+typedef short v4hi __attribute__ ((vector_size (8)));
+
+static inline v4hi cvtsi_v4hi (int i)
+{
+  long long tmp = i;
+  return (v4hi) tmp;
+}
+
+v4hi bar (unsigned short a)
+{
+  return cvtsi_v4hi (a);
+}
diff --git a/gcc/testsuite/gcc.target/i386/mmx-4.c b/gcc/testsuite/gcc.target/i386/mmx-4.c
new file mode 100644
index 00000000000..252ba10e6a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/mmx-4.c
@@ -0,0 +1,245 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -mmmx" } */
+#include <mmintrin.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+#ifndef NOINLINE
+#define NOINLINE __attribute__ ((noinline))
+#endif
+
+#define SHIFT (4)
+
+typedef union {
+  __m64 v;
+  unsigned char c[8];
+  unsigned short int s[4];
+  unsigned long long t;
+  unsigned int u[2];
+}vecInWord;
+
+void mmx_tests (void) NOINLINE;
+void dump64_16 (char *, char *, vecInWord);
+void dump64_32 (char *, char *, vecInWord);
+void dump64_64 (char *, char *, vecInWord);
+int check (const char *, const char *[]);
+
+char buf[8000];
+char comparison[8000];
+static int errors = 0;
+
+vecInWord a64, b64, c64, d64, e64;
+__m64 m64_16, s64, m64_32, m64_64;
+
+const char *reference_mmx[] = {
+  "_mm_srai_pi16 0012 0012 0012 0012 \n",
+  "_mm_sra_pi16 0012 0012 0012 0012 \n",
+  "_mm_srai_pi32 00123456 00123456 \n",
+  "_mm_sra_pi32 00123456 00123456 \n",
+  "_mm_srli_pi16 0012 0012 0012 0012 \n",
+  "_mm_srl_pi16 0012 0012 0012 0012 \n",
+  "_mm_srli_pi32 00123456 00123456 \n",
+  "_mm_srl_pi32 00123456 00123456 \n",
+  "_mm_srli_si64 00123456789abcde\n",
+  "_mm_srl_si64 00123456789abcde\n",
+  "_mm_slli_pi16 1230 1230 1230 1230 \n",
+  "_mm_sll_pi16 1230 1230 1230 1230 \n",
+  "_mm_slli_pi32 12345670 12345670 \n",
+  "_mm_sll_pi32 12345670 12345670 \n",
+  "_mm_slli_si64 123456789abcdef0\n",
+  "_mm_sll_si64 123456789abcdef0\n",
+  ""
+};
+
+int main()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid ();
+
+  if ((cpu_facilities & bit_MMX) == 0)
+    exit (0);
+
+  d64.u[0]  = 0x01234567;
+  d64.u[1]  = 0x01234567;
+
+  m64_32 = d64.v;
+
+  e64.t  = 0x0123456789abcdefULL;
+
+  m64_64 = e64.v;
+
+  a64.s[0] = 0x0123;
+  a64.s[1] = 0x0123;
+  a64.s[2] = 0x0123;
+  a64.s[3] = 0x0123;
+
+  m64_16 = a64.v;
+
+  b64.s[0] = SHIFT;
+  b64.s[1] = 0;
+  b64.s[2] = 0;
+  b64.s[3] = 0;
+
+  s64 = b64.v;
+
+  if (cpu_facilities & bit_MMX)
+    {
+      mmx_tests();
+      check (buf, reference_mmx);
+#ifdef DEBUG
+      printf ("mmx testing:\n");
+      printf (buf);
+      printf ("\ncomparison:\n");
+      printf (comparison);
+#endif
+      buf[0] = '\0';
+    }
+
+  if (errors != 0)
+    abort ();
+  exit (0);
+}
+
+void NOINLINE
+mmx_tests (void)
+{
+  /* psraw */
+  c64.v = _mm_srai_pi16 (m64_16, SHIFT);
+  dump64_16 (buf, "_mm_srai_pi16", c64);
+  c64.v  = _mm_sra_pi16 (m64_16, s64);
+  dump64_16 (buf, "_mm_sra_pi16", c64);
+
+  /* psrad */
+  c64.v  = _mm_srai_pi32 (m64_32, SHIFT);
+  dump64_32 (buf, "_mm_srai_pi32", c64);
+  c64.v = _mm_sra_pi32 (m64_32, s64);
+  dump64_32 (buf, "_mm_sra_pi32", c64);
+
+  /* psrlw */
+  c64.v = _mm_srli_pi16 (m64_16, SHIFT);
+  dump64_16 (buf, "_mm_srli_pi16", c64);
+  c64.v = _mm_srl_pi16 (m64_16, s64);
+  dump64_16 (buf, "_mm_srl_pi16", c64);
+
+  /* psrld */
+  c64.v = _mm_srli_pi32 (m64_32, SHIFT);
+  dump64_32 (buf, "_mm_srli_pi32", c64);
+  c64.v = _mm_srl_pi32 (m64_32, s64);
+  dump64_32 (buf, "_mm_srl_pi32", c64);
+
+  /* psrlq */
+  c64.v = _mm_srli_si64 (m64_64, SHIFT);
+  dump64_64 (buf, "_mm_srli_si64", c64);
+  c64.v = _mm_srl_si64 (m64_64, s64);
+  dump64_64 (buf, "_mm_srl_si64", c64);
+
+  /* psllw */
+  c64.v = _mm_slli_pi16 (m64_16, SHIFT);
+  dump64_16 (buf, "_mm_slli_pi16", c64);
+  c64.v = _mm_sll_pi16 (m64_16, s64);
+  dump64_16 (buf, "_mm_sll_pi16", c64);
+
+  /* pslld */
+  c64.v = _mm_slli_pi32 (m64_32, SHIFT);
+  dump64_32 (buf, "_mm_slli_pi32", c64);
+  c64.v = _mm_sll_pi32 (m64_32, s64);
+  dump64_32 (buf, "_mm_sll_pi32", c64);
+
+  /* psllq */
+  c64.v = _mm_slli_si64 (m64_64, SHIFT);
+  dump64_64 (buf, "_mm_slli_si64", c64);
+  c64.v = _mm_sll_si64 (m64_64, s64);
+  dump64_64 (buf, "_mm_sll_si64", c64);
+}
+
+void
+dump64_16 (char *buf, char *name, vecInWord x)
+{
+  int i;
+  char *p = buf + strlen (buf);
+
+  sprintf (p, "%s ", name);
+  p += strlen (p);
+
+  for (i=0; i<4; i++)
+    {
+      sprintf (p, "%4.4x ", x.s[i]);
+      p += strlen (p);
+    }
+  strcat (p, "\n");
+}
+
+void
+dump64_32 (char *buf, char *name, vecInWord x)
+{
+  int i;
+  char *p = buf + strlen (buf);
+
+  sprintf (p, "%s ", name);
+  p += strlen (p);
+
+  for (i=0; i<2; i++)
+    {
+      sprintf (p, "%8.8x ", x.u[i]);
+      p += strlen (p);
+    }
+  strcat (p, "\n");
+}
+
+void
+dump64_64 (char *buf, char *name, vecInWord x)
+{
+  char *p = buf + strlen (buf);
+
+  sprintf (p, "%s ", name);
+  p += strlen (p);
+
+  sprintf (p, "%16.16llx\n", x.t);
+}
+
+int
+check (const char *input, const char *reference[])
+{
+  int broken, i, j, len;
+  const char *p_input;
+  char *p_comparison;
+  int new_errors = 0;
+
+  p_comparison = &comparison[0];
+  p_input = input;
+
+  for (i = 0; *reference[i] != '\0'; i++)
+    {
+      broken = 0;
+      len = strlen (reference[i]);
+      for (j = 0; j < len; j++)
+	{
+	  /* Ignore the terminating NUL characters at the end of every string in 'reference[]'.  */
+	  if (!broken && *p_input != reference[i][j])
+	    {
+	      *p_comparison = '\0';
+	      strcat (p_comparison, " >>> ");
+	      p_comparison += strlen (p_comparison);
+	      new_errors++;
+	      broken = 1;
+	    }
+	  *p_comparison = *p_input;
+	  p_comparison++;
+	  p_input++;
+	}
+      if (broken)
+	{
+	  *p_comparison = '\0';
+	  strcat (p_comparison, "expected:\n");
+	  strcat (p_comparison, reference[i]);
+	  p_comparison += strlen (p_comparison);
+	}
+    }
+  *p_comparison = '\0';
+  strcat (p_comparison, new_errors ? "failure\n\n" : "O.K.\n\n") ;
+  errors += new_errors;
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/mmx-5.c b/gcc/testsuite/gcc.target/i386/mmx-5.c
new file mode 100644
index 00000000000..6021825a47d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/mmx-5.c
@@ -0,0 +1,18 @@
+/* PR rtl-optimization/17853 */
+/* Contributed by Stuart Hastings <stuart@apple.com> */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -mmmx" } */
+#include <mmintrin.h>
+#include <stdlib.h>
+
+__m64 global_mask;
+
+int main()
+{
+    __m64 zero = _mm_setzero_si64();
+    __m64 mask = _mm_cmpeq_pi8( zero, zero );
+    mask = _mm_unpacklo_pi8( mask, zero );
+    global_mask = mask;
+    return 0;
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/mmx-6.c b/gcc/testsuite/gcc.target/i386/mmx-6.c
new file mode 100644
index 00000000000..8938d2cd41d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/mmx-6.c
@@ -0,0 +1,17 @@
+/* PR middle-end/17767 */
+/* Contributed by Volker Reichelt <reichelt@igpm.rwth-aachen.de> */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O -mmmx" } */
+typedef int __m64 __attribute__ ((vector_size (8)));
+typedef short __v4hi __attribute__ ((vector_size (8)));
+
+__m64 foo ()
+{
+  int i;
+  __m64 m;
+
+  for (i = 0; i < 2; i++)
+    m = (__m64) __builtin_ia32_pcmpeqw ((__v4hi) m, (__v4hi) m);
+
+  return m;
+}
diff --git a/gcc/testsuite/gcc.target/i386/mul.c b/gcc/testsuite/gcc.target/i386/mul.c
new file mode 100644
index 00000000000..2a864af76d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/mul.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -march=k8" } */
+/* { dg-final { scan-assembler "and\[^\\n\]*magic" } } */
+
+/* Should be done as "andw $32767, magic".  */
+unsigned short magic;
+t()
+{
+	magic%=(unsigned short)0x8000U;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pentium4-not-mull.c b/gcc/testsuite/gcc.target/i386/pentium4-not-mull.c
new file mode 100644
index 00000000000..2ae7512cb48
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pentium4-not-mull.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -march=pentium4" } */
+/* { dg-final { scan-assembler-not "imull" } } */
+
+/* Should be done not using imull.  */
+int t(int x)
+{
+  return x*29;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pic-1.c b/gcc/testsuite/gcc.target/i386/pic-1.c
new file mode 100644
index 00000000000..7762230c2f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pic-1.c
@@ -0,0 +1,19 @@
+/* PR target/8340 */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-fPIC" } */
+
+int foo ()
+{
+  static int a;
+
+  __asm__ __volatile__ (  /* { dg-error "PIC register" } */
+    "xorl %%ebx, %%ebx\n"
+    "movl %%ebx, %0\n"
+    : "=m" (a)
+    :
+    : "%ebx"
+  );
+
+  return a;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr12092-1.c b/gcc/testsuite/gcc.target/i386/pr12092-1.c
new file mode 100644
index 00000000000..80c7546d9fb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr12092-1.c
@@ -0,0 +1,13 @@
+/* PR rtl-optimization/12092  */
+/* Test case reduced by Andrew Pinski <pinskia@physics.uc.edu> */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -mtune=i486 -march=pentium4 -fprefetch-loop-arrays" } */
+
+void DecodeAC(int index,int *matrix)
+{
+  int *mptr;
+
+  for(mptr=matrix+index;mptr<matrix+64;mptr++) {*mptr = 0;}
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/pr14289-1.c b/gcc/testsuite/gcc.target/i386/pr14289-1.c
new file mode 100644
index 00000000000..71317d542c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr14289-1.c
@@ -0,0 +1,12 @@
+/* PR middle-end/14289 */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O0" } */
+
+register int a[2] asm("ebx");
+
+void Nase(void)
+{
+  int i=6;
+  a[i]=5;  /* { dg-error "address of global" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/pr18614-1.c b/gcc/testsuite/gcc.target/i386/pr18614-1.c
new file mode 100644
index 00000000000..db1870cb733
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr18614-1.c
@@ -0,0 +1,15 @@
+/* PR rtl-optimization/18614 */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2" } */
+
+typedef double v2df __attribute__ ((vector_size (16)));
+
+v2df foo (void)
+{
+  v2df yd = { 1.0, 4.0 };
+  v2df xd;
+
+  xd = __builtin_ia32_cvtps2pd (__builtin_ia32_rsqrtps
+				(__builtin_ia32_cvtpd2ps (yd)));
+  return xd;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr19236-1.c b/gcc/testsuite/gcc.target/i386/pr19236-1.c
new file mode 100644
index 00000000000..73b75384384
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr19236-1.c
@@ -0,0 +1,14 @@
+/* PR target/19236 */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-ffast-math" } */
+
+extern float log1pf (float);
+extern double log1p (double);  
+
+float testf (float __x) { 
+  return log1pf(1.0); 
+}
+
+double test (double __x) { 
+  return log1p(1.0); 
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr20204.c b/gcc/testsuite/gcc.target/i386/pr20204.c
new file mode 100644
index 00000000000..7f24abc5529
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr20204.c
@@ -0,0 +1,34 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2" } */
+
+void *x (void *pdst, const void *psrc, unsigned int pn)
+{
+  register void *return_dst = pdst;
+  register unsigned char *dst = pdst;
+  register unsigned const char *src = psrc;
+  register int n __asm__ ("ebx") = pn;
+
+  if (src < dst && dst < src + n)
+    {
+      src += n;
+      dst += n;
+      while (n--)
+        *--dst = *--src;
+      return return_dst;
+    }
+
+  while (n >= 16) n--;
+
+  return return_dst;
+}
+extern void abort ();
+extern void exit (int);
+char xx[30] = "abc";
+int main (void)
+{
+  char yy[30] = "aab";
+
+  if (x (xx + 1, xx, 2) != xx + 1 || memcmp (xx, yy, sizeof (yy)) != 0)
+    abort ();
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/x86_64/pr23376.c b/gcc/testsuite/gcc.target/i386/pr23376.c
index ba60399f957..ba60399f957 100644
--- a/gcc/testsuite/gcc.target/x86_64/pr23376.c
+++ b/gcc/testsuite/gcc.target/i386/pr23376.c
diff --git a/gcc/testsuite/gcc.target/i386/pr23943.c b/gcc/testsuite/gcc.target/i386/pr23943.c
new file mode 100644
index 00000000000..f0e60bf84d7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr23943.c
@@ -0,0 +1,20 @@
+/* This used to ICE in side_effects_p, due to a problem in cse.c.
+   Origin: marcus at jet dot franken dot de.  */
+/* { dg-do compile { target x86_64-*-* } } */
+/* { dg-options "-O2 -fPIC" } */
+
+typedef long unsigned int size_t;
+
+extern size_t strlen (__const char *__s)
+    __attribute__ ((__nothrow__)) __attribute__ ((__pure__)) __attribute__ ((__nonnull__ (1)));
+
+static char savecallsin[256] = "";
+
+int read_agent_config(void)
+{
+  savecallsin[0] = '\0';
+
+  if (savecallsin[strlen(savecallsin) - 1] != '/')
+    __builtin___strncat_chk (savecallsin, "/", sizeof(savecallsin) - strlen(savecallsin) - 1, __builtin_object_size (savecallsin, 2 > 1)) ;
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr9771-1.c b/gcc/testsuite/gcc.target/i386/pr9771-1.c
new file mode 100644
index 00000000000..30e42de60b1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr9771-1.c
@@ -0,0 +1,44 @@
+/* PR rtl-optimization/9771 */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2 -fomit-frame-pointer -ffixed-ebp" } */
+
+extern void abort(void);
+extern void exit(int);
+
+register long *B asm ("ebp");
+
+long x = 10;
+long y = 20;
+
+void bar(void)
+{
+  B = &y;
+}
+
+void foo()
+{
+  long *adr = B;
+  long save = *adr;
+
+  *adr = 123;
+
+  bar();
+
+  *adr = save;
+}
+
+int main()
+{
+  B = &x;
+
+  foo();
+
+  if (x != 10 || y != 20)
+    abort();
+
+  /* We can't return, as our caller may assume %ebp is preserved!  */
+  /* We could save/restore it (like foo), but its easier to exit.  */
+  exit(0);
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/regparm.c b/gcc/testsuite/gcc.target/i386/regparm.c
new file mode 100644
index 00000000000..e3cd8b090ff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/regparm.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-W -Wall" } */
+
+/* Verify that GCC correctly detects non-matching regparm attributes.  */
+int __attribute__((regparm(3))) f (void);  /* { dg-error "previous" } */
+
+int __attribute__((regparm(2))) f (void) { /* { dg-error "conflicting" } */
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/rotate-1.c b/gcc/testsuite/gcc.target/i386/rotate-1.c
new file mode 100644
index 00000000000..0b9ae5a8c13
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/rotate-1.c
@@ -0,0 +1,16 @@
+/* Verify that rolb instruction is emitted on IA-32/x86-64.  */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+void foo (unsigned char *);
+
+int
+main (void)
+{
+  unsigned char c = 0;
+  foo (&c);
+  c = c >> 1 | c << 7;
+  return c;
+}
+
+/* { dg-final { scan-assembler "rolb" { target i?86-*-* x86_64-*-* } } } */
diff --git a/gcc/testsuite/gcc.target/i386/sibcall-5.c b/gcc/testsuite/gcc.target/i386/sibcall-5.c
new file mode 100644
index 00000000000..d94750099fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sibcall-5.c
@@ -0,0 +1,44 @@
+/* Check that indirect sibcalls understand regparm.  */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O2" } */
+
+extern void abort (void);
+
+int (*f)(int, int) __attribute__((regparm(2)));
+int (*g)(int, int, int) __attribute__((regparm(3)));
+
+int __attribute__((noinline))
+foo(void)
+{
+  return f(1, 2);
+}
+
+int __attribute__((noinline))
+bar(void)
+{
+  return g(1, 2, 3);
+}
+
+int __attribute__((regparm(2)))
+f1(int x, int y)
+{
+  return x*3 + y;
+}
+
+int __attribute__((regparm(3)))
+g1(int x, int y, int z)
+{
+  return x*9 + y*3 + z;
+}
+
+int main()
+{
+  f = f1;
+  g = g1;
+  if (foo() != 1*3 + 2)
+    abort ();
+  if (bar() != 1*9 + 2*3 + 3)
+    abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/signbit-1.c b/gcc/testsuite/gcc.target/i386/signbit-1.c
new file mode 100644
index 00000000000..adb351a2772
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/signbit-1.c
@@ -0,0 +1,29 @@
+/* PR optimization/8746 */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O1 -mtune=i586" } */
+
+extern void abort (void);
+
+unsigned char r0;
+
+int foo(int x)
+{
+  unsigned char r = x&0xf0;
+
+  if (!(r&0x80))
+  {
+    r0 = r;
+    return 0;
+  }
+  else
+    return 1;
+}
+
+int main(void)
+{
+  if (foo(0x80) != 1)
+    abort();
+
+   return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/signbit-2.c b/gcc/testsuite/gcc.target/i386/signbit-2.c
new file mode 100644
index 00000000000..8ca63965062
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/signbit-2.c
@@ -0,0 +1,29 @@
+/* PR optimization/8746 */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O1 -mtune=i586" } */
+
+extern void abort (void);
+
+unsigned short r0;
+
+int foo(int x)
+{
+  unsigned short r = x&0xf000;
+
+  if (!(r&0x8000))
+  {
+    r0 = r;
+    return 0;
+  }
+  else
+    return 1;
+}
+
+int main(void)
+{
+  if (foo(0x8000) != 1)
+    abort();
+
+   return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/signbit-3.c b/gcc/testsuite/gcc.target/i386/signbit-3.c
new file mode 100644
index 00000000000..a08ca498142
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/signbit-3.c
@@ -0,0 +1,33 @@
+/* PR optimization/8746 */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O1 -mtune=i586" } */
+
+extern void abort (void);
+
+volatile int j;
+
+void f0() { j=0; }
+void f1() { j=1; }
+
+int foo(int x)
+{
+  if ((short int)(x&0x8000) > (short int)0)
+  {
+    f0();
+    return 0;
+  }
+  else
+  {
+    f1();
+    return 1;
+  }
+}
+
+int main(void)
+{
+  if (foo(0x8000) != 1)
+    abort();
+
+   return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-10.c b/gcc/testsuite/gcc.target/i386/sse-10.c
new file mode 100644
index 00000000000..8c0f28ff8d6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-10.c
@@ -0,0 +1,34 @@
+/* PR 17930 */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O1 -msse2 -mfpmath=sse -mno-accumulate-outgoing-args -fno-omit-frame-pointer" } */
+
+#include "../../gcc.dg/i386-cpuid.h"
+
+typedef _Complex double complex_16;
+
+void NOINLINE
+test (complex_16 a[5][5])
+{
+  int i, j, k;
+  complex_16 x;
+
+  for (j = 0; j < 5; j++)
+    for (i = 0; i < 5; i++)
+      {
+        for (k = 0; k < j - 1; ++k)
+	  x = a[k][i] * ~a[k][j];
+	a[j][i] = x;
+      }
+}
+
+int main()
+{
+  static complex_16 work[5][5];
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid ();
+  if (cpu_facilities & bit_SSE2)
+    test (work); 
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-11.c b/gcc/testsuite/gcc.target/i386/sse-11.c
new file mode 100644
index 00000000000..3ec5e7bb124
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-11.c
@@ -0,0 +1,92 @@
+/* PR rtl-optimization/21239 */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2" } */
+#include <emmintrin.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+extern void abort (void);
+
+void
+foo (unsigned int x, double *y, const double *z)
+{
+  __m128d tmp;
+  while (x)
+    {
+      tmp = _mm_load_sd (z);
+      _mm_store_sd (y, tmp);
+      --x; ++z; ++y;
+    }
+}
+
+void
+bar (unsigned int x, float *y, const float *z)
+{
+  __m128 tmp;
+  unsigned int i;
+  for (i = 0; i < x; ++i)
+    {
+      tmp = (__m128) { *z, 0, 0, 0 };
+      *y = __builtin_ia32_vec_ext_v4sf (tmp, 0);
+      ++z; ++y;
+    }
+  for (i = 0; i < x; ++i)
+    {
+      tmp = (__m128) { 0, *z, 0, 0 };
+      *y = __builtin_ia32_vec_ext_v4sf (tmp, 1);
+      ++z; ++y;
+    }
+  for (i = 0; i < x; ++i)
+    {
+      tmp = (__m128) { 0, 0, *z, 0 };
+      *y = __builtin_ia32_vec_ext_v4sf (tmp, 2);
+      ++z; ++y;
+    }
+  for (i = 0; i < x; ++i)
+    {
+      tmp = (__m128) { 0, 0, 0, *z };
+      *y = __builtin_ia32_vec_ext_v4sf (tmp, 3);
+      ++z; ++y;
+    }
+}
+
+void __attribute__((noinline))
+run_tests (void)
+{
+  unsigned int i;
+  double a[16], b[16];
+  float c[16], d[16];
+  for (i = 0; i < 16; ++i)
+    {
+      a[i] = 1;
+      b[i] = 2;
+      c[i] = 3;
+      d[i] = 4;
+    }
+  foo (16, a, b);
+  bar (4, c, d);
+  for (i = 0; i < 16; ++i)
+    {
+      if (a[i] != 2)
+	abort ();
+      if (c[i] != 4)
+	abort ();
+    }
+}
+
+int
+main ()
+{
+  unsigned long cpu_facilities;
+  unsigned int i;
+  double a[19], b[19];
+
+  cpu_facilities = i386_cpuid ();
+
+  if ((cpu_facilities & (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV))
+      != (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV))
+    /* If host has no vector support, pass.  */
+    return 0;
+
+  run_tests ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c
new file mode 100644
index 00000000000..83cc91588cf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-12.c
@@ -0,0 +1,12 @@
+/* Test that {,x,e,p}mmintrin.h and mm_malloc.h are
+   usable with -std=c89 -pedantic-errors.  */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-std=c89 -pedantic-errors -msse3" } */
+
+#include <mmintrin.h>
+#include <xmmintrin.h>
+#include <emmintrin.h>
+#include <pmmintrin.h>
+#include <mm_malloc.h>
+
+int dummy;
diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c
new file mode 100644
index 00000000000..1f657e1f273
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-13.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse" } */
+
+/* Test that the intrinsics compile with optimization.  All of them are
+   defined as inline functions in mmintrin.h that reference the proper
+   builtin functions.  Defining away "static" and "__inline" results in
+   all of them being compiled as proper functions.  */
+
+#define static
+#define __inline
+
+#include <xmmintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c
new file mode 100644
index 00000000000..38e4e56acbe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-14.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O0 -msse" } */
+
+/* Test that the intrinsics compile without optimization.  All of them are
+   defined as inline functions in mmintrin.h that reference the proper
+   builtin functions.  Defining away "static" and "__inline" results in
+   all of them being compiled as proper functions.  */
+
+#define static
+#define __inline
+
+#include <xmmintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/sse-15.c b/gcc/testsuite/gcc.target/i386/sse-15.c
new file mode 100644
index 00000000000..9f31cfa92f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-15.c
@@ -0,0 +1,49 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse -msse2" } */
+
+/* Test that the intrinsics compile with optimization.  These were not
+   tested in i386-sse-[12].c because these builtins require immediate
+   operands.  */
+
+#include <xmmintrin.h>
+
+__m128
+test_shuf (void)
+{
+  __m128 a = _mm_set1_ps (1.0);
+  __m128 b = _mm_set1_ps (2.0);
+  return _mm_shuffle_ps (a, b, _MM_SHUFFLE (0,1,2,3));
+}
+
+__m64
+test_ins_ext (__m64 a)
+{
+  return _mm_insert_pi16 (a, _mm_extract_pi16 (a, 0), 3);
+}
+
+__m64
+test_shuf2 (__m64 a)
+{
+  return _mm_shuffle_pi16 (a, 0xA5);
+}
+
+void
+test_prefetch (char *p)
+{
+  _mm_prefetch (p, _MM_HINT_T0);
+  _mm_prefetch (p+4, _MM_HINT_T1);
+  _mm_prefetch (p+8, _MM_HINT_T2);
+  _mm_prefetch (p+12, _MM_HINT_NTA);
+}
+
+__m128i
+test__slli_si128 (__m128i a)
+{
+  return _mm_slli_si128 (a, 3);
+}
+
+__m128i
+test__srli_si128 (__m128i a)
+{
+  return _mm_srli_si128 (a, 3);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-16.c b/gcc/testsuite/gcc.target/i386/sse-16.c
new file mode 100644
index 00000000000..7f6d817f4d6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-16.c
@@ -0,0 +1,27 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O0 -msse" } */
+
+typedef float __vr __attribute__ ((vector_size (16)));
+
+struct vector
+{
+  union
+  {
+    __vr v;
+    float f[4];
+  };
+};
+
+void
+doit ()
+{
+  float f[4];
+  struct vector v;
+
+  f[0] = 0;
+  f[1] = 1;
+  f[2] = 2;
+  f[3] = 3;
+
+  v.v = __builtin_ia32_loadups (f);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-5.c b/gcc/testsuite/gcc.target/i386/sse-5.c
new file mode 100644
index 00000000000..ced075ae97d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-5.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-Winline -O2 -march=i386" } */
+
+typedef double v2df __attribute__ ((vector_size (16)));
+v2df p;
+q(v2df t)
+{			 /* { dg-warning "SSE" "" } */
+	p=t;
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-6.c b/gcc/testsuite/gcc.target/i386/sse-6.c
new file mode 100644
index 00000000000..26932968aad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-6.c
@@ -0,0 +1,316 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2" } */
+#include <xmmintrin.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+#ifndef NOINLINE
+#define NOINLINE __attribute__ ((noinline))
+#endif
+
+#define SHIFT (4)
+
+typedef union {
+  __m128i v;
+  unsigned int s[4];
+  unsigned short int t[8];
+  unsigned long long u[2];
+  unsigned char c[16];
+}vecInLong;
+
+void sse2_tests (void) NOINLINE;
+void dump128_16 (char *, char *, vecInLong);
+void dump128_32 (char *, char *, vecInLong);
+void dump128_64 (char *, char *, vecInLong);
+void dump128_128 (char *, char *, vecInLong);
+int check (const char *, const char *[]);
+
+char buf[8000];
+char comparison[8000];
+static int errors = 0;
+
+vecInLong a128, b128, c128, d128, e128, f128;
+__m128i m128_16, m128_32, s128, m128_64, m128_128;
+__m64 m64_16, s64, m64_32, m64_64;
+
+const char *reference_sse2[] = {
+  "_mm_srai_epi16 0012 0012 0012 0012 0012 0012 0012 0012 \n",
+  "_mm_sra_epi16 0012 0012 0012 0012 0012 0012 0012 0012 \n",
+  "_mm_srai_epi32 00123456 00123456 00123456 00123456 \n",
+  "_mm_sra_epi32 00123456 00123456 00123456 00123456 \n",
+  "_mm_srli_epi16 0012 0012 0012 0012 0012 0012 0012 0012 \n",
+  "_mm_srl_epi16 0012 0012 0012 0012 0012 0012 0012 0012 \n",
+  "_mm_srli_epi32 00123456 00123456 00123456 00123456 \n",
+  "_mm_srl_epi32 00123456 00123456 00123456 00123456 \n",
+  "_mm_srli_epi64 00123456789abcde 00123456789abcde \n",
+  "_mm_srl_epi64 00123456789abcde 00123456789abcde \n",
+  "_mm_srli_si128 (byte shift)  00000000ffeeddccbbaa998877665544\n",
+  "_mm_slli_epi16 1230 1230 1230 1230 1230 1230 1230 1230 \n",
+  "_mm_sll_epi16 1230 1230 1230 1230 1230 1230 1230 1230 \n",
+  "_mm_slli_epi32 12345670 12345670 12345670 12345670 \n",
+  "_mm_sll_epi32 12345670 12345670 12345670 12345670 \n",
+  "_mm_slli_epi64 123456789abcdef0 123456789abcdef0 \n",
+  "_mm_sll_epi64 123456789abcdef0 123456789abcdef0 \n",
+  "_mm_sll_si128 (byte shift) bbaa9988776655443322110000000000\n",
+  "_mm_shuffle_epi32 ffeeddcc bbaa9988 77665544 33221100 \n",
+  "_mm_shuffelo_epi16 7766 5544 3322 1100 9988 bbaa ddcc ffee \n",
+  "_mm_shuffehi_epi16 1100 3322 5544 7766 ffee ddcc bbaa 9988 \n",
+  ""
+};
+
+int main()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid ();
+
+  if ((cpu_facilities & (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV))
+      != (bit_MMX | bit_SSE | bit_SSE2 | bit_CMOV))
+    /* If host has no vector support, pass.  */
+    exit (0);
+
+  a128.s[0] = 0x01234567;
+  a128.s[1] = 0x01234567;
+  a128.s[2] = 0x01234567;
+  a128.s[3] = 0x01234567;
+
+  m128_32 = a128.v;
+
+  d128.u[0] = 0x0123456789abcdefULL;
+  d128.u[1] = 0x0123456789abcdefULL;
+
+  m128_64 = d128.v;
+
+  /* This is the 128-bit constant 0x00112233445566778899aabbccddeeff,
+     expressed as two little-endian 64-bit words.  */
+  e128.u[0] = 0x7766554433221100ULL;
+  e128.u[1] = 0xffeeddccbbaa9988ULL;
+
+  f128.t[0] = 0x0123;
+  f128.t[1] = 0x0123;
+  f128.t[2] = 0x0123;
+  f128.t[3] = 0x0123;
+  f128.t[4] = 0x0123;
+  f128.t[5] = 0x0123;
+  f128.t[6] = 0x0123;
+  f128.t[7] = 0x0123;
+
+  m128_16 = f128.v;
+
+  m128_128 = e128.v;
+
+  b128.s[0] = SHIFT;
+  b128.s[1] = 0;
+  b128.s[2] = 0;
+  b128.s[3] = 0;
+
+  s128 = b128.v;
+
+  if (cpu_facilities & bit_SSE2)
+    {
+      sse2_tests();
+      check (buf, reference_sse2);
+#ifdef DEBUG
+      printf ("sse2 testing:\n");
+      printf (buf);
+      printf ("\ncomparison:\n");
+      printf (comparison);
+#endif
+      buf[0] = '\0';
+    }
+
+  if (errors != 0)
+    abort ();
+  exit (0);
+}
+
+void NOINLINE
+sse2_tests (void)
+{
+  /* psraw */
+  c128.v = _mm_srai_epi16 (m128_16, SHIFT);
+  dump128_16 (buf, "_mm_srai_epi16", c128);
+  c128.v = _mm_sra_epi16 (m128_16, s128);
+  dump128_16 (buf, "_mm_sra_epi16", c128);
+
+  /* psrad */
+  c128.v = _mm_srai_epi32 (m128_32, SHIFT);
+  dump128_32 (buf, "_mm_srai_epi32", c128);
+  c128.v = _mm_sra_epi32 (m128_32, s128);
+  dump128_32 (buf, "_mm_sra_epi32", c128);
+
+  /* psrlw */
+  c128.v = _mm_srli_epi16 (m128_16, SHIFT);
+  dump128_16 (buf, "_mm_srli_epi16", c128);
+  c128.v = _mm_srl_epi16 (m128_16, s128);
+  dump128_16 (buf, "_mm_srl_epi16", c128);
+
+  /* psrld */
+  c128.v = _mm_srli_epi32 (m128_32, SHIFT);
+  dump128_32 (buf, "_mm_srli_epi32", c128);
+  c128.v = _mm_srl_epi32 (m128_32, s128);
+  dump128_32 (buf, "_mm_srl_epi32", c128);
+
+  /* psrlq */
+  c128.v = _mm_srli_epi64 (m128_64, SHIFT);
+  dump128_64 (buf, "_mm_srli_epi64", c128);
+  c128.v = _mm_srl_epi64 (m128_64, s128);
+  dump128_64 (buf, "_mm_srl_epi64", c128);
+
+  /* psrldq */
+  c128.v = _mm_srli_si128 (m128_128, SHIFT);
+  dump128_128 (buf, "_mm_srli_si128 (byte shift) ", c128);
+
+  /* psllw */
+  c128.v = _mm_slli_epi16 (m128_16, SHIFT);
+  dump128_16 (buf, "_mm_slli_epi16", c128);
+  c128.v = _mm_sll_epi16 (m128_16, s128);
+  dump128_16 (buf, "_mm_sll_epi16", c128);
+
+  /* pslld */
+  c128.v = _mm_slli_epi32 (m128_32, SHIFT);
+  dump128_32 (buf, "_mm_slli_epi32", c128);
+  c128.v = _mm_sll_epi32 (m128_32, s128);
+  dump128_32 (buf, "_mm_sll_epi32", c128);
+
+  /* psllq */
+  c128.v = _mm_slli_epi64 (m128_64, SHIFT);
+  dump128_64 (buf, "_mm_slli_epi64", c128);
+  c128.v = _mm_sll_epi64 (m128_64, s128);
+  dump128_64 (buf, "_mm_sll_epi64", c128);
+
+  /* pslldq */
+  c128.v = _mm_slli_si128 (m128_128, SHIFT);
+  dump128_128 (buf, "_mm_sll_si128 (byte shift)", c128);
+
+  /* Shuffle constant 0x1b == 0b_00_01_10_11, e.g. swap words: ABCD => DCBA.  */
+
+  /* pshufd */
+  c128.v = _mm_shuffle_epi32 (m128_128, 0x1b);
+  dump128_32 (buf, "_mm_shuffle_epi32", c128);
+
+  /* pshuflw */
+  c128.v = _mm_shufflelo_epi16 (m128_128, 0x1b);
+  dump128_16 (buf, "_mm_shuffelo_epi16", c128);
+
+  /* pshufhw */
+  c128.v = _mm_shufflehi_epi16 (m128_128, 0x1b);
+  dump128_16 (buf, "_mm_shuffehi_epi16", c128);
+}
+
+void
+dump128_16 (char *buf, char *name, vecInLong x)
+{
+  int i;
+  char *p = buf + strlen (buf);
+
+  sprintf (p, "%s ", name);
+  p += strlen (p);
+
+  for (i=0; i<8; i++)
+    {
+      sprintf (p, "%4.4x ", x.t[i]);
+      p += strlen (p);
+    }
+  strcat (p, "\n");
+}
+
+void
+dump128_32 (char *buf, char *name, vecInLong x)
+{
+  int i;
+  char *p = buf + strlen (buf);
+
+  sprintf (p, "%s ", name);
+  p += strlen (p);
+
+  for (i=0; i<4; i++)
+    {
+      sprintf (p, "%8.8x ", x.s[i]);
+      p += strlen (p);
+    }
+  strcat (p, "\n");
+}
+
+void
+dump128_64 (char *buf, char *name, vecInLong x)
+{
+  int i;
+  char *p = buf + strlen (buf);
+
+  sprintf (p, "%s ", name);
+  p += strlen (p);
+
+  for (i=0; i<2; i++)
+    {
+      sprintf (p, "%16.16llx ", x.u[i]);
+      p += strlen (p);
+    }
+  strcat (p, "\n");
+}
+
+void
+dump128_128 (char *buf, char *name, vecInLong x)
+{
+  int i;
+  char *p = buf + strlen (buf);
+
+  sprintf (p, "%s ", name);
+  p += strlen (p);
+
+  for (i=15; i>=0; i--)
+    {
+      /* This is cheating; we don't have a 128-bit int format code.
+	 Running the loop backwards to compensate for the
+	 little-endian layout. */
+      sprintf (p, "%2.2x", x.c[i]);
+      p += strlen (p);
+    }
+  strcat (p, "\n");
+}
+
+int
+check (const char *input, const char *reference[])
+{
+  int broken, i, j, len;
+  const char *p_input;
+  char *p_comparison;
+  int new_errors = 0;
+
+  p_comparison = &comparison[0];
+  p_input = input;
+
+  for (i = 0; *reference[i] != '\0'; i++)
+    {
+      broken = 0;
+      len = strlen (reference[i]);
+      for (j = 0; j < len; j++)
+	{
+	  /* Ignore the terminating NUL characters at the end of every string in 'reference[]'.  */
+	  if (!broken && *p_input != reference[i][j])
+	    {
+	      *p_comparison = '\0';
+	      strcat (p_comparison, " >>> ");
+	      p_comparison += strlen (p_comparison);
+	      new_errors++;
+	      broken = 1;
+	    }
+	  *p_comparison = *p_input;
+	  p_comparison++;
+	  p_input++;
+	}
+      if (broken)
+	{
+	  *p_comparison = '\0';
+	  strcat (p_comparison, "expected:\n");
+	  strcat (p_comparison, reference[i]);
+	  p_comparison += strlen (p_comparison);
+	}
+    }
+  *p_comparison = '\0';
+  strcat (p_comparison, new_errors ? "failure\n\n" : "O.K.\n\n") ;
+  errors += new_errors;
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-7.c b/gcc/testsuite/gcc.target/i386/sse-7.c
new file mode 100644
index 00000000000..3d4d1ec45fa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-7.c
@@ -0,0 +1,139 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse" } */
+#include <xmmintrin.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+#ifndef NOINLINE
+#define NOINLINE __attribute__ ((noinline))
+#endif
+
+#define SHIFT (4)
+
+typedef union {
+  __m64 v;
+  unsigned char c[8];
+  unsigned short int s[4];
+  unsigned long long t;
+  unsigned int u[2];
+}vecInWord;
+
+void sse_tests (void) NOINLINE;
+void dump64_16 (char *, char *, vecInWord);
+int check (const char *, const char *[]);
+
+char buf[8000];
+char comparison[8000];
+static int errors = 0;
+
+vecInWord c64, e64;
+__m64 m64_64;
+
+const char *reference_sse[] = {
+  "_mm_shuffle_pi16 0123 4567 89ab cdef \n",
+  ""
+};
+
+int main()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid ();
+
+  if ((cpu_facilities & (bit_MMX | bit_SSE | bit_CMOV))
+      != (bit_MMX | bit_SSE | bit_CMOV))
+    /* If host has no vector support, pass.  */
+    exit (0);
+
+  e64.t  = 0x0123456789abcdefULL;
+
+  m64_64 = e64.v;
+
+  if (cpu_facilities & bit_SSE)
+    {
+      sse_tests();
+      check (buf, reference_sse);
+#ifdef DEBUG
+      printf ("sse testing:\n");
+      printf (buf);
+      printf ("\ncomparison:\n");
+      printf (comparison);
+#endif
+      buf[0] = '\0';
+    }
+
+  if (errors != 0)
+    abort ();
+  exit (0);
+}
+
+void NOINLINE
+sse_tests (void)
+{
+  /* pshufw */
+  c64.v = _mm_shuffle_pi16 (m64_64, 0x1b);
+  dump64_16 (buf, "_mm_shuffle_pi16", c64);
+}
+
+void
+dump64_16 (char *buf, char *name, vecInWord x)
+{
+  int i;
+  char *p = buf + strlen (buf);
+
+  sprintf (p, "%s ", name);
+  p += strlen (p);
+
+  for (i=0; i<4; i++)
+    {
+      sprintf (p, "%4.4x ", x.s[i]);
+      p += strlen (p);
+    }
+  strcat (p, "\n");
+}
+
+int
+check (const char *input, const char *reference[])
+{
+  int broken, i, j, len;
+  const char *p_input;
+  char *p_comparison;
+  int new_errors = 0;
+
+  p_comparison = &comparison[0];
+  p_input = input;
+
+  for (i = 0; *reference[i] != '\0'; i++)
+    {
+      broken = 0;
+      len = strlen (reference[i]);
+      for (j = 0; j < len; j++)
+	{
+	  /* Ignore the terminating NUL characters at the end of every string in 'reference[]'.  */
+	  if (!broken && *p_input != reference[i][j])
+	    {
+	      *p_comparison = '\0';
+	      strcat (p_comparison, " >>> ");
+	      p_comparison += strlen (p_comparison);
+	      new_errors++;
+	      broken = 1;
+	    }
+	  *p_comparison = *p_input;
+	  p_comparison++;
+	  p_input++;
+	}
+      if (broken)
+	{
+	  *p_comparison = '\0';
+	  strcat (p_comparison, "expected:\n");
+	  strcat (p_comparison, reference[i]);
+	  p_comparison += strlen (p_comparison);
+	}
+    }
+  *p_comparison = '\0';
+  strcat (p_comparison, new_errors ? "failure\n\n" : "O.K.\n\n") ;
+  errors += new_errors;
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-8.c b/gcc/testsuite/gcc.target/i386/sse-8.c
new file mode 100644
index 00000000000..ec3acc16906
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-8.c
@@ -0,0 +1,15 @@
+/* PR target/14343 */
+/* Origin: <Pawe Sikora <pluto@ds14.agh.edu.pl> */
+
+/* The xstormy16 doesn't support V2DI.  */
+/* { dg-do compile { xfail xstormy16-*-* } } */
+/* { dg-options "" } */
+/* { dg-options "-march=pentium3" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+
+int main() 
+{ 
+  typedef long long int v __attribute__ ((vector_size (16))); 
+  v a, b; 
+  a = b; 
+  return 0; 
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-9.c b/gcc/testsuite/gcc.target/i386/sse-9.c
new file mode 100644
index 00000000000..1fe7adac542
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-9.c
@@ -0,0 +1,36 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse" } */
+#include <xmmintrin.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <string.h>
+
+int
+main()
+{
+  int alignment, n;
+  void *ptr;
+  int errors = 0;
+  const char test [] = "This is a test.";
+
+  for (alignment = 1; alignment <= (1 << 20); alignment += alignment)
+    {
+      ptr = _mm_malloc (alignment, alignment);
+      if (((ptrdiff_t) ptr) & (alignment - 1))
+	abort ();
+      if (ptr)
+	{
+	  n = alignment > sizeof test ? sizeof test : alignment;
+	  memcpy (ptr, test, n);
+	  if (memcmp (ptr, test, n) != 0)
+	    errors++;
+	  _mm_free (ptr);
+	}
+      else
+	errors++;
+    }
+   
+  if (errors != 0)
+    abort ();
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-vect-types.c b/gcc/testsuite/gcc.target/i386/sse-vect-types.c
new file mode 100644
index 00000000000..10a544d627b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-vect-types.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O0 -msse2" } */
+
+/* Test the intrinsics without optimization.  All of them are
+   defined as inline functions in mmintrin.h that reference the proper
+   builtin functions.  Defining away "static" and "__inline" results in
+   all of them being compiled as proper functions.  */
+
+#define static
+#define __inline
+
+#include <xmmintrin.h>
+
+__m128d foo1(__m128d z, __m128d  a, int N) { 
+  int i;
+  for (i=0; i<N; i++) {
+    a = _mm_add_ps(z, a); /* { dg-error "incompatible type" } */
+  }
+  return a;
+}
diff --git a/gcc/testsuite/gcc.target/i386/ssefn-1.c b/gcc/testsuite/gcc.target/i386/ssefn-1.c
new file mode 100644
index 00000000000..548c580571f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ssefn-1.c
@@ -0,0 +1,31 @@
+/* Test argument passing with SSE and local functions
+   Written by Paolo Bonzini, 25 January 2005 */
+
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-final { scan-assembler "movss" } } */
+/* { dg-final { scan-assembler "mulss" } } */
+/* { dg-final { scan-assembler-not "movsd" } } */
+/* { dg-final { scan-assembler-not "mulsd" } } */
+/* { dg-options "-O2 -msse -mfpmath=sse -fno-inline" } */
+
+static float xs (void)
+{
+  return 3.14159265;
+}
+
+float ys (float a)
+{
+  return xs () * a;
+}
+
+static double xd (void)
+{
+  return 3.1415926535;
+}
+
+double yd (double a)
+{
+  return xd () * a;
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/ssefn-2.c b/gcc/testsuite/gcc.target/i386/ssefn-2.c
new file mode 100644
index 00000000000..ded8b724f94
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ssefn-2.c
@@ -0,0 +1,31 @@
+/* Test argument passing with SSE2 and local functions
+   Written by Paolo Bonzini, 25 January 2005 */
+
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-final { scan-assembler "movss" } } */
+/* { dg-final { scan-assembler "mulss" } } */
+/* { dg-final { scan-assembler "movsd" } } */
+/* { dg-final { scan-assembler "mulsd" } } */
+/* { dg-options "-O2 -msse2 -mfpmath=sse -fno-inline" } */
+
+static float xs (void)
+{
+  return 3.14159265;
+}
+
+float ys (float a)
+{
+  return xs () * a;
+}
+
+static double xd (void)
+{
+  return 3.1415926535;
+}
+
+double yd (double a)
+{
+  return xd () * a;
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/ssefn-3.c b/gcc/testsuite/gcc.target/i386/ssefn-3.c
new file mode 100644
index 00000000000..925365a8007
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ssefn-3.c
@@ -0,0 +1,43 @@
+/* Execution test for argument passing with SSE and local functions
+   Written by Paolo Bonzini, 25 January 2005 */
+
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse -mfpmath=sse" } */
+#include <assert.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+static float xs (void)
+{
+  return 3.14159265;
+}
+
+float ys (float a)
+{
+  return xs () * a;
+}
+
+static double xd (void)
+{
+  return 3.1415926535;
+}
+
+double yd (double a)
+{
+  return xd () * a;
+}
+
+int main()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid ();
+
+  if (cpu_facilities & bit_SSE)
+    {
+      assert (ys (1) == xs ());
+      assert (ys (2) == xs () * 2);
+      assert (yd (1) == xd ());
+      assert (yd (2) == xd () * 2);
+    }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/ssefn-4.c b/gcc/testsuite/gcc.target/i386/ssefn-4.c
new file mode 100644
index 00000000000..5547129e8c5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ssefn-4.c
@@ -0,0 +1,43 @@
+/* Execution test for argument passing with SSE2 and local functions
+   Written by Paolo Bonzini, 25 January 2005 */
+
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2 -mfpmath=sse" } */
+#include <assert.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+static float xs (void)
+{
+  return 3.14159265;
+}
+
+float ys (float a)
+{
+  return xs () * a;
+}
+
+static double xd (void)
+{
+  return 3.1415926535;
+}
+
+double yd (double a)
+{
+  return xd () * a;
+}
+
+int main()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid ();
+
+  if (cpu_facilities & bit_SSE2)
+    {
+      assert (ys (1) == xs ());
+      assert (ys (2) == xs () * 2);
+      assert (yd (1) == xd ());
+      assert (yd (2) == xd () * 2);
+    }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/ssefp-1.c b/gcc/testsuite/gcc.target/i386/ssefp-1.c
new file mode 100644
index 00000000000..d11a72f1118
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ssefp-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2 -march=k8 -mfpmath=sse" } */
+/* { dg-final { scan-assembler "maxsd" } } */
+/* { dg-final { scan-assembler "minsd" } } */
+double x;
+t()
+{
+  x=x>5?x:5;
+}
+
+double x;
+q()
+{
+  x=x<5?x:5;
+}
diff --git a/gcc/testsuite/gcc.target/i386/ssefp-2.c b/gcc/testsuite/gcc.target/i386/ssefp-2.c
new file mode 100644
index 00000000000..68790241678
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ssefp-2.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2 -march=k8 -mfpmath=sse" } */
+/* { dg-final { scan-assembler "maxsd" } } */
+/* { dg-final { scan-assembler "minsd" } } */
+double x;
+q()
+{
+  x=x<5?5:x;
+}
+
+double x;
+q1()
+{
+  x=x>5?5:x;
+}
diff --git a/gcc/testsuite/gcc.target/i386/ssetype-1.c b/gcc/testsuite/gcc.target/i386/ssetype-1.c
new file mode 100644
index 00000000000..50d0fcaa58a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ssetype-1.c
@@ -0,0 +1,35 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
+/* { dg-final { scan-assembler "andpd\[^\\n\]*magic" } } */
+/* { dg-final { scan-assembler "andnpd\[^\\n\]*magic" } } */
+/* { dg-final { scan-assembler "xorpd\[^\\n\]*magic" } } */
+/* { dg-final { scan-assembler "orpd\[^\\n\]*magic" } } */
+/* { dg-final { scan-assembler-not "movdqa" } } */
+/* { dg-final { scan-assembler "movapd\[^\\n\]*magic" } } */
+
+/* Verify that we generate proper instruction with memory operand.  */
+
+#include <xmmintrin.h>
+
+__m128d magic_a, magic_b;
+
+__m128d
+t1(void)
+{
+return _mm_and_pd (magic_a,magic_b);
+}
+__m128d
+t2(void)
+{
+return _mm_andnot_pd (magic_a,magic_b);
+}
+__m128d
+t3(void)
+{
+return _mm_or_pd (magic_a,magic_b);
+}
+__m128d
+t4(void)
+{
+return _mm_xor_pd (magic_a,magic_b);
+}
diff --git a/gcc/testsuite/gcc.target/i386/ssetype-2.c b/gcc/testsuite/gcc.target/i386/ssetype-2.c
new file mode 100644
index 00000000000..eb57dac7813
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ssetype-2.c
@@ -0,0 +1,39 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
+/* { dg-final { scan-assembler "andpd" } } */
+/* { dg-final { scan-assembler "andnpd" } } */
+/* { dg-final { scan-assembler "xorpd" } } */
+/* { dg-final { scan-assembler "orpd" } } */
+/* { dg-final { scan-assembler-not "movdqa" } } */
+
+/* Verify that we generate proper instruction without memory operand.  */
+
+#include <xmmintrin.h>
+__m128d
+t1(__m128d a, __m128d b)
+{
+a=_mm_sqrt_pd(a);
+b=_mm_sqrt_pd(b);
+return _mm_and_pd (a,b);
+}
+__m128d
+t2(__m128d a, __m128d b)
+{
+a=_mm_sqrt_pd(a);
+b=_mm_sqrt_pd(b);
+return _mm_andnot_pd (a,b);
+}
+__m128d
+t3(__m128d a, __m128d b)
+{
+a=_mm_sqrt_pd(a);
+b=_mm_sqrt_pd(b);
+return _mm_or_pd (a,b);
+}
+__m128d
+t4(__m128d a, __m128d b)
+{
+a=_mm_sqrt_pd(a);
+b=_mm_sqrt_pd(b);
+return _mm_xor_pd (a,b);
+}
diff --git a/gcc/testsuite/gcc.target/i386/ssetype-3.c b/gcc/testsuite/gcc.target/i386/ssetype-3.c
new file mode 100644
index 00000000000..3b2461be32c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ssetype-3.c
@@ -0,0 +1,34 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
+/* { dg-final { scan-assembler "andps\[^\\n\]*magic" } } */
+/* { dg-final { scan-assembler "andnps\[^\\n\]*magic" } } */
+/* { dg-final { scan-assembler "xorps\[^\\n\]*magic" } } */
+/* { dg-final { scan-assembler "orps\[^\\n\]*magic" } } */
+/* { dg-final { scan-assembler-not "movdqa" } } */
+/* { dg-final { scan-assembler "movaps\[^\\n\]*magic" } } */
+
+/* Verify that we generate proper instruction with memory operand.  */
+
+#include <xmmintrin.h>
+
+__m128 magic_a, magic_b;
+__m128
+t1(void)
+{
+return _mm_and_ps (magic_a,magic_b);
+}
+__m128
+t2(void)
+{
+return _mm_andnot_ps (magic_a,magic_b);
+}
+__m128
+t3(void)
+{
+return _mm_or_ps (magic_a,magic_b);
+}
+__m128
+t4(void)
+{
+return _mm_xor_ps (magic_a,magic_b);
+}
diff --git a/gcc/testsuite/gcc.target/i386/ssetype-4.c b/gcc/testsuite/gcc.target/i386/ssetype-4.c
new file mode 100644
index 00000000000..e9d989ba974
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ssetype-4.c
@@ -0,0 +1,38 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
+/* { dg-final { scan-assembler "andps" } } */
+/* { dg-final { scan-assembler "andnps" } } */
+/* { dg-final { scan-assembler "xorps" } } */
+/* { dg-final { scan-assembler "orps" } } */
+
+/* Verify that we generate proper instruction without memory operand.  */
+
+#include <xmmintrin.h>
+__m128
+t1(__m128 a, __m128 b)
+{
+a=_mm_sqrt_ps(a);
+b=_mm_sqrt_ps(b);
+return _mm_and_ps (a,b);
+}
+__m128
+t2(__m128 a, __m128 b)
+{
+a=_mm_sqrt_ps(a);
+b=_mm_sqrt_ps(b);
+return _mm_andnot_ps (a,b);
+}
+__m128
+t3(__m128 a, __m128 b)
+{
+a=_mm_sqrt_ps(a);
+b=_mm_sqrt_ps(b);
+return _mm_or_ps (a,b);
+}
+__m128
+t4(__m128 a, __m128 b)
+{
+a=_mm_sqrt_ps(a);
+b=_mm_sqrt_ps(b);
+return _mm_xor_ps (a,b);
+}
diff --git a/gcc/testsuite/gcc.target/i386/ssetype-5.c b/gcc/testsuite/gcc.target/i386/ssetype-5.c
new file mode 100644
index 00000000000..866c4d3d577
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/ssetype-5.c
@@ -0,0 +1,34 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
+/* { dg-final { scan-assembler "pand\[^\\n\]*magic" } } */
+/* { dg-final { scan-assembler "pandn\[^\\n\]*magic" } } */
+/* { dg-final { scan-assembler "pxor\[^\\n\]*magic" } } */
+/* { dg-final { scan-assembler "por\[^\\n\]*magic" } } */
+/* { dg-final { scan-assembler "movdqa" } } */
+/* { dg-final { scan-assembler-not "movaps\[^\\n\]*magic" } } */
+
+/* Verify that we generate proper instruction with memory operand.  */
+
+#include <xmmintrin.h>
+__m128i magic_a, magic_b;
+__m128i
+t1(void)
+{
+return _mm_and_si128 (magic_a,magic_b);
+}
+__m128i
+t2(void)
+{
+return _mm_andnot_si128 (magic_a,magic_b);
+}
+__m128i
+t3(void)
+{
+return _mm_or_si128 (magic_a,magic_b);
+}
+__m128i
+t4(void)
+{
+return _mm_xor_si128 (magic_a,magic_b);
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/unroll-1.c b/gcc/testsuite/gcc.target/i386/unroll-1.c
new file mode 100644
index 00000000000..e681474725a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/unroll-1.c
@@ -0,0 +1,18 @@
+/* PR optimization/8599 */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-mtune=k6 -O2 -funroll-loops" } */
+
+extern void exit (int);
+
+void *array[4];
+
+int main ()
+{
+  int i;
+ 
+  for (i = 0; i < 4; i++)
+    array[i] = 0;
+
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/volatile-1.c b/gcc/testsuite/gcc.target/i386/volatile-1.c
new file mode 100644
index 00000000000..8a37df48b20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/volatile-1.c
@@ -0,0 +1,14 @@
+/* PR optimization/11381 */
+/* Originator: <tobias@ringstrom.mine.nu> */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O" } */
+
+/* Verify that the comparison is not optimized away. */
+
+void foo(volatile unsigned int *vaddr)
+{
+  while (*vaddr != *vaddr)
+    ;
+}
+
+/* { dg-final { scan-assembler "cmp" } } */
diff --git a/gcc/testsuite/gcc.target/i386/xorps.c b/gcc/testsuite/gcc.target/i386/xorps.c
new file mode 100644
index 00000000000..0cf7532a1b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/xorps.c
@@ -0,0 +1,31 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-Os -msse2" } */
+
+typedef float __m128 __attribute__ ((vector_size (16)));
+
+static __inline __m128
+_mm_mul_ps (__m128 __A, __m128 __B)
+{
+  return __builtin_ia32_mulps (__A, __B);
+}
+
+static __inline __m128
+_mm_sub_ps (__m128 __A, __m128 __B)
+{
+  return  __builtin_ia32_subps (__A, __B);
+}
+
+__m128 POW_FUNC (__m128 x, __m128 y)
+{
+    __m128 xmm0 = x, xmm1 = y, xmm2;
+
+    xmm0 = __builtin_ia32_xorps (xmm1, xmm1);
+
+    xmm0 = _mm_mul_ps (xmm0, xmm1);
+
+    xmm0 = _mm_sub_ps (xmm0, xmm1);
+
+    xmm0 = _mm_mul_ps (xmm0, xmm1);
+
+    return xmm0;
+}