2004-11-22 James A. Morrison <phython@gcc.gnu.org

        * config/sparc/sparc.c: Include insn-codes.h and langhooks.h.
        (sparc_init_builtins): New function.
        (sparc_init_vis_builtins): Create builtin functions for VIS
        instructions.
        (sparc_expand_builtin): Expand builtin functions for VIS instructions.
        (TARGET_INIT_BUILTINS): Define to sparc_init_builtins.
        (TARGET_EXPAND_BUILTIN): Define to sparc_expand_builtin.
        (def_builtin): New macro for creating builtin functions.
        (P): New mode macro for pointer types.
        (UNSPEC_FPACK16, UNSPEC_FPACK32, UNSPEC_FPACKFIX, UNSPEC_FEXPAND,
        UNSPEC_FPMERGE, UNSPEC_MUL16AL, UNSPEC_MUL8UL, UNSPEC_MULDUL,
        UNSPEC_ALIGNDATA, UNSPEC_ALIGNADDR, UNSPEC_PDIST): New constants.
        (fpack16_vis, fpackfix_vis, fpack32_vis, fexpand_vis, fpmerge_vis,
        fmul8x16_vis, fmul8x16au_vis, fmul8x16al_vis, fmul8sux16_vis,
        fmul8ulx16_vis, fmuld8sux16_vis, fmuld8ulx16_vis, pdist_vis,
        faligndata<V64:mode>_vis, alignaddr<P:mode>_vis): New patterns.

testsuite:
        * gcc.target/sparc/align.c, gcc.target/sparc/combined-2.c,
        gcc.target/sparc/fpack16.c, gcc.target/sparc/fpack32.c,
        gcc.target/sparc/fpackfix.c, gcc.target/fexpand.c,
        gcc.target/sparc/fpmerge.c, gcc.target/sparc/fpmul.c,
        gcc.target/sparc/pdist.c: New tests.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@91057 138bc75d-0d04-0410-961f-82ee72b054a4

9 files changed, 168 insertions, 0 deletions

diff --git a/gcc/testsuite/gcc.target/sparc/align.c b/gcc/testsuite/gcc.target/sparc/align.c
new file mode 100644
index 00000000000..9a9827237e1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/align.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ultrasparc -mvis" } */
+#include <stdint.h>
+typedef int vec32 __attribute__((vector_size(8)));
+typedef short vec16 __attribute__((vector_size(8)));
+typedef char vec8 __attribute__((vector_size(8)));
+
+vec16 foo1 (vec16 a, vec16 b) {
+  return __builtin_vis_faligndatav4hi (a, b);
+}
+
+vec32 foo2 (vec32 a, vec32 b) {
+  return __builtin_vis_faligndatav2si (a, b);
+}
+
+vec8 foo3 (vec8 a, vec8 b) {
+  return __builtin_vis_faligndatav8qi (a, b);
+}
+
+int64_t foo4 (int64_t a, int64_t b) {
+  return __builtin_vis_faligndatadi (a, b);
+}
+
+unsigned char * foo5 (unsigned char *data) {
+  return __builtin_vis_alignaddr (data, 0);
+}
+
+/* { dg-final { scan-assembler-times "faligndata" 4 } } */
+/* { dg-final { scan-assembler "alignaddr.*%g0" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/combined-2.c b/gcc/testsuite/gcc.target/sparc/combined-2.c
new file mode 100644
index 00000000000..016e4fa6a6c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/combined-2.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=ultrasparc -mvis" } */
+typedef char pixel __attribute__((vector_size(4)));
+typedef char vec8 __attribute__((vector_size(8)));
+typedef short vec16 __attribute__((vector_size(8)));
+
+vec16 foo (pixel a, pixel b) {
+  vec8 c = __builtin_vis_fpmerge (a, b);
+  vec16 d = { -1, -1, -1, -1 };
+  vec16 e = __builtin_vis_fmul8x16 (a, d);
+
+  return e;
+}
+
+vec16 bar (pixel a) {
+  vec16 d = { 0, 0, 0, 0 };
+  vec16 e = __builtin_vis_fmul8x16 (a, d);  /* Mulitplication by 0 = 0.  */
+
+  return e;
+}
+
+/* { dg-final { scan-assembler "fmul8x16" } } */
+/* { dg-final { scan-assembler "fzero" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/fexpand.c b/gcc/testsuite/gcc.target/sparc/fexpand.c
new file mode 100644
index 00000000000..2483f4f7235
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/fexpand.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ultrasparc -mvis" } */
+typedef short vec16 __attribute__((vector_size(8)));
+typedef char vec8 __attribute__((vector_size(4)));
+
+vec16 foo (vec8 a) {
+  return __builtin_vis_fexpand (a);
+}
+
+/* { dg-final { scan-assembler "fexpand\t%" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/fpack16.c b/gcc/testsuite/gcc.target/sparc/fpack16.c
new file mode 100644
index 00000000000..2f7aac56171
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/fpack16.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ultrasparc -mvis" } */
+typedef short vec16 __attribute__((vector_size(8)));
+typedef char vec8 __attribute__((vector_size(4)));
+
+vec8 foo (vec16 a) {
+  return __builtin_vis_fpack16 (a);
+}
+
+/* { dg-final { scan-assembler "fpack16\t%" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/fpack32.c b/gcc/testsuite/gcc.target/sparc/fpack32.c
new file mode 100644
index 00000000000..031372e219a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/fpack32.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ultrasparc -mvis" } */
+typedef int vec32 __attribute__((vector_size(8)));
+typedef unsigned char vec8 __attribute__((vector_size(8)));
+
+vec8 foo (vec32 a, vec8 b) {
+  return __builtin_vis_fpack32 (a, b);
+}
+
+/* { dg-final { scan-assembler "fpack32\t%" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/fpackfix.c b/gcc/testsuite/gcc.target/sparc/fpackfix.c
new file mode 100644
index 00000000000..815bec0cf38
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/fpackfix.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ultrasparc -mvis" } */
+typedef int vec32 __attribute__((vector_size(8)));
+typedef short vec16 __attribute__((vector_size(4)));
+
+vec16 foo (vec32 a) {
+  return __builtin_vis_fpackfix (a);
+}
+
+/* { dg-final { scan-assembler "fpackfix\t%" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/fpmerge.c b/gcc/testsuite/gcc.target/sparc/fpmerge.c
new file mode 100644
index 00000000000..013795cc6d7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/fpmerge.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ultrasparc -mvis" } */
+typedef char pixel __attribute__((vector_size(8)));
+typedef char vec8 __attribute__((vector_size(4)));
+
+pixel foo (vec8 a, vec8 b) {
+  return __builtin_vis_fpmerge (a, b);
+}
+
+/* { dg-final { scan-assembler "fpmerge\t%" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/fpmul.c b/gcc/testsuite/gcc.target/sparc/fpmul.c
new file mode 100644
index 00000000000..991cc75d661
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/fpmul.c
@@ -0,0 +1,43 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ultrasparc -mvis" } */
+typedef int vec32 __attribute__((vector_size(8)));
+typedef short vec16 __attribute__((vector_size(8)));
+typedef char pixel __attribute__((vector_size(4)));
+typedef short pixel16 __attribute__((vector_size(4)));
+typedef char vec8 __attribute__((vector_size(8)));
+
+vec16 foo1 (pixel a, vec16 b) {
+  return __builtin_vis_fmul8x16 (a, b);
+}
+
+vec16 foo2 (pixel a, pixel16 b) {
+  return __builtin_vis_fmul8x16au (a, b);
+}
+
+vec16 foo3 (pixel a, pixel16 b) {
+  return __builtin_vis_fmul8x16al (a, b);
+}
+
+vec16 foo4 (vec8 a, vec16 b) {
+  return __builtin_vis_fmul8sux16 (a, b);
+}
+
+vec16 foo5 (vec8 a, vec16 b) {
+  return __builtin_vis_fmul8ulx16 (a, b);
+}
+
+vec32 foo6 (pixel a, pixel16 b) {
+  return __builtin_vis_fmuld8sux16 (a, b);
+}
+
+vec32 foo7 (pixel a, pixel16 b) {
+  return __builtin_vis_fmuld8ulx16 (a, b);
+}
+
+/* { dg-final { scan-assembler "fmul8x16\t%" } } */
+/* { dg-final { scan-assembler "fmul8x16au\t%" } } */
+/* { dg-final { scan-assembler "fmul8x16al\t%" } } */
+/* { dg-final { scan-assembler "fmul8sux16\t%" } } */
+/* { dg-final { scan-assembler "fmul8ulx16\t%" } } */
+/* { dg-final { scan-assembler "fmuld8sux16\t%" } } */
+/* { dg-final { scan-assembler "fmuld8ulx16\t%" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/pdist.c b/gcc/testsuite/gcc.target/sparc/pdist.c
new file mode 100644
index 00000000000..d2ba9811d58
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/pdist.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ultrasparc -mvis" } */
+#include <stdint.h>
+
+typedef char vec8 __attribute__((vector_size(8)));
+
+int64_t foo (vec8 a, vec8 b) {
+  int64_t d = 0;
+  d = __builtin_vis_pdist (a, b, d);
+  return d;
+}
+
+int64_t bar (vec8 a, vec8 b) {
+  int64_t d = 0;
+  return __builtin_vis_pdist (a, b, d);
+}
+
+int64_t baz (vec8 a, vec8 b, int64_t d) {
+  int64_t e = __builtin_vis_pdist (a, b, d);
+  return e + d;
+}
+
+/* { dg-final { scan-assembler-times "pdist" 4 } } */