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authorAndre Vehreschild <vehre@gmx.de>2015-04-14 15:58:19 +0200
committerAndre Vehreschild <vehre@gmx.de>2015-04-14 15:58:19 +0200
commit93165dbdfd0406ae43d6dda7cb358fb8c1fcbad7 (patch)
tree69186c5617ba843643a58bafef5b351f811391c6 /gcc/testsuite/gcc.target
parentb70cd7cb6fd66a6f5dfbfb988861cec47c6e2c7a (diff)
parent33a2aaa4b5b40e1d705587d8fb669473263baff3 (diff)
downloadgcc-vehre/base.tar.gz
Merge remote-tracking branch 'trunk' of git://gcc.gnu.org/git/gcc into vehre/allvehre/base
Diffstat (limited to 'gcc/testsuite/gcc.target')
-rw-r--r--gcc/testsuite/gcc.target/arm/pr65647-2.c32
-rw-r--r--gcc/testsuite/gcc.target/arm/pr65710.c118
-rw-r--r--gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-2.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-2.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/mpx/memmove-zero-length.c18
-rw-r--r--gcc/testsuite/gcc.target/i386/pr65671.c16
-rw-r--r--gcc/testsuite/gcc.target/i386/pr65693.c13
-rw-r--r--gcc/testsuite/gcc.target/i386/sse-25.c6
8 files changed, 205 insertions, 2 deletions
diff --git a/gcc/testsuite/gcc.target/arm/pr65647-2.c b/gcc/testsuite/gcc.target/arm/pr65647-2.c
new file mode 100644
index 00000000000..f2985f8eaed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr65647-2.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -marm -march=armv6 -std=c99" } */
+
+typedef struct {
+ int i;
+} x264_union32_t;
+typedef struct {
+ int level_idx;
+} trellis_node_t;
+int a, c, d, f, h, i = (int)&c;
+trellis_node_t b[1][1];
+short *e = 0;
+short g;
+void fn1() {
+ int k[64 * 8 * 2];
+ trellis_node_t *l = b[0];
+ for (; i >= d; i--) {
+ if (e[i]) {
+ for (int j = 1; j < 8; j++) {
+ ((x264_union32_t *)&k[a])->i = l[j].level_idx;
+ l[j].level_idx = a;
+ a++;
+ }
+ continue;
+ }
+ for (int j;; j++)
+ ;
+ }
+ int m[6] __attribute__((aligned(16)));
+ for (; h; h++, f++)
+ g = m[h];
+}
diff --git a/gcc/testsuite/gcc.target/arm/pr65710.c b/gcc/testsuite/gcc.target/arm/pr65710.c
new file mode 100644
index 00000000000..139bc6414aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr65710.c
@@ -0,0 +1,118 @@
+/* { dg-do compile } */
+/* { dg-options "-march=armv6-m -mthumb -O3 -w -mfloat-abi=soft" } */
+
+struct ST {
+ char *buffer;
+ int used;
+};
+
+struct ST *h;
+
+enum { no_op, duplicate, pop_failure_jump, dummy_failure_jump };
+
+typedef struct {
+ unsigned pointer;
+} byte_fail_stack_elt_t;
+
+typedef struct { unsigned avail; } byte_fail_stack_type;
+
+typedef union {
+ byte_fail_stack_elt_t word;
+ struct {
+ unsigned match_null_string_p : 2;
+ unsigned is_active : 1;
+ unsigned ever_matched_something : 1;
+ } bits;
+} byte_register_info_type;
+
+static int a;
+int b = 0;
+int c, e, f;
+int *d, *g;
+
+int
+byte_re_match_2_internal_size2(const int p2, int p3, const int p4) {
+ int i, p;
+ char *j;
+ char k, l, m, n = h;
+ byte_fail_stack_type o;
+ byte_fail_stack_elt_t *q;
+ unsigned int s = (unsigned int)h;
+ long t, u;
+ char **v, *w, **x, **y, **t1;
+ byte_register_info_type *z, *t2 = __builtin_alloca(s);
+ x = __builtin_alloca(s);
+ y = __builtin_alloca(s);
+ z = __builtin_alloca(sizeof(byte_register_info_type));
+ k = p4 + byte_re_match_2_internal_size2;
+ if (p3)
+ f = p4;
+ for (;;) {
+ if (h == h->used) {
+ g = f;
+ if (o.avail) {
+ b = 1;
+ for (; i < s; i++)
+ t1[i] = w;
+ goto fail;
+ }
+ e = 30 > s;
+ d = p4;
+ d[s] = 1;
+ return;
+ }
+ switch (*h->buffer++) {
+ case no_op:
+ while (m && n ?: *g)
+ ;
+ y[*h->buffer] = z[*h->buffer].bits.match_null_string_p ? w == &a ?: w : w;
+ w = g;
+ if (t) {
+ char r = h;
+ while (r && z[r].bits.is_active)
+ r--;
+ if (r == 0)
+ ;
+ else
+ u = r;
+ }
+ switch (*j++)
+ case dummy_failure_jump:
+ i = j;
+ if (i)
+ if (z[*h->buffer].bits.ever_matched_something) {
+ unsigned r;
+ z[*h->buffer].bits.ever_matched_something = r = *h->buffer;
+ for (; r + *(h->buffer + 1); r++) {
+ v = x[r];
+ w[r] = y[r];
+ }
+ }
+ break;
+ case duplicate: {
+ char *t3 = p2 + p3;
+ if (t3)
+ break;
+ }
+ if ((p3 ?: p4) == k)
+ goto fail;
+ case pop_failure_jump:
+ for (; c; c--)
+ t2[c].word = q[o.avail];
+ char t4;
+ q = t4 = __builtin_allocamemcpy(t4 ?: (p <<= 1));
+ }
+ continue;
+ fail : {
+ unsigned t5;
+ t = q;
+ t5 = u;
+ for (; t5 >= t; t5--)
+ v[t5] = q[--o.avail].pointer;
+ switch (*h->buffer)
+ case pop_failure_jump:
+ goto fail;
+ }
+ m = &l;
+ }
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-2.c
index 0d648f5dc2e..d6dfad7c971 100644
--- a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclasspd-2.c
@@ -21,7 +21,7 @@ int check_fp_class_dp (double src, int imm)
int PInf_res = (isinf (src) == 1);
int NInf_res = (isinf (src) == -1);
int Denorm_res = (fpclassify (src) == FP_SUBNORMAL);
- int FinNeg_res = finite (src) && (src < 0);
+ int FinNeg_res = __builtin_finite (src) && (src < 0);
int result = (((imm & 1) && qNaN_res)
|| (((imm >> 1) & 1) && Pzero_res)
diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-2.c
index a6b9a291381..9401f04137a 100644
--- a/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512dq-vfpclassps-2.c
@@ -21,7 +21,7 @@ int check_fp_class_sp (float src, int imm)
int PInf_res = (isinf (src) == 1);
int NInf_res = (isinf (src) == -1);
int Denorm_res = (fpclassify (src) == FP_SUBNORMAL);
- int FinNeg_res = finite (src) && (src < 0);
+ int FinNeg_res = __builtin_finite (src) && (src < 0);
int result = (((imm & 1) && qNaN_res)
|| (((imm >> 1) & 1) && Pzero_res)
diff --git a/gcc/testsuite/gcc.target/i386/mpx/memmove-zero-length.c b/gcc/testsuite/gcc.target/i386/mpx/memmove-zero-length.c
new file mode 100644
index 00000000000..78bfdebff03
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/mpx/memmove-zero-length.c
@@ -0,0 +1,18 @@
+/* { dg-do run } */
+/* { dg-options "-fcheck-pointer-bounds -mmpx" } */
+
+
+#include "mpx-check.h"
+#include "string.h"
+
+int mpx_test (int argc, const char **argv)
+{
+ int *buf = (int *)malloc (100 * sizeof(int));
+
+ memmove (buf, NULL, 0);
+ memmove (NULL, buf, 0);
+
+ free (buf);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr65671.c b/gcc/testsuite/gcc.target/i386/pr65671.c
new file mode 100644
index 00000000000..d25a979106e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr65671.c
@@ -0,0 +1,16 @@
+/* PR target/65671 */
+/* { dg-do assemble } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target avx512vl } */
+/* { dg-options "-O2 -mavx512vl -ffixed-ymm16" } */
+
+#include <x86intrin.h>
+
+register __m256d a asm ("ymm16");
+__m128d b;
+
+void
+foo ()
+{
+ b = _mm256_extractf128_pd (a, 1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr65693.c b/gcc/testsuite/gcc.target/i386/pr65693.c
new file mode 100644
index 00000000000..bc380e483ff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr65693.c
@@ -0,0 +1,13 @@
+/* PR target/65693 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int a;
+
+void
+foo (int (*fn) (int, int, int), unsigned int b)
+{
+ unsigned long *c = (unsigned long *) __builtin_alloca (b);
+ a = *c;
+ register int d asm ("edx") = fn (0, 0, d);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-25.c b/gcc/testsuite/gcc.target/i386/sse-25.c
new file mode 100644
index 00000000000..c4b334c66e3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse-25.c
@@ -0,0 +1,6 @@
+/* PR target/65676 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -funsigned-char" } */
+/* { dg-add-options bind_pic_locally } */
+
+#include "sse-23.c"