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author | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-06-13 06:13:51 +0000 |
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committer | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-06-13 06:13:51 +0000 |
commit | 267ea1c0b7859a743fe99faccc251bac55f75d22 (patch) | |
tree | a40660f816598b8d59edc408c92ca342718b3775 /gcc/testsuite | |
parent | ba23dd7ef117c3b327b61c6d3553f678e5f2bd4f (diff) | |
download | gcc-267ea1c0b7859a743fe99faccc251bac55f75d22.tar.gz |
PR target/11089
* config/i386/i386.md (sse_movaps): Use an expander to force
one operand to be a register.
(sse_movups): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@67883 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite')
-rw-r--r-- | gcc/testsuite/gcc.dg/i386-sse-4.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.dg/i386-sse-4.c b/gcc/testsuite/gcc.dg/i386-sse-4.c new file mode 100644 index 00000000000..c94e7f8607f --- /dev/null +++ b/gcc/testsuite/gcc.dg/i386-sse-4.c @@ -0,0 +1,27 @@ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O0 -msse" } */ + +typedef void __vr __attribute__ ((__mode__ (__V4SF__))); + +struct vector +{ + union + { + __vr v; + float f[4]; + }; +}; + +void +doit () +{ + float f[4]; + struct vector v; + + f[0] = 0; + f[1] = 1; + f[2] = 2; + f[3] = 3; + + v.v = __builtin_ia32_loadups (f); +} |