* loop-unroll.c (struct iv_to_split): Remove n_loc and loc fields.

	(analyze_iv_to_split_insn): Don't initialize them.
	(get_ivts_expr): Removed.
	(allocate_basic_variable, insert_base_initialization): Use
	SET_SRC instead of *get_ivts_expr.
	(split_iv): Use &SET_SRC instead of get_ivts_expr.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@213621 138bc75d-0d04-0410-961f-82ee72b054a4

2 files changed, 33 insertions, 48 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 92345ba8ef5..fd8e8209b75 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2014-08-05  Jakub Jelinek  <jakub@redhat.com>
+
+	* loop-unroll.c (struct iv_to_split): Remove n_loc and loc fields.
+	(analyze_iv_to_split_insn): Don't initialize them.
+	(get_ivts_expr): Removed.
+	(allocate_basic_variable, insert_base_initialization): Use
+	SET_SRC instead of *get_ivts_expr.
+	(split_iv): Use &SET_SRC instead of get_ivts_expr.
+
 2014-08-05  Roman Gareev  <gareevroman@gmail.com>
 
 	* graphite-isl-ast-to-gimple.c: Add a new struct ast_build_info.
@@ -18,29 +27,27 @@
 2014-08-04  Rohit  <rohitarulraj@freescale.com>
 
 	PR target/60102
-	* config/rs6000/rs6000.c
-	  (rs6000_reg_names) : Add SPE high register names.
-	  (alt_reg_names) : Likewise.
-	  (rs6000_dwarf_register_span) : For SPE high registers, replace
-	  dwarf register numbers with GCC hard register numbers.
-	  (rs6000_init_dwarf_reg_sizes_extra) : Likewise.
-	  (rs6000_dbx_register_number): For SPE high registers, return dwarf
-	  register number for the corresponding GCC hard register number.
-	* config/rs6000/rs6000.h
-	  (FIRST_PSEUDO_REGISTER) : Update based on 32 newly added GCC hard
-	  register numbers for SPE high registers.
-	  (DWARF_FRAME_REGISTERS) :  Likewise.
-	  (DWARF_REG_TO_UNWIND_COLUMN) : Likewise.
-	  (DWARF_FRAME_REGNUM) : Likewise.
-	  (FIXED_REGISTERS) : Likewise.
-	  (CALL_USED_REGISTERS) : Likewise.
-	  (CALL_REALLY_USED_REGISTERS) : Likewise.
-	  (REG_ALLOC_ORDER) : Likewise.
-	  (enum reg_class) : Likewise.
-	  (REG_CLASS_NAMES) : Likewise.
-	  (REG_CLASS_CONTENTS) : Likewise.
-	  (SPE_HIGH_REGNO_P) : New macro to identify SPE high registers.
-	* gcc.target/powerpc/pr60102.c: New testcase.
+	* config/rs6000/rs6000.c (rs6000_reg_names): Add SPE high register
+	names.
+	(alt_reg_names): Likewise.
+	(rs6000_dwarf_register_span): For SPE high registers, replace
+	dwarf register numbers with GCC hard register numbers.
+	(rs6000_init_dwarf_reg_sizes_extra): Likewise.
+	(rs6000_dbx_register_number): For SPE high registers, return dwarf
+	register number for the corresponding GCC hard register number.
+	* config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTER): Update based on 32
+	newly added GCC hard register numbers for SPE high registers.
+	(DWARF_FRAME_REGISTERS):  Likewise.
+	(DWARF_REG_TO_UNWIND_COLUMN): Likewise.
+	(DWARF_FRAME_REGNUM): Likewise.
+	(FIXED_REGISTERS): Likewise.
+	(CALL_USED_REGISTERS): Likewise.
+	(CALL_REALLY_USED_REGISTERS): Likewise.
+	(REG_ALLOC_ORDER): Likewise.
+	(enum reg_class): Likewise.
+	(REG_CLASS_NAMES): Likewise.
+	(REG_CLASS_CONTENTS): Likewise.
+	(SPE_HIGH_REGNO_P): New macro to identify SPE high registers.
 
 2014-08-04  Richard Biener  <rguenther@suse.de>
 
diff --git a/gcc/loop-unroll.c b/gcc/loop-unroll.c
index ad4d3c2da50..707ffff70b0 100644
--- a/gcc/loop-unroll.c
+++ b/gcc/loop-unroll.c
@@ -79,11 +79,6 @@ struct iv_to_split
 			   iterations are based.  */
   rtx step;		/* Step of the induction variable.  */
   struct iv_to_split *next; /* Next entry in walking order.  */
-  unsigned n_loc;
-  unsigned loc[3];	/* Location where the definition of the induction
-			   variable occurs in the insn.  For example if
-			   N_LOC is 2, the expression is located at
-			   XEXP (XEXP (single_set, loc[0]), loc[1]).  */
 };
 
 /* Information about accumulators to expand.  */
@@ -1942,8 +1937,6 @@ analyze_iv_to_split_insn (rtx insn)
   ivts->base_var = NULL_RTX;
   ivts->step = iv.step;
   ivts->next = NULL;
-  ivts->n_loc = 1;
-  ivts->loc[0] = 1;
 
   return ivts;
 }
@@ -2080,27 +2073,12 @@ determine_split_iv_delta (unsigned n_copy, unsigned n_copies, bool unrolling)
     }
 }
 
-/* Locate in EXPR the expression corresponding to the location recorded
-   in IVTS, and return a pointer to the RTX for this location.  */
-
-static rtx *
-get_ivts_expr (rtx expr, struct iv_to_split *ivts)
-{
-  unsigned i;
-  rtx *ret = &expr;
-
-  for (i = 0; i < ivts->n_loc; i++)
-    ret = &XEXP (*ret, ivts->loc[i]);
-
-  return ret;
-}
-
 /* Allocate basic variable for the induction variable chain.  */
 
 static void
 allocate_basic_variable (struct iv_to_split *ivts)
 {
-  rtx expr = *get_ivts_expr (single_set (ivts->insn), ivts);
+  rtx expr = SET_SRC (single_set (ivts->insn));
 
   ivts->base_var = gen_reg_rtx (GET_MODE (expr));
 }
@@ -2111,7 +2089,7 @@ allocate_basic_variable (struct iv_to_split *ivts)
 static void
 insert_base_initialization (struct iv_to_split *ivts, rtx insn)
 {
-  rtx expr = copy_rtx (*get_ivts_expr (single_set (insn), ivts));
+  rtx expr = copy_rtx (SET_SRC (single_set (insn)));
   rtx seq;
 
   start_sequence ();
@@ -2146,7 +2124,7 @@ split_iv (struct iv_to_split *ivts, rtx insn, unsigned delta)
     }
 
   /* Figure out where to do the replacement.  */
-  loc = get_ivts_expr (single_set (insn), ivts);
+  loc = &SET_SRC (single_set (insn));
 
   /* If we can make the replacement right away, we're done.  */
   if (validate_change (insn, loc, expr, 0))