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authorKazu Hirata <kazu@cs.umass.edu>2005-05-07 14:43:55 +0000
committerKazu Hirata <kazu@gcc.gnu.org>2005-05-07 14:43:55 +0000
commitbb22512c9f2a6e96e1b97b417f58b7d42b121912 (patch)
treebd4c862bb90c9abd4e4d1302f27cafd6ae1f99bb /gcc
parent497fbaa064239dd1b7499450db81aa468bb17115 (diff)
downloadgcc-bb22512c9f2a6e96e1b97b417f58b7d42b121912.tar.gz
tree-ssa-loop-ivcanon.c, [...]: Fix comment typos.
* tree-ssa-loop-ivcanon.c, config/i386/i386.c, config/rs6000/rs6000.h: Fix comment typos. From-SVN: r99350
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/i386/i386.c2
-rw-r--r--gcc/config/rs6000/rs6000.h2
-rw-r--r--gcc/tree-ssa-loop-ivcanon.c2
4 files changed, 8 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 168c48e4cbc..40e97478c7b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2005-05-07 Kazu Hirata <kazu@cs.umass.edu>
+
+ * tree-ssa-loop-ivcanon.c, config/i386/i386.c,
+ config/rs6000/rs6000.h: Fix comment typos.
+
2005-05-07 Richard Sandiford <rsandifo@redhat.com>
* doc/invoke.texi: Remove documentation for MIPS' -mint64 option.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 1e8326d970c..2ed8edf7753 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -11291,7 +11291,7 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp)
count / 4 + (count & 3), the other sequence is either 4 or 7 bytes,
but we don't know whether upper 24 (resp. 56) bits of %ecx will be
known to be zero or not. The rep; movsb sequence causes higher
- register preasure though, so take that into account. */
+ register pressure though, so take that into account. */
if ((!optimize || optimize_size)
&& (count == 0
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index dbcd848e650..a670deb1115 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -128,7 +128,7 @@
/* Architecture type. */
-/* Define TARGET_MFCRF if the target assembler does not suppport the
+/* Define TARGET_MFCRF if the target assembler does not support the
optional field operand for mfcr. */
#ifndef HAVE_AS_MFCRF
diff --git a/gcc/tree-ssa-loop-ivcanon.c b/gcc/tree-ssa-loop-ivcanon.c
index c4e64b2635a..80aecdc2c3a 100644
--- a/gcc/tree-ssa-loop-ivcanon.c
+++ b/gcc/tree-ssa-loop-ivcanon.c
@@ -59,7 +59,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
enum unroll_level
{
- UL_SINGLE_ITER, /* Only loops that exit immediatelly in the first
+ UL_SINGLE_ITER, /* Only loops that exit immediately in the first
iteration. */
UL_NO_GROWTH, /* Only loops whose unrolling will not cause increase
of code size. */