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authorrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>1999-10-25 21:11:18 +0000
committerrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>1999-10-25 21:11:18 +0000
commit67336bcfddfdba0b288d317b1c101babdfc56922 (patch)
tree4eca1c887f98ab8cf98d769265a9a4b23c19ad88 /gcc
parentea8c2d16810d375383df7ae3dc3c1a5b02581c2d (diff)
downloadgcc-67336bcfddfdba0b288d317b1c101babdfc56922.tar.gz
* arm.md (pic_load_addr): Add constraints to operand 1.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@30170 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/arm/arm.md16
2 files changed, 16 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 94a72a6ff34..fcabdd8fef8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,11 @@
+Mon Oct 25 22:08:35 1999 Richard Earnshaw (rearnsha@arm.com)
+
+ * arm.md (pic_load_addr): Add constraints to operand 1.
+
1999-10-25 Bruce Korb <autogen@linuxbox.com>
- * fixinc/genfixes: Provide a means for specifying -D options to AutoGen
+ * fixinc/genfixes: Provide a means for specifying -D options to
+ AutoGen
Mon Oct 25 00:42:35 1999 Jeffrey A Law (law@cygnus.com)
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 30673bbb4bd..88d42069bf0 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -2858,16 +2858,20 @@
&& GET_CODE (XEXP (XEXP (operands[1], 0), 1)) == CONST_INT))"
"adr%?\\t%0, %a1")
-/* When generating pic, we need to load the symbol offset into a register.
- So that the optimizer does not confuse this with a normal symbol load
- we use an unspec. The offset will be loaded from a constant pool entry,
- since that is the only type of relocation we can use. */
+;; When generating pic, we need to load the symbol offset into a register.
+;; So that the optimizer does not confuse this with a normal symbol load
+;; we use an unspec. The offset will be loaded from a constant pool entry,
+;; since that is the only type of relocation we can use.
+
+;; The rather odd constraints on the following are to force reload to leave
+;; the insn alone, and to force the minipool generation pass to then move
+;; the GOT symbol to memory.
(define_insn "pic_load_addr"
[(set (match_operand:SI 0 "s_register_operand" "=r")
- (unspec:SI [(match_operand 1 "" "")] 3))]
+ (unspec:SI [(match_operand:SI 1 "" "mX")] 3))]
"flag_pic"
- "ldr%?\\t%0, %a1"
+ "ldr%?\\t%0, %1"
[(set_attr "type" "load")
(set_attr "pool_range" "4096")])