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authorcbaylis <cbaylis@138bc75d-0d04-0410-961f-82ee72b054a4>2014-07-31 14:27:58 +0000
committercbaylis <cbaylis@138bc75d-0d04-0410-961f-82ee72b054a4>2014-07-31 14:27:58 +0000
commitf0f38f1675bc83b4fdc13d4592848fc62368e6f1 (patch)
treee439337d478b57a9ca89cef07e1187353c032812 /gcc
parentd3a3536500cd7bbb4ec178b21b3225a488c7893c (diff)
downloadgcc-f0f38f1675bc83b4fdc13d4592848fc62368e6f1.tar.gz
PR target/61948
gcc/ChangeLog: 2014-07-29 Charles Baylis <charles.baylis@linaro.org> PR target/61948 * config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless constraints are satisfied. (<shift>di3_neon): Likewise. gcc/testsuite/ChangeLog: 2014-07-29 Charles Baylis <charles.baylis@linaro.org> PR target/61948 * gcc.target/arm/pr61948.c: New test case. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@213376 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/arm/neon.md8
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/arm/pr61948.c16
4 files changed, 34 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f75f34682eb..33930dce829 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2014-07-31 Charles Baylis <charles.baylis@linaro.org>
+
+ PR target/61948
+ * config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless
+ constraints are satisfied.
+ (<shift>di3_neon): Likewise.
+
2014-07-31 Richard Biener <rguenther@suse.de>
PR tree-optimization/61964
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index 1fc4dcd8275..dc364eeb64e 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -1041,7 +1041,9 @@
}
else
{
- if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 1)
+ if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 1
+ && (!reg_overlap_mentioned_p (operands[0], operands[1])
+ || REGNO (operands[0]) == REGNO (operands[1])))
/* This clobbers CC. */
emit_insn (gen_arm_ashldi3_1bit (operands[0], operands[1]));
else
@@ -1141,7 +1143,9 @@
}
else
{
- if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 1)
+ if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 1
+ && (!reg_overlap_mentioned_p (operands[0], operands[1])
+ || REGNO (operands[0]) == REGNO (operands[1])))
/* This clobbers CC. */
emit_insn (gen_arm_<shift>di3_1bit (operands[0], operands[1]));
else
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1619d00dc81..1932ab146a5 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2014-07-31 Charles Baylis <charles.baylis@linaro.org>
+
+ PR target/61948
+ * gcc.target/arm/pr61948.c: New test case.
+
2014-07-31 Richard Biener <rguenther@suse.de>
PR tree-optimization/61964
diff --git a/gcc/testsuite/gcc.target/arm/pr61948.c b/gcc/testsuite/gcc.target/arm/pr61948.c
new file mode 100644
index 00000000000..411e898ea77
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr61948.c
@@ -0,0 +1,16 @@
+/* PR target/61948 */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-options "-O2 -mthumb" } */
+/* { dg-add-options arm_neon } */
+
+long long f (long long *c)
+{
+ long long t = c[0];
+ asm ("nop" : : : "r0", "r3", "r4", "r5",
+ "r6", "r7", "r8", "r9",
+ "r10", "r11", "r12", "memory");
+ return t >> 1;
+}
+