* pa.h (architecture_type): New enum.

        (pa_arch_string, pa_arch): Declare.
        (MASK_PA_10, MASK_PA_20): New flags.
        (TARGET_SWITCHES): Add pa-risc-2-0.  Update docs for PA1.0 codegen.
        (TARGET_OPTIONS): Add -march= option.
        * pa.c (pa_arch, pa_arch_string):  Define.
        (override_options):  Set them.
        * pa/pa-hpux10.h (ASM_FILE_START):  Output LEVEL 2.0 asm directive for
        2.0 architecture.
        * invoke.texi (Option Summary, HPPA Options):  Document new
        architecture flags.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@26637 138bc75d-0d04-0410-961f-82ee72b054a4

5 files changed, 88 insertions, 9 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c3cf0cb99b2..8891d2a9e6f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -23,6 +23,18 @@ Mon Apr 26 01:02:34 1999  Nathan Sidwell  <nathan@acm.org>
 
 Mon Apr 26 00:58:54 1999  Jerry Quinn <jquinn@nortelnetworks.com>
 
+	* pa.h (architecture_type): New enum.
+	(pa_arch_string, pa_arch): Declare.
+	(MASK_PA_10, MASK_PA_20): New flags.
+	(TARGET_SWITCHES): Add pa-risc-2-0.  Update docs for PA1.0 codegen.
+	(TARGET_OPTIONS): Add -march= option.
+	* pa.c (pa_arch, pa_arch_string):  Define.
+	(override_options):  Set them.
+	* pa/pa-hpux10.h (ASM_FILE_START):  Output LEVEL 2.0 asm directive for
+	2.0 architecture. 
+	* invoke.texi (Option Summary, HPPA Options):  Document new
+	architecture flags.
+
 	* pa/pa-hpux.h, pa/pa-hpux10.h, pa/pa-hpux9.h, pa/pa-osf.h, pa.h,
 	pa.c, pa.md, configure.in, configure: Replace TARGET_SNAKE by
 	TARGET_PA_11 and MASK_SNAKE by MASK_PA_11.
diff --git a/gcc/config/pa/pa-hpux10.h b/gcc/config/pa/pa-hpux10.h
index ec56cc67581..183020c2a51 100644
--- a/gcc/config/pa/pa-hpux10.h
+++ b/gcc/config/pa/pa-hpux10.h
@@ -46,7 +46,9 @@ Boston, MA 02111-1307, USA.  */
 #undef ASM_FILE_START
 #define ASM_FILE_START(FILE) \
 do {  \
-     if (TARGET_PA_11) \
+     if (TARGET_PA_20) \
+       fputs("\t.LEVEL 2.0\n", FILE); \
+     else if (TARGET_PA_11) \
        fputs("\t.LEVEL 1.1\n", FILE); \
      else \
        fputs("\t.LEVEL 1.0\n", FILE); \
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index db26a8540e4..fa1287e55e5 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -58,6 +58,12 @@ enum processor_type pa_cpu;
 /* String to hold which cpu we are scheduling for.  */
 char *pa_cpu_string;
 
+/* Which architecture we are generating code for.  */
+enum architecture_type pa_arch;
+
+/* String to hold which architecture we are generating code for.  */
+char *pa_arch_string;
+
 /* Set by the FUNCTION_PROFILER macro. */
 int hp_profile_labelno;
 
@@ -128,6 +134,31 @@ override_options ()
       warning ("Unknown -mschedule= option (%s).\nValid options are 700, 7100, 7100LC, 7200, and 8000\n", pa_cpu_string);
     }
 
+  /* Set the instruction set architecture.  */
+  if (pa_arch_string && ! strcmp (pa_arch_string, "1.0"))
+    {
+      pa_arch_string = "1.0";
+      pa_arch = ARCHITECTURE_10;
+      target_flags &= ~(MASK_PA_11 | MASK_PA_20);
+    }
+  else if (pa_arch_string && ! strcmp (pa_arch_string, "1.1"))
+    {
+      pa_arch_string = "1.1";
+      pa_arch = ARCHITECTURE_11;
+      target_flags &= ~MASK_PA_20;
+      target_flags |= MASK_PA_11;
+    }
+  else if (pa_arch_string && ! strcmp (pa_arch_string, "2.0"))
+    {
+      pa_arch_string = "2.0";
+      pa_arch = ARCHITECTURE_20;
+      target_flags |= MASK_PA_11 | MASK_PA_20;
+    }
+  else if (pa_arch_string)
+    {
+      warning ("Unknown -march= option (%s).\nValid options are 1.0, 1.1, and 2.0\n", pa_arch_string);
+    }
+
   if (flag_pic && TARGET_PORTABLE_RUNTIME)
     {
       warning ("PIC code generation is not supported in the portable runtime model\n");
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index 26a520d3360..ca744c8e795 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -60,6 +60,19 @@ extern enum processor_type pa_cpu;
    : pa_cpu == PROCESSOR_8000 ? 4 \
    : 2)
 
+/* Which architecture to generate code for.  */
+
+enum architecture_type
+{
+  ARCHITECTURE_10,
+  ARCHITECTURE_11,
+  ARCHITECTURE_20
+};
+
+/* For -march= option.  */
+extern char *pa_arch_string;
+extern enum architecture_type pa_arch;
+
 /* Print subsidiary information on the compiler version in use.  */
 
 #define TARGET_VERSION fputs (" (hppa)", stderr);
@@ -137,6 +150,12 @@ extern int target_flags;
 #define MASK_BIG_SWITCH 2048
 #define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH)
 
+
+/* Generate code for the HPPA 2.0 architecture.  TARGET_PA_11 should also be
+   true when this is true.  */
+#define MASK_PA_20 4096
+#define TARGET_PA_20 (target_flags & MASK_PA_20)
+
 /* Macro to define tables used to set the flags.
    This is a list in braces of pairs in braces,
    each pair being { "NAME", VALUE }
@@ -145,9 +164,10 @@ extern int target_flags;
 
 #define TARGET_SWITCHES \
   {{"snake", MASK_PA_11, "Generate PA1.1 code"},			\
-   {"nosnake", -MASK_PA_11, "Do not generate PA1.1 code"},		\
-   {"pa-risc-1-0", -MASK_PA_11, "Do not generate PA1.1 code"},		\
+   {"nosnake", -(MASK_PA_11 | MASK_PA_20), "Generate PA1.0 code"},		\
+   {"pa-risc-1-0", -(MASK_PA_11 | MASK_PA_20), "Generate PA1.0 code"},		\
    {"pa-risc-1-1", MASK_PA_11, "Generate PA1.1 code"},			\
+   {"pa-risc-2-0", MASK_PA_20, "Generate PA2.0 code.  This option requires gas snapshot 19990413 or later"},			\
    {"disable-fpregs", MASK_DISABLE_FPREGS, "Disable FP regs"},		\
    {"no-disable-fpregs", -MASK_DISABLE_FPREGS, "Do not disable FP regs"},\
    {"no-space-regs", MASK_NO_SPACE_REGS, "Disable space regs"},		\
@@ -183,7 +203,8 @@ extern int target_flags;
 
 #define TARGET_OPTIONS			\
 {					\
-  { "schedule=",	&pa_cpu_string, "Specify CPU for scheduling purposes" }\
+  { "schedule=",	&pa_cpu_string, "Specify CPU for scheduling purposes" },\
+  { "arch=",		&pa_arch_string, "Specify architecture for code generation.  Values are 1.0, 1.1, and 2.0.  2.0 requires gas snapshot 19990413 or later." }\
 }
 
 #define OVERRIDE_OPTIONS override_options ()
diff --git a/gcc/invoke.texi b/gcc/invoke.texi
index 1ca77e54334..201ae222a30 100644
--- a/gcc/invoke.texi
+++ b/gcc/invoke.texi
@@ -345,6 +345,7 @@ in the following sections.
 -malign-functions=@var{num} -mpreferred_stack_boundary=@var{num}
 
 @emph{HPPA Options}
+-march=@var{architecture type}
 -mbig-switch  -mdisable-fpregs  -mdisable-indexing  
 -mfast-indirect-calls -mgas  -mjump-in-delay  
 -mlong-load-store  -mno-big-switch  -mno-disable-fpregs
@@ -352,8 +353,8 @@ in the following sections.
 -mno-jump-in-delay  -mno-long-load-store  
 -mno-portable-runtime  -mno-soft-float  -mno-space  
 -mno-space-regs  -msoft-float  -mpa-risc-1-0  
--mpa-risc-1-1  -mportable-runtime
--mschedule=@var{list}  -mspace  -mspace-regs
+-mpa-risc-1-1  -mpa-risc-2-0 -mportable-runtime
+-mschedule=@var{cpu type}  -mspace  -mspace-regs
 
 @emph{Intel 960 Options}
 -m@var{cpu type}  -masm-compat  -mclean-linkage
@@ -5221,11 +5222,23 @@ may want to reduce the preferred alignment to
 These @samp{-m} options are defined for the HPPA family of computers:
 
 @table @code
-@item -mpa-risc-1-0
-Generate code for a PA 1.0 processor.
+@item -march=@var{architecture type}
+Generate code for the specified architecture.  The choices for
+@var{architecture type} are @samp{1.0} for PA 1.0, @samp{1.1} for PA
+1.1, and @samp{2.0} for PA 2.0 processors.  Refer to
+@file{/usr/lib/sched.models} on an HP-UX system to determine the proper
+architecture option for your machine.  Code compiled for lower numbered
+architectures will run on higher numbered architectures, but not the
+other way around.
+
+PA 2.0 support currently requires gas snapshot 19990413 or later.  The
+next release of binutils (current is 2.9.1) will probably contain PA 2.0
+support.  
 
+@item -mpa-risc-1-0
 @item -mpa-risc-1-1
-Generate code for a PA 1.1 processor.
+@item -mpa-risc-2-0
+Synonyms for -march=1.0, -march=1.1, and -march=2.0 respectively.
 
 @item -mbig-switch
 Generate code suitable for big switch tables.  Use this option only if