diff options
| author | ebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-10-12 21:30:44 +0000 |
|---|---|---|
| committer | ebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4> | 2010-10-12 21:30:44 +0000 |
| commit | 76ab33ff6aebab59cae8c47c8ce8e0099b5aa55d (patch) | |
| tree | 61ea9240524ffabbc62aa660cd81dc665ffe9ba3 /gcc | |
| parent | ddfbec74c0cd275272a4ed0644fb2996927e21e8 (diff) | |
| download | gcc-76ab33ff6aebab59cae8c47c8ce8e0099b5aa55d.tar.gz | |
* config/sparc/sparc.md (*adddi3_insn_sp32): Rename.
(*adddi3_extend_sp32): Likewise.
(*subdi3_insn_sp32): Likewise.
(*subdi3_extend_sp32): Likewise.
(*negdi2_sp32): Use negative test for consistency.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@165397 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/sparc/sparc.md | 10 |
2 files changed, 13 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c414447661c..a9771aa0847 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2010-10-12 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sparc.md (*adddi3_insn_sp32): Rename. + (*adddi3_extend_sp32): Likewise. + (*subdi3_insn_sp32): Likewise. + (*subdi3_extend_sp32): Likewise. + (*negdi2_sp32): Use negative test for consistency. + 2010-10-12 Nathan Froyd <froydnj@codesourcery.com> * libgcc2.h: Use __SIZEOF_DOUBLE__ instead of diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 301a63c2693..16b1116f7eb 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -3507,7 +3507,7 @@ } }) -(define_insn_and_split "adddi3_insn_sp32" +(define_insn_and_split "*adddi3_insn_sp32" [(set (match_operand:DI 0 "register_operand" "=r") (plus:DI (match_operand:DI 1 "arith_double_operand" "%r") (match_operand:DI 2 "arith_double_operand" "rHI"))) @@ -3580,7 +3580,7 @@ "addx\t%r1, %2, %0" [(set_attr "type" "ialuX")]) -(define_insn_and_split "" +(define_insn_and_split "*adddi3_extend_sp32" [(set (match_operand:DI 0 "register_operand" "=r") (plus:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r")) (match_operand:DI 2 "register_operand" "r"))) @@ -3680,7 +3680,7 @@ } }) -(define_insn_and_split "subdi3_insn_sp32" +(define_insn_and_split "*subdi3_insn_sp32" [(set (match_operand:DI 0 "register_operand" "=r") (minus:DI (match_operand:DI 1 "register_operand" "r") (match_operand:DI 2 "arith_double_operand" "rHI"))) @@ -3752,7 +3752,7 @@ operands[4] = gen_highpart (SImode, operands[0]);" [(set_attr "length" "2")]) -(define_insn_and_split "" +(define_insn_and_split "*subdi3_extend_sp32" [(set (match_operand:DI 0 "register_operand" "=r") (minus:DI (match_operand:DI 1 "register_operand" "r") (zero_extend:DI (match_operand:SI 2 "register_operand" "r")))) @@ -5064,7 +5064,7 @@ [(set (match_operand:DI 0 "register_operand" "=r") (neg:DI (match_operand:DI 1 "register_operand" "r"))) (clobber (reg:CC 100))] - "TARGET_ARCH32" + "! TARGET_ARCH64" "#" "&& reload_completed" [(parallel [(set (reg:CC_NOOV 100) |