diff options
| author | avieira <avieira@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-06-14 11:24:51 +0000 |
|---|---|---|
| committer | avieira <avieira@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-06-14 11:24:51 +0000 |
| commit | 1b9fde854744d11c457b2101a95407cc7782de04 (patch) | |
| tree | 3d3f7d5161a1f1b71d352d9f88fe030ae915c155 /gcc | |
| parent | 306097e3cfe1e929187bb53a1e4d56f8cd2a559d (diff) | |
| download | gcc-1b9fde854744d11c457b2101a95407cc7782de04.tar.gz | |
2016-06-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
gcc/testsuite/ChangeLog:
* gcc.dg/zero_bits_compound-1.c: Support aarch64.
* gcc.dg/zero_bits_compound-1.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@237430 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/zero_bits_compound-1.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/zero_bits_compound-2.c | 2 |
3 files changed, 7 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index dfe4fb766b1..248064d311c 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-06-14 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * gcc.dg/zero_bits_compound-1.c: Support aarch64. + * gcc.dg/zero_bits_compound-1.c: Likewise. + 2016-06-14 Richard Biener <rguenther@suse.de> PR tree-optimization/71522 diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c index d78dc43d0a4..650da60c0c3 100644 --- a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c +++ b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c @@ -4,7 +4,7 @@ /* Note: This test requires that char, int and long have different sizes and the target has a way to do 32 -> 64 bit zero extension other than AND. */ -/* { dg-do compile { target x86_64-*-* s390*-*-* } } */ +/* { dg-do compile { target x86_64-*-* s390*-*-* aarch64*-*-* } } */ /* { dg-require-effective-target lp64 } */ /* { dg-options "-O3 -dP" } */ diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-2.c b/gcc/testsuite/gcc.dg/zero_bits_compound-2.c index 80fd363d955..f282b94d779 100644 --- a/gcc/testsuite/gcc.dg/zero_bits_compound-2.c +++ b/gcc/testsuite/gcc.dg/zero_bits_compound-2.c @@ -1,7 +1,7 @@ /* Test whether an AND mask or'ed with the know zero bits that equals a mode mask is a candidate for zero extendion. */ -/* { dg-do compile { target x86_64-*-* s390*-*-* } } */ +/* { dg-do compile { target x86_64-*-* s390*-*-* aarch64*-*-* } } */ /* { dg-require-effective-target lp64 } */ /* { dg-options "-O3 -dP" } */ |