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authorrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>2007-02-12 16:10:15 +0000
committerrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>2007-02-12 16:10:15 +0000
commit1dffd068f1f11c688c08d6f564540cb4eb81fa34 (patch)
tree807a399123e2040d6d36f34bbad28e2866607b56 /gcc
parentb53840f2535861af52eb4c69f853bb09b405a358 (diff)
downloadgcc-1dffd068f1f11c688c08d6f564540cb4eb81fa34.tar.gz
* config/alpha/constraints.md: New file.
* config/alpha/alpha.c: Include tm-constrs.h. (alpha_const_ok_for_letter_p, alpha_const_double_ok_for_letter_p, alpha_extra_constraint): Remove. (alpha_emit_conditional_branch): Use satisfies_constraint_*. * config/alpha/alpha-protos.h: Update. * config/alpha/alpha.h (REG_CLASS_FROM_LETTER): Remove. (CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_LETTER_P): Remove. (EXTRA_CONSTRAINT): Remove. * config/alpha/alpha.md: Include constraints.md. (adddi splitter): Use satisfies_constraint_*. * config/alpha/predicates.md (add_operand): Likewise. (sext_add_operand, addition_operation): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@121847 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog16
-rw-r--r--gcc/config/alpha/alpha-protos.h6
-rw-r--r--gcc/config/alpha/alpha.c105
-rw-r--r--gcc/config/alpha/alpha.h57
-rw-r--r--gcc/config/alpha/alpha.md10
-rw-r--r--gcc/config/alpha/constraints.md122
-rw-r--r--gcc/config/alpha/predicates.md11
7 files changed, 156 insertions, 171 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3e65ea41e64..68a81c7b2c0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,19 @@
+2007-02-12 Richard Henderson <rth@redhat.com>
+
+ * config/alpha/constraints.md: New file.
+ * config/alpha/alpha.c: Include tm-constrs.h.
+ (alpha_const_ok_for_letter_p, alpha_const_double_ok_for_letter_p,
+ alpha_extra_constraint): Remove.
+ (alpha_emit_conditional_branch): Use satisfies_constraint_*.
+ * config/alpha/alpha-protos.h: Update.
+ * config/alpha/alpha.h (REG_CLASS_FROM_LETTER): Remove.
+ (CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_LETTER_P): Remove.
+ (EXTRA_CONSTRAINT): Remove.
+ * config/alpha/alpha.md: Include constraints.md.
+ (adddi splitter): Use satisfies_constraint_*.
+ * config/alpha/predicates.md (add_operand): Likewise.
+ (sext_add_operand, addition_operation): Likewise.
+
2007-02-12 Dorit Nuzman <dorit@il.ibm.com>
PR tree-optimization/29145
diff --git a/gcc/config/alpha/alpha-protos.h b/gcc/config/alpha/alpha-protos.h
index f099b4d15e7..9ce85c87008 100644
--- a/gcc/config/alpha/alpha-protos.h
+++ b/gcc/config/alpha/alpha-protos.h
@@ -1,5 +1,5 @@
/* Prototypes for alpha.c functions used in the md file & elsewhere.
- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
Free Software Foundation, Inc.
This file is part of GCC.
@@ -35,10 +35,6 @@ extern void alpha_expand_prologue (void);
extern void alpha_expand_epilogue (void);
extern void alpha_output_filename (FILE *, const char *);
-extern bool alpha_const_ok_for_letter_p (HOST_WIDE_INT, int);
-extern bool alpha_const_double_ok_for_letter_p (rtx, int);
-extern bool alpha_extra_constraint (rtx, int);
-
extern rtx alpha_tablejump_addr_vec (rtx);
extern rtx alpha_tablejump_best_label (rtx);
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 327efb458e5..1c5a1592bde 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -55,6 +55,8 @@ Boston, MA 02110-1301, USA. */
#include "tree-gimple.h"
#include "tree-flow.h"
#include "tree-stdarg.h"
+#include "tm-constrs.h"
+
/* Specify which cpu to schedule for. */
enum processor_type alpha_tune;
@@ -588,96 +590,6 @@ resolve_reload_operand (rtx op)
return op;
}
-/* Implements CONST_OK_FOR_LETTER_P. Return true if the value matches
- the range defined for C in [I-P]. */
-
-bool
-alpha_const_ok_for_letter_p (HOST_WIDE_INT value, int c)
-{
- switch (c)
- {
- case 'I':
- /* An unsigned 8 bit constant. */
- return (unsigned HOST_WIDE_INT) value < 0x100;
- case 'J':
- /* The constant zero. */
- return value == 0;
- case 'K':
- /* A signed 16 bit constant. */
- return (unsigned HOST_WIDE_INT) (value + 0x8000) < 0x10000;
- case 'L':
- /* A shifted signed 16 bit constant appropriate for LDAH. */
- return ((value & 0xffff) == 0
- && ((value) >> 31 == -1 || value >> 31 == 0));
- case 'M':
- /* A constant that can be AND'ed with using a ZAP insn. */
- return zap_mask (value);
- case 'N':
- /* A complemented unsigned 8 bit constant. */
- return (unsigned HOST_WIDE_INT) (~ value) < 0x100;
- case 'O':
- /* A negated unsigned 8 bit constant. */
- return (unsigned HOST_WIDE_INT) (- value) < 0x100;
- case 'P':
- /* The constant 1, 2 or 3. */
- return value == 1 || value == 2 || value == 3;
-
- default:
- return false;
- }
-}
-
-/* Implements CONST_DOUBLE_OK_FOR_LETTER_P. Return true if VALUE
- matches for C in [GH]. */
-
-bool
-alpha_const_double_ok_for_letter_p (rtx value, int c)
-{
- switch (c)
- {
- case 'G':
- /* The floating point zero constant. */
- return (GET_MODE_CLASS (GET_MODE (value)) == MODE_FLOAT
- && value == CONST0_RTX (GET_MODE (value)));
-
- case 'H':
- /* A valid operand of a ZAP insn. */
- return (GET_MODE (value) == VOIDmode
- && zap_mask (CONST_DOUBLE_LOW (value))
- && zap_mask (CONST_DOUBLE_HIGH (value)));
-
- default:
- return false;
- }
-}
-
-/* Implements CONST_DOUBLE_OK_FOR_LETTER_P. Return true if VALUE
- matches for C. */
-
-bool
-alpha_extra_constraint (rtx value, int c)
-{
- switch (c)
- {
- case 'Q':
- return normal_memory_operand (value, VOIDmode);
- case 'R':
- return direct_call_operand (value, Pmode);
- case 'S':
- return (GET_CODE (value) == CONST_INT
- && (unsigned HOST_WIDE_INT) INTVAL (value) < 64);
- case 'T':
- return GET_CODE (value) == HIGH;
- case 'U':
- return TARGET_ABI_UNICOSMK && symbolic_operand (value, VOIDmode);
- case 'W':
- return (GET_CODE (value) == CONST_VECTOR
- && value == CONST0_RTX (GET_MODE (value)));
- default:
- return false;
- }
-}
-
/* The scalar modes supported differs from the default check-what-c-supports
version in that sometimes TFmode is available even when long double
indicates only DFmode. On unicosmk, we have the situation that HImode
@@ -2580,15 +2492,12 @@ alpha_emit_conditional_branch (enum rtx_code code)
&& !(symbolic_operand (op0, VOIDmode)
|| (GET_CODE (op0) == REG && REG_POINTER (op0))))
{
- HOST_WIDE_INT v = INTVAL (op1), n = -v;
+ rtx n_op1 = GEN_INT (-INTVAL (op1));
- if (! CONST_OK_FOR_LETTER_P (v, 'I')
- && (CONST_OK_FOR_LETTER_P (n, 'K')
- || CONST_OK_FOR_LETTER_P (n, 'L')))
- {
- cmp_code = PLUS, branch_code = code;
- op1 = GEN_INT (n);
- }
+ if (! satisfies_constraint_I (op1)
+ && (satisfies_constraint_K (n_op1)
+ || satisfies_constraint_L (n_op1)))
+ cmp_code = PLUS, branch_code = code, op1 = n_op1;
}
}
diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h
index ed02c9f3e8e..382fe120565 100644
--- a/gcc/config/alpha/alpha.h
+++ b/gcc/config/alpha/alpha.h
@@ -600,63 +600,6 @@ enum reg_class {
#define INDEX_REG_CLASS NO_REGS
#define BASE_REG_CLASS GENERAL_REGS
-/* Get reg_class from a letter such as appears in the machine description. */
-
-#define REG_CLASS_FROM_LETTER(C) \
- ((C) == 'a' ? R24_REG \
- : (C) == 'b' ? R25_REG \
- : (C) == 'c' ? R27_REG \
- : (C) == 'f' ? FLOAT_REGS \
- : (C) == 'v' ? R0_REG \
- : NO_REGS)
-
-/* Define this macro to change register usage conditional on target flags. */
-/* #define CONDITIONAL_REGISTER_USAGE */
-
-/* The letters I, J, K, L, M, N, O, and P in a register constraint string
- can be used to stand for particular ranges of immediate operands.
- This macro defines what the ranges are.
- C is the letter, and VALUE is a constant value.
- Return 1 if VALUE is in the range specified by C.
-
- For Alpha:
- `I' is used for the range of constants most insns can contain.
- `J' is the constant zero.
- `K' is used for the constant in an LDA insn.
- `L' is used for the constant in a LDAH insn.
- `M' is used for the constants that can be AND'ed with using a ZAP insn.
- `N' is used for complemented 8-bit constants.
- `O' is used for negated 8-bit constants.
- `P' is used for the constants 1, 2 and 3. */
-
-#define CONST_OK_FOR_LETTER_P alpha_const_ok_for_letter_p
-
-/* Similar, but for floating or large integer constants, and defining letters
- G and H. Here VALUE is the CONST_DOUBLE rtx itself.
-
- For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
- that is the operand of a ZAP insn. */
-
-#define CONST_DOUBLE_OK_FOR_LETTER_P alpha_const_double_ok_for_letter_p
-
-/* Optional extra constraints for this machine.
-
- For the Alpha, `Q' means that this is a memory operand but not a
- reference to an unaligned location.
-
- `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current
- function.
-
- 'S' is a 6-bit constant (valid for a shift insn).
-
- 'T' is a HIGH.
-
- 'U' is a symbolic operand.
-
- 'W' is a vector zero. */
-
-#define EXTRA_CONSTRAINT alpha_extra_constraint
-
/* Given an rtx X being reloaded into a reg required to be
in class CLASS, return the class of reg to actually use.
In general this is just CLASS; but on some machines
diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index f49b0dc10f5..87871ccb2d7 100644
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -1,6 +1,6 @@
;; Machine description for DEC Alpha for GNU C compiler
;; Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-;; 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+;; 2000, 2001, 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
;;
;; This file is part of GCC.
@@ -178,9 +178,10 @@
(include "ev6.md")
-;; Include predicate definitions
+;; Operand and operator predicates and constraints
(include "predicates.md")
+(include "constraints.md")
;; First define the arithmetic insns. Note that the 32-bit forms also
@@ -489,10 +490,11 @@
HOST_WIDE_INT val = INTVAL (operands[2]);
HOST_WIDE_INT low = (val & 0xffff) - 2 * (val & 0x8000);
HOST_WIDE_INT rest = val - low;
+ rtx rest_rtx = GEN_INT (rest);
operands[4] = GEN_INT (low);
- if (CONST_OK_FOR_LETTER_P (rest, 'L'))
- operands[3] = GEN_INT (rest);
+ if (satisfies_constraint_L (rest_rtx))
+ operands[3] = rest_rtx;
else if (! no_new_pseudos)
{
operands[3] = gen_reg_rtx (DImode);
diff --git a/gcc/config/alpha/constraints.md b/gcc/config/alpha/constraints.md
new file mode 100644
index 00000000000..8ca0f28b9fc
--- /dev/null
+++ b/gcc/config/alpha/constraints.md
@@ -0,0 +1,122 @@
+;; Constraint definitions for DEC Alpha.
+;; Copyright (C) 2007 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 2, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;; GNU General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING. If not, write to
+;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+;; Boston, MA 02110-1301, USA.
+
+;;; Unused letters:
+;;; ABCDEF V YZ
+;;; de ghijklmnopq stu wxyz
+
+;; Integer register constraints.
+
+(define_register_constraint "a" "R24_REG"
+ "General register 24, input to division routine")
+
+(define_register_constraint "b" "R25_REG"
+ "General register 24, input to division routine")
+
+(define_register_constraint "c" "R27_REG"
+ "General register 27, function call address")
+
+(define_register_constraint "f" "FLOAT_REGS"
+ "Any floating-point register")
+
+(define_register_constraint "v" "R0_REG"
+ "General register 0, function value return address")
+
+;; Integer constant constraints.
+(define_constraint "I"
+ "An unsigned 8 bit constant"
+ (and (match_code "const_int")
+ (match_test "ival >= 0 && ival <= 255")))
+
+(define_constraint "J"
+ "The constant zero"
+ (and (match_code "const_int")
+ (match_test "ival == 0")))
+
+(define_constraint "K"
+ "Signed 16-bit integer constant"
+ (and (match_code "const_int")
+ (match_test "ival >= -32768 && ival < 32768 ")))
+
+(define_constraint "L"
+ "A shifted signed 16-bit constant appropriate for LDAH"
+ (and (match_code "const_int")
+ (match_test "(ival & 0xffff) == 0
+ && (ival >> 31 == -1 || ival >> 31 == 0)")))
+
+(define_constraint "M"
+ "A valid operand of a ZAP insn"
+ (and (match_code "const_int")
+ (match_test "zap_mask (ival) != 0")))
+
+(define_constraint "N"
+ "A complemented unsigned 8-bit constant"
+ (and (match_code "const_int")
+ (match_test "~ival >= 0 && ~ival <= 255")))
+
+(define_constraint "O"
+ "A negated unsigned 8-bit constant"
+ (and (match_code "const_int")
+ (match_test "-ival >= 0 && -ival <= 255")))
+
+(define_constraint "P"
+ "The constant 1, 2 or 3"
+ (and (match_code "const_int")
+ (match_test "ival == 1 || ival == 2 || ival == 3")))
+
+(define_constraint "H"
+ "A valid operand of a ZAP insn, when building with 32-bit HOST_WIDE_INT"
+ (and (match_code "const_double")
+ (match_test "mode == VOIDmode && zap_mask (hval) && zap_mask (lval)")))
+
+;; Floating-point constant constraints.
+(define_constraint "G"
+ "The floating point zero constant"
+ (and (match_code "const_double")
+ (match_test "GET_MODE_CLASS (mode) == MODE_FLOAT
+ && op == CONST0_RTX (mode)")))
+
+;; "Extra" constraints.
+(define_constraint "Q"
+ "@internal A normal_memory_operand"
+ (match_operand 0 "normal_memory_operand"))
+
+(define_constraint "R"
+ "@internal A direct_call_operand"
+ (match_operand:DI 0 "direct_call_operand"))
+
+(define_constraint "S"
+ "An unsigned 6-bit constant"
+ (and (match_code "const_int")
+ (match_test "ival >= 0 && ival <= 63")))
+
+(define_constraint "T"
+ "@internal A high-part symbol"
+ (match_code "high"))
+
+(define_constraint "U"
+ "@internal A UNICOSMK symbol"
+ (and (match_test "TARGET_ABI_UNICOSMK")
+ (match_operand 0 "symbolic_operand")))
+
+(define_constraint "W"
+ "A vector zero constant"
+ (and (match_code "const_vector")
+ (match_test "op == CONST0_RTX (mode)")))
diff --git a/gcc/config/alpha/predicates.md b/gcc/config/alpha/predicates.md
index 6f86324f417..0b2c22f16dd 100644
--- a/gcc/config/alpha/predicates.md
+++ b/gcc/config/alpha/predicates.md
@@ -1,5 +1,5 @@
;; Predicate definitions for DEC Alpha.
-;; Copyright (C) 2004, 2005, 2006 Free Software Foundation, Inc.
+;; Copyright (C) 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
;;
;; This file is part of GCC.
;;
@@ -54,16 +54,14 @@
;; Return 1 if the operand is a valid second operand to an add insn.
(define_predicate "add_operand"
(if_then_else (match_code "const_int")
- (match_test "CONST_OK_FOR_LETTER_P (INTVAL (op), 'K')
- || CONST_OK_FOR_LETTER_P (INTVAL (op), 'L')")
+ (match_test "satisfies_constraint_K (op) || satisfies_constraint_L (op)")
(match_operand 0 "register_operand")))
;; Return 1 if the operand is a valid second operand to a
;; sign-extending add insn.
(define_predicate "sext_add_operand"
(if_then_else (match_code "const_int")
- (match_test "CONST_OK_FOR_LETTER_P (INTVAL (op), 'I')
- || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O')")
+ (match_test "satisfies_constraint_I (op) || satisfies_constraint_O (op)")
(match_operand 0 "register_operand")))
;; Return 1 if the operand is a non-symbolic constant operand that
@@ -572,8 +570,7 @@
(define_predicate "addition_operation"
(and (match_code "plus")
(match_test "register_operand (XEXP (op, 0), mode)
- && GET_CODE (XEXP (op, 1)) == CONST_INT
- && CONST_OK_FOR_LETTER_P (INTVAL (XEXP (op, 1)), 'K')")))
+ && satisfies_constraint_K (XEXP (op, 1))")))
;; For TARGET_EXPLICIT_RELOCS, we don't obfuscate a SYMBOL_REF to a
;; small symbolic operand until after reload. At which point we need