diff options
| author | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2009-07-05 21:34:24 +0000 |
|---|---|---|
| committer | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2009-07-05 21:34:24 +0000 |
| commit | 2e171de466a2cfb7fe037aa11fb8803a93ad1916 (patch) | |
| tree | 186673f49214bc2f410d4f333b9304a4f4c451c7 /gcc | |
| parent | 72214ac9ad7c4d3c189f0bd2327f3f3d3987533a (diff) | |
| download | gcc-2e171de466a2cfb7fe037aa11fb8803a93ad1916.tar.gz | |
2009-07-05 Basile Starynkevitch <basile@starynkevitch.net>
MELT branch merged with trunk r149262
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/melt-branch@149264 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
238 files changed, 8721 insertions, 13632 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ecc41cb034c..5e516597684 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,517 @@ +2009-07-04 Ian Lance Taylor <iant@google.com> + + PR target/40636 + * config/i386/msformat-c.c (mingw_format_attributes): Declare as + EXPORTED_CONST. + (mingw_format_attribute_overrides): Likewise. + +2009-07-04 Jakub Jelinek <jakub@redhat.com> + + PR debug/40596 + * dwarf2out.c (based_loc_descr): For crtl->stack_realign_tried + don't check cfa.reg. Instead of cfa.indirect use + fde && fde->drap_reg != INVALID_REGNUM test. + +2009-07-04 Eric Botcazou <ebotcazou@adacore.com> + + * postreload.c (reload_combine): Replace CONST_REG with INDEX_REG. + +2009-07-03 Vladimir Makarov <vmakarov@redhat.com> + + PR target/40587 + * ira.c (build_insn_chain): Use DF_LR_OUT instead of + df_get_live_out. + +2009-07-03 Richard Guenther <rguenther@suse.de> + + PR tree-optimization/40640 + * tree-switch-conversion.c (build_arrays): Perform arithmetic + in original type. + +2009-07-03 Jan Hubicka <jh@suse.cz> + + * ipa-inline.c (cgraph_decide_inlining_incrementally): When optimizing + for size, reduce amount of inlining. + +2009-07-03 Richard Guenther <rguenther@suse.de> + + PR middle-end/34163 + * tree-chrec.c (chrec_convert_1): Fold (T2)(t +- x) to + (T2)t +- (T2)x if t +- x is known to not overflow and + the conversion widens the operation. + * Makefile.in (tree-chrec.o): Add $(FLAGS_H) dependency. + +2009-07-03 Jan Hubicka <jh@suse.cz> + + * ipa-pure-const.c (analyze): Update loop optimizer init. + * tree-ssa-loop-iv-canon.c (empty_loop_p, remove_empty_loop, + try_remove_empty_loop, remove_empty_loops): Remove. + * tree-ssa-loop.c (tree_ssa_empty_loop, pass_empty_loop): Remove. + * tree-ssa-dce.c (find_obviously_necessary_stmts): Use finiteness info + to mark regular loops as neccesary. + (degenerate_phi_p): New function. + (propagate_necessity, remove_dead_phis): Use it. + (forward_edge_to_pdom): Likewise. + (eliminate_unnecessary_stmts): Take care to remove uses of results of + virtual PHI nodes that became unreachable. + (perform_tree_ssa_dce): Initialize/deinitialize loop optimizer. + * tree-flow.h (remove_empty_loops): Remove. + * passes.c (init_optimization_passes): Remove. + +2009-07-03 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (fix_trunc<mode>_fisttp_i387_1): Use + can_create_pseudo_p. + (*fix_trunc<mode>_i387_1): Ditto. + (*floathi<mode>2_1): Ditto. + (*float<SSEMODEI24:mode><X87MODEF:mode>2_1): Ditto. + (*fistdi2_1): Ditto. + (*fist<mode>2_1): Ditto. + (frndintxf2_floor): Ditto. + (*fist<mode>2_floor_1): Ditto. + (frndintxf2_ceil): Ditto. + (*fist<mode>2_ceil_1): Ditto. + (frndintxf2_trunc): Ditto. + (frndintxf2_mask_pm): Ditto. + (fxam<mode>2_i387_with_temp): Ditto. + * config/i386/sse.md (mulv16qi3): Ditto. + (*sse2_mulv4si3): Ditto. + (mulv2di3): Ditto. + (sse4_2_pcmpestr): Ditto. + (sse4_2_pcmpistr): Ditto. + +2009-07-03 Jan Hubicka <jh@suse.cz> + + * tree-ssa-dce.c (bb_contains_live_stmts): New bitmap. + (mark_stmt_necessary): Set it. + (mark_operand_necessary): Set it. + (mark_control_dependent_edges_necessary): Set it. + (mark_virtual_phi_result_for_renaming): New function. + (get_live_post_dom): New function. + (forward_edge_to_pdom): New function. + (remove_dead_stmt): Fix handling of control dependences. + (tree_dce_init): Init new bitmap. + (tree_dce_done): Free it. + +2009-07-02 Richard Guenther <rguenther@suse.de> + + PR bootstrap/40617 + * tree-ssa-structalias.c (new_var_info): Initialize + is_restrict_var. + +2009-07-02 Jan Hubicka <jh@suse.cz> + + * ipa-pure-const.c (check_op): Use PTA info to see if indirect_ref is + local. + +2009-07-02 Paolo Bonzini <bonzini@gnu.org> + + * expmed.c (emit_cstore, emit_store_flag_1): Accept target_mode + instead of recomputing it. Adjust calls. + (emit_store_flag): Adjust recursive calls. + +2009-07-02 Richard Guenther <rguenther@suse.de> + + * tree-ssa-live.c (remove_unused_locals): Do not remove + heap variables. + * tree-ssa-structalias.c (handle_lhs_call): Delay setting + of DECL_EXTERNAL for HEAP variables. + (compute_points_to_sets): Set DECL_EXTERNAL for escaped + HEAP variables. Do not adjust RESTRICT vars. + (find_what_var_points_to): Nobody cares if something + points to READONLY. + +2009-07-02 Ben Elliston <bje@au.ibm.com> + + * unwind-dw2-fde-glibc.c (_Unwind_IteratePhdrCallback): Move + pc_low and pc_high declarations to the top of the function. + +2009-07-01 DJ Delorie <dj@redhat.com> + + * config/mep/mep.c (mep_handle_option): Leave IVC2 control + registers as fixed. + (mep_interrupt_saved_reg): Save appropriate IVC2 control registers. + * config/mep/mep-ivc2.cpu: Add VOLATILE to insns that make + unspecified accesses to control registers. + * config/mep/intrinsics.md: Regenerate. + * config/mep/intrinsics.h: Regenerate. + * config/mep/mep-intrin.h: Regenerate. + +2009-07-01 Anthony Green <green@moxielogic.com> + + * config/moxie/moxie.c (moxie_expand_prologue): Use dec + instruction when possible. + (moxie_expand_prologue): Ditto. Also, save an instruction and + some complexity by popping off of $r12 instead of $sp. + * config/moxie/moxie.md (movsi_pop): Don't assume $sp. Take two + operands. + +2009-07-01 Richard Henderson <rth@redhat.com> + + PR bootstrap/40347 + * function.c (reposition_prologue_and_epilogue_notes): If epilogue + contained no insns, reposition note before last insn. + +2009-07-01 Richard Henderson <rth@redhat.com> + + PR debug/40431 + * dwarf2out.c (def_cfa_1): Revert 2009-06-11 change for + DW_CFA_def_cfa_offset and DW_CFA_def_cfa. + +2009-07-01 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR bootstrap/40558 + * config/rs6000/rs6000.c (print_operand): Undo change that breaks + darwin9 for printing reg addresses with %y. + +2009-07-01 Adam Nemet <anemet@caviumnetworks.com> + + * combine.c (force_to_mode): Handle TRUNCATE. Factor out + truncation from operands in binary operations. + +2009-07-01 Adam Nemet <anemet@caviumnetworks.com> + + Revert: + 2009-01-11 Adam Nemet <anemet@caviumnetworks.com> + * expmed.c (store_bit_field_1): Properly truncate the paradoxical + subreg of op0 to the original op0. + + * expmed.c (store_bit_field_1): Use a temporary as the destination + instead of a paradoxical subreg when we need to truncate the result. + +2009-07-01 DJ Delorie <dj@redhat.com> + + * config/mep/mep-ivc2.cpu (cmov, cmovc, cmovh): Add intrinsic + names to VLIW variants. + (ivc2rm, ivc2crn): Make data type consistent with non-VLIW variants. + * config/mep/intrinsics.md: Regenerate. + * config/mep/intrinsics.h: Regenerate. + * config/mep/mep-intrin.h: Regenerate. + +2009-07-01 Jakub Jelinek <jakub@redhat.com> + + PR debug/40462 + * jump.c (returnjump_p): Revert last patch. + * dwarf2out.c (dwarf2out_begin_epilogue): Handle SEQUENCEs. + +2009-07-01 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + PR target/40575 + * pa.md (casesi32p): Use jump table label to determine the offset + of the jump table. + (casesi64p): Likewise. + + * pa.c (forward_branch_p): Return bool type. Use instruction + addresses when available. Assert that INSN has a jump label. + (pa_adjust_insn_length): Don't call forward_branch_p if INSN doesn't + have a jump label. + +2009-07-01 Richard Guenther <rguenther@suse.de> + + PR tree-optimization/19831 + * tree-ssa-dce.c (propagate_necessity): Calls to functions + that only act as barriers do not make any previous stores necessary. + * tree-ssa-structalias.c (handle_lhs_call): Delay making + HEAP variables global, do not add a constraint from nonlocal. + (find_func_aliases): Handle escapes through return statements. + (compute_points_to_sets): Make escaped HEAP variables global. + +2009-07-01 Paolo Bonzini <bonzini@gnu.org> + + PR bootstrap/40597 + * expmed.c (emit_store_flag): Perform a conversion if necessary, + after reducing a DImode cstore to SImode. + +2009-07-01 Paolo Bonzini <bonzini@gnu.org> + + * expr.c (expand_expr_real_1): Reinstate fallthrough to + TRUTH_ANDIF_EXPR if do_store_flag returns NULL. + +2009-07-01 Maciej W. Rozycki <macro@linux-mips.org> + + * config/vax/vax.h (TARGET_BSD_DIVMOD): New macro. Set to 1. + * config/vax/linux.h (TARGET_BSD_DIVMOD): New macro. Redefine the + to 0. + * config/vax/vax.c (vax_init_libfuncs): Only redefine udiv_optab + and umod_optab if TARGET_BSD_DIVMOD. + * config/vax/lib1funcs.asm: New file. + * config/vax/t-linux: New file. + * config.gcc (vax-*-linux*): Set tmake_file to vax/t-linux. + +2009-06-30 Jakub Jelinek <jakub@redhat.com> + + PR c++/40566 + * convert.c (convert_to_integer) <case COND_EXPR>: Don't convert + to type arguments that have void type. + + PR debug/40573 + * dwarf2out.c (gen_formal_parameter_die): Call + equate_decl_number_to_die if node is different from origin. + +2009-06-30 Anthony Green <green@moxielogic.com> + + Clean up moxie port for --enable-build-with-cxx. + * config/moxie/moxie.c (moxie_function_value): First two + parameters are const_tree, not tree. + * config/moxie/moxie.h (enum reg_class): Rename CC_REG to CC_REGS. + (REG_CLASS_NAMES): Ditto. + (REGNO_REG_CLASS): Ditto. + * config/moxie/moxie-protos.h (moxie_override_options): Declare. + (moxie_function_value): Fix constyness of arguments. + +2009-06-30 Eric Botcazou <ebotcazou@adacore.com> + + * cgraphunit.c (cgraph_finalize_compilation_unit): Call + finalize_size_functions before further processing. + * stor-layout.c: Include cgraph.h, tree-inline.h and tree-dump.h. + (variable_size): Call self_referential_size on size expressions + that contain a PLACEHOLDER_EXPR. + (size_functions): New static variable. + (copy_self_referential_tree_r): New static function. + (self_referential_size): Likewise. + (finalize_size_functions): New global function. + * tree.c: Include tree-inline.h. + (push_without_duplicates): New static function. + (find_placeholder_in_expr): New global function. + (substitute_in_expr) <tcc_declaration>: Return the replacement object + on equality. + <tcc_expression>: Likewise. + <tcc_vl_exp>: If the replacement object is a constant, try to inline + the call in the expression. + * tree.h (finalize_size_functions): Declare. + (find_placeholder_in_expr): Likewise. + (FIND_PLACEHOLDER_IN_EXPR): New macro. + (substitute_placeholder_in_expr): Update comment. + * tree-inline.c (remap_decl): Do not unshare trees if do_not_unshare + is true. + (copy_tree_body_r): Likewise. + (copy_tree_body): New static function. + (maybe_inline_call_in_expr): New global function. + * tree-inline.h (struct copy_body_data): Add do_not_unshare field. + (maybe_inline_call_in_expr): Declare. + * Makefile.in (tree.o): Depend on TREE_INLINE_H. + (stor-layout.o): Depend on CGRAPH_H, TREE_INLINE_H, TREE_DUMP_H and + GIMPLE_H. + +2009-06-30 Richard Guenther <rguenther@suse.de> + + * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1): Always + continue walking. + (propagate_necessity): Do not mark reaching defs of stores + as necessary. + +2009-06-30 Jan Hubicka <jh@suse.cz> + + * cfgloopanal.c (check_irred): Move into ... + (mark_irreducible_loops): ... here; return true if ireducible + loops was found. + * ipa-pure-const.c: Include cfgloop.h and tree-scalar-evolution.h + (analyze_function): Try to prove loop finiteness. + * cfgloop.h (mark_irreducible_loops): Update prototype. + * Makefile.in (ipa-pure-const.o): Add dependency on SCEV and CFGLOOP. + +2009-06-30 Basile Starynkevitch <basile@starynkevitch.net> + + * Makefile.in (PLUGIN_HEADERS): added ggc, tree-dump, pretty-print. + +2009-06-30 Ira Rosen <irar@il.ibm.com> + + PR tree-optimization/40542 + * tree-vect-stmts.c (vect_analyze_stmt): Don't vectorize volatile + types. + +2009-06-30 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/40582 + * tree-sra.c (build_ref_for_offset_1): Use types_compatible_p rather + than useless_type_conversion_p. + (generate_subtree_copies): Increment sra_stats.subtree_copies at a + proper place. + +2009-06-30 Martin Jambor <mjambor@suse.cz> + + PR middle-end/40554 + * tree-sra.c (sra_modify_expr): Add access->offset to start_offset. + +2009-06-30 Richard Guenther <rguenther@suse.de> + + * tree-ssa-alias.c (walk_aliased_vdefs_1): Change interface to + use ao_ref references. + (walk_aliased_vdefs): Likewise. + * tree-ssa-alias.h (walk_aliased_vdefs): Adjust prototype. + * tree-ssa-dce.c (struct ref_data): Remove. + (mark_aliased_reaching_defs_necessary_1): Use the ao_ref argument. + (mark_aliased_reaching_defs_necessary): Adjust. + (mark_all_reaching_defs_necessary_1): Likewise. + +2009-06-30 Paolo Bonzini <bonzini@gnu.org> + + PR boostrap/40597 + * expmed.c (emit_cstore): New name of emit_store_flag_1. + (emit_store_flag_1): Extract from emit_store_flag, adjust + calls to (what now is) emit_cstore. + (emit_store_flag): Call emit_store_flag_1 and also use it + for what used to be recursive calls. + +2009-06-30 Wei Guozhi <carrot@google.com> + + PR/40416 + * tree-ssa-sink.c (statement_sink_location): Stop sinking expression + if the target bb post dominates from bb. + * config/i386/i386.c (memory_address_length): Check existence of base + register before using it. + +2009-06-29 DJ Delorie <dj@redhat.com> + + * doc/install.texi (mep-x-elf): Correct chip's full name. + +2009-06-29 H.J. Lu <hongjiu.lu@intel.com> + + * doc/extend.texi: Fix typo. + +2009-06-29 Tom Tromey <tromey@redhat.com> + + * dwarf2.h: Remove. + * Makefile.in (DWARF2_H): New variable. + (except.o): Use it. + (dwarf2out.o): Likewise. + (dwarf2asm.o): Likewise. + * config/i386/t-i386: Use DWARF2_H. + * except.c: Include elf/dwarf2.h. + * unwind-dw2.c: Include elf/dwarf2.h. + * dwarf2out.c: Include elf/dwarf2.h. + (dw_loc_descr_struct) <dw_loc_opc>: Now a bitfield. + <dtprel>: New field. + (dwarf_stack_op_name): Don't handle INTERNAL_DW_OP_tls_addr. + (size_of_loc_descr): Likewise. + (output_loc_operands_raw): Likewise. + (output_loc_operands): Handle new dtprel field. + (loc_checksum): Update. + (loc_descriptor_from_tree_1) <VAR_DDECL>: Set dtprel field. + * unwind-dw2-fde-glibc.c: Include elf/dwarf2.h. + * unwind-dw2-fde.c: Include elf/dwarf2.h. + * dwarf2asm.c: Include elf/dwarf2.h. + * unwind-dw2-fde-darwin.c: Include elf/dwarf2.h. + * config/mmix/mmix.c: Include elf/dwarf2.h. + * config/rs6000/darwin-fallback.c: Include elf/dwarf2.h. + * config/xtensa/unwind-dw2-xtensa.c: Include elf/dwarf2.h. + * config/sh/sh.c: Include elf/dwarf2.h. + * config/i386/i386.c: Include elf/dwarf2.h. + +2009-06-29 DJ Delorie <dj@redhat.com> + + * config/mep/mep.h (CPP_SPEC): Remove __cop macro. + + * doc/extend.texi: Add MeP attributes and pragmas. + * doc/invoke.text: Add MeP Options. + * doc/contrib.texi: Add MeP contribution. + * doc/md.texi: Add MeP constraints. + * doc/install.texi: Add MeP target. + +2009-06-30 Anatoly Sokolov <aesok@post.ru> + + * target.h (struct gcc_target): Add frame_pointer_required field. + * target-def.h (TARGET_FRAME_POINTER_REQUIRED): New. + (TARGET_INITIALIZER): Use TARGET_FRAME_POINTER_REQUIRED. + * ira.c (setup_eliminable_regset): Use frame_pointer_required target + hook. + * reload1.c (update_eliminables): (Ditto.). + * gcc/system.h (FRAME_POINTER_REQUIRED): Poison. + * doc/tm.texi (FRAME_POINTER_REQUIRED): Revise documentation. + (INITIAL_FRAME_POINTER_OFFSET): (Ditto.). + + * config/arc/arc.h (FRAME_POINTER_REQUIRED): Remove macro. + + * config/arm/arm.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/arm/arm.c (TARGET_FRAME_POINTER_REQUIRED): Define. + (arm_frame_pointer_required): New function. + + * config/avr/avr.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/avr/avr.c (TARGET_FRAME_POINTER_REQUIRED): Define macro. + (avr_frame_pointer_required_p): Declare as static. + * config/avr/avr-protos.h (avr_frame_pointer_required_p): Remove. + + * config/bfin/bfin.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/bfin/bfin.c (TARGET_FRAME_POINTER_REQUIRED): Define. + (bfin_frame_pointer_required): Make as static, change return type + to bool. + * config/bfin/bfin-protos.h (bfin_frame_pointer_required): Remove. + + * config/cris/cris.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/cris/cris.c (TARGET_FRAME_POINTER_REQUIRED): Define macro. + (cris_frame_pointer_required): New function. + + * config/crx/crx.h (FRAME_POINTER_REQUIRED): Remove macro. + + * config/fr30/fr30.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/fr30/fr30.c (TARGET_FRAME_POINTER_REQUIRED): Define macro. + (fr30_frame_pointer_required): New function. + + * config/frv/frv.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/frv/frv.c (TARGET_FRAME_POINTER_REQUIRED): Define. + (frv_frame_pointer_required): Make as static, change return type + to bool. + * config/bfin/bfin-protos.h (frv_frame_pointer_required): Remove. + + * config/i386/i386.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/i386/i386.c (TARGET_FRAME_POINTER_REQUIRED): Define macro. + (ix86_frame_pointer_required): Make as static, change return type to + bool. + * config/i386/i386-protos.h (ix86_frame_pointer_required): Remove. + + * config/m32c/m32c.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/m32c/m32c.c (TARGET_FRAME_POINTER_REQUIRED): Define macro. + + * config/m32r/m32r.h (FRAME_POINTER_REQUIRED): Remove macro. + + * config/mcore/mcore.h (CAN_ELIMINATE): Remove macro. + + * config/mep/mep.h (FRAME_POINTER_REQUIRED): Remove macro. + + * config/mips/mips.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/mips/mips.c (TARGET_FRAME_POINTER_REQUIRED): Define macro. + (mips_frame_pointer_required): Make as static. + * config/mips/mips-protos.h (mips_frame_pointer_required): Remove. + + * config/mmix/mmix.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/mmix/mmix.c (TARGET_FRAME_POINTER_REQUIRED): Define macro. + (mmix_frame_pointer_required): Mew function. + + * config/moxie/moxie.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/moxie/moxie.c (TARGET_FRAME_POINTER_REQUIRED): Define macro. + + * config/pa/pa.h (FRAME_POINTER_REQUIRED): Remove macro. + + * config/score/score.h (FRAME_POINTER_REQUIRED): Remove macro. + + * config/sh/sh.h (CAN_ELIMINATE): Remove macro. + + * config/sparc/sparc.h (FRAME_POINTER_REQUIRED): Remove macro. + (CAN_ELIMINATE): Redefine. + * config/sparc/sparc.c (TARGET_FRAME_POINTER_REQUIRED): Define macro. + (sparc_frame_pointer_required): New function. + (sparc_can_eliminate): New function. + * config/sparc/sparc-protos.h (sparc_can_eliminate): Declare. + + * config/vax/vax.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/vax/vax.c (TARGET_FRAME_POINTER_REQUIRED): Define. + + * config/xtensa/xtensa.h (FRAME_POINTER_REQUIRED): Remove macro. + * config/xtensa/xtensa.c (TARGET_FRAME_POINTER_REQUIRED): Define. + (xtensa_frame_pointer_required): Make as static, change return type + to bool. + * config/xtensa/xtensa-protos.h (xtensa_frame_pointer_required): + Remove. + +2009-06-29 Olatunji Ruwase <tjruwase@google.com> + + * doc/plugins.texi: Document PLUGIN_START_UNIT. + * toplev.c (compile_file): Call PLUGIN_START_UNIT. + * gcc-plugin.h (PLUGIN_START_UNIT): Added new event. + * plugin.c (plugin_event_name): Added PLUGIN_START_UNIT. + (register_callback): Handle PLUGIN_START_UNIT. + (invoke_plugin_callbacks): Handle PLUGIN_START_UNIT. + 2009-06-29 Eric Botcazou <ebotcazou@adacore.com> * tree.c (process_call_operands): Propagate TREE_READONLY from the @@ -387,6 +901,19 @@ Pat Haugen <pthaugen@us.ibm.com> Revital Eres <ERES@il.ibm.com> + * config/rs6000/rs6000.c (print_operand): Correct lossage message + for %c error. Add %x support to print VSX registers as a unified + register set, instead of separate float and altivec registers. + Switch to use VECTOR_MEM_ALTIVEC_P instead of TARGET_ALTIVEC for + %y case, and add support for VSX pre-modify addresses. + (output_toc): Add assert for CONST containing an integer constant + in the PLUS case. + (rs6000_adjust_cost): Add POWER7 support. + (insn_must_be_first_in_group): Ditto. + (insn_must_be_last_in_group): Ditto. + (rs6000_emit_popcount): Ditto. + (rs6000_vector_mode_supported_p): Ditto. + * config/rs6000/rs6000-protos.h (rs6000_secondary_reload_class): Change some of the functions called by macros to being called through a pointer, so debug functions can be inserted if diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 8430f85e62f..207804cebd2 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20090629 +20090705 diff --git a/gcc/Makefile.in b/gcc/Makefile.in index 22e8efe1faa..0e3ba12a923 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in @@ -427,6 +427,7 @@ SPLAY_TREE_H= $(srcdir)/../include/splay-tree.h FIBHEAP_H = $(srcdir)/../include/fibheap.h PARTITION_H = $(srcdir)/../include/partition.h MD5_H = $(srcdir)/../include/md5.h +DWARF2_H = $(srcdir)/../include/elf/dwarf2.h # Default native SYSTEM_HEADER_DIR, to be overridden by targets. NATIVE_SYSTEM_HEADER_DIR = /usr/include @@ -2159,8 +2160,8 @@ langhooks.o : langhooks.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ tree.o : tree.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) \ all-tree.def $(FLAGS_H) $(FUNCTION_H) $(PARAMS_H) \ $(TOPLEV_H) $(GGC_H) $(HASHTAB_H) $(TARGET_H) output.h $(TM_P_H) langhooks.h \ - $(REAL_H) gt-tree.h tree-iterator.h $(BASIC_BLOCK_H) $(TREE_FLOW_H) \ - $(OBSTACK_H) pointer-set.h fixed-value.h + $(REAL_H) gt-tree.h $(TREE_INLINE_H) tree-iterator.h $(BASIC_BLOCK_H) \ + $(TREE_FLOW_H) $(OBSTACK_H) pointer-set.h fixed-value.h tree-dump.o: tree-dump.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ $(TREE_H) langhooks.h $(TOPLEV_H) $(SPLAY_TREE_H) $(TREE_DUMP_H) \ tree-iterator.h $(TREE_PASS_H) $(DIAGNOSTIC_H) $(REAL_H) fixed-value.h @@ -2176,7 +2177,7 @@ print-tree.o : print-tree.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H stor-layout.o : stor-layout.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ $(TREE_H) $(PARAMS_H) $(FLAGS_H) $(FUNCTION_H) $(EXPR_H) output.h $(RTL_H) \ $(GGC_H) $(TM_P_H) $(TARGET_H) langhooks.h $(REGS_H) gt-stor-layout.h \ - $(TOPLEV_H) + $(TOPLEV_H) $(CGRAPH_H) $(TREE_INLINE_H) $(TREE_DUMP_H) $(GIMPLE_H) tree-ssa-structalias.o: tree-ssa-structalias.c \ $(SYSTEM_H) $(CONFIG_H) coretypes.h $(TM_H) $(GGC_H) $(OBSTACK_H) $(BITMAP_H) \ $(FLAGS_H) $(RTL_H) $(TM_P_H) hard-reg-set.h $(BASIC_BLOCK_H) output.h \ @@ -2446,7 +2447,7 @@ omega.o : omega.c omega.h $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ $(GGC_H) $(TREE_H) $(DIAGNOSTIC_H) varray.h $(TREE_PASS_H) $(PARAMS_H) tree-chrec.o: tree-chrec.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ $(GGC_H) $(TREE_H) $(REAL_H) $(SCEV_H) $(TREE_PASS_H) $(PARAMS_H) \ - $(DIAGNOSTIC_H) $(CFGLOOP_H) $(TREE_FLOW_H) + $(DIAGNOSTIC_H) $(CFGLOOP_H) $(TREE_FLOW_H) $(FLAGS_H) tree-scalar-evolution.o: tree-scalar-evolution.c $(CONFIG_H) $(SYSTEM_H) \ coretypes.h $(TM_H) $(GGC_H) $(TREE_H) $(REAL_H) $(RTL_H) \ $(BASIC_BLOCK_H) $(DIAGNOSTIC_H) $(TREE_FLOW_H) $(TREE_DUMP_H) \ @@ -2647,7 +2648,7 @@ except.o : except.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \ $(TREE_H) $(FLAGS_H) $(EXCEPT_H) $(FUNCTION_H) $(EXPR_H) libfuncs.h \ langhooks.h insn-config.h hard-reg-set.h $(BASIC_BLOCK_H) output.h \ dwarf2asm.h dwarf2out.h $(TOPLEV_H) $(HASHTAB_H) intl.h $(GGC_H) \ - gt-except.h $(CGRAPH_H) $(INTEGRATE_H) $(DIAGNOSTIC_H) dwarf2.h \ + gt-except.h $(CGRAPH_H) $(INTEGRATE_H) $(DIAGNOSTIC_H) $(DWARF2_H) \ $(TARGET_H) $(TM_P_H) $(TREE_PASS_H) $(TIMEVAR_H) $(TREE_FLOW_H) expr.o : expr.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \ $(TREE_H) $(FLAGS_H) $(FUNCTION_H) $(REGS_H) $(EXPR_H) $(OPTABS_H) \ @@ -2690,14 +2691,14 @@ sdbout.o : sdbout.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) debug.h \ output.h $(TOPLEV_H) $(TM_P_H) gsyms.h langhooks.h $(TARGET_H) sdbout.h \ gt-sdbout.h reload.h $(VARRAY_H) dwarf2out.o : dwarf2out.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ - $(TREE_H) version.h $(RTL_H) dwarf2.h debug.h $(FLAGS_H) insn-config.h \ + $(TREE_H) version.h $(RTL_H) $(DWARF2_H) debug.h $(FLAGS_H) insn-config.h \ output.h $(DIAGNOSTIC_H) $(REAL_H) hard-reg-set.h $(REGS_H) $(EXPR_H) \ libfuncs.h $(TOPLEV_H) dwarf2out.h reload.h $(GGC_H) $(EXCEPT_H) dwarf2asm.h \ $(TM_P_H) langhooks.h $(HASHTAB_H) gt-dwarf2out.h $(TARGET_H) $(CGRAPH_H) \ $(MD5_H) $(INPUT_H) $(FUNCTION_H) $(VARRAY_H) dwarf2asm.o : dwarf2asm.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ $(FLAGS_H) $(RTL_H) $(TREE_H) output.h dwarf2asm.h $(TM_P_H) $(GGC_H) \ - gt-dwarf2asm.h dwarf2.h $(SPLAY_TREE_H) $(TARGET_H) + gt-dwarf2asm.h $(DWARF2_H) $(SPLAY_TREE_H) $(TARGET_H) vmsdbgout.o : vmsdbgout.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) version.h \ $(FLAGS_H) $(RTL_H) output.h vmsdbg.h debug.h langhooks.h $(FUNCTION_H) $(TARGET_H) xcoffout.o : xcoffout.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ @@ -2779,7 +2780,7 @@ ipa-pure-const.o : ipa-pure-const.c $(CONFIG_H) $(SYSTEM_H) \ coretypes.h $(TM_H) $(TREE_H) $(TREE_FLOW_H) $(TREE_INLINE_H) langhooks.h \ pointer-set.h $(GGC_H) $(IPA_UTILS_H) $(TARGET_H) \ $(GIMPLE_H) $(CGRAPH_H) output.h $(FLAGS_H) $(TREE_PASS_H) $(TIMEVAR_H) \ - $(DIAGNOSTIC_H) + $(DIAGNOSTIC_H) $(CFGLOOP_H) $(SCEV_H) ipa-type-escape.o : ipa-type-escape.c $(CONFIG_H) $(SYSTEM_H) \ coretypes.h $(TM_H) $(TREE_H) $(TREE_FLOW_H) $(TREE_INLINE_H) langhooks.h \ pointer-set.h $(GGC_H) $(IPA_TYPE_ESCAPE_H) $(IPA_UTILS_H) $(SPLAY_TREE_H) \ @@ -4140,6 +4141,7 @@ installdirs: PLUGIN_HEADERS = $(TREE_H) $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ $(TOPLEV_H) $(BASIC_BLOCK_H) $(GIMPLE_H) $(TREE_PASS_H) $(GCC_PLUGIN_H) \ + $(GGC_H) $(TREE_DUMP_H) $(PRETTY_PRINT_H) \ intl.h $(PLUGIN_VERSION_H) # Install the headers needed to build a plugin. diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index b4c1dc080c6..a2ad9719619 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,3 +1,66 @@ +2009-07-04 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> + + PR ada/40608 + * init.c (APPLE): Include <mach/mach_init.h>. + (__gnat_error_handler, APPLE): Add ATTRIBUTE_UNUSED marker. + +2009-07-04 Eric Botcazou <ebotcazou@adacore.com> + + * ada-tree.h (SET_TYPE_LANG_SPECIFIC): Rewrite. + (SET_DECL_LANG_SPECIFIC): Likewise. + (TYPE_RM_VALUE): New macro. + (SET_TYPE_RM_VALUE): Likewise. + (TYPE_RM_SIZE): Rewrite in terms of TYPE_RM_VALUE. + (TYPE_RM_MIN_VALUE): Likewise. + (TYPE_RM_MAX_VALUE): Likewise. + (SET_TYPE_RM_SIZE): Rewrite in terms of SET_TYPE_RM_VALUE. + (SET_TYPE_RM_MIN_VALUE): Likewise. + (SET_TYPE_RM_MAX_VALUE): Likewise. + * decl.c (gnat_to_gnu_entity) <E_Array_Subtype>: Remove kludge. + +2009-07-04 Laurent GUERBY <laurent@guerby.net> + + PR ada/40631 + * tracebak.c (__gnat_backtrace): Fix old-style definition. + +2009-07-02 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> + + * tracebak.c [i386 && sun] (IS_BAD_PTR): Use -1UL in comparison. + +2009-07-01 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + PR ada/40609 + * init.c (__gnat_error_handler, HP-UX): Add ATTRIBUTE_UNUSED marker to + ucontext argument. + +2009-07-01 Eric Botcazou <ebotcazou@adacore.com> + + * init.c (__gnat_error_handler, Solaris): Add ATTRIBUTE_UNUSED marker. + +2009-06-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/utils2.c (build_binary_op) <MODIFY_EXPR>: Do not use + the type of the left operand if it pads a self-referential type when + the right operand is a constructor. + + * gcc-interface/lang-specs.h: Fix copyright date. + +2009-06-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/decl.c: Include tree-inline.h. + (annotate_value) <CALL_EXPR>: Try to inline the call in the expression. + * gcc-interface/utils.c (max_size) <CALL_EXPR>: Likewise. + * gcc-interface/utils2.c: Include tree-inline. + (known_alignment) <CALL_EXPR>: Likewise. + +2009-06-30 Eric Botcazou <ebotcazou@adacore.com> + + * raise-gcc.c: Include dwarf2.h conditionally. + +2009-06-29 Tom Tromey <tromey@redhat.com> + + * raise-gcc.c: Include elf/dwarf2.h. + 2009-06-27 Laurent GUERBY <laurent@guerby.net> * tb-gcc.c (trace_callback): Add casts to silence warning. diff --git a/gcc/ada/gcc-interface/ada-tree.h b/gcc/ada/gcc-interface/ada-tree.h index 38bc8620815..8d157224f29 100644 --- a/gcc/ada/gcc-interface/ada-tree.h +++ b/gcc/ada/gcc-interface/ada-tree.h @@ -40,19 +40,25 @@ struct GTY(()) lang_decl { tree t; }; #define GET_TYPE_LANG_SPECIFIC(NODE) \ (TYPE_LANG_SPECIFIC (NODE) ? TYPE_LANG_SPECIFIC (NODE)->t : NULL_TREE) -#define SET_TYPE_LANG_SPECIFIC(NODE, X) \ - (TYPE_LANG_SPECIFIC (NODE) \ - = (TYPE_LANG_SPECIFIC (NODE) \ - ? TYPE_LANG_SPECIFIC (NODE) : GGC_NEW (struct lang_type)))->t = (X) +#define SET_TYPE_LANG_SPECIFIC(NODE, X) \ +do { \ + tree tmp = (X); \ + if (!TYPE_LANG_SPECIFIC (NODE)) \ + TYPE_LANG_SPECIFIC (NODE) = GGC_NEW (struct lang_type); \ + TYPE_LANG_SPECIFIC (NODE)->t = tmp; \ +} while (0) /* Macros to get and set the tree in DECL_LANG_SPECIFIC. */ #define GET_DECL_LANG_SPECIFIC(NODE) \ (DECL_LANG_SPECIFIC (NODE) ? DECL_LANG_SPECIFIC (NODE)->t : NULL_TREE) -#define SET_DECL_LANG_SPECIFIC(NODE, X) \ - (DECL_LANG_SPECIFIC (NODE) \ - = (DECL_LANG_SPECIFIC (NODE) \ - ? DECL_LANG_SPECIFIC (NODE) : GGC_NEW (struct lang_decl)))->t = (X) +#define SET_DECL_LANG_SPECIFIC(NODE, X) \ +do { \ + tree tmp = (X); \ + if (!DECL_LANG_SPECIFIC (NODE)) \ + DECL_LANG_SPECIFIC (NODE) = GGC_NEW (struct lang_decl); \ + DECL_LANG_SPECIFIC (NODE)->t = tmp; \ +} while (0) /* Flags added to type nodes. */ @@ -184,6 +190,19 @@ struct GTY(()) lang_decl { tree t; }; /* For numerical types, this holds various RM-defined values. */ #define TYPE_RM_VALUES(NODE) TYPE_LANG_SLOT_1 (NUMERICAL_TYPE_CHECK (NODE)) +/* Macros to get and set the individual values in TYPE_RM_VALUES. */ +#define TYPE_RM_VALUE(NODE, N) \ + (TYPE_RM_VALUES (NODE) \ + ? TREE_VEC_ELT (TYPE_RM_VALUES (NODE), (N)) : NULL_TREE) + +#define SET_TYPE_RM_VALUE(NODE, N, X) \ +do { \ + tree tmp = (X); \ + if (!TYPE_RM_VALUES (NODE)) \ + TYPE_RM_VALUES (NODE) = make_tree_vec (3); \ + TREE_VEC_ELT (TYPE_RM_VALUES (NODE), (N)) = tmp; \ +} while (0) + /* For numerical types, this is the RM size of the type, aka its precision. There is a discrepancy between what is called precision here (and more generally throughout gigi) and what is called precision in the GCC type @@ -196,12 +215,8 @@ struct GTY(()) lang_decl { tree t; }; the optimizer can pretend that they simply don't exist. Therefore they must be within the range of values allowed by the precision in the GCC sense, hence TYPE_PRECISION be set to the Esize, not the RM size. */ -#define TYPE_RM_SIZE(NODE) \ - (TYPE_RM_VALUES (NODE) ? TREE_VEC_ELT (TYPE_RM_VALUES (NODE), 0) : NULL_TREE) -#define SET_TYPE_RM_SIZE(NODE, X) \ - TREE_VEC_ELT ((TYPE_RM_VALUES (NODE) \ - = (TYPE_RM_VALUES (NODE) \ - ? TYPE_RM_VALUES (NODE) : make_tree_vec (3))), 0) = (X) +#define TYPE_RM_SIZE(NODE) TYPE_RM_VALUE ((NODE), 0) +#define SET_TYPE_RM_SIZE(NODE, X) SET_TYPE_RM_VALUE ((NODE), 0, (X)) /* For numerical types, this is the RM lower bound of the type. There is again a discrepancy between this lower bound and the GCC lower bound, @@ -212,12 +227,8 @@ struct GTY(()) lang_decl { tree t; }; the optimizer can pretend that they simply don't exist. Therefore they must be within the range of values allowed by the lower bound in the GCC sense, hence the GCC lower bound be set to that of the base type. */ -#define TYPE_RM_MIN_VALUE(NODE) \ - (TYPE_RM_VALUES (NODE) ? TREE_VEC_ELT (TYPE_RM_VALUES (NODE), 1) : NULL_TREE) -#define SET_TYPE_RM_MIN_VALUE(NODE, X) \ - TREE_VEC_ELT ((TYPE_RM_VALUES (NODE) \ - = (TYPE_RM_VALUES (NODE) \ - ? TYPE_RM_VALUES (NODE) : make_tree_vec (3))), 1) = (X) +#define TYPE_RM_MIN_VALUE(NODE) TYPE_RM_VALUE ((NODE), 1) +#define SET_TYPE_RM_MIN_VALUE(NODE, X) SET_TYPE_RM_VALUE ((NODE), 1, (X)) /* For numerical types, this is the RM upper bound of the type. There is again a discrepancy between this upper bound and the GCC upper bound, @@ -228,12 +239,8 @@ struct GTY(()) lang_decl { tree t; }; the optimizer can pretend that they simply don't exist. Therefore they must be within the range of values allowed by the upper bound in the GCC sense, hence the GCC upper bound be set to that of the base type. */ -#define TYPE_RM_MAX_VALUE(NODE) \ - (TYPE_RM_VALUES (NODE) ? TREE_VEC_ELT (TYPE_RM_VALUES (NODE), 2) : NULL_TREE) -#define SET_TYPE_RM_MAX_VALUE(NODE, X) \ - TREE_VEC_ELT ((TYPE_RM_VALUES (NODE) \ - = (TYPE_RM_VALUES (NODE) \ - ? TYPE_RM_VALUES (NODE) : make_tree_vec (3))), 2) = (X) +#define TYPE_RM_MAX_VALUE(NODE) TYPE_RM_VALUE ((NODE), 2) +#define SET_TYPE_RM_MAX_VALUE(NODE, X) SET_TYPE_RM_VALUE ((NODE), 2, (X)) /* For numerical types, this is the lower bound of the type, i.e. the RM lower bound for language-defined types and the GCC lower bound for others. */ diff --git a/gcc/ada/gcc-interface/decl.c b/gcc/ada/gcc-interface/decl.c index 48acbfbe3c1..42086128cd7 100644 --- a/gcc/ada/gcc-interface/decl.c +++ b/gcc/ada/gcc-interface/decl.c @@ -33,6 +33,7 @@ #include "ggc.h" #include "target.h" #include "expr.h" +#include "tree-inline.h" #include "ada.h" #include "types.h" @@ -2628,12 +2629,6 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, int definition) #endif } - /* ??? This is necessary to make sure that the container is - allocated with a null tree upfront; otherwise, it could - be allocated with an uninitialized tree that is accessed - before being set below. See ada-tree.h for details. */ - SET_TYPE_ACTUAL_BOUNDS (gnu_inner_type, NULL_TREE); - for (gnat_index = First_Index (gnat_entity); Present (gnat_index); gnat_index = Next_Index (gnat_index)) SET_TYPE_ACTUAL_BOUNDS @@ -7190,6 +7185,15 @@ annotate_value (tree gnu_size) case EQ_EXPR: tcode = Eq_Expr; break; case NE_EXPR: tcode = Ne_Expr; break; + case CALL_EXPR: + { + tree t = maybe_inline_call_in_expr (gnu_size); + if (t) + return annotate_value (t); + } + + /* Fall through... */ + default: return No_Uint; } diff --git a/gcc/ada/gcc-interface/lang-specs.h b/gcc/ada/gcc-interface/lang-specs.h index 1afba3706b4..e0c1be9e103 100644 --- a/gcc/ada/gcc-interface/lang-specs.h +++ b/gcc/ada/gcc-interface/lang-specs.h @@ -6,7 +6,7 @@ * * * C Header File * * * - * Copyright (C) 1992-2008, Free Software Foundation, Inc. * + * Copyright (C) 1992-2009, Free Software Foundation, Inc. * * * * GNAT is free software; you can redistribute it and/or modify it under * * terms of the GNU General Public License as published by the Free Soft- * diff --git a/gcc/ada/gcc-interface/utils.c b/gcc/ada/gcc-interface/utils.c index a4d77a39c01..aa12eb77506 100644 --- a/gcc/ada/gcc-interface/utils.c +++ b/gcc/ada/gcc-interface/utils.c @@ -2333,10 +2333,15 @@ max_size (tree exp, bool max_p) case tcc_vl_exp: if (code == CALL_EXPR) { - tree *argarray; - int i, n = call_expr_nargs (exp); - gcc_assert (n > 0); + tree t, *argarray; + int n, i; + + t = maybe_inline_call_in_expr (exp); + if (t) + return max_size (t, max_p); + n = call_expr_nargs (exp); + gcc_assert (n > 0); argarray = (tree *) alloca (n * sizeof (tree)); for (i = 0; i < n; i++) argarray[i] = max_size (CALL_EXPR_ARG (exp, i), max_p); diff --git a/gcc/ada/gcc-interface/utils2.c b/gcc/ada/gcc-interface/utils2.c index aab01f9b5d7..e60e5a093ae 100644 --- a/gcc/ada/gcc-interface/utils2.c +++ b/gcc/ada/gcc-interface/utils2.c @@ -31,6 +31,7 @@ #include "ggc.h" #include "flags.h" #include "output.h" +#include "tree-inline.h" #include "ada.h" #include "types.h" @@ -215,6 +216,15 @@ known_alignment (tree exp) this_alignment = expr_align (TREE_OPERAND (exp, 0)); break; + case CALL_EXPR: + { + tree t = maybe_inline_call_in_expr (exp); + if (t) + return known_alignment (t); + } + + /* Fall through... */ + default: /* For other pointer expressions, we assume that the pointed-to object is at least as aligned as the pointed-to type. Beware that we can @@ -697,9 +707,10 @@ build_binary_op (enum tree_code op_code, tree result_type, /* If we are copying between padded objects with compatible types, use the padded view of the objects, this is very likely more efficient. - Likewise for a padded that is assigned a constructor, in order to - avoid putting a VIEW_CONVERT_EXPR on the LHS. But don't do this if - we wouldn't have actually copied anything. */ + Likewise for a padded object that is assigned a constructor, if we + can convert the constructor to the inner type, to avoid putting a + VIEW_CONVERT_EXPR on the LHS. But don't do so if we wouldn't have + actually copied anything. */ else if (TREE_CODE (left_type) == RECORD_TYPE && TYPE_IS_PADDING_P (left_type) && TREE_CONSTANT (TYPE_SIZE (left_type)) @@ -709,9 +720,11 @@ build_binary_op (enum tree_code op_code, tree result_type, && TYPE_IS_PADDING_P (TREE_TYPE (TREE_OPERAND (right_operand, 0))) && gnat_types_compatible_p - (left_type, - TREE_TYPE (TREE_OPERAND (right_operand, 0)))) - || TREE_CODE (right_operand) == CONSTRUCTOR) + (left_type, + TREE_TYPE (TREE_OPERAND (right_operand, 0)))) + || (TREE_CODE (right_operand) == CONSTRUCTOR + && !CONTAINS_PLACEHOLDER_P + (DECL_SIZE (TYPE_FIELDS (left_type))))) && !integer_zerop (TYPE_SIZE (right_type))) operation_type = left_type; diff --git a/gcc/ada/init.c b/gcc/ada/init.c index d5c7cca43fc..3193dff00bb 100644 --- a/gcc/ada/init.c +++ b/gcc/ada/init.c @@ -441,7 +441,9 @@ __gnat_error_handler (int sig, siginfo_t *siginfo, void *ucontext); static void __gnat_error_handler - (int sig, siginfo_t *siginfo ATTRIBUTE_UNUSED, void *ucontext) + (int sig, + siginfo_t *siginfo ATTRIBUTE_UNUSED, + void *ucontext ATTRIBUTE_UNUSED) { struct Exception_Data *exception; const char *msg; @@ -1002,7 +1004,7 @@ __gnat_install_handler(void) static void __gnat_error_handler (int, siginfo_t *, ucontext_t *); static void -__gnat_error_handler (int sig, siginfo_t *sip, ucontext_t *uctx) +__gnat_error_handler (int sig, siginfo_t *sip, ucontext_t *cx ATTRIBUTE_UNUSED) { struct Exception_Data *exception; static int recurse = 0; @@ -2101,6 +2103,7 @@ __gnat_install_handler(void) #include <signal.h> #include <mach/mach_vm.h> +#include <mach/mach_init.h> #include <mach/vm_statistics.h> /* This must be in keeping with System.OS_Interface.Alternate_Stack_Size. */ @@ -2138,7 +2141,7 @@ __gnat_is_stack_guard (mach_vm_address_t addr) } static void -__gnat_error_handler (int sig, siginfo_t * si, void * uc) +__gnat_error_handler (int sig, siginfo_t * si, void * uc ATTRIBUTE_UNUSED) { struct Exception_Data *exception; const char *msg; diff --git a/gcc/ada/raise-gcc.c b/gcc/ada/raise-gcc.c index 1d9efb93b7f..ca20709ddc8 100644 --- a/gcc/ada/raise-gcc.c +++ b/gcc/ada/raise-gcc.c @@ -96,7 +96,11 @@ __gnat_Unwind_ForcedUnwind (_Unwind_Exception *, void *, void *); #ifdef IN_RTS /* For eh personality routine */ +#if (__GNUC__ * 10 + __GNUC_MINOR__ > 44) +#include "elf/dwarf2.h" +#else #include "dwarf2.h" +#endif #include "unwind-dw2-fde.h" #include "unwind-pe.h" diff --git a/gcc/ada/tracebak.c b/gcc/ada/tracebak.c index 63f93b37eb7..835b7a8d620 100644 --- a/gcc/ada/tracebak.c +++ b/gcc/ada/tracebak.c @@ -298,7 +298,7 @@ struct layout #include <windows.h> #define IS_BAD_PTR(ptr) (IsBadCodePtr((void *)ptr)) #elif defined (sun) -#define IS_BAD_PTR(ptr) ((unsigned long)ptr == -1) +#define IS_BAD_PTR(ptr) ((unsigned long)ptr == -1UL) #else #define IS_BAD_PTR(ptr) 0 #endif @@ -494,12 +494,11 @@ __gnat_backtrace (void **array, *------------------------------*/ int -__gnat_backtrace (array, size, exclude_min, exclude_max, skip_frames) - void **array ATTRIBUTE_UNUSED; - int size ATTRIBUTE_UNUSED; - void *exclude_min ATTRIBUTE_UNUSED; - void *exclude_max ATTRIBUTE_UNUSED; - int skip_frames ATTRIBUTE_UNUSED; +__gnat_backtrace (void **array ATTRIBUTE_UNUSED, + int size ATTRIBUTE_UNUSED, + void *exclude_min ATTRIBUTE_UNUSED, + void *exclude_max ATTRIBUTE_UNUSED, + int skip_frames ATTRIBUTE_UNUSED) { return 0; } diff --git a/gcc/cfgloop.h b/gcc/cfgloop.h index fe0120ec9df..2bc965b577b 100644 --- a/gcc/cfgloop.h +++ b/gcc/cfgloop.h @@ -205,7 +205,7 @@ struct loop *alloc_loop (void); extern void flow_loop_free (struct loop *); int flow_loop_nodes_find (basic_block, struct loop *); void fix_loop_structure (bitmap changed_bbs); -void mark_irreducible_loops (void); +bool mark_irreducible_loops (void); void release_recorded_exits (void); void record_loop_exits (void); void rescan_loop_exit (edge, bool, bool); diff --git a/gcc/cfgloopanal.c b/gcc/cfgloopanal.c index 2d31ca8a340..36e0d152265 100644 --- a/gcc/cfgloopanal.c +++ b/gcc/cfgloopanal.c @@ -52,26 +52,6 @@ just_once_each_iteration_p (const struct loop *loop, const_basic_block bb) return true; } -/* Marks the edge E in graph G irreducible if it connects two vertices in the - same scc. */ - -static void -check_irred (struct graph *g, struct graph_edge *e) -{ - edge real = (edge) e->data; - - /* All edges should lead from a component with higher number to the - one with lower one. */ - gcc_assert (g->vertices[e->src].component >= g->vertices[e->dest].component); - - if (g->vertices[e->src].component != g->vertices[e->dest].component) - return; - - real->flags |= EDGE_IRREDUCIBLE_LOOP; - if (flow_bb_inside_loop_p (real->src->loop_father, real->dest)) - real->src->flags |= BB_IRREDUCIBLE_LOOP; -} - /* Marks blocks and edges that are part of non-recognized loops; i.e. we throw away all latch edges and mark blocks inside any remaining cycle. Everything is a bit complicated due to fact we do not want to do this @@ -84,10 +64,11 @@ check_irred (struct graph *g, struct graph_edge *e) #define LOOP_REPR(LOOP) ((LOOP)->num + last_basic_block) #define BB_REPR(BB) ((BB)->index + 1) -void +bool mark_irreducible_loops (void) { basic_block act; + struct graph_edge *ge; edge e; edge_iterator ei; int src, dest; @@ -95,6 +76,8 @@ mark_irreducible_loops (void) struct graph *g; int num = number_of_loops (); struct loop *cloop; + bool irred_loop_found = false; + int i; gcc_assert (current_loops != NULL); @@ -154,11 +137,30 @@ mark_irreducible_loops (void) graphds_scc (g, NULL); /* Mark the irreducible loops. */ - for_each_edge (g, check_irred); + for (i = 0; i < g->n_vertices; i++) + for (ge = g->vertices[i].succ; ge; ge = ge->succ_next) + { + edge real = (edge) ge->data; + /* edge E in graph G is irreducible if it connects two vertices in the + same scc. */ + + /* All edges should lead from a component with higher number to the + one with lower one. */ + gcc_assert (g->vertices[ge->src].component >= g->vertices[ge->dest].component); + + if (g->vertices[ge->src].component != g->vertices[ge->dest].component) + continue; + + real->flags |= EDGE_IRREDUCIBLE_LOOP; + irred_loop_found = true; + if (flow_bb_inside_loop_p (real->src->loop_father, real->dest)) + real->src->flags |= BB_IRREDUCIBLE_LOOP; + } free_graph (g); loops_state_set (LOOPS_HAVE_MARKED_IRREDUCIBLE_REGIONS); + return irred_loop_found; } /* Counts number of insns inside LOOP. */ diff --git a/gcc/cgraphunit.c b/gcc/cgraphunit.c index 53d99bf9cc3..97c28f43ea8 100644 --- a/gcc/cgraphunit.c +++ b/gcc/cgraphunit.c @@ -1012,6 +1012,7 @@ cgraph_finalize_compilation_unit (void) if (errorcount || sorrycount) return; + finalize_size_functions (); finish_aliases_1 (); if (!quiet_flag) diff --git a/gcc/combine.c b/gcc/combine.c index b8c080c3057..a4f0d66c731 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -7358,6 +7358,10 @@ force_to_mode (rtx x, enum machine_mode mode, unsigned HOST_WIDE_INT mask, return force_to_mode (SUBREG_REG (x), mode, mask, next_select); break; + case TRUNCATE: + /* Similarly for a truncate. */ + return force_to_mode (XEXP (x, 0), mode, mask, next_select); + case AND: /* If this is an AND with a constant, convert it into an AND whose constant is the AND of that constant with MASK. If it @@ -7502,12 +7506,20 @@ force_to_mode (rtx x, enum machine_mode mode, unsigned HOST_WIDE_INT mask, /* For most binary operations, just propagate into the operation and change the mode if we have an operation of that mode. */ - op0 = gen_lowpart_or_truncate (op_mode, - force_to_mode (XEXP (x, 0), mode, mask, - next_select)); - op1 = gen_lowpart_or_truncate (op_mode, - force_to_mode (XEXP (x, 1), mode, mask, - next_select)); + op0 = force_to_mode (XEXP (x, 0), mode, mask, next_select); + op1 = force_to_mode (XEXP (x, 1), mode, mask, next_select); + + /* If we ended up truncating both operands, truncate the result of the + operation instead. */ + if (GET_CODE (op0) == TRUNCATE + && GET_CODE (op1) == TRUNCATE) + { + op0 = XEXP (op0, 0); + op1 = XEXP (op1, 0); + } + + op0 = gen_lowpart_or_truncate (op_mode, op0); + op1 = gen_lowpart_or_truncate (op_mode, op1); if (op_mode != GET_MODE (x) || op0 != XEXP (x, 0) || op1 != XEXP (x, 1)) x = simplify_gen_binary (code, op_mode, op0, op1); diff --git a/gcc/config.gcc b/gcc/config.gcc index e5787374b6e..fe345c13953 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -2439,6 +2439,7 @@ v850-*-*) ;; vax-*-linux*) tm_file="${tm_file} dbxelf.h elfos.h svr4.h linux.h vax/elf.h vax/linux.h" + tmake_file=vax/t-linux ;; vax-*-netbsdelf*) tm_file="${tm_file} elfos.h netbsd.h netbsd-elf.h vax/elf.h vax/netbsd-elf.h" diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h index 4153ad6f6b6..e19048d9a84 100644 --- a/gcc/config/arc/arc.h +++ b/gcc/config/arc/arc.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler, Argonaut ARC cpu. Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2004, 2005, - 2007, 2008 Free Software Foundation, Inc. + 2007, 2008, 2009 Free Software Foundation, Inc. This file is part of GCC. @@ -516,12 +516,6 @@ extern enum reg_class arc_regno_reg_class[FIRST_PSEUDO_REGISTER]; not be a register used by the prologue. */ #define STATIC_CHAIN_REGNUM 24 -/* A C expression which is nonzero if a function must have and use a - frame pointer. This expression is evaluated in the reload pass. - If its value is nonzero the function will have a frame pointer. */ -#define FRAME_POINTER_REQUIRED \ -(cfun->calls_alloca) - /* C statement to store the difference between the frame pointer and the stack pointer values immediately after the function prologue. */ #define INITIAL_FRAME_POINTER_OFFSET(VAR) \ diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 7e8b8a33d33..85b4995ab0c 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -204,6 +204,8 @@ static const char *arm_invalid_return_type (const_tree t); static tree arm_promoted_type (const_tree t); static tree arm_convert_to_type (tree type, tree expr); static bool arm_scalar_mode_supported_p (enum machine_mode); +static bool arm_frame_pointer_required (void); + /* Table of machine attributes. */ static const struct attribute_spec arm_attribute_table[] = @@ -461,6 +463,9 @@ static const struct attribute_spec arm_attribute_table[] = #undef TARGET_SCALAR_MODE_SUPPORTED_P #define TARGET_SCALAR_MODE_SUPPORTED_P arm_scalar_mode_supported_p +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED arm_frame_pointer_required + struct gcc_target targetm = TARGET_INITIALIZER; /* Obstack for minipool constant handling. */ @@ -20023,4 +20028,14 @@ arm_optimization_options (int level, int size ATTRIBUTE_UNUSED) flag_section_anchors = 2; } +/* Implement TARGET_FRAME_POINTER_REQUIRED. */ + +bool +arm_frame_pointer_required (void) +{ + return (cfun->has_nonlocal_label + || SUBTARGET_FRAME_POINTER_REQUIRED + || (TARGET_ARM && TARGET_APCS_FRAME && ! leaf_function_p ())); +} + #include "gt-arm.h" diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 87441ceb982..58ced2e7e51 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1044,11 +1044,6 @@ extern int arm_structure_size_boundary; #define SUBTARGET_FRAME_POINTER_REQUIRED 0 #endif -#define FRAME_POINTER_REQUIRED \ - (cfun->has_nonlocal_label \ - || SUBTARGET_FRAME_POINTER_REQUIRED \ - || (TARGET_ARM && TARGET_APCS_FRAME && ! leaf_function_p ())) - /* Return number of consecutive hard regs needed starting at reg REGNO to hold something of mode MODE. This is ordinarily the length in words of a value of mode MODE diff --git a/gcc/config/avr/avr-protos.h b/gcc/config/avr/avr-protos.h index 6a0e26d3462..c2d199d0dc7 100644 --- a/gcc/config/avr/avr-protos.h +++ b/gcc/config/avr/avr-protos.h @@ -30,7 +30,6 @@ extern int avr_ret_register (void); extern bool class_likely_spilled_p (int c); extern enum reg_class avr_regno_reg_class (int r); extern enum reg_class avr_reg_class_from_letter (int c); -extern bool avr_frame_pointer_required_p (void); extern void asm_globalize_label (FILE *file, const char *name); extern void avr_asm_declare_function_name (FILE *, const char *, tree); extern void order_regs_for_local_alloc (void); diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c index 0ed97881216..7dd2a6f8bfd 100644 --- a/gcc/config/avr/avr.c +++ b/gcc/config/avr/avr.c @@ -89,6 +89,7 @@ static struct machine_function * avr_init_machine_status (void); static rtx avr_builtin_setjmp_frame_value (void); static bool avr_hard_regno_scratch_ok (unsigned int); static unsigned int avr_case_values_threshold (void); +static bool avr_frame_pointer_required_p (void); /* Allocate registers from r25 to r8 for parameters for function calls. */ #define FIRST_CUM_REG 26 @@ -188,6 +189,9 @@ static const struct attribute_spec avr_attribute_table[] = #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_P avr_legitimate_address_p +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED avr_frame_pointer_required_p + struct gcc_target targetm = TARGET_INITIALIZER; void diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h index 31a7cac0ecc..97e3e2a2f68 100644 --- a/gcc/config/avr/avr.h +++ b/gcc/config/avr/avr.h @@ -400,8 +400,6 @@ enum reg_class { #define STATIC_CHAIN_REGNUM 2 -#define FRAME_POINTER_REQUIRED avr_frame_pointer_required_p() - /* Offset from the frame pointer register value to the top of the stack. */ #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0 diff --git a/gcc/config/bfin/bfin-protos.h b/gcc/config/bfin/bfin-protos.h index 13542411221..72698a2b0a1 100644 --- a/gcc/config/bfin/bfin-protos.h +++ b/gcc/config/bfin/bfin-protos.h @@ -1,5 +1,5 @@ /* Prototypes for Blackfin functions used in the md file & elsewhere. - Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc. + Copyright (C) 2005, 2007, 2008, 2009 Free Software Foundation, Inc. This file is part of GNU CC. @@ -112,7 +112,6 @@ extern int log2constp (unsigned HOST_WIDE_INT); extern bool bfin_legitimate_constant_p (rtx); extern int hard_regno_mode_ok (int, Mmode); extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx); -extern int bfin_frame_pointer_required (void); extern HOST_WIDE_INT bfin_initial_elimination_offset (int, int); extern int effective_address_32bit_p (rtx, Mmode); diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c index 715ec818cf5..4f213062a4f 100644 --- a/gcc/config/bfin/bfin.c +++ b/gcc/config/bfin/bfin.c @@ -812,20 +812,20 @@ setup_incoming_varargs (CUMULATIVE_ARGS *cum, Zero means the frame pointer need not be set up (and parms may be accessed via the stack pointer) in functions that seem suitable. */ -int +static bool bfin_frame_pointer_required (void) { e_funkind fkind = funkind (TREE_TYPE (current_function_decl)); if (fkind != SUBROUTINE) - return 1; + return true; /* We turn on -fomit-frame-pointer if -momit-leaf-frame-pointer is used, so we have to override it for non-leaf functions. */ if (TARGET_OMIT_LEAF_FRAME_POINTER && ! current_function_is_leaf) - return 1; + return true; - return 0; + return false; } /* Return the number of registers pushed during the prologue. */ @@ -6339,4 +6339,7 @@ bfin_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_P bfin_legitimate_address_p +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED bfin_frame_pointer_required + struct gcc_target targetm = TARGET_INITIALIZER; diff --git a/gcc/config/bfin/bfin.h b/gcc/config/bfin/bfin.h index 29e4f910842..a79420476c6 100644 --- a/gcc/config/bfin/bfin.h +++ b/gcc/config/bfin/bfin.h @@ -1,5 +1,5 @@ /* Definitions for the Blackfin port. - Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc. + Copyright (C) 2005, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by Analog Devices. This file is part of GCC. @@ -313,13 +313,6 @@ extern const char *bfin_library_id_string; found in the variable crtl->outgoing_args_size. */ #define ACCUMULATE_OUTGOING_ARGS 1 -/* Value should be nonzero if functions must have frame pointers. - Zero means the frame pointer need not be set up (and parms - may be accessed via the stack pointer) in functions that seem suitable. - This is computed in `reload', in reload1.c. -*/ -#define FRAME_POINTER_REQUIRED (bfin_frame_pointer_required ()) - /*#define DATA_ALIGNMENT(TYPE, BASIC-ALIGN) for arrays.. */ /* If defined, a C expression to compute the alignment for a local diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c index bc634ddbf3e..66fc05d0f6e 100644 --- a/gcc/config/cris/cris.c +++ b/gcc/config/cris/cris.c @@ -1,6 +1,6 @@ /* Definitions for GCC. Part of the machine description for CRIS. Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, - 2008 Free Software Foundation, Inc. + 2008, 2009 Free Software Foundation, Inc. Contributed by Axis Communications. Written by Hans-Peter Nilsson. This file is part of GCC. @@ -122,6 +122,8 @@ static tree cris_md_asm_clobbers (tree, tree, tree); static bool cris_handle_option (size_t, const char *, int); +static bool cris_frame_pointer_required (void); + /* This is the parsed result of the "-max-stack-stackframe=" option. If it (still) is zero, then there was no such option given. */ int cris_max_stackframe = 0; @@ -180,6 +182,8 @@ int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION; #define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | CRIS_SUBTARGET_DEFAULT) #undef TARGET_HANDLE_OPTION #define TARGET_HANDLE_OPTION cris_handle_option +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED cris_frame_pointer_required struct gcc_target targetm = TARGET_INITIALIZER; @@ -3814,6 +3818,18 @@ cris_md_asm_clobbers (tree outputs, tree inputs, tree in_clobbers) clobbers); } +/* Implement TARGET_FRAME_POINTER_REQUIRED. + + Really only needed if the stack frame has variable length (alloca + or variable sized local arguments (GNU C extension). See PR39499 and + PR38609 for the reason this isn't just 0. */ + +bool +cris_frame_pointer_required (void) +{ + return !current_function_sp_is_unchanging; +} + #if 0 /* Various small functions to replace macros. Only called from a debugger. They might collide with gcc functions or system functions, diff --git a/gcc/config/cris/cris.h b/gcc/config/cris/cris.h index d908cfbc124..920e354417e 100644 --- a/gcc/config/cris/cris.h +++ b/gcc/config/cris/cris.h @@ -850,11 +850,6 @@ enum reg_class /* Node: Elimination */ -/* Really only needed if the stack frame has variable length (alloca - or variable sized local arguments (GNU C extension). See PR39499 and - PR38609 for the reason this isn't just 0. */ -#define FRAME_POINTER_REQUIRED (!current_function_sp_is_unchanging) - #define ELIMINABLE_REGS \ {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ diff --git a/gcc/config/crx/crx.h b/gcc/config/crx/crx.h index d22db7da903..dcddaf03ecd 100644 --- a/gcc/config/crx/crx.h +++ b/gcc/config/crx/crx.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler, for CRX. Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, - 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 + 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. This file is part of GCC. @@ -291,8 +291,6 @@ enum reg_class #define FIRST_PARM_OFFSET(FNDECL) 0 -#define FRAME_POINTER_REQUIRED (cfun->calls_alloca) - #define ELIMINABLE_REGS \ { \ { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ diff --git a/gcc/config/fr30/fr30.c b/gcc/config/fr30/fr30.c index 5642c548a29..fc412eef8f0 100644 --- a/gcc/config/fr30/fr30.c +++ b/gcc/config/fr30/fr30.c @@ -1,5 +1,5 @@ /* FR30 specific functions. - Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2007, 2008 + Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by Cygnus Solutions. @@ -119,7 +119,7 @@ static void fr30_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, static bool fr30_must_pass_in_stack (enum machine_mode, const_tree); static int fr30_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); - +static bool fr30_frame_pointer_required (void); #define FRAME_POINTER_MASK (1 << (FRAME_POINTER_REGNUM)) #define RETURN_POINTER_MASK (1 << (RETURN_POINTER_REGNUM)) @@ -158,6 +158,9 @@ static int fr30_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, #undef TARGET_MUST_PASS_IN_STACK #define TARGET_MUST_PASS_IN_STACK fr30_must_pass_in_stack +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED fr30_frame_pointer_required + struct gcc_target targetm = TARGET_INITIALIZER; /* Returns the number of bytes offset between FROM_REG and TO_REG @@ -899,6 +902,14 @@ fr30_move_double (rtx * operands) return val; } +/* Implement TARGET_FRAME_POINTER_REQUIRED. */ + +bool +fr30_frame_pointer_required (void) +{ + return (flag_omit_frame_pointer == 0 || crtl->args.pretend_args_size > 0); +} + /*}}}*/ /* Local Variables: */ /* folded-file: t */ diff --git a/gcc/config/fr30/fr30.h b/gcc/config/fr30/fr30.h index b958a678db4..9af74a97c14 100644 --- a/gcc/config/fr30/fr30.h +++ b/gcc/config/fr30/fr30.h @@ -1,7 +1,7 @@ /*{{{ Comment. */ /* Definitions of FR30 target. - Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2007, 2008 + Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by Cygnus Solutions. @@ -519,28 +519,6 @@ enum reg_class /*}}}*/ /*{{{ Eliminating the Frame Pointer and the Arg Pointer. */ -/* A C expression which is nonzero if a function must have and use a frame - pointer. This expression is evaluated in the reload pass. If its value is - nonzero the function will have a frame pointer. - - The expression can in principle examine the current function and decide - according to the facts, but on most machines the constant 0 or the constant - 1 suffices. Use 0 when the machine allows code to be generated with no - frame pointer, and doing so saves some time or space. Use 1 when there is - no possible advantage to avoiding a frame pointer. - - In certain cases, the compiler does not know how to produce valid code - without a frame pointer. The compiler recognizes those cases and - automatically gives the function a frame pointer regardless of what - `FRAME_POINTER_REQUIRED' says. You don't need to worry about them. - - In a function that does not require a frame pointer, the frame pointer - register can be allocated for ordinary usage, unless you mark it as a fixed - register. See `FIXED_REGISTERS' for more information. */ -/* #define FRAME_POINTER_REQUIRED 0 */ -#define FRAME_POINTER_REQUIRED \ - (flag_omit_frame_pointer == 0 || crtl->args.pretend_args_size > 0) - /* If defined, this macro specifies a table of register pairs used to eliminate unneeded registers that point into the stack frame. If it is not defined, the only elimination attempted by the compiler is to replace references to diff --git a/gcc/config/frv/frv-protos.h b/gcc/config/frv/frv-protos.h index 56f42439640..8734694e0cd 100644 --- a/gcc/config/frv/frv-protos.h +++ b/gcc/config/frv/frv-protos.h @@ -1,5 +1,5 @@ /* Frv prototypes. - Copyright (C) 1999, 2000, 2001, 2003, 2004, 2005, 2007, 2008 + Copyright (C) 1999, 2000, 2001, 2003, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by Red Hat, Inc. @@ -43,7 +43,6 @@ extern void frv_optimization_options (int, int); extern void frv_conditional_register_usage (void); extern frv_stack_t *frv_stack_info (void); extern void frv_debug_stack (frv_stack_t *); -extern int frv_frame_pointer_required (void); extern int frv_initial_elimination_offset (int, int); #ifdef RTX_CODE diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c index c7e717e05ae..658b5b4c275 100644 --- a/gcc/config/frv/frv.c +++ b/gcc/config/frv/frv.c @@ -1,5 +1,5 @@ /* Copyright (C) 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2006, 2007, - 2008 Free Software Foundation, Inc. + 2008, 2009 Free Software Foundation, Inc. Contributed by Red Hat, Inc. This file is part of GCC. @@ -381,6 +381,7 @@ static void frv_output_dwarf_dtprel (FILE *, int, rtx) static bool frv_secondary_reload (bool, rtx, enum reg_class, enum machine_mode, secondary_reload_info *); +static bool frv_frame_pointer_required (void); /* Allow us to easily change the default for -malloc-cc. */ #ifndef DEFAULT_NO_ALLOC_CC @@ -471,6 +472,9 @@ static bool frv_secondary_reload (bool, rtx, enum reg_class, #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_P frv_legitimate_address_p +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED frv_frame_pointer_required + struct gcc_target targetm = TARGET_INITIALIZER; #define FRV_SYMBOL_REF_TLS_P(RTX) \ @@ -2105,28 +2109,10 @@ frv_asm_output_mi_thunk (FILE *file, } -/* A C expression which is nonzero if a function must have and use a frame - pointer. This expression is evaluated in the reload pass. If its value is - nonzero the function will have a frame pointer. - - The expression can in principle examine the current function and decide - according to the facts, but on most machines the constant 0 or the constant - 1 suffices. Use 0 when the machine allows code to be generated with no - frame pointer, and doing so saves some time or space. Use 1 when there is - no possible advantage to avoiding a frame pointer. - - In certain cases, the compiler does not know how to produce valid code - without a frame pointer. The compiler recognizes those cases and - automatically gives the function a frame pointer regardless of what - `FRAME_POINTER_REQUIRED' says. You don't need to worry about them. - - In a function that does not require a frame pointer, the frame pointer - register can be allocated for ordinary usage, unless you mark it as a fixed - register. See `FIXED_REGISTERS' for more information. */ /* On frv, create a frame whenever we need to create stack. */ -int +static bool frv_frame_pointer_required (void) { /* If we forgoing the usual linkage requirements, we only need @@ -2135,27 +2121,27 @@ frv_frame_pointer_required (void) return !current_function_sp_is_unchanging; if (! current_function_is_leaf) - return TRUE; + return true; if (get_frame_size () != 0) - return TRUE; + return true; if (cfun->stdarg) - return TRUE; + return true; if (!current_function_sp_is_unchanging) - return TRUE; + return true; if (!TARGET_FDPIC && flag_pic && crtl->uses_pic_offset_table) - return TRUE; + return true; if (profile_flag) - return TRUE; + return true; if (cfun->machine->frame_needed) - return TRUE; + return true; - return FALSE; + return false; } diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h index 15047e3c7ed..483ed77e9f7 100644 --- a/gcc/config/frv/frv.h +++ b/gcc/config/frv/frv.h @@ -1,5 +1,5 @@ /* Target macros for the FRV port of GCC. - Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008 + Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by Red Hat Inc. @@ -1564,26 +1564,6 @@ typedef struct frv_stack { /* Eliminating the Frame Pointer and the Arg Pointer. */ -/* A C expression which is nonzero if a function must have and use a frame - pointer. This expression is evaluated in the reload pass. If its value is - nonzero the function will have a frame pointer. - - The expression can in principle examine the current function and decide - according to the facts, but on most machines the constant 0 or the constant - 1 suffices. Use 0 when the machine allows code to be generated with no - frame pointer, and doing so saves some time or space. Use 1 when there is - no possible advantage to avoiding a frame pointer. - - In certain cases, the compiler does not know how to produce valid code - without a frame pointer. The compiler recognizes those cases and - automatically gives the function a frame pointer regardless of what - `FRAME_POINTER_REQUIRED' says. You don't need to worry about them. - - In a function that does not require a frame pointer, the frame pointer - register can be allocated for ordinary usage, unless you mark it as a fixed - register. See `FIXED_REGISTERS' for more information. */ -#define FRAME_POINTER_REQUIRED frv_frame_pointer_required () - /* If defined, this macro specifies a table of register pairs used to eliminate unneeded registers that point into the stack frame. If it is not defined, the only elimination attempted by the compiler is to replace references to diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h index 663b4bffacc..54d30b7069e 100644 --- a/gcc/config/i386/i386-protos.h +++ b/gcc/config/i386/i386-protos.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GCC for IA-32. Copyright (C) 1988, 1992, 1994, 1995, 1996, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. This file is part of GCC. @@ -24,7 +24,6 @@ extern void override_options (bool); extern void optimization_options (int, int); extern int ix86_can_use_return_insn_p (void); -extern int ix86_frame_pointer_required (void); extern void ix86_setup_frame_addresses (void); extern void ix86_file_end (void); diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 42bf323855b..1da18964bd4 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -48,7 +48,7 @@ along with GCC; see the file COPYING3. If not see #include "langhooks.h" #include "cgraph.h" #include "gimple.h" -#include "dwarf2.h" +#include "elf/dwarf2.h" #include "df.h" #include "tm-constrs.h" #include "params.h" @@ -7421,18 +7421,18 @@ ix86_can_use_return_insn_p (void) Zero means the frame pointer need not be set up (and parms may be accessed via the stack pointer) in functions that seem suitable. */ -int +static bool ix86_frame_pointer_required (void) { /* If we accessed previous frames, then the generated code expects to be able to access the saved ebp value in our frame. */ if (cfun->machine->accesses_prev_frame) - return 1; + return true; /* Several x86 os'es need a frame pointer for other reasons, usually pertaining to setjmp. */ if (SUBTARGET_FRAME_POINTER_REQUIRED) - return 1; + return true; /* In override_options, TARGET_OMIT_LEAF_FRAME_POINTER turns off the frame pointer by default. Turn it back on now if we've not @@ -7440,12 +7440,12 @@ ix86_frame_pointer_required (void) if (TARGET_OMIT_LEAF_FRAME_POINTER && (!current_function_is_leaf || ix86_current_function_calls_tls_descriptor)) - return 1; + return true; if (crtl->profile) - return 1; + return true; - return 0; + return false; } /* Record that the current function accesses previous call frames. */ @@ -12760,7 +12760,7 @@ ix86_expand_move (enum machine_mode mode, rtx operands[]) op1 = force_reg (Pmode, op1); else if (!TARGET_64BIT || !x86_64_movabs_operand (op1, Pmode)) { - rtx reg = !can_create_pseudo_p () ? op0 : NULL_RTX; + rtx reg = can_create_pseudo_p () ? NULL_RTX : op0; op1 = legitimize_pic_address (op1, reg); if (op0 == op1) return; @@ -19389,7 +19389,7 @@ memory_address_length (rtx addr) len = 4; } /* ebp always wants a displacement. Similarly r13. */ - else if (REG_P (base) + else if (base && REG_P (base) && (REGNO (base) == BP_REG || REGNO (base) == R13_REG)) len = 1; @@ -19398,7 +19398,7 @@ memory_address_length (rtx addr) /* ...like esp (or r12), which always wants an index. */ || base == arg_pointer_rtx || base == frame_pointer_rtx - || (REG_P (base) + || (base && REG_P (base) && (REGNO (base) == SP_REG || REGNO (base) == R12_REG))) len += 1; } @@ -30525,6 +30525,9 @@ ix86_enum_va_list (int idx, const char **pname, tree *ptree) #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_P ix86_legitimate_address_p +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED ix86_frame_pointer_required + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-i386.h" diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index d762c29df94..2d499276338 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -1152,12 +1152,6 @@ do { \ #define FIRST_REX_SSE_REG (LAST_REX_INT_REG + 1) #define LAST_REX_SSE_REG (FIRST_REX_SSE_REG + 7) -/* Value should be nonzero if functions must have frame pointers. - Zero means the frame pointer need not be set up (and parms - may be accessed via the stack pointer) in functions that seem suitable. - This is computed in `reload', in reload1.c. */ -#define FRAME_POINTER_REQUIRED ix86_frame_pointer_required () - /* Override this in other tm.h files to cope with various OS lossage requiring a frame pointer. */ #ifndef SUBTARGET_FRAME_POINTER_REQUIRED diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 33ff7a5fd76..353a70bc5ba 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -5122,7 +5122,7 @@ && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) && (TARGET_64BIT || <MODE>mode != DImode)) && TARGET_SSE_MATH) - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -5202,7 +5202,7 @@ && !TARGET_FISTTP && !(SSE_FLOAT_MODE_P (GET_MODE (operands[1])) && (TARGET_64BIT || <MODE>mode != DImode)) - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -5377,7 +5377,7 @@ "TARGET_80387 && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387) - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(parallel [(set (match_dup 0) @@ -5472,7 +5472,7 @@ && flag_trapping_math) || !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))))) - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(parallel [(set (match_dup 0) (float:X87MODEF (match_dup 1))) @@ -16670,7 +16670,7 @@ (clobber (reg:CC FLAGS_REG))])] "!TARGET_64BIT && TARGET_GNU2_TLS" { - operands[3] = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode); + operands[3] = can_create_pseudo_p () ? gen_reg_rtx (Pmode) : operands[0]; ix86_tls_descriptor_calls_expanded_in_cfun = true; }) @@ -16719,7 +16719,7 @@ "" [(set (match_dup 0) (match_dup 5))] { - operands[5] = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode); + operands[5] = can_create_pseudo_p () ? gen_reg_rtx (Pmode) : operands[0]; emit_insn (gen_tls_dynamic_gnu2_32 (operands[5], operands[1], operands[2])); }) @@ -16734,7 +16734,7 @@ (clobber (reg:CC FLAGS_REG))])] "TARGET_64BIT && TARGET_GNU2_TLS" { - operands[2] = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode); + operands[2] = can_create_pseudo_p () ? gen_reg_rtx (Pmode) : operands[0]; ix86_tls_descriptor_calls_expanded_in_cfun = true; }) @@ -16778,7 +16778,7 @@ "" [(set (match_dup 0) (match_dup 4))] { - operands[4] = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode); + operands[4] = can_create_pseudo_p () ? gen_reg_rtx (Pmode) : operands[0]; emit_insn (gen_tls_dynamic_gnu2_64 (operands[4], operands[1])); }) @@ -18563,7 +18563,7 @@ (unspec:DI [(match_operand:XF 1 "register_operand" "")] UNSPEC_FIST))] "TARGET_USE_FANCY_MATH_387 - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -18630,7 +18630,7 @@ (unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")] UNSPEC_FIST))] "TARGET_USE_FANCY_MATH_387 - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -18717,7 +18717,7 @@ (clobber (reg:CC FLAGS_REG))] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -18808,7 +18808,7 @@ (clobber (reg:CC FLAGS_REG))] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -18991,7 +18991,7 @@ (clobber (reg:CC FLAGS_REG))] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -19082,7 +19082,7 @@ (clobber (reg:CC FLAGS_REG))] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -19261,7 +19261,7 @@ (clobber (reg:CC FLAGS_REG))] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -19353,7 +19353,7 @@ (clobber (reg:CC FLAGS_REG))] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -19431,7 +19431,7 @@ [(match_operand:MODEF 1 "memory_operand" "")] UNSPEC_FXAM_MEM))] "TARGET_USE_FANCY_MATH_387 - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(set (match_dup 2)(match_dup 1)) diff --git a/gcc/config/i386/msformat-c.c b/gcc/config/i386/msformat-c.c index dec8f40d478..d7eb42d9c3c 100644 --- a/gcc/config/i386/msformat-c.c +++ b/gcc/config/i386/msformat-c.c @@ -145,7 +145,7 @@ static const format_char_info ms_time_char_table[] = { NULL, 0, STD_C89, NOLENGTHS, NULL, NULL, NULL } }; -const format_kind_info mingw_format_attributes[3] = +EXPORTED_CONST format_kind_info mingw_format_attributes[3] = { { "ms_printf", ms_printf_length_specs, ms_print_char_table, " +#0-'", NULL, ms_printf_flag_specs, ms_printf_flag_pairs, @@ -167,7 +167,7 @@ const format_kind_info mingw_format_attributes[3] = }; /* Default overrides for printf, scanf and strftime. */ -const target_ovr_attr mingw_format_attribute_overrides[4] = +EXPORTED_CONST target_ovr_attr mingw_format_attribute_overrides[4] = { { "ms_printf", "printf" }, { "ms_scanf", "scanf" }, diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index da06d44c41a..1e938ca3c94 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -4760,7 +4760,7 @@ (mult:V16QI (match_operand:V16QI 1 "register_operand" "") (match_operand:V16QI 2 "register_operand" "")))] "TARGET_SSE2 - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -5218,7 +5218,7 @@ (mult:V4SI (match_operand:V4SI 1 "register_operand" "") (match_operand:V4SI 2 "register_operand" "")))] "TARGET_SSE2 && !TARGET_SSE4_1 && !TARGET_SSE5 - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -5271,7 +5271,7 @@ (mult:V2DI (match_operand:V2DI 1 "register_operand" "") (match_operand:V2DI 2 "register_operand" "")))] "TARGET_SSE2 - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -9842,7 +9842,7 @@ (match_dup 6)] UNSPEC_PCMPESTR))] "TARGET_SSE4_2 - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] @@ -9972,7 +9972,7 @@ (match_dup 4)] UNSPEC_PCMPISTR))] "TARGET_SSE4_2 - && !(reload_completed || reload_in_progress)" + && can_create_pseudo_p ()" "#" "&& 1" [(const_int 0)] diff --git a/gcc/config/i386/t-i386 b/gcc/config/i386/t-i386 index 01e5ce413e4..087c4743d2f 100644 --- a/gcc/config/i386/t-i386 +++ b/gcc/config/i386/t-i386 @@ -22,7 +22,7 @@ i386.o: $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ $(INSN_ATTR_H) $(FLAGS_H) $(C_COMMON_H) except.h $(FUNCTION_H) \ $(RECOG_H) $(EXPR_H) $(OPTABS_H) toplev.h $(BASIC_BLOCK_H) \ $(GGC_H) $(TARGET_H) $(TARGET_DEF_H) langhooks.h $(CGRAPH_H) \ - $(TREE_GIMPLE_H) dwarf2.h $(DF_H) tm-constrs.h $(PARAMS_H) + $(TREE_GIMPLE_H) $(DWARF2_H) $(DF_H) tm-constrs.h $(PARAMS_H) i386-c.o: $(srcdir)/config/i386/i386-c.c \ $(srcdir)/config/i386/i386-protos.h $(CONFIG_H) $(SYSTEM_H) coretypes.h \ diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c index 989f823df92..9672dfa718a 100644 --- a/gcc/config/m32c/m32c.c +++ b/gcc/config/m32c/m32c.c @@ -4259,6 +4259,13 @@ m32c_output_compare (rtx insn, rtx *operands) #undef TARGET_ENCODE_SECTION_INFO #define TARGET_ENCODE_SECTION_INFO m32c_encode_section_info +/* If the frame pointer isn't used, we detect it manually. But the + stack pointer doesn't have as flexible addressing as the frame + pointer, so we always assume we have it. */ + +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED hook_bool_void_true + /* The Global `targetm' Variable. */ struct gcc_target targetm = TARGET_INITIALIZER; diff --git a/gcc/config/m32c/m32c.h b/gcc/config/m32c/m32c.h index 691bc994ca5..dea5b55b71a 100644 --- a/gcc/config/m32c/m32c.h +++ b/gcc/config/m32c/m32c.h @@ -488,11 +488,6 @@ enum reg_class /* Eliminating Frame Pointer and Arg Pointer */ -/* If the frame pointer isn't used, we detect it manually. But the - stack pointer doesn't have as flexible addressing as the frame - pointer, so we always assume we have it. */ -#define FRAME_POINTER_REQUIRED 1 - #define ELIMINABLE_REGS \ {{AP_REGNO, SP_REGNO}, \ {AP_REGNO, FB_REGNO}, \ diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h index d06452d46ca..0ddbcfae263 100644 --- a/gcc/config/m32r/m32r.h +++ b/gcc/config/m32r/m32r.h @@ -770,11 +770,6 @@ extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER]; /* Eliminating the frame and arg pointers. */ -/* A C expression which is nonzero if a function must have and use a - frame pointer. This expression is evaluated in the reload pass. - If its value is nonzero the function will have a frame pointer. */ -#define FRAME_POINTER_REQUIRED cfun->calls_alloca - #if 0 /* C statement to store the difference between the frame pointer and the stack pointer values immediately after the function prologue. diff --git a/gcc/config/mcore/mcore.h b/gcc/config/mcore/mcore.h index 9b33a1aba07..acc54495a1c 100644 --- a/gcc/config/mcore/mcore.h +++ b/gcc/config/mcore/mcore.h @@ -325,11 +325,6 @@ extern int mcore_stack_increment; { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},} -/* Given FROM and TO register numbers, say whether this elimination - is allowed. */ -#define CAN_ELIMINATE(FROM, TO) \ - (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED)) - /* Define the offset between two registers, one to be eliminated, and the other its replacement, at the start of a routine. */ #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ diff --git a/gcc/config/mep/intrinsics.h b/gcc/config/mep/intrinsics.h index e1b30e56a2f..287bc297cab 100644 --- a/gcc/config/mep/intrinsics.h +++ b/gcc/config/mep/intrinsics.h @@ -20,66 +20,66 @@ typedef unsigned int cp_v2usi __attribute__((vector_size(8))); // default -void mep_cpfmadila1_h (cp_v4hi, cp_v4hi, long, long); -void mep_cpfmadiua1_h (cp_v4hi, cp_v4hi, long, long); -void mep_cpfmadia1_b (cp_v8qi, cp_v8qi, long, long); -void mep_cpfmadia1u_b (cp_v8uqi, cp_v8uqi, long, long); -void mep_cpfmulila1_h (cp_v4hi, cp_v4hi, long, long); -void mep_cpfmuliua1_h (cp_v4hi, cp_v4hi, long, long); -void mep_cpfmulia1_b (cp_v8qi, cp_v8qi, long, long); -void mep_cpfmulia1u_b (cp_v8uqi, cp_v8uqi, long, long); -void mep_cpamadila1_h (cp_v4hi, cp_v4hi, long); -void mep_cpamadiua1_h (cp_v4hi, cp_v4hi, long); -void mep_cpamadia1_b (cp_v8qi, cp_v8qi, long); -void mep_cpamadia1u_b (cp_v8uqi, cp_v8uqi, long); -void mep_cpamulila1_h (cp_v4hi, cp_v4hi, long); -void mep_cpamuliua1_h (cp_v4hi, cp_v4hi, long); -void mep_cpamulia1_b (cp_v8qi, cp_v8qi, long); -void mep_cpamulia1u_b (cp_v8uqi, cp_v8uqi, long); -void mep_cpfmadila1s1_h (cp_v4hi, cp_v4hi, long); -void mep_cpfmadiua1s1_h (cp_v4hi, cp_v4hi, long); -void mep_cpfmadia1s1_b (cp_v8qi, cp_v8qi, long); -void mep_cpfmadia1s1u_b (cp_v8uqi, cp_v8uqi, long); -void mep_cpfmulila1s1_h (cp_v4hi, cp_v4hi, long); -void mep_cpfmuliua1s1_h (cp_v4hi, cp_v4hi, long); -void mep_cpfmulia1s1_b (cp_v8qi, cp_v8qi, long); -void mep_cpfmulia1s1u_b (cp_v8uqi, cp_v8uqi, long); -void mep_cpfmadila1s0_h (cp_v4hi, cp_v4hi, long); -void mep_cpfmadiua1s0_h (cp_v4hi, cp_v4hi, long); -void mep_cpfmadia1s0_b (cp_v8qi, cp_v8qi, long); -void mep_cpfmadia1s0u_b (cp_v8uqi, cp_v8uqi, long); -void mep_cpfmulila1s0_h (cp_v4hi, cp_v4hi, long); -void mep_cpfmuliua1s0_h (cp_v4hi, cp_v4hi, long); -void mep_cpfmulia1s0_b (cp_v8qi, cp_v8qi, long); -void mep_cpfmulia1s0u_b (cp_v8uqi, cp_v8uqi, long); +void mep_cpfmadila1_h (cp_v4hi, cp_v4hi, long, long); // volatile +void mep_cpfmadiua1_h (cp_v4hi, cp_v4hi, long, long); // volatile +void mep_cpfmadia1_b (cp_v8qi, cp_v8qi, long, long); // volatile +void mep_cpfmadia1u_b (cp_v8uqi, cp_v8uqi, long, long); // volatile +void mep_cpfmulila1_h (cp_v4hi, cp_v4hi, long, long); // volatile +void mep_cpfmuliua1_h (cp_v4hi, cp_v4hi, long, long); // volatile +void mep_cpfmulia1_b (cp_v8qi, cp_v8qi, long, long); // volatile +void mep_cpfmulia1u_b (cp_v8uqi, cp_v8uqi, long, long); // volatile +void mep_cpamadila1_h (cp_v4hi, cp_v4hi, long); // volatile +void mep_cpamadiua1_h (cp_v4hi, cp_v4hi, long); // volatile +void mep_cpamadia1_b (cp_v8qi, cp_v8qi, long); // volatile +void mep_cpamadia1u_b (cp_v8uqi, cp_v8uqi, long); // volatile +void mep_cpamulila1_h (cp_v4hi, cp_v4hi, long); // volatile +void mep_cpamuliua1_h (cp_v4hi, cp_v4hi, long); // volatile +void mep_cpamulia1_b (cp_v8qi, cp_v8qi, long); // volatile +void mep_cpamulia1u_b (cp_v8uqi, cp_v8uqi, long); // volatile +void mep_cpfmadila1s1_h (cp_v4hi, cp_v4hi, long); // volatile +void mep_cpfmadiua1s1_h (cp_v4hi, cp_v4hi, long); // volatile +void mep_cpfmadia1s1_b (cp_v8qi, cp_v8qi, long); // volatile +void mep_cpfmadia1s1u_b (cp_v8uqi, cp_v8uqi, long); // volatile +void mep_cpfmulila1s1_h (cp_v4hi, cp_v4hi, long); // volatile +void mep_cpfmuliua1s1_h (cp_v4hi, cp_v4hi, long); // volatile +void mep_cpfmulia1s1_b (cp_v8qi, cp_v8qi, long); // volatile +void mep_cpfmulia1s1u_b (cp_v8uqi, cp_v8uqi, long); // volatile +void mep_cpfmadila1s0_h (cp_v4hi, cp_v4hi, long); // volatile +void mep_cpfmadiua1s0_h (cp_v4hi, cp_v4hi, long); // volatile +void mep_cpfmadia1s0_b (cp_v8qi, cp_v8qi, long); // volatile +void mep_cpfmadia1s0u_b (cp_v8uqi, cp_v8uqi, long); // volatile +void mep_cpfmulila1s0_h (cp_v4hi, cp_v4hi, long); // volatile +void mep_cpfmuliua1s0_h (cp_v4hi, cp_v4hi, long); // volatile +void mep_cpfmulia1s0_b (cp_v8qi, cp_v8qi, long); // volatile +void mep_cpfmulia1s0u_b (cp_v8uqi, cp_v8uqi, long); // volatile void mep_cpacswp (); // volatile -void mep_cpaccpa1 (); -void mep_cpacsuma1 (); +void mep_cpaccpa1 (); // volatile +void mep_cpacsuma1 (); // volatile void mep_c1nop (); // volatile -void mep_cpfacla0s1_h (cp_v4hi, cp_v4hi); -void mep_cpfacua0s1_h (cp_v4hi, cp_v4hi); -void mep_cpfaca0s1_b (cp_v8qi, cp_v8qi); -void mep_cpfaca0s1u_b (cp_v8uqi, cp_v8uqi); -void mep_cpfsftbla0s1_h (cp_v4hi, cp_v4hi); -void mep_cpfsftbua0s1_h (cp_v4hi, cp_v4hi); -void mep_cpfsftba0s1_b (cp_v8qi, cp_v8qi); -void mep_cpfsftba0s1u_b (cp_v8uqi, cp_v8uqi); -void mep_cpfacla0s0_h (cp_v4hi, cp_v4hi); -void mep_cpfacua0s0_h (cp_v4hi, cp_v4hi); -void mep_cpfaca0s0_b (cp_v8qi, cp_v8qi); -void mep_cpfaca0s0u_b (cp_v8uqi, cp_v8uqi); -void mep_cpfsftbla0s0_h (cp_v4hi, cp_v4hi); -void mep_cpfsftbua0s0_h (cp_v4hi, cp_v4hi); -void mep_cpfsftba0s0_b (cp_v8qi, cp_v8qi); -void mep_cpfsftba0s0u_b (cp_v8uqi, cp_v8uqi); -void mep_cpsllia0 (long); -void mep_cpsraia0 (long); -void mep_cpsrlia0 (long); -void mep_cpslla0 (cp_data_bus_int); -void mep_cpsraa0 (cp_data_bus_int); -void mep_cpsrla0 (cp_data_bus_int); -void mep_cpaccpa0 (); -void mep_cpacsuma0 (); +void mep_cpfacla0s1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpfacua0s1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpfaca0s1_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpfaca0s1u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpfsftbla0s1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpfsftbua0s1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpfsftba0s1_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpfsftba0s1u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpfacla0s0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpfacua0s0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpfaca0s0_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpfaca0s0u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpfsftbla0s0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpfsftbua0s0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpfsftba0s0_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpfsftba0s0u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpsllia0 (long); // volatile +void mep_cpsraia0 (long); // volatile +void mep_cpsrlia0 (long); // volatile +void mep_cpslla0 (cp_data_bus_int); // volatile +void mep_cpsraa0 (cp_data_bus_int); // volatile +void mep_cpsrla0 (cp_data_bus_int); // volatile +void mep_cpaccpa0 (); // volatile +void mep_cpacsuma0 (); // volatile cp_v2si mep_cpmovhla0_w (); cp_v2si mep_cpmovhua0_w (); cp_v2si mep_cppackla0_w (); @@ -95,86 +95,86 @@ cp_v2si mep_cpmovuua0_w (); cp_v4hi mep_cpmovla0_h (); cp_v4hi mep_cpmovua0_h (); cp_v8qi mep_cpmova0_b (); -void mep_cpsetla0_w (cp_v2si, cp_v2si); -void mep_cpsetua0_w (cp_v2si, cp_v2si); -void mep_cpseta0_h (cp_v4hi, cp_v4hi); -void mep_cpsadla0_h (cp_v4hi, cp_v4hi); -void mep_cpsadua0_h (cp_v4hi, cp_v4hi); -void mep_cpsada0_b (cp_v8qi, cp_v8qi); -void mep_cpsada0u_b (cp_v8uqi, cp_v8uqi); -void mep_cpabsla0_h (cp_v4hi, cp_v4hi); -void mep_cpabsua0_h (cp_v4hi, cp_v4hi); -void mep_cpabsa0_b (cp_v8qi, cp_v8qi); -void mep_cpabsa0u_b (cp_v8uqi, cp_v8uqi); -void mep_cpsubacla0_h (cp_v4hi, cp_v4hi); -void mep_cpsubacua0_h (cp_v4hi, cp_v4hi); -void mep_cpsubaca0_b (cp_v8qi, cp_v8qi); -void mep_cpsubaca0u_b (cp_v8uqi, cp_v8uqi); -void mep_cpsubla0_h (cp_v4hi, cp_v4hi); -void mep_cpsubua0_h (cp_v4hi, cp_v4hi); -void mep_cpsuba0_b (cp_v8qi, cp_v8qi); -void mep_cpsuba0u_b (cp_v8uqi, cp_v8uqi); -void mep_cpaddacla0_h (cp_v4hi, cp_v4hi); -void mep_cpaddacua0_h (cp_v4hi, cp_v4hi); -void mep_cpaddaca0_b (cp_v8qi, cp_v8qi); -void mep_cpaddaca0u_b (cp_v8uqi, cp_v8uqi); -void mep_cpaddla0_h (cp_v4hi, cp_v4hi); -void mep_cpaddua0_h (cp_v4hi, cp_v4hi); -void mep_cpadda0_b (cp_v8qi, cp_v8qi); -void mep_cpadda0u_b (cp_v8uqi, cp_v8uqi); +void mep_cpsetla0_w (cp_v2si, cp_v2si); // volatile +void mep_cpsetua0_w (cp_v2si, cp_v2si); // volatile +void mep_cpseta0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsadla0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsadua0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsada0_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpsada0u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpabsla0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpabsua0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpabsa0_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpabsa0u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpsubacla0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsubacua0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsubaca0_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpsubaca0u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpsubla0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsubua0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsuba0_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpsuba0u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpaddacla0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpaddacua0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpaddaca0_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpaddaca0u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpaddla0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpaddua0_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpadda0_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpadda0u_b (cp_v8uqi, cp_v8uqi); // volatile void mep_c0nop (); // volatile -void mep_cpsmsbslla1_w (cp_v2si, cp_v2si); -void mep_cpsmsbslua1_w (cp_v2si, cp_v2si); -void mep_cpsmsbslla1_h (cp_v4hi, cp_v4hi); -void mep_cpsmsbslua1_h (cp_v4hi, cp_v4hi); -void mep_cpsmadslla1_w (cp_v2si, cp_v2si); -void mep_cpsmadslua1_w (cp_v2si, cp_v2si); -void mep_cpsmadslla1_h (cp_v4hi, cp_v4hi); -void mep_cpsmadslua1_h (cp_v4hi, cp_v4hi); -void mep_cpmulslla1_w (cp_v2si, cp_v2si); -void mep_cpmulslua1_w (cp_v2si, cp_v2si); -void mep_cpmulslla1_h (cp_v4hi, cp_v4hi); -void mep_cpmulslua1_h (cp_v4hi, cp_v4hi); -void mep_cpsmsbla1_w (cp_v2si, cp_v2si); -void mep_cpsmsbua1_w (cp_v2si, cp_v2si); -void mep_cpsmsbla1_h (cp_v4hi, cp_v4hi); -void mep_cpsmsbua1_h (cp_v4hi, cp_v4hi); -void mep_cpsmadla1_w (cp_v2si, cp_v2si); -void mep_cpsmadua1_w (cp_v2si, cp_v2si); -void mep_cpsmadla1_h (cp_v4hi, cp_v4hi); -void mep_cpsmadua1_h (cp_v4hi, cp_v4hi); -void mep_cpmsbla1_w (cp_v2si, cp_v2si); -void mep_cpmsbua1_w (cp_v2si, cp_v2si); -void mep_cpmsbla1u_w (cp_v2usi, cp_v2usi); -void mep_cpmsbua1u_w (cp_v2usi, cp_v2usi); -void mep_cpmsbla1_h (cp_v4hi, cp_v4hi); -void mep_cpmsbua1_h (cp_v4hi, cp_v4hi); -void mep_cpmadla1_w (cp_v2si, cp_v2si); -void mep_cpmadua1_w (cp_v2si, cp_v2si); -void mep_cpmadla1u_w (cp_v2usi, cp_v2usi); -void mep_cpmadua1u_w (cp_v2usi, cp_v2usi); -void mep_cpmadla1_h (cp_v4hi, cp_v4hi); -void mep_cpmadua1_h (cp_v4hi, cp_v4hi); -void mep_cpmada1_b (cp_v8qi, cp_v8qi); -void mep_cpmada1u_b (cp_v8uqi, cp_v8uqi); -void mep_cpmulla1_w (cp_v2si, cp_v2si); -void mep_cpmulua1_w (cp_v2si, cp_v2si); -void mep_cpmulla1u_w (cp_v2usi, cp_v2usi); -void mep_cpmulua1u_w (cp_v2usi, cp_v2usi); -void mep_cpmulla1_h (cp_v4hi, cp_v4hi); -void mep_cpmulua1_h (cp_v4hi, cp_v4hi); -void mep_cpmula1_b (cp_v8qi, cp_v8qi); -void mep_cpmula1u_b (cp_v8uqi, cp_v8uqi); -void mep_cpssda1_b (cp_v8qi, cp_v8qi); -void mep_cpssda1u_b (cp_v8uqi, cp_v8uqi); -void mep_cpssqa1_b (cp_v8qi, cp_v8qi); -void mep_cpssqa1u_b (cp_v8uqi, cp_v8uqi); -void mep_cpsllia1 (long); -void mep_cpsraia1 (long); -void mep_cpsrlia1 (long); -void mep_cpslla1 (cp_data_bus_int); -void mep_cpsraa1 (cp_data_bus_int); -void mep_cpsrla1 (cp_data_bus_int); +void mep_cpsmsbslla1_w (cp_v2si, cp_v2si); // volatile +void mep_cpsmsbslua1_w (cp_v2si, cp_v2si); // volatile +void mep_cpsmsbslla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsmsbslua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsmadslla1_w (cp_v2si, cp_v2si); // volatile +void mep_cpsmadslua1_w (cp_v2si, cp_v2si); // volatile +void mep_cpsmadslla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsmadslua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpmulslla1_w (cp_v2si, cp_v2si); // volatile +void mep_cpmulslua1_w (cp_v2si, cp_v2si); // volatile +void mep_cpmulslla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpmulslua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsmsbla1_w (cp_v2si, cp_v2si); // volatile +void mep_cpsmsbua1_w (cp_v2si, cp_v2si); // volatile +void mep_cpsmsbla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsmsbua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsmadla1_w (cp_v2si, cp_v2si); // volatile +void mep_cpsmadua1_w (cp_v2si, cp_v2si); // volatile +void mep_cpsmadla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsmadua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpmsbla1_w (cp_v2si, cp_v2si); // volatile +void mep_cpmsbua1_w (cp_v2si, cp_v2si); // volatile +void mep_cpmsbla1u_w (cp_v2usi, cp_v2usi); // volatile +void mep_cpmsbua1u_w (cp_v2usi, cp_v2usi); // volatile +void mep_cpmsbla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpmsbua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpmadla1_w (cp_v2si, cp_v2si); // volatile +void mep_cpmadua1_w (cp_v2si, cp_v2si); // volatile +void mep_cpmadla1u_w (cp_v2usi, cp_v2usi); // volatile +void mep_cpmadua1u_w (cp_v2usi, cp_v2usi); // volatile +void mep_cpmadla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpmadua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpmada1_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpmada1u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpmulla1_w (cp_v2si, cp_v2si); // volatile +void mep_cpmulua1_w (cp_v2si, cp_v2si); // volatile +void mep_cpmulla1u_w (cp_v2usi, cp_v2usi); // volatile +void mep_cpmulua1u_w (cp_v2usi, cp_v2usi); // volatile +void mep_cpmulla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpmulua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpmula1_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpmula1u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpssda1_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpssda1u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpssqa1_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpssqa1u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpsllia1 (long); // volatile +void mep_cpsraia1 (long); // volatile +void mep_cpsrlia1 (long); // volatile +void mep_cpslla1 (cp_data_bus_int); // volatile +void mep_cpsraa1 (cp_data_bus_int); // volatile +void mep_cpsrla1 (cp_data_bus_int); // volatile cp_v2si mep_cpmovhla1_w (); cp_v2si mep_cpmovhua1_w (); cp_v2si mep_cppackla1_w (); @@ -190,33 +190,33 @@ cp_v2si mep_cpmovuua1_w (); cp_v4hi mep_cpmovla1_h (); cp_v4hi mep_cpmovua1_h (); cp_v8qi mep_cpmova1_b (); -void mep_cpsetla1_w (cp_v2si, cp_v2si); -void mep_cpsetua1_w (cp_v2si, cp_v2si); -void mep_cpseta1_h (cp_v4hi, cp_v4hi); -void mep_cpsadla1_h (cp_v4hi, cp_v4hi); -void mep_cpsadua1_h (cp_v4hi, cp_v4hi); -void mep_cpsada1_b (cp_v8qi, cp_v8qi); -void mep_cpsada1u_b (cp_v8uqi, cp_v8uqi); -void mep_cpabsla1_h (cp_v4hi, cp_v4hi); -void mep_cpabsua1_h (cp_v4hi, cp_v4hi); -void mep_cpabsa1_b (cp_v8qi, cp_v8qi); -void mep_cpabsa1u_b (cp_v8uqi, cp_v8uqi); -void mep_cpsubacla1_h (cp_v4hi, cp_v4hi); -void mep_cpsubacua1_h (cp_v4hi, cp_v4hi); -void mep_cpsubaca1_b (cp_v8qi, cp_v8qi); -void mep_cpsubaca1u_b (cp_v8uqi, cp_v8uqi); -void mep_cpsubla1_h (cp_v4hi, cp_v4hi); -void mep_cpsubua1_h (cp_v4hi, cp_v4hi); -void mep_cpsuba1_b (cp_v8qi, cp_v8qi); -void mep_cpsuba1u_b (cp_v8uqi, cp_v8uqi); -void mep_cpaddacla1_h (cp_v4hi, cp_v4hi); -void mep_cpaddacua1_h (cp_v4hi, cp_v4hi); -void mep_cpaddaca1_b (cp_v8qi, cp_v8qi); -void mep_cpaddaca1u_b (cp_v8uqi, cp_v8uqi); -void mep_cpaddla1_h (cp_v4hi, cp_v4hi); -void mep_cpaddua1_h (cp_v4hi, cp_v4hi); -void mep_cpadda1_b (cp_v8qi, cp_v8qi); -void mep_cpadda1u_b (cp_v8uqi, cp_v8uqi); +void mep_cpsetla1_w (cp_v2si, cp_v2si); // volatile +void mep_cpsetua1_w (cp_v2si, cp_v2si); // volatile +void mep_cpseta1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsadla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsadua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsada1_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpsada1u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpabsla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpabsua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpabsa1_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpabsa1u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpsubacla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsubacua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsubaca1_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpsubaca1u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpsubla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsubua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpsuba1_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpsuba1u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpaddacla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpaddacua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpaddaca1_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpaddaca1u_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpaddla1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpaddua1_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpadda1_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpadda1u_b (cp_v8uqi, cp_v8uqi); // volatile cp_data_bus_int mep_cdmovi (long); cp_data_bus_int mep_cdmoviu (long); cp_v2si mep_cpmovi_w (long); @@ -274,23 +274,23 @@ void mep_cpacmpne_b (cp_v8qi, cp_v8qi); // volatile void mep_cpacmpeq_w (cp_v2si, cp_v2si); // volatile void mep_cpacmpeq_h (cp_v4hi, cp_v4hi); // volatile void mep_cpacmpeq_b (cp_v8qi, cp_v8qi); // volatile -void mep_cpcmpge_w (cp_v2si, cp_v2si); -void mep_cpcmpgeu_w (cp_v2usi, cp_v2usi); -void mep_cpcmpge_h (cp_v4hi, cp_v4hi); -void mep_cpcmpge_b (cp_v8qi, cp_v8qi); -void mep_cpcmpgeu_b (cp_v8uqi, cp_v8uqi); -void mep_cpcmpgt_w (cp_v2si, cp_v2si); -void mep_cpcmpgtu_w (cp_v2usi, cp_v2usi); -void mep_cpcmpgt_h (cp_v4hi, cp_v4hi); -void mep_cpcmpgt_b (cp_v8qi, cp_v8qi); -void mep_cpcmpgtu_b (cp_v8uqi, cp_v8uqi); -void mep_cpcmpne_w (cp_v2si, cp_v2si); -void mep_cpcmpne_h (cp_v4hi, cp_v4hi); -void mep_cpcmpne_b (cp_v8qi, cp_v8qi); -void mep_cpcmpeq_w (cp_v2si, cp_v2si); -void mep_cpcmpeq_h (cp_v4hi, cp_v4hi); -void mep_cpcmpeq_b (cp_v8qi, cp_v8qi); -void mep_cpcmpeqz_b (cp_v8qi, cp_v8qi); +void mep_cpcmpge_w (cp_v2si, cp_v2si); // volatile +void mep_cpcmpgeu_w (cp_v2usi, cp_v2usi); // volatile +void mep_cpcmpge_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpcmpge_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpcmpgeu_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpcmpgt_w (cp_v2si, cp_v2si); // volatile +void mep_cpcmpgtu_w (cp_v2usi, cp_v2usi); // volatile +void mep_cpcmpgt_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpcmpgt_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpcmpgtu_b (cp_v8uqi, cp_v8uqi); // volatile +void mep_cpcmpne_w (cp_v2si, cp_v2si); // volatile +void mep_cpcmpne_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpcmpne_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpcmpeq_w (cp_v2si, cp_v2si); // volatile +void mep_cpcmpeq_h (cp_v4hi, cp_v4hi); // volatile +void mep_cpcmpeq_b (cp_v8qi, cp_v8qi); // volatile +void mep_cpcmpeqz_b (cp_v8qi, cp_v8qi); // volatile cp_data_bus_int mep_cdcastw (cp_data_bus_int); cp_data_bus_int mep_cdcastuw (cp_data_bus_int); cp_v2si mep_cpcasth_w (cp_v2si); @@ -409,12 +409,6 @@ cp_data_bus_int mep_cdadd3 (cp_data_bus_int, cp_data_bus_int); cp_v2si mep_cpadd3_w (cp_v2si, cp_v2si); cp_v4hi mep_cpadd3_h (cp_v4hi, cp_v4hi); cp_v8qi mep_cpadd3_b (cp_v8qi, cp_v8qi); -void mep_cmovh_rn_crm_p0 (long, long); // volatile -void mep_cmovh_crn_rm_p0 (long, long); // volatile -void mep_cmovc_rn_ccrm_p0 (long, long); // volatile -void mep_cmovc_ccrn_rm_p0 (long, long); // volatile -void mep_cmov_rn_crm_p0 (long, long); // volatile -void mep_cmov_crn_rm_p0 (long, long); // volatile void mep_bsrv (void *); void mep_jsrv (long); void mep_synccp (); // volatile diff --git a/gcc/config/mep/intrinsics.md b/gcc/config/mep/intrinsics.md index aa036f8b602..9c86f5f737b 100644 --- a/gcc/config/mep/intrinsics.md +++ b/gcc/config/mep/intrinsics.md @@ -122,55 +122,30 @@ (define_insn "cgen_intrinsic_cpsmsbslla1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2198)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2199)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2200)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2201)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2202)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2203)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2204)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2205)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2206)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2207))] + ] 2206))] "CGEN_ENABLE_INSN_P (0)" "cpsmsbslla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -183,55 +158,30 @@ (define_insn "cgen_intrinsic_cpsmsbslla1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2198)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2199)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2200)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2201)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2202)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2203)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2204)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2205)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2206)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2207))] + ] 2206))] "CGEN_ENABLE_INSN_P (1)" "cpsmsbslla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -244,55 +194,30 @@ (define_insn "cgen_intrinsic_cpsmsbslua1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2208)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2209)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2210)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2211)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2212)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2213)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2214)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2215)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2216)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2217))] + ] 2216))] "CGEN_ENABLE_INSN_P (2)" "cpsmsbslua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -305,55 +230,30 @@ (define_insn "cgen_intrinsic_cpsmsbslua1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2208)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2209)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2210)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2211)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2212)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2213)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2214)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2215)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2216)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2217))] + ] 2216))] "CGEN_ENABLE_INSN_P (3)" "cpsmsbslua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -366,55 +266,30 @@ (define_insn "cgen_intrinsic_cpsmsbslla1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2218)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2219)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2220)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2221)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2222)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2223)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2224)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2225)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2226)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2227))] + ] 2226))] "CGEN_ENABLE_INSN_P (4)" "cpsmsbslla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -427,55 +302,30 @@ (define_insn "cgen_intrinsic_cpsmsbslla1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2218)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2219)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2220)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2221)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2222)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2223)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2224)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2225)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2226)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2227))] + ] 2226))] "CGEN_ENABLE_INSN_P (5)" "cpsmsbslla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -488,55 +338,30 @@ (define_insn "cgen_intrinsic_cpsmsbslua1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2228)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2229)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2230)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2231)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2232)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2233)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2234)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2235)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2236)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2237))] + ] 2236))] "CGEN_ENABLE_INSN_P (6)" "cpsmsbslua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -549,55 +374,30 @@ (define_insn "cgen_intrinsic_cpsmsbslua1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2228)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2229)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2230)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2231)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2232)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2233)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2234)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2235)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2236)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2237))] + ] 2236))] "CGEN_ENABLE_INSN_P (7)" "cpsmsbslua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -610,55 +410,30 @@ (define_insn "cgen_intrinsic_cpsmadslla1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2238)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2239)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2240)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2241)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2242)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2243)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2244)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2245)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2246)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2247))] + ] 2246))] "CGEN_ENABLE_INSN_P (8)" "cpsmadslla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -671,55 +446,30 @@ (define_insn "cgen_intrinsic_cpsmadslla1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2238)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2239)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2240)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2241)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2242)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2243)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2244)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2245)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2246)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2247))] + ] 2246))] "CGEN_ENABLE_INSN_P (9)" "cpsmadslla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -732,55 +482,30 @@ (define_insn "cgen_intrinsic_cpsmadslua1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2248)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2249)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2250)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2251)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2252)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2253)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2254)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2255)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2256)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2257))] + ] 2256))] "CGEN_ENABLE_INSN_P (10)" "cpsmadslua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -793,55 +518,30 @@ (define_insn "cgen_intrinsic_cpsmadslua1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2248)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2249)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2250)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2251)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2252)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2253)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2254)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2255)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2256)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2257))] + ] 2256))] "CGEN_ENABLE_INSN_P (11)" "cpsmadslua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -854,55 +554,30 @@ (define_insn "cgen_intrinsic_cpsmadslla1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2258)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2259)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2260)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2261)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2262)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2263)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2264)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2265)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2266)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2267))] + ] 2266))] "CGEN_ENABLE_INSN_P (12)" "cpsmadslla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -915,55 +590,30 @@ (define_insn "cgen_intrinsic_cpsmadslla1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2258)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2259)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2260)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2261)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2262)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2263)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2264)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2265)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2266)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2267))] + ] 2266))] "CGEN_ENABLE_INSN_P (13)" "cpsmadslla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -976,55 +626,30 @@ (define_insn "cgen_intrinsic_cpsmadslua1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2268)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2269)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2270)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2271)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2272)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2273)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2274)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2275)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2276)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2277))] + ] 2276))] "CGEN_ENABLE_INSN_P (14)" "cpsmadslua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -1037,55 +662,30 @@ (define_insn "cgen_intrinsic_cpsmadslua1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2268)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2269)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2270)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2271)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2272)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2273)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2274)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2275)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2276)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2277))] + ] 2276))] "CGEN_ENABLE_INSN_P (15)" "cpsmadslua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -1098,55 +698,30 @@ (define_insn "cgen_intrinsic_cpmulslla1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2278)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2279)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2280)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2281)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2282)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2283)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2284)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2285)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2286)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2287))] + ] 2286))] "CGEN_ENABLE_INSN_P (16)" "cpmulslla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -1159,55 +734,30 @@ (define_insn "cgen_intrinsic_cpmulslla1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2278)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2279)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2280)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2281)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2282)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2283)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2284)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2285)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2286)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2287))] + ] 2286))] "CGEN_ENABLE_INSN_P (17)" "cpmulslla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -1220,55 +770,30 @@ (define_insn "cgen_intrinsic_cpmulslua1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2288)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2289)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2290)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2291)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2292)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2293)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2294)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2295)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2296)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2297))] + ] 2296))] "CGEN_ENABLE_INSN_P (18)" "cpmulslua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -1281,55 +806,30 @@ (define_insn "cgen_intrinsic_cpmulslua1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2288)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2289)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2290)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2291)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2292)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2293)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2294)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2295)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2296)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2297))] + ] 2296))] "CGEN_ENABLE_INSN_P (19)" "cpmulslua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -1342,55 +842,30 @@ (define_insn "cgen_intrinsic_cpmulslla1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2298)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2299)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2300)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2301)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2302)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2303)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2304)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2305)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2306)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2307))] + ] 2306))] "CGEN_ENABLE_INSN_P (20)" "cpmulslla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -1403,55 +878,30 @@ (define_insn "cgen_intrinsic_cpmulslla1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2298)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2299)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2300)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2301)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2302)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2303)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2304)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2305)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2306)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2307))] + ] 2306))] "CGEN_ENABLE_INSN_P (21)" "cpmulslla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -1464,55 +914,30 @@ (define_insn "cgen_intrinsic_cpmulslua1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2308)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2309)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2310)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2311)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2312)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2313)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2314)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2315)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2316)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2317))] + ] 2316))] "CGEN_ENABLE_INSN_P (22)" "cpmulslua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -1525,55 +950,30 @@ (define_insn "cgen_intrinsic_cpmulslua1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2308)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2309)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2310)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2311)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2312)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2313)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2314)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2315)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2316)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2317))] + ] 2316))] "CGEN_ENABLE_INSN_P (23)" "cpmulslua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -1586,55 +986,30 @@ (define_insn "cgen_intrinsic_cpsmsbla1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2318)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2319)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2320)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2321)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2322)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2323)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2324)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2325)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2326)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2327))] + ] 2326))] "CGEN_ENABLE_INSN_P (24)" "cpsmsbla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -1647,55 +1022,30 @@ (define_insn "cgen_intrinsic_cpsmsbla1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2318)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2319)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2320)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2321)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2322)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2323)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2324)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2325)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2326)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2327))] + ] 2326))] "CGEN_ENABLE_INSN_P (25)" "cpsmsbla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -1708,55 +1058,30 @@ (define_insn "cgen_intrinsic_cpsmsbua1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2328)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2329)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2330)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2331)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2332)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2333)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2334)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2335)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2336)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2337))] + ] 2336))] "CGEN_ENABLE_INSN_P (26)" "cpsmsbua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -1769,55 +1094,30 @@ (define_insn "cgen_intrinsic_cpsmsbua1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2328)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2329)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2330)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2331)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2332)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2333)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2334)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2335)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2336)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2337))] + ] 2336))] "CGEN_ENABLE_INSN_P (27)" "cpsmsbua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -1830,55 +1130,30 @@ (define_insn "cgen_intrinsic_cpsmsbla1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2338)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2339)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2340)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2341)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2342)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2343)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2344)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2345)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2346)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2347))] + ] 2346))] "CGEN_ENABLE_INSN_P (28)" "cpsmsbla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -1891,55 +1166,30 @@ (define_insn "cgen_intrinsic_cpsmsbla1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2338)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2339)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2340)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2341)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2342)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2343)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2344)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2345)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2346)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2347))] + ] 2346))] "CGEN_ENABLE_INSN_P (29)" "cpsmsbla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -1952,55 +1202,30 @@ (define_insn "cgen_intrinsic_cpsmsbua1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2348)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2349)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2350)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2351)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2352)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2353)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2354)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2355)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2356)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2357))] + ] 2356))] "CGEN_ENABLE_INSN_P (30)" "cpsmsbua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -2013,55 +1238,30 @@ (define_insn "cgen_intrinsic_cpsmsbua1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2348)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2349)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2350)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2351)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2352)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2353)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2354)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2355)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2356)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2357))] + ] 2356))] "CGEN_ENABLE_INSN_P (31)" "cpsmsbua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -2074,55 +1274,30 @@ (define_insn "cgen_intrinsic_cpsmadla1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2358)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2359)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2360)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2361)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2362)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2363)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2364)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2365)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2366)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2367))] + ] 2366))] "CGEN_ENABLE_INSN_P (32)" "cpsmadla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -2135,55 +1310,30 @@ (define_insn "cgen_intrinsic_cpsmadla1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2358)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2359)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2360)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2361)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2362)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2363)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2364)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2365)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2366)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2367))] + ] 2366))] "CGEN_ENABLE_INSN_P (33)" "cpsmadla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -2196,55 +1346,30 @@ (define_insn "cgen_intrinsic_cpsmadua1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2368)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2369)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2370)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2371)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2372)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2373)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2374)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2375)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2376)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2377))] + ] 2376))] "CGEN_ENABLE_INSN_P (34)" "cpsmadua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -2257,55 +1382,30 @@ (define_insn "cgen_intrinsic_cpsmadua1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2368)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2369)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2370)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2371)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2372)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2373)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2374)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2375)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2376)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2377))] + ] 2376))] "CGEN_ENABLE_INSN_P (35)" "cpsmadua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -2318,55 +1418,30 @@ (define_insn "cgen_intrinsic_cpsmadla1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2378)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2379)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2380)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2381)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2382)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2383)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2384)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2385)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2386)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2387))] + ] 2386))] "CGEN_ENABLE_INSN_P (36)" "cpsmadla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -2379,55 +1454,30 @@ (define_insn "cgen_intrinsic_cpsmadla1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2378)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2379)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2380)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2381)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2382)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2383)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2384)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2385)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2386)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2387))] + ] 2386))] "CGEN_ENABLE_INSN_P (37)" "cpsmadla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -2440,55 +1490,30 @@ (define_insn "cgen_intrinsic_cpsmadua1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2388)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2389)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2390)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2391)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2392)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2393)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2394)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2395)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2396)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2397))] + ] 2396))] "CGEN_ENABLE_INSN_P (38)" "cpsmadua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -2501,55 +1526,30 @@ (define_insn "cgen_intrinsic_cpsmadua1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2388)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2389)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2390)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2391)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2392)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2393)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2394)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2395)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2396)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2397))] + ] 2396))] "CGEN_ENABLE_INSN_P (39)" "cpsmadua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -2562,55 +1562,30 @@ (define_insn "cgen_intrinsic_cpmsbla1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2398)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2399)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2400)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2401)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2402)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2403)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2404)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2405)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2406)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2407))] + ] 2406))] "CGEN_ENABLE_INSN_P (40)" "cpmsbla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -2623,55 +1598,30 @@ (define_insn "cgen_intrinsic_cpmsbla1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2398)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2399)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2400)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2401)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2402)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2403)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2404)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2405)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2406)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2407))] + ] 2406))] "CGEN_ENABLE_INSN_P (41)" "cpmsbla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -2684,55 +1634,30 @@ (define_insn "cgen_intrinsic_cpmsbua1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2408)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2409)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2410)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2411)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2412)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2413)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2414)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2415)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2416)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2417))] + ] 2416))] "CGEN_ENABLE_INSN_P (42)" "cpmsbua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -2745,55 +1670,30 @@ (define_insn "cgen_intrinsic_cpmsbua1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2408)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2409)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2410)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2411)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2412)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2413)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2414)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2415)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2416)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2417))] + ] 2416))] "CGEN_ENABLE_INSN_P (43)" "cpmsbua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -2806,55 +1706,30 @@ (define_insn "cgen_intrinsic_cpmsbla1u_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2418)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2419)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2420)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2421)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2422)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2423)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2424)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2425)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2426)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2427))] + ] 2426))] "CGEN_ENABLE_INSN_P (44)" "cpmsbla1u.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -2867,55 +1742,30 @@ (define_insn "cgen_intrinsic_cpmsbla1u_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2418)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2419)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2420)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2421)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2422)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2423)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2424)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2425)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2426)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2427))] + ] 2426))] "CGEN_ENABLE_INSN_P (45)" "cpmsbla1u.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -2928,55 +1778,30 @@ (define_insn "cgen_intrinsic_cpmsbua1u_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2428)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2429)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2430)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2431)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2432)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2433)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2434)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2435)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2436)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2437))] + ] 2436))] "CGEN_ENABLE_INSN_P (46)" "cpmsbua1u.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -2989,55 +1814,30 @@ (define_insn "cgen_intrinsic_cpmsbua1u_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2428)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2429)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2430)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2431)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2432)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2433)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2434)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2435)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2436)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2437))] + ] 2436))] "CGEN_ENABLE_INSN_P (47)" "cpmsbua1u.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -3050,55 +1850,30 @@ (define_insn "cgen_intrinsic_cpmsbla1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2438)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2439)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2440)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2441)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2442)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2443)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2444)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2445)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2446)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2447))] + ] 2446))] "CGEN_ENABLE_INSN_P (48)" "cpmsbla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -3111,55 +1886,30 @@ (define_insn "cgen_intrinsic_cpmsbla1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2438)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2439)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2440)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2441)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2442)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2443)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2444)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2445)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2446)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2447))] + ] 2446))] "CGEN_ENABLE_INSN_P (49)" "cpmsbla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -3172,55 +1922,30 @@ (define_insn "cgen_intrinsic_cpmsbua1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2448)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2449)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2450)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2451)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2452)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2453)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2454)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2455)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2456)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2457))] + ] 2456))] "CGEN_ENABLE_INSN_P (50)" "cpmsbua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -3233,55 +1958,30 @@ (define_insn "cgen_intrinsic_cpmsbua1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2448)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2449)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2450)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2451)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2452)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2453)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2454)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2455)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2456)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2457))] + ] 2456))] "CGEN_ENABLE_INSN_P (51)" "cpmsbua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -3294,55 +1994,30 @@ (define_insn "cgen_intrinsic_cpmadla1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2458)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2459)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2460)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2461)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2462)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2463)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2464)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2465)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2466)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2467))] + ] 2466))] "CGEN_ENABLE_INSN_P (52)" "cpmadla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -3355,55 +2030,30 @@ (define_insn "cgen_intrinsic_cpmadla1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2458)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2459)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2460)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2461)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2462)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2463)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2464)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2465)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2466)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2467))] + ] 2466))] "CGEN_ENABLE_INSN_P (53)" "cpmadla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -3416,55 +2066,30 @@ (define_insn "cgen_intrinsic_cpmadua1_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2468)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2469)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2470)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2471)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2472)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2473)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2474)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2475)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2476)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2477))] + ] 2476))] "CGEN_ENABLE_INSN_P (54)" "cpmadua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -3477,55 +2102,30 @@ (define_insn "cgen_intrinsic_cpmadua1_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2468)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2469)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2470)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2471)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2472)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2473)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2474)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2475)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2476)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2477))] + ] 2476))] "CGEN_ENABLE_INSN_P (55)" "cpmadua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -3538,55 +2138,30 @@ (define_insn "cgen_intrinsic_cpmadla1u_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2478)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2479)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2480)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2481)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2482)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2483)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2484)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2485)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2486)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2487))] + ] 2486))] "CGEN_ENABLE_INSN_P (56)" "cpmadla1u.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -3599,55 +2174,30 @@ (define_insn "cgen_intrinsic_cpmadla1u_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2478)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2479)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2480)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2481)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2482)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2483)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2484)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2485)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2486)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2487))] + ] 2486))] "CGEN_ENABLE_INSN_P (57)" "cpmadla1u.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -3660,55 +2210,30 @@ (define_insn "cgen_intrinsic_cpmadua1u_w_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2488)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2489)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2490)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2491)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2492)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2493)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2494)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2495)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2496)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2497))] + ] 2496))] "CGEN_ENABLE_INSN_P (58)" "cpmadua1u.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -3721,55 +2246,30 @@ (define_insn "cgen_intrinsic_cpmadua1u_w_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2488)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2489)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2490)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2491)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2492)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2493)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2494)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2495)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2496)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2497))] + ] 2496))] "CGEN_ENABLE_INSN_P (59)" "cpmadua1u.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -3782,55 +2282,30 @@ (define_insn "cgen_intrinsic_cpmadla1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2498)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2499)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2500)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2501)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2502)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2503)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2504)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2505)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2506)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2507))] + ] 2506))] "CGEN_ENABLE_INSN_P (60)" "cpmadla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -3843,55 +2318,30 @@ (define_insn "cgen_intrinsic_cpmadla1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2498)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2499)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2500)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2501)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2502)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2503)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2504)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2505)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2506)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2507))] + ] 2506))] "CGEN_ENABLE_INSN_P (61)" "cpmadla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -3904,55 +2354,30 @@ (define_insn "cgen_intrinsic_cpmadua1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2508)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2509)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2510)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2511)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2512)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2513)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2514)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2515)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2516)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2517))] + ] 2516))] "CGEN_ENABLE_INSN_P (62)" "cpmadua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -3965,55 +2390,30 @@ (define_insn "cgen_intrinsic_cpmadua1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2508)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2509)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2510)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2511)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2512)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2513)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2514)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2515)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2516)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2517))] + ] 2516))] "CGEN_ENABLE_INSN_P (63)" "cpmadua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -4026,95 +2426,50 @@ (define_insn "cgen_intrinsic_cpmada1_b_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2518)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2519)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2520)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2521)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2522)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2523)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2524)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2525)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2526)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2527)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2528)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2529)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2530)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2531)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2532)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2533)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2534)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2535))] + ] 2534))] "CGEN_ENABLE_INSN_P (64)" "cpmada1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -4127,95 +2482,50 @@ (define_insn "cgen_intrinsic_cpmada1_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2518)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2519)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2520)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2521)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2522)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2523)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2524)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2525)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2526)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2527)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2528)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2529)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2530)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2531)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2532)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2533)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2534)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2535))] + ] 2534))] "CGEN_ENABLE_INSN_P (65)" "cpmada1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -4228,95 +2538,50 @@ (define_insn "cgen_intrinsic_cpmada1u_b_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2536)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2537)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2538)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2539)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2540)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2541)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2542)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2543)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2544)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2545)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2546)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2547)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2548)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2549)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2550)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2551)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2552)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2553))] + ] 2552))] "CGEN_ENABLE_INSN_P (66)" "cpmada1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -4329,95 +2594,50 @@ (define_insn "cgen_intrinsic_cpmada1u_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2536)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2537)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2538)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2539)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2540)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2541)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2542)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2543)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2544)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2545)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2546)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2547)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2548)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2549)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2550)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2551)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2552)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2553))] + ] 2552))] "CGEN_ENABLE_INSN_P (67)" "cpmada1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -4430,45 +2650,25 @@ (define_insn "cgen_intrinsic_cpmulla1_w_C3" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2554)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2555)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2556)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2557)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2558)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2559)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2560)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2561))] + ] 2560))] "CGEN_ENABLE_INSN_P (68)" "cpmulla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -4481,45 +2681,25 @@ (define_insn "cgen_intrinsic_cpmulla1_w_P1" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2554)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2555)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2556)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2557)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2558)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2559)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2560)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2561))] + ] 2560))] "CGEN_ENABLE_INSN_P (69)" "cpmulla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -4532,45 +2712,25 @@ (define_insn "cgen_intrinsic_cpmulua1_w_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2562)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2563)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2564)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2565)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2566)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2567)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2568)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2569))] + ] 2568))] "CGEN_ENABLE_INSN_P (70)" "cpmulua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -4583,45 +2743,25 @@ (define_insn "cgen_intrinsic_cpmulua1_w_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2562)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2563)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2564)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2565)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2566)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2567)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2568)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2569))] + ] 2568))] "CGEN_ENABLE_INSN_P (71)" "cpmulua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -4634,45 +2774,25 @@ (define_insn "cgen_intrinsic_cpmulla1u_w_C3" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2570)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2571)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2572)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2573)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2574)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2575)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2576)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2577))] + ] 2576))] "CGEN_ENABLE_INSN_P (72)" "cpmulla1u.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -4685,45 +2805,25 @@ (define_insn "cgen_intrinsic_cpmulla1u_w_P1" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2570)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2571)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2572)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2573)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2574)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2575)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2576)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2577))] + ] 2576))] "CGEN_ENABLE_INSN_P (73)" "cpmulla1u.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -4736,45 +2836,25 @@ (define_insn "cgen_intrinsic_cpmulua1u_w_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2578)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2579)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2580)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2581)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2582)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2583)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2584)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2585))] + ] 2584))] "CGEN_ENABLE_INSN_P (74)" "cpmulua1u.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -4787,45 +2867,25 @@ (define_insn "cgen_intrinsic_cpmulua1u_w_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2578)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2579)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2580)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2581)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2582)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2583)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2584)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2585))] + ] 2584))] "CGEN_ENABLE_INSN_P (75)" "cpmulua1u.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -4838,45 +2898,25 @@ (define_insn "cgen_intrinsic_cpmulla1_h_C3" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2586)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2587)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2588)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2589)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2590)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2591)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2592)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2593))] + ] 2592))] "CGEN_ENABLE_INSN_P (76)" "cpmulla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -4889,45 +2929,25 @@ (define_insn "cgen_intrinsic_cpmulla1_h_P1" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2586)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2587)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2588)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2589)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2590)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2591)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2592)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2593))] + ] 2592))] "CGEN_ENABLE_INSN_P (77)" "cpmulla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -4940,45 +2960,25 @@ (define_insn "cgen_intrinsic_cpmulua1_h_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2594)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2595)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2596)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2597)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2598)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2599)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2600)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2601))] + ] 2600))] "CGEN_ENABLE_INSN_P (78)" "cpmulua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -4991,45 +2991,25 @@ (define_insn "cgen_intrinsic_cpmulua1_h_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2594)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2595)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2596)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2597)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2598)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2599)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2600)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2601))] + ] 2600))] "CGEN_ENABLE_INSN_P (79)" "cpmulua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -5042,85 +3022,45 @@ (define_insn "cgen_intrinsic_cpmula1_b_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2602)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2603)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2604)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2605)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2606)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2607)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2608)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2609)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2610)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2611)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2612)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2613)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2614)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2615)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2616)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2617))] + ] 2616))] "CGEN_ENABLE_INSN_P (80)" "cpmula1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -5133,85 +3073,45 @@ (define_insn "cgen_intrinsic_cpmula1_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2602)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2603)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2604)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2605)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2606)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2607)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2608)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2609)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2610)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2611)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2612)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2613)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2614)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2615)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2616)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2617))] + ] 2616))] "CGEN_ENABLE_INSN_P (81)" "cpmula1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -5224,85 +3124,45 @@ (define_insn "cgen_intrinsic_cpmula1u_b_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2618)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2619)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2620)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2621)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2622)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2623)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2624)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2625)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2626)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2627)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2628)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2629)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2630)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2631)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2632)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2633))] + ] 2632))] "CGEN_ENABLE_INSN_P (82)" "cpmula1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -5315,85 +3175,45 @@ (define_insn "cgen_intrinsic_cpmula1u_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2618)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2619)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2620)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2621)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2622)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2623)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2624)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2625)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2626)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2627)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2628)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2629)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2630)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2631)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2632)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2633))] + ] 2632))] "CGEN_ENABLE_INSN_P (83)" "cpmula1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -5406,95 +3226,50 @@ (define_insn "cgen_intrinsic_cpssda1_b_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2634)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2635)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2636)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2637)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2638)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2639)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2640)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2641)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2642)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2643)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2644)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2645)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2646)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2647)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2648)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2649)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2650)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2651))] + ] 2650))] "CGEN_ENABLE_INSN_P (84)" "cpssda1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -5507,85 +3282,45 @@ (define_insn "cgen_intrinsic_cpssda1_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2634)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2635)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2636)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2637)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2638)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2639)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2640)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2641)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2642)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2643)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2644)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2645)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2646)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2647)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2648)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2649))] + ] 2648))] "CGEN_ENABLE_INSN_P (85)" "cpssda1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -5598,95 +3333,50 @@ (define_insn "cgen_intrinsic_cpssda1u_b_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2650)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2651)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2652)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2653)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2654)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2655)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2656)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2657)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2658)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2659)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2660)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2661)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2662)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2663)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2664)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2665)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2666)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2667))] + ] 2666))] "CGEN_ENABLE_INSN_P (86)" "cpssda1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -5699,85 +3389,45 @@ (define_insn "cgen_intrinsic_cpssda1u_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2650)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2651)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2652)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2653)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2654)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2655)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2656)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2657)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2658)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2659)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2660)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2661)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2662)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2663)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2664)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2665))] + ] 2664))] "CGEN_ENABLE_INSN_P (87)" "cpssda1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -5790,85 +3440,45 @@ (define_insn "cgen_intrinsic_cpssqa1_b_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2666)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2667)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2668)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2669)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2670)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2671)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2672)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2673)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2674)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2675)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2676)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2677)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2678)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2679)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2680)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2681))] + ] 2680))] "CGEN_ENABLE_INSN_P (88)" "cpssqa1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -5881,85 +3491,45 @@ (define_insn "cgen_intrinsic_cpssqa1_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2666)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2667)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2668)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2669)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2670)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2671)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2672)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2673)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2674)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2675)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2676)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2677)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2678)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2679)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2680)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2681))] + ] 2680))] "CGEN_ENABLE_INSN_P (89)" "cpssqa1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -5972,85 +3542,45 @@ (define_insn "cgen_intrinsic_cpssqa1u_b_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2682)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2683)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2684)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2685)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2686)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2687)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2688)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2689)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2690)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2691)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2692)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2693)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2694)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2695)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2696)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2697))] + ] 2696))] "CGEN_ENABLE_INSN_P (90)" "cpssqa1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -6063,85 +3593,45 @@ (define_insn "cgen_intrinsic_cpssqa1u_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2682)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2683)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2684)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2685)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2686)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2687)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2688)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2689)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2690)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2691)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2692)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2693)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2694)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2695)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2696)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2697))] + ] 2696))] "CGEN_ENABLE_INSN_P (91)" "cpssqa1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -6154,75 +3644,40 @@ (define_insn "cgen_intrinsic_cpfmadila1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1000)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1001)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1002)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1003)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1004)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1005)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1006)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1007)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1008)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) - ] 1009))] + ] 1008))] "CGEN_ENABLE_INSN_P (92)" "cpfmadila1.h\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") @@ -6235,75 +3690,40 @@ (define_insn "cgen_intrinsic_cpfmadiua1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1010)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1011)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1012)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1013)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1014)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1015)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1016)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1017)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1018)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) - ] 1019))] + ] 1018))] "CGEN_ENABLE_INSN_P (93)" "cpfmadiua1.h\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") @@ -6316,131 +3736,68 @@ (define_insn "cgen_intrinsic_cpfmadia1_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1020)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1021)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1022)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1023)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1024)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1025)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1026)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1027)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1028)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1029)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1030)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1031)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1032)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1033)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1034)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1035)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1036)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) - ] 1037))] + ] 1036))] "CGEN_ENABLE_INSN_P (94)" "cpfmadia1.b\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") @@ -6453,131 +3810,68 @@ (define_insn "cgen_intrinsic_cpfmadia1u_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1038)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1039)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1040)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1041)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1042)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1043)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1044)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1045)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1046)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1047)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1048)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1049)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1050)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1051)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1052)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1053)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1054)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) - ] 1055))] + ] 1054))] "CGEN_ENABLE_INSN_P (95)" "cpfmadia1u.b\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") @@ -6590,61 +3884,33 @@ (define_insn "cgen_intrinsic_cpfmulila1_h_P1" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1056)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1057)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1058)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1059)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1060)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1061)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1062)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) - ] 1063))] + ] 1062))] "CGEN_ENABLE_INSN_P (96)" "cpfmulila1.h\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") @@ -6657,61 +3923,33 @@ (define_insn "cgen_intrinsic_cpfmuliua1_h_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1064)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1065)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1066)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1067)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1068)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1069)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1070)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) - ] 1071))] + ] 1070))] "CGEN_ENABLE_INSN_P (97)" "cpfmuliua1.h\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") @@ -6724,117 +3962,61 @@ (define_insn "cgen_intrinsic_cpfmulia1_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1072)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1073)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1074)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1075)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1076)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1077)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1078)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1079)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1080)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1081)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1082)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1083)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1084)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1085)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1086)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) - ] 1087))] + ] 1086))] "CGEN_ENABLE_INSN_P (98)" "cpfmulia1.b\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") @@ -6847,117 +4029,61 @@ (define_insn "cgen_intrinsic_cpfmulia1u_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (match_operand:SI 3 "cgen_h_sint_8a1_immediate" "") ] 1088)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1089)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1090)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1091)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1092)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1093)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1094)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1095)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1096)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1097)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1098)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1099)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) ] 1100)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1101)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - (match_dup 3) - ] 1102)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3) - ] 1103))] + ] 1102))] "CGEN_ENABLE_INSN_P (99)" "cpfmulia1u.b\\t%0,%1,%2,%3" [(set_attr "may_trap" "no") @@ -6970,65 +4096,35 @@ (define_insn "cgen_intrinsic_cpamadila1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1104)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1105)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1106)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1107)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1108)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1109)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1110)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1111)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1112)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1113))] + ] 1112))] "CGEN_ENABLE_INSN_P (100)" "cpamadila1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -7041,65 +4137,35 @@ (define_insn "cgen_intrinsic_cpamadiua1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1114)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1115)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1116)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1117)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1118)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1119)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1120)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1121)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1122)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1123))] + ] 1122))] "CGEN_ENABLE_INSN_P (101)" "cpamadiua1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -7112,113 +4178,59 @@ (define_insn "cgen_intrinsic_cpamadia1_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1124)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1125)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1126)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1127)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1128)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1129)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1130)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1131)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1132)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1133)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1134)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1135)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1136)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1137)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1138)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1139)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1140)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1141))] + ] 1140))] "CGEN_ENABLE_INSN_P (102)" "cpamadia1.b\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -7231,113 +4243,59 @@ (define_insn "cgen_intrinsic_cpamadia1u_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1142)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1143)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1144)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1145)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1146)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1147)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1148)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1149)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1150)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1151)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1152)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1153)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1154)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1155)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1156)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1157)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1158)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1159))] + ] 1158))] "CGEN_ENABLE_INSN_P (103)" "cpamadia1u.b\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -7350,53 +4308,29 @@ (define_insn "cgen_intrinsic_cpamulila1_h_P1" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1160)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1161)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1162)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1163)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1164)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1165)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1166)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1167))] + ] 1166))] "CGEN_ENABLE_INSN_P (104)" "cpamulila1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -7409,53 +4343,29 @@ (define_insn "cgen_intrinsic_cpamuliua1_h_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1168)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1169)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1170)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1171)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1172)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1173)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1174)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1175))] + ] 1174))] "CGEN_ENABLE_INSN_P (105)" "cpamuliua1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -7468,101 +4378,53 @@ (define_insn "cgen_intrinsic_cpamulia1_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1176)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1177)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1178)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1179)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1180)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1181)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1182)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1183)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1184)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1185)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1186)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1187)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1188)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1189)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1190)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1191))] + ] 1190))] "CGEN_ENABLE_INSN_P (106)" "cpamulia1.b\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -7575,101 +4437,53 @@ (define_insn "cgen_intrinsic_cpamulia1u_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1192)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1193)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1194)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1195)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1196)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1197)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1198)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1199)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1200)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1201)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1202)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1203)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1204)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1205)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1206)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1207))] + ] 1206))] "CGEN_ENABLE_INSN_P (107)" "cpamulia1u.b\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -7682,65 +4496,35 @@ (define_insn "cgen_intrinsic_cpfmadila1s1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1208)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1209)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1210)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1211)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1212)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1213)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1214)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1215)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1216)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1217))] + ] 1216))] "CGEN_ENABLE_INSN_P (108)" "cpfmadila1s1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -7753,65 +4537,35 @@ (define_insn "cgen_intrinsic_cpfmadiua1s1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1218)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1219)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1220)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1221)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1222)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1223)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1224)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1225)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1226)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1227))] + ] 1226))] "CGEN_ENABLE_INSN_P (109)" "cpfmadiua1s1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -7824,113 +4578,59 @@ (define_insn "cgen_intrinsic_cpfmadia1s1_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1228)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1229)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1230)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1231)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1232)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1233)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1234)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1235)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1236)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1237)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1238)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1239)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1240)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1241)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1242)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1243)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1244)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1245))] + ] 1244))] "CGEN_ENABLE_INSN_P (110)" "cpfmadia1s1.b\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -7943,113 +4643,59 @@ (define_insn "cgen_intrinsic_cpfmadia1s1u_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1246)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1247)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1248)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1249)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1250)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1251)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1252)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1253)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1254)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1255)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1256)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1257)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1258)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1259)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1260)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1261)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1262)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1263))] + ] 1262))] "CGEN_ENABLE_INSN_P (111)" "cpfmadia1s1u.b\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -8062,53 +4708,29 @@ (define_insn "cgen_intrinsic_cpfmulila1s1_h_P1" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1264)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1265)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1266)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1267)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1268)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1269)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1270)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1271))] + ] 1270))] "CGEN_ENABLE_INSN_P (112)" "cpfmulila1s1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -8121,53 +4743,29 @@ (define_insn "cgen_intrinsic_cpfmuliua1s1_h_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1272)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1273)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1274)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1275)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1276)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1277)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1278)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1279))] + ] 1278))] "CGEN_ENABLE_INSN_P (113)" "cpfmuliua1s1.h\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -8180,101 +4778,53 @@ (define_insn "cgen_intrinsic_cpfmulia1s1_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1280)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1281)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1282)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1283)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1284)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1285)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1286)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1287)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1288)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1289)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1290)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1291)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1292)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1293)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1294)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1295))] + ] 1294))] "CGEN_ENABLE_INSN_P (114)" "cpfmulia1s1.b\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -8287,101 +4837,53 @@ (define_insn "cgen_intrinsic_cpfmulia1s1u_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1296)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1297)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1298)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1299)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1300)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1301)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1302)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1303)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1304)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1305)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1306)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1307)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1308)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1309)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1310)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1311))] + ] 1310))] "CGEN_ENABLE_INSN_P (115)" "cpfmulia1s1u.b\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -8394,65 +4896,35 @@ (define_insn "cgen_intrinsic_cpfmadila1s0_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1312)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1313)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1314)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1315)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1316)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1317)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1318)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1319)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1320)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1321))] + ] 1320))] "CGEN_ENABLE_INSN_P (116)" "cpfmadila1s0.h\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -8465,65 +4937,35 @@ (define_insn "cgen_intrinsic_cpfmadiua1s0_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1322)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1323)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1324)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1325)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1326)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1327)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1328)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1329)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1330)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1331))] + ] 1330))] "CGEN_ENABLE_INSN_P (117)" "cpfmadiua1s0.h\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -8536,113 +4978,59 @@ (define_insn "cgen_intrinsic_cpfmadia1s0_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1332)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1333)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1334)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1335)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1336)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1337)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1338)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1339)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1340)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1341)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1342)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1343)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1344)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1345)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1346)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1347)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1348)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1349))] + ] 1348))] "CGEN_ENABLE_INSN_P (118)" "cpfmadia1s0.b\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -8655,113 +5043,59 @@ (define_insn "cgen_intrinsic_cpfmadia1s0u_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1350)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1351)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1352)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1353)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1354)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1355)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1356)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1357)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1358)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1359)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1360)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1361)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1362)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1363)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1364)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1365)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1366)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1367))] + ] 1366))] "CGEN_ENABLE_INSN_P (119)" "cpfmadia1s0u.b\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -8774,53 +5108,29 @@ (define_insn "cgen_intrinsic_cpfmulila1s0_h_P1" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1368)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1369)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1370)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1371)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1372)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1373)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1374)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1375))] + ] 1374))] "CGEN_ENABLE_INSN_P (120)" "cpfmulila1s0.h\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -8833,53 +5143,29 @@ (define_insn "cgen_intrinsic_cpfmuliua1s0_h_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1376)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1377)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1378)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1379)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1380)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1381)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1382)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1383))] + ] 1382))] "CGEN_ENABLE_INSN_P (121)" "cpfmuliua1s0.h\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -8892,101 +5178,53 @@ (define_insn "cgen_intrinsic_cpfmulia1s0_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1384)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1385)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1386)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1387)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1388)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1389)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1390)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1391)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1392)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1393)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1394)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1395)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1396)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1397)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1398)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1399))] + ] 1398))] "CGEN_ENABLE_INSN_P (122)" "cpfmulia1s0.b\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -8999,101 +5237,53 @@ (define_insn "cgen_intrinsic_cpfmulia1s0u_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") (match_operand:SI 2 "cgen_h_sint_8a1_immediate" "") ] 1400)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1401)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1402)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1403)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1404)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1405)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1406)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1407)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1408)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1409)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1410)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1411)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) ] 1412)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1413)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - (match_dup 2) - ] 1414)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) (match_dup 2) - ] 1415))] + ] 1414))] "CGEN_ENABLE_INSN_P (123)" "cpfmulia1s0u.b\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -9106,69 +5296,37 @@ (define_insn "cgen_intrinsic_cpsllia1_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 2698)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - ] 2699)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2700)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - ] 2701)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2702)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - ] 2703)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2704)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - ] 2705)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2706)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - ] 2707)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2708)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - ] 2709)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2710)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - ] 2711)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - ] 2712)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 2713))] + ] 2712))] "CGEN_ENABLE_INSN_P (124)" "cpsllia1\\t%0" [(set_attr "may_trap" "no") @@ -9181,69 +5339,37 @@ (define_insn "cgen_intrinsic_cpsllia1_1_p1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 2698)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - ] 2699)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2700)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - ] 2701)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2702)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - ] 2703)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2704)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - ] 2705)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2706)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - ] 2707)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2708)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - ] 2709)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2710)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - ] 2711)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - ] 2712)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 2713))] + ] 2712))] "CGEN_ENABLE_INSN_P (125)" "cpsllia1\\t%0" [(set_attr "may_trap" "no") @@ -9256,69 +5382,37 @@ (define_insn "cgen_intrinsic_cpsraia1_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 2714)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - ] 2715)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2716)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - ] 2717)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2718)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - ] 2719)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2720)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - ] 2721)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2722)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - ] 2723)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2724)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - ] 2725)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2726)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - ] 2727)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - ] 2728)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 2729))] + ] 2728))] "CGEN_ENABLE_INSN_P (126)" "cpsraia1\\t%0" [(set_attr "may_trap" "no") @@ -9331,69 +5425,37 @@ (define_insn "cgen_intrinsic_cpsraia1_1_p1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 2714)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - ] 2715)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2716)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - ] 2717)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2718)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - ] 2719)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2720)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - ] 2721)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2722)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - ] 2723)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2724)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - ] 2725)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2726)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - ] 2727)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - ] 2728)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 2729))] + ] 2728))] "CGEN_ENABLE_INSN_P (127)" "cpsraia1\\t%0" [(set_attr "may_trap" "no") @@ -9406,69 +5468,37 @@ (define_insn "cgen_intrinsic_cpsrlia1_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 2730)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - ] 2731)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2732)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - ] 2733)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2734)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - ] 2735)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2736)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - ] 2737)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2738)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - ] 2739)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2740)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - ] 2741)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2742)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - ] 2743)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - ] 2744)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 2745))] + ] 2744))] "CGEN_ENABLE_INSN_P (128)" "cpsrlia1\\t%0" [(set_attr "may_trap" "no") @@ -9481,69 +5511,37 @@ (define_insn "cgen_intrinsic_cpsrlia1_1_p1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 2730)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - ] 2731)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2732)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - ] 2733)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2734)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - ] 2735)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2736)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - ] 2737)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2738)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - ] 2739)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2740)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - ] 2741)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2742)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - ] 2743)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - ] 2744)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 2745))] + ] 2744))] "CGEN_ENABLE_INSN_P (129)" "cpsrlia1\\t%0" [(set_attr "may_trap" "no") @@ -9556,69 +5554,37 @@ (define_insn "cgen_intrinsic_cpslla1_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 2746)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - ] 2747)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2748)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - ] 2749)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2750)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - ] 2751)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2752)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - ] 2753)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2754)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - ] 2755)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2756)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - ] 2757)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2758)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - ] 2759)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - ] 2760)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 2761))] + ] 2760))] "CGEN_ENABLE_INSN_P (130)" "cpslla1\\t%0" [(set_attr "may_trap" "no") @@ -9631,69 +5597,37 @@ (define_insn "cgen_intrinsic_cpslla1_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 2746)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - ] 2747)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2748)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - ] 2749)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2750)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - ] 2751)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2752)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - ] 2753)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2754)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - ] 2755)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2756)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - ] 2757)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2758)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - ] 2759)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - ] 2760)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 2761))] + ] 2760))] "CGEN_ENABLE_INSN_P (131)" "cpslla1\\t%0" [(set_attr "may_trap" "no") @@ -9706,69 +5640,37 @@ (define_insn "cgen_intrinsic_cpsraa1_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 2762)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - ] 2763)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2764)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - ] 2765)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2766)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - ] 2767)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2768)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - ] 2769)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2770)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - ] 2771)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2772)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - ] 2773)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2774)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - ] 2775)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - ] 2776)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 2777))] + ] 2776))] "CGEN_ENABLE_INSN_P (132)" "cpsraa1\\t%0" [(set_attr "may_trap" "no") @@ -9781,69 +5683,37 @@ (define_insn "cgen_intrinsic_cpsraa1_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 2762)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - ] 2763)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2764)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - ] 2765)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2766)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - ] 2767)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2768)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - ] 2769)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2770)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - ] 2771)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2772)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - ] 2773)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2774)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - ] 2775)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - ] 2776)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 2777))] + ] 2776))] "CGEN_ENABLE_INSN_P (133)" "cpsraa1\\t%0" [(set_attr "may_trap" "no") @@ -9856,69 +5726,37 @@ (define_insn "cgen_intrinsic_cpsrla1_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 2778)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - ] 2779)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2780)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - ] 2781)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2782)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - ] 2783)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2784)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - ] 2785)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2786)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - ] 2787)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2788)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - ] 2789)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2790)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - ] 2791)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - ] 2792)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 2793))] + ] 2792))] "CGEN_ENABLE_INSN_P (134)" "cpsrla1\\t%0" [(set_attr "may_trap" "no") @@ -9931,69 +5769,37 @@ (define_insn "cgen_intrinsic_cpsrla1_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 2778)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - ] 2779)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2780)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - ] 2781)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2782)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - ] 2783)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2784)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - ] 2785)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2786)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - ] 2787)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2788)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - ] 2789)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 2790)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - ] 2791)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - ] 2792)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 2793))] + ] 2792))] "CGEN_ENABLE_INSN_P (135)" "cpsrla1\\t%0" [(set_attr "may_trap" "no") @@ -10081,69 +5887,37 @@ (define_insn "cgen_intrinsic_cpaccpa1_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1448)) - (set (reg:SI 118) - (unspec:SI [ - (const_int 0) - ] 1449)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1450)) - (set (reg:SI 119) - (unspec:SI [ - (const_int 0) - ] 1451)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1452)) - (set (reg:SI 120) - (unspec:SI [ - (const_int 0) - ] 1453)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1454)) - (set (reg:SI 121) - (unspec:SI [ - (const_int 0) - ] 1455)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1456)) - (set (reg:SI 114) - (unspec:SI [ - (const_int 0) - ] 1457)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1458)) - (set (reg:SI 115) - (unspec:SI [ - (const_int 0) - ] 1459)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1460)) - (set (reg:SI 116) - (unspec:SI [ - (const_int 0) - ] 1461)) (set (reg:SI 104) - (unspec:SI [ - (const_int 0) - ] 1462)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) - ] 1463))] + ] 1462))] "CGEN_ENABLE_INSN_P (137)" "cpaccpa1" [(set_attr "may_trap" "no") @@ -10156,77 +5930,41 @@ (define_insn "cgen_intrinsic_cpacsuma1_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1464)) - (set (reg:SI 113) - (unspec:SI [ - (const_int 0) - ] 1465)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1466)) - (set (reg:SI 118) - (unspec:SI [ - (const_int 0) - ] 1467)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1468)) - (set (reg:SI 119) - (unspec:SI [ - (const_int 0) - ] 1469)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1470)) - (set (reg:SI 120) - (unspec:SI [ - (const_int 0) - ] 1471)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1472)) - (set (reg:SI 121) - (unspec:SI [ - (const_int 0) - ] 1473)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1474)) - (set (reg:SI 114) - (unspec:SI [ - (const_int 0) - ] 1475)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1476)) - (set (reg:SI 115) - (unspec:SI [ - (const_int 0) - ] 1477)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1478)) - (set (reg:SI 116) - (unspec:SI [ - (const_int 0) - ] 1479)) (set (reg:SI 104) - (unspec:SI [ - (const_int 0) - ] 1480)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) - ] 1481))] + ] 1480))] "CGEN_ENABLE_INSN_P (138)" "cpacsuma1" [(set_attr "may_trap" "no") @@ -10689,45 +6427,25 @@ (define_insn "cgen_intrinsic_cpsetla1_w_C3" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2824)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2825)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2826)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2827)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2828)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2829)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2830)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2831))] + ] 2830))] "CGEN_ENABLE_INSN_P (169)" "cpsetla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -10740,45 +6458,25 @@ (define_insn "cgen_intrinsic_cpsetla1_w_P1" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2824)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2825)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2826)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2827)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2828)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2829)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2830)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2831))] + ] 2830))] "CGEN_ENABLE_INSN_P (170)" "cpsetla1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -10791,45 +6489,25 @@ (define_insn "cgen_intrinsic_cpsetua1_w_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2832)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2833)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2834)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2835)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2836)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2837)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2838)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2839))] + ] 2838))] "CGEN_ENABLE_INSN_P (171)" "cpsetua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -10842,45 +6520,25 @@ (define_insn "cgen_intrinsic_cpsetua1_w_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2832)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2833)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2834)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2835)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2836)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2837)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2838)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2839))] + ] 2838))] "CGEN_ENABLE_INSN_P (172)" "cpsetua1.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -10893,85 +6551,45 @@ (define_insn "cgen_intrinsic_cpseta1_h_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2840)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2841)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2842)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2843)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2844)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2845)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2846)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2847)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2848)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2849)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2850)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2851)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2852)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2853)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2854)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2855))] + ] 2854))] "CGEN_ENABLE_INSN_P (173)" "cpseta1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -10984,85 +6602,45 @@ (define_insn "cgen_intrinsic_cpseta1_h_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2840)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2841)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2842)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2843)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2844)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2845)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2846)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2847)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2848)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2849)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2850)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2851)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2852)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2853)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2854)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2855))] + ] 2854))] "CGEN_ENABLE_INSN_P (174)" "cpseta1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -11075,55 +6653,30 @@ (define_insn "cgen_intrinsic_cpsadla1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2856)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2857)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2858)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2859)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2860)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2861)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2862)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2863)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2864)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2865))] + ] 2864))] "CGEN_ENABLE_INSN_P (175)" "cpsadla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -11136,55 +6689,30 @@ (define_insn "cgen_intrinsic_cpsadla1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2856)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2857)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2858)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2859)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2860)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2861)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2862)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2863)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2864)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2865))] + ] 2864))] "CGEN_ENABLE_INSN_P (176)" "cpsadla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -11197,55 +6725,30 @@ (define_insn "cgen_intrinsic_cpsadua1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2866)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2867)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2868)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2869)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2870)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2871)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2872)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2873)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2874)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2875))] + ] 2874))] "CGEN_ENABLE_INSN_P (177)" "cpsadua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -11258,55 +6761,30 @@ (define_insn "cgen_intrinsic_cpsadua1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2866)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2867)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2868)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2869)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2870)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2871)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2872)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2873)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2874)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2875))] + ] 2874))] "CGEN_ENABLE_INSN_P (178)" "cpsadua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -11319,95 +6797,50 @@ (define_insn "cgen_intrinsic_cpsada1_b_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2876)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2877)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2878)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2879)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2880)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2881)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2882)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2883)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2884)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2885)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2886)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2887)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2888)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2889)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2890)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2891)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2892)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2893))] + ] 2892))] "CGEN_ENABLE_INSN_P (179)" "cpsada1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -11420,95 +6853,50 @@ (define_insn "cgen_intrinsic_cpsada1_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2876)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2877)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2878)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2879)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2880)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2881)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2882)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2883)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2884)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2885)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2886)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2887)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2888)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2889)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2890)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2891)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2892)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2893))] + ] 2892))] "CGEN_ENABLE_INSN_P (180)" "cpsada1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -11521,95 +6909,50 @@ (define_insn "cgen_intrinsic_cpsada1u_b_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2894)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2895)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2896)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2897)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2898)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2899)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2900)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2901)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2902)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2903)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2904)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2905)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2906)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2907)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2908)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2909)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2910)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2911))] + ] 2910))] "CGEN_ENABLE_INSN_P (181)" "cpsada1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -11622,95 +6965,50 @@ (define_insn "cgen_intrinsic_cpsada1u_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2894)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2895)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2896)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2897)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2898)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2899)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2900)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2901)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2902)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2903)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2904)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2905)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2906)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2907)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2908)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2909)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2910)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2911))] + ] 2910))] "CGEN_ENABLE_INSN_P (182)" "cpsada1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -11723,45 +7021,25 @@ (define_insn "cgen_intrinsic_cpabsla1_h_C3" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2912)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2913)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2914)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2915)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2916)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2917)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2918)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2919))] + ] 2918))] "CGEN_ENABLE_INSN_P (183)" "cpabsla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -11774,45 +7052,25 @@ (define_insn "cgen_intrinsic_cpabsla1_h_P1" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2912)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2913)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2914)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2915)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2916)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2917)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2918)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2919))] + ] 2918))] "CGEN_ENABLE_INSN_P (184)" "cpabsla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -11825,45 +7083,25 @@ (define_insn "cgen_intrinsic_cpabsua1_h_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2920)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2921)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2922)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2923)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2924)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2925)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2926)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2927))] + ] 2926))] "CGEN_ENABLE_INSN_P (185)" "cpabsua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -11876,45 +7114,25 @@ (define_insn "cgen_intrinsic_cpabsua1_h_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2920)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2921)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2922)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2923)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2924)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2925)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2926)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2927))] + ] 2926))] "CGEN_ENABLE_INSN_P (186)" "cpabsua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -11927,85 +7145,45 @@ (define_insn "cgen_intrinsic_cpabsa1_b_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2928)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2929)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2930)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2931)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2932)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2933)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2934)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2935)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2936)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2937)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2938)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2939)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2940)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2941)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2942)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2943))] + ] 2942))] "CGEN_ENABLE_INSN_P (187)" "cpabsa1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -12018,85 +7196,45 @@ (define_insn "cgen_intrinsic_cpabsa1_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2928)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2929)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2930)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2931)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2932)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2933)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2934)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2935)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2936)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2937)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2938)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2939)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2940)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2941)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2942)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2943))] + ] 2942))] "CGEN_ENABLE_INSN_P (188)" "cpabsa1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -12109,85 +7247,45 @@ (define_insn "cgen_intrinsic_cpabsa1u_b_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2944)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2945)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2946)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2947)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2948)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2949)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2950)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2951)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2952)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2953)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2954)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2955)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2956)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2957)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2958)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2959))] + ] 2958))] "CGEN_ENABLE_INSN_P (189)" "cpabsa1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -12200,85 +7298,45 @@ (define_insn "cgen_intrinsic_cpabsa1u_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2944)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2945)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2946)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2947)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2948)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2949)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2950)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2951)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2952)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2953)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2954)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2955)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2956)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2957)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2958)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2959))] + ] 2958))] "CGEN_ENABLE_INSN_P (190)" "cpabsa1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -12291,55 +7349,30 @@ (define_insn "cgen_intrinsic_cpsubacla1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2960)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2961)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2962)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2963)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2964)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2965)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2966)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2967)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2968)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2969))] + ] 2968))] "CGEN_ENABLE_INSN_P (191)" "cpsubacla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -12352,55 +7385,30 @@ (define_insn "cgen_intrinsic_cpsubacla1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2960)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2961)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2962)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2963)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2964)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2965)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2966)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2967)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2968)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2969))] + ] 2968))] "CGEN_ENABLE_INSN_P (192)" "cpsubacla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -12413,55 +7421,30 @@ (define_insn "cgen_intrinsic_cpsubacua1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2970)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2971)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2972)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2973)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2974)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2975)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2976)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2977)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2978)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2979))] + ] 2978))] "CGEN_ENABLE_INSN_P (193)" "cpsubacua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -12474,55 +7457,30 @@ (define_insn "cgen_intrinsic_cpsubacua1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2970)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2971)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2972)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2973)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2974)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2975)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2976)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2977)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2978)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2979))] + ] 2978))] "CGEN_ENABLE_INSN_P (194)" "cpsubacua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -12535,95 +7493,50 @@ (define_insn "cgen_intrinsic_cpsubaca1_b_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2980)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2981)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2982)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2983)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2984)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2985)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2986)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2987)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2988)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2989)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2990)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2991)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2992)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2993)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2994)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2995)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2996)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2997))] + ] 2996))] "CGEN_ENABLE_INSN_P (195)" "cpsubaca1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -12636,95 +7549,50 @@ (define_insn "cgen_intrinsic_cpsubaca1_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2980)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2981)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2982)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2983)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2984)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2985)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2986)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2987)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2988)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2989)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2990)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2991)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2992)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2993)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2994)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2995)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2996)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2997))] + ] 2996))] "CGEN_ENABLE_INSN_P (196)" "cpsubaca1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -12737,95 +7605,50 @@ (define_insn "cgen_intrinsic_cpsubaca1u_b_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2998)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2999)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3000)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3001)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3002)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3003)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3004)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3005)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3006)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3007)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3008)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3009)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3010)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3011)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3012)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3013)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3014)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3015))] + ] 3014))] "CGEN_ENABLE_INSN_P (197)" "cpsubaca1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -12838,95 +7661,50 @@ (define_insn "cgen_intrinsic_cpsubaca1u_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2998)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2999)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3000)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3001)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3002)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3003)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3004)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3005)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3006)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3007)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3008)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3009)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3010)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3011)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3012)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3013)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3014)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3015))] + ] 3014))] "CGEN_ENABLE_INSN_P (198)" "cpsubaca1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -12939,45 +7717,25 @@ (define_insn "cgen_intrinsic_cpsubla1_h_C3" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3016)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3017)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3018)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3019)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3020)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3021)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3022)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3023))] + ] 3022))] "CGEN_ENABLE_INSN_P (199)" "cpsubla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -12990,45 +7748,25 @@ (define_insn "cgen_intrinsic_cpsubla1_h_P1" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3016)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3017)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3018)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3019)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3020)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3021)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3022)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3023))] + ] 3022))] "CGEN_ENABLE_INSN_P (200)" "cpsubla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -13041,45 +7779,25 @@ (define_insn "cgen_intrinsic_cpsubua1_h_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3024)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3025)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3026)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3027)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3028)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3029)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3030)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3031))] + ] 3030))] "CGEN_ENABLE_INSN_P (201)" "cpsubua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -13092,45 +7810,25 @@ (define_insn "cgen_intrinsic_cpsubua1_h_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3024)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3025)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3026)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3027)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3028)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3029)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3030)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3031))] + ] 3030))] "CGEN_ENABLE_INSN_P (202)" "cpsubua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -13143,85 +7841,45 @@ (define_insn "cgen_intrinsic_cpsuba1_b_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3032)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3033)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3034)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3035)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3036)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3037)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3038)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3039)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3040)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3041)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3042)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3043)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3044)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3045)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3046)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3047))] + ] 3046))] "CGEN_ENABLE_INSN_P (203)" "cpsuba1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -13234,85 +7892,45 @@ (define_insn "cgen_intrinsic_cpsuba1_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3032)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3033)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3034)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3035)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3036)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3037)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3038)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3039)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3040)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3041)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3042)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3043)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3044)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3045)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3046)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3047))] + ] 3046))] "CGEN_ENABLE_INSN_P (204)" "cpsuba1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -13325,85 +7943,45 @@ (define_insn "cgen_intrinsic_cpsuba1u_b_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3048)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3049)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3050)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3051)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3052)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3053)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3054)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3055)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3056)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3057)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3058)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3059)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3060)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3061)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3062)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3063))] + ] 3062))] "CGEN_ENABLE_INSN_P (205)" "cpsuba1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -13416,85 +7994,45 @@ (define_insn "cgen_intrinsic_cpsuba1u_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3048)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3049)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3050)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3051)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3052)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3053)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3054)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3055)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3056)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3057)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3058)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3059)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3060)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3061)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3062)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3063))] + ] 3062))] "CGEN_ENABLE_INSN_P (206)" "cpsuba1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -13507,55 +8045,30 @@ (define_insn "cgen_intrinsic_cpaddacla1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3064)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3065)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3066)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3067)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3068)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3069)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3070)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3071)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3072)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3073))] + ] 3072))] "CGEN_ENABLE_INSN_P (207)" "cpaddacla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -13568,55 +8081,30 @@ (define_insn "cgen_intrinsic_cpaddacla1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3064)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3065)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3066)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3067)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3068)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3069)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3070)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3071)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3072)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3073))] + ] 3072))] "CGEN_ENABLE_INSN_P (208)" "cpaddacla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -13629,55 +8117,30 @@ (define_insn "cgen_intrinsic_cpaddacua1_h_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3074)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3075)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3076)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3077)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3078)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3079)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3080)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3081)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3082)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3083))] + ] 3082))] "CGEN_ENABLE_INSN_P (209)" "cpaddacua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -13690,55 +8153,30 @@ (define_insn "cgen_intrinsic_cpaddacua1_h_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3074)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3075)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3076)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3077)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3078)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3079)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3080)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3081)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3082)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3083))] + ] 3082))] "CGEN_ENABLE_INSN_P (210)" "cpaddacua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -13751,95 +8189,50 @@ (define_insn "cgen_intrinsic_cpaddaca1_b_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3084)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3085)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3086)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3087)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3088)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3089)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3090)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3091)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3092)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3093)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3094)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3095)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3096)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3097)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3098)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3099)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3100)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3101))] + ] 3100))] "CGEN_ENABLE_INSN_P (211)" "cpaddaca1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -13852,95 +8245,50 @@ (define_insn "cgen_intrinsic_cpaddaca1_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3084)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3085)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3086)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3087)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3088)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3089)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3090)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3091)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3092)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3093)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3094)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3095)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3096)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3097)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3098)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3099)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3100)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3101))] + ] 3100))] "CGEN_ENABLE_INSN_P (212)" "cpaddaca1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -13953,95 +8301,50 @@ (define_insn "cgen_intrinsic_cpaddaca1u_b_C3" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3102)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3103)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3104)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3105)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3106)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3107)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3108)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3109)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3110)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3111)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3112)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3113)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3114)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3115)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3116)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3117)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3118)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3119))] + ] 3118))] "CGEN_ENABLE_INSN_P (213)" "cpaddaca1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -14054,95 +8357,50 @@ (define_insn "cgen_intrinsic_cpaddaca1u_b_P1" [(set (reg:SI 87) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3102)) - (set (reg:SI 113) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3103)) (set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3104)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3105)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3106)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3107)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3108)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3109)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3110)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3111)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3112)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3113)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3114)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3115)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3116)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3117)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3118)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3119))] + ] 3118))] "CGEN_ENABLE_INSN_P (214)" "cpaddaca1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -14155,45 +8413,25 @@ (define_insn "cgen_intrinsic_cpaddla1_h_C3" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3120)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3121)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3122)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3123)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3124)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3125)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3126)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3127))] + ] 3126))] "CGEN_ENABLE_INSN_P (215)" "cpaddla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -14206,45 +8444,25 @@ (define_insn "cgen_intrinsic_cpaddla1_h_P1" [(set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3120)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3121)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3122)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3123)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3124)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3125)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3126)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3127))] + ] 3126))] "CGEN_ENABLE_INSN_P (216)" "cpaddla1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -14257,45 +8475,25 @@ (define_insn "cgen_intrinsic_cpaddua1_h_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3128)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3129)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3130)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3131)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3132)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3133)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3134)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3135))] + ] 3134))] "CGEN_ENABLE_INSN_P (217)" "cpaddua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -14308,45 +8506,25 @@ (define_insn "cgen_intrinsic_cpaddua1_h_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3128)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3129)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3130)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3131)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3132)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3133)) (set (reg:SI 108) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3134)) - (set (reg:SI 121) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3135))] + ] 3134))] "CGEN_ENABLE_INSN_P (218)" "cpaddua1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -14359,85 +8537,45 @@ (define_insn "cgen_intrinsic_cpadda1_b_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3136)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3137)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3138)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3139)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3140)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3141)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3142)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3143)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3144)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3145)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3146)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3147)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3148)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3149)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3150)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3151))] + ] 3150))] "CGEN_ENABLE_INSN_P (219)" "cpadda1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -14450,85 +8588,45 @@ (define_insn "cgen_intrinsic_cpadda1_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3136)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3137)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3138)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3139)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3140)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3141)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3142)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3143)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3144)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3145)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3146)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3147)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3148)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3149)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3150)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3151))] + ] 3150))] "CGEN_ENABLE_INSN_P (220)" "cpadda1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -14541,85 +8639,45 @@ (define_insn "cgen_intrinsic_cpadda1u_b_C3" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3152)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3153)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3154)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3155)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3156)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3157)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3158)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3159)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3160)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3161)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3162)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3163)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3164)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3165)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3166)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3167))] + ] 3166))] "CGEN_ENABLE_INSN_P (221)" "cpadda1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -14632,85 +8690,45 @@ (define_insn "cgen_intrinsic_cpadda1u_b_P1" [(set (reg:SI 111) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3152)) - (set (reg:SI 118) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3153)) (set (reg:SI 110) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3154)) - (set (reg:SI 119) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3155)) (set (reg:SI 109) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3156)) - (set (reg:SI 120) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3157)) (set (reg:SI 108) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3158)) - (set (reg:SI 121) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3159)) (set (reg:SI 107) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3160)) - (set (reg:SI 114) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3161)) (set (reg:SI 106) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3162)) - (set (reg:SI 115) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3163)) (set (reg:SI 105) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 3164)) - (set (reg:SI 116) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3165)) (set (reg:SI 104) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3166)) - (set (reg:SI 117) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 3167))] + ] 3166))] "CGEN_ENABLE_INSN_P (222)" "cpadda1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -17390,7 +11408,7 @@ (match_dup 1) (match_dup 2) ] 3450)) - (set (reg:SI 122) + (set (reg:SI 113) (unspec:SI [ (match_dup 1) (match_dup 2) @@ -17416,7 +11434,7 @@ (match_dup 1) (match_dup 2) ] 3450)) - (set (reg:SI 122) + (set (reg:SI 113) (unspec:SI [ (match_dup 1) (match_dup 2) @@ -17442,7 +11460,7 @@ (match_dup 1) (match_dup 2) ] 3454)) - (set (reg:SI 122) + (set (reg:SI 113) (unspec:SI [ (match_dup 1) (match_dup 2) @@ -17468,7 +11486,7 @@ (match_dup 1) (match_dup 2) ] 3454)) - (set (reg:SI 122) + (set (reg:SI 113) (unspec:SI [ (match_dup 1) (match_dup 2) @@ -17713,7 +11731,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3218)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -17749,7 +11767,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3220)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -17785,7 +11803,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3222)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -17821,7 +11839,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3224)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -17857,7 +11875,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3226)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -17893,7 +11911,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3228)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -17929,7 +11947,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3230)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -17965,7 +11983,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3232)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18001,7 +12019,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3234)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18037,7 +12055,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3236)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18073,7 +12091,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3238)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18109,7 +12127,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3240)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18145,7 +12163,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3242)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18181,7 +12199,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3244)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18217,7 +12235,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3246)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18253,7 +12271,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3248)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18289,7 +12307,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3250)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18325,7 +12343,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3252)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18361,7 +12379,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3254)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18397,7 +12415,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3256)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18433,7 +12451,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3258)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18469,7 +12487,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3260)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18505,7 +12523,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3262)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18541,7 +12559,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3264)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18577,7 +12595,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3266)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18613,7 +12631,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3268)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18649,7 +12667,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3270)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18685,7 +12703,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3272)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18721,7 +12739,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3274)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18757,7 +12775,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3276)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18793,7 +12811,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3278)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18829,7 +12847,7 @@ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 3280)) - (set (reg:SI 123) + (set (reg:SI 114) (unspec:SI [ (match_dup 0) (match_dup 1) @@ -18895,55 +12913,30 @@ (define_insn "cgen_intrinsic_cpfacla0s1_h_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1484)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1485)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1486)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1487)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1488)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1489)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1490)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1491)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1492)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1493))] + ] 1492))] "CGEN_ENABLE_INSN_P (474)" "cpfacla0s1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -18956,55 +12949,30 @@ (define_insn "cgen_intrinsic_cpfacua0s1_h_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1494)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1495)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1496)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1497)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1498)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1499)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1500)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1501)) (set (reg:SI 100) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1502)) - (set (reg:SI 132) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1503))] + ] 1502))] "CGEN_ENABLE_INSN_P (475)" "cpfacua0s1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -19017,95 +12985,50 @@ (define_insn "cgen_intrinsic_cpfaca0s1_b_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1504)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1505)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1506)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1507)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1508)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1509)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1510)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1511)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1512)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1513)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1514)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1515)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1516)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1517)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1518)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1519)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1520)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1521))] + ] 1520))] "CGEN_ENABLE_INSN_P (476)" "cpfaca0s1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -19118,95 +13041,50 @@ (define_insn "cgen_intrinsic_cpfaca0s1u_b_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1522)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1523)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1524)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1525)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1526)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1527)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1528)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1529)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1530)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1531)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1532)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1533)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1534)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1535)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1536)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1537)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1538)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1539))] + ] 1538))] "CGEN_ENABLE_INSN_P (477)" "cpfaca0s1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -19219,45 +13097,25 @@ (define_insn "cgen_intrinsic_cpfsftbla0s1_h_P0S" [(set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1540)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1541)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1542)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1543)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1544)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1545)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1546)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1547))] + ] 1546))] "CGEN_ENABLE_INSN_P (478)" "cpfsftbla0s1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -19270,45 +13128,25 @@ (define_insn "cgen_intrinsic_cpfsftbua0s1_h_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1548)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1549)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1550)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1551)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1552)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1553)) (set (reg:SI 100) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1554)) - (set (reg:SI 132) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1555))] + ] 1554))] "CGEN_ENABLE_INSN_P (479)" "cpfsftbua0s1.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -19321,85 +13159,45 @@ (define_insn "cgen_intrinsic_cpfsftba0s1_b_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1556)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1557)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1558)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1559)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1560)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1561)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1562)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1563)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1564)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1565)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1566)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1567)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1568)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1569)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1570)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1571))] + ] 1570))] "CGEN_ENABLE_INSN_P (480)" "cpfsftba0s1.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -19412,85 +13210,45 @@ (define_insn "cgen_intrinsic_cpfsftba0s1u_b_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1572)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1573)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1574)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1575)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1576)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1577)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1578)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1579)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1580)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1581)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1582)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1583)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1584)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1585)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1586)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1587))] + ] 1586))] "CGEN_ENABLE_INSN_P (481)" "cpfsftba0s1u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -19503,55 +13261,30 @@ (define_insn "cgen_intrinsic_cpfacla0s0_h_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1588)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1589)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1590)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1591)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1592)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1593)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1594)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1595)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1596)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1597))] + ] 1596))] "CGEN_ENABLE_INSN_P (482)" "cpfacla0s0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -19564,55 +13297,30 @@ (define_insn "cgen_intrinsic_cpfacua0s0_h_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1598)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1599)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1600)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1601)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1602)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1603)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1604)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1605)) (set (reg:SI 100) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1606)) - (set (reg:SI 132) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1607))] + ] 1606))] "CGEN_ENABLE_INSN_P (483)" "cpfacua0s0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -19625,95 +13333,50 @@ (define_insn "cgen_intrinsic_cpfaca0s0_b_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1608)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1609)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1610)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1611)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1612)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1613)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1614)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1615)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1616)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1617)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1618)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1619)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1620)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1621)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1622)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1623)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1624)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1625))] + ] 1624))] "CGEN_ENABLE_INSN_P (484)" "cpfaca0s0.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -19726,95 +13389,50 @@ (define_insn "cgen_intrinsic_cpfaca0s0u_b_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1626)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1627)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1628)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1629)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1630)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1631)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1632)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1633)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1634)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1635)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1636)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1637)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1638)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1639)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1640)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1641)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1642)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1643))] + ] 1642))] "CGEN_ENABLE_INSN_P (485)" "cpfaca0s0u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -19827,45 +13445,25 @@ (define_insn "cgen_intrinsic_cpfsftbla0s0_h_P0S" [(set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1644)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1645)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1646)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1647)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1648)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1649)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1650)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1651))] + ] 1650))] "CGEN_ENABLE_INSN_P (486)" "cpfsftbla0s0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -19878,45 +13476,25 @@ (define_insn "cgen_intrinsic_cpfsftbua0s0_h_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1652)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1653)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1654)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1655)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1656)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1657)) (set (reg:SI 100) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1658)) - (set (reg:SI 132) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1659))] + ] 1658))] "CGEN_ENABLE_INSN_P (487)" "cpfsftbua0s0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -19929,85 +13507,45 @@ (define_insn "cgen_intrinsic_cpfsftba0s0_b_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1660)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1661)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1662)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1663)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1664)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1665)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1666)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1667)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1668)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1669)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1670)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1671)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1672)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1673)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1674)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1675))] + ] 1674))] "CGEN_ENABLE_INSN_P (488)" "cpfsftba0s0.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -20020,85 +13558,45 @@ (define_insn "cgen_intrinsic_cpfsftba0s0u_b_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1676)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1677)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1678)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1679)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1680)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1681)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1682)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1683)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1684)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1685)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1686)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1687)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1688)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1689)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1690)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1691))] + ] 1690))] "CGEN_ENABLE_INSN_P (489)" "cpfsftba0s0u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -20111,69 +13609,37 @@ (define_insn "cgen_intrinsic_cpsllia0_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 1692)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - ] 1693)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1694)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - ] 1695)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1696)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - ] 1697)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1698)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - ] 1699)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1700)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - ] 1701)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1702)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - ] 1703)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1704)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - ] 1705)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - ] 1706)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 1707))] + ] 1706))] "CGEN_ENABLE_INSN_P (490)" "cpsllia0\\t%0" [(set_attr "may_trap" "no") @@ -20186,69 +13652,37 @@ (define_insn "cgen_intrinsic_cpsraia0_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 1708)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - ] 1709)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1710)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - ] 1711)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1712)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - ] 1713)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1714)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - ] 1715)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1716)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - ] 1717)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1718)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - ] 1719)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1720)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - ] 1721)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - ] 1722)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 1723))] + ] 1722))] "CGEN_ENABLE_INSN_P (491)" "cpsraia0\\t%0" [(set_attr "may_trap" "no") @@ -20261,69 +13695,37 @@ (define_insn "cgen_intrinsic_cpsrlia0_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_5a1_immediate" "") ] 1724)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - ] 1725)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1726)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - ] 1727)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1728)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - ] 1729)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1730)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - ] 1731)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1732)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - ] 1733)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1734)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - ] 1735)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1736)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - ] 1737)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - ] 1738)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 1739))] + ] 1738))] "CGEN_ENABLE_INSN_P (492)" "cpsrlia0\\t%0" [(set_attr "may_trap" "no") @@ -20336,69 +13738,37 @@ (define_insn "cgen_intrinsic_cpslla0_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 1740)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - ] 1741)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1742)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - ] 1743)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1744)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - ] 1745)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1746)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - ] 1747)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1748)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - ] 1749)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1750)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - ] 1751)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1752)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - ] 1753)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - ] 1754)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 1755))] + ] 1754))] "CGEN_ENABLE_INSN_P (493)" "cpslla0\\t%0" [(set_attr "may_trap" "no") @@ -20411,69 +13781,37 @@ (define_insn "cgen_intrinsic_cpsraa0_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 1756)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - ] 1757)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1758)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - ] 1759)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1760)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - ] 1761)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1762)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - ] 1763)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1764)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - ] 1765)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1766)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - ] 1767)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1768)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - ] 1769)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - ] 1770)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 1771))] + ] 1770))] "CGEN_ENABLE_INSN_P (494)" "cpsraa0\\t%0" [(set_attr "may_trap" "no") @@ -20486,69 +13824,37 @@ (define_insn "cgen_intrinsic_cpsrla0_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") ] 1772)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - ] 1773)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1774)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - ] 1775)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1776)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - ] 1777)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1778)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - ] 1779)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1780)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - ] 1781)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1782)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - ] 1783)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) ] 1784)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - ] 1785)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - ] 1786)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) - ] 1787))] + ] 1786))] "CGEN_ENABLE_INSN_P (495)" "cpsrla0\\t%0" [(set_attr "may_trap" "no") @@ -20561,69 +13867,37 @@ (define_insn "cgen_intrinsic_cpaccpa0_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1788)) - (set (reg:SI 129) - (unspec:SI [ - (const_int 0) - ] 1789)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1790)) - (set (reg:SI 130) - (unspec:SI [ - (const_int 0) - ] 1791)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1792)) - (set (reg:SI 131) - (unspec:SI [ - (const_int 0) - ] 1793)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1794)) - (set (reg:SI 132) - (unspec:SI [ - (const_int 0) - ] 1795)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1796)) - (set (reg:SI 125) - (unspec:SI [ - (const_int 0) - ] 1797)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1798)) - (set (reg:SI 126) - (unspec:SI [ - (const_int 0) - ] 1799)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1800)) - (set (reg:SI 127) - (unspec:SI [ - (const_int 0) - ] 1801)) (set (reg:SI 96) - (unspec:SI [ - (const_int 0) - ] 1802)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) - ] 1803))] + ] 1802))] "CGEN_ENABLE_INSN_P (496)" "cpaccpa0" [(set_attr "may_trap" "no") @@ -20636,77 +13910,41 @@ (define_insn "cgen_intrinsic_cpacsuma0_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1804)) - (set (reg:SI 124) - (unspec:SI [ - (const_int 0) - ] 1805)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1806)) - (set (reg:SI 129) - (unspec:SI [ - (const_int 0) - ] 1807)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1808)) - (set (reg:SI 130) - (unspec:SI [ - (const_int 0) - ] 1809)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1810)) - (set (reg:SI 131) - (unspec:SI [ - (const_int 0) - ] 1811)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1812)) - (set (reg:SI 132) - (unspec:SI [ - (const_int 0) - ] 1813)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1814)) - (set (reg:SI 125) - (unspec:SI [ - (const_int 0) - ] 1815)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1816)) - (set (reg:SI 126) - (unspec:SI [ - (const_int 0) - ] 1817)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) ] 1818)) - (set (reg:SI 127) - (unspec:SI [ - (const_int 0) - ] 1819)) (set (reg:SI 96) - (unspec:SI [ - (const_int 0) - ] 1820)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (const_int 0) - ] 1821))] + ] 1820))] "CGEN_ENABLE_INSN_P (497)" "cpacsuma0" [(set_attr "may_trap" "no") @@ -20944,45 +14182,25 @@ (define_insn "cgen_intrinsic_cpsetla0_w_P0S" [(set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1852)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1853)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1854)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1855)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1856)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1857)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1858)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1859))] + ] 1858))] "CGEN_ENABLE_INSN_P (513)" "cpsetla0.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -20995,45 +14213,25 @@ (define_insn "cgen_intrinsic_cpsetua0_w_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1860)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1861)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1862)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1863)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1864)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1865)) (set (reg:SI 100) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1866)) - (set (reg:SI 132) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1867))] + ] 1866))] "CGEN_ENABLE_INSN_P (514)" "cpsetua0.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -21046,85 +14244,45 @@ (define_insn "cgen_intrinsic_cpseta0_h_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1868)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1869)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1870)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1871)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1872)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1873)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1874)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1875)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1876)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1877)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1878)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1879)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1880)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1881)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1882)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1883))] + ] 1882))] "CGEN_ENABLE_INSN_P (515)" "cpseta0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -21137,55 +14295,30 @@ (define_insn "cgen_intrinsic_cpsadla0_h_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1884)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1885)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1886)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1887)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1888)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1889)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1890)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1891)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1892)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1893))] + ] 1892))] "CGEN_ENABLE_INSN_P (516)" "cpsadla0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -21198,55 +14331,30 @@ (define_insn "cgen_intrinsic_cpsadua0_h_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1894)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1895)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1896)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1897)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1898)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1899)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1900)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1901)) (set (reg:SI 100) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1902)) - (set (reg:SI 132) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1903))] + ] 1902))] "CGEN_ENABLE_INSN_P (517)" "cpsadua0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -21259,95 +14367,50 @@ (define_insn "cgen_intrinsic_cpsada0_b_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1904)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1905)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1906)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1907)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1908)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1909)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1910)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1911)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1912)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1913)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1914)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1915)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1916)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1917)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1918)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1919)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1920)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1921))] + ] 1920))] "CGEN_ENABLE_INSN_P (518)" "cpsada0.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -21360,95 +14423,50 @@ (define_insn "cgen_intrinsic_cpsada0u_b_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1922)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1923)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1924)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1925)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1926)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1927)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1928)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1929)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1930)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1931)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1932)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1933)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1934)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1935)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1936)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1937)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1938)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1939))] + ] 1938))] "CGEN_ENABLE_INSN_P (519)" "cpsada0u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -21461,45 +14479,25 @@ (define_insn "cgen_intrinsic_cpabsla0_h_P0S" [(set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1940)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1941)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1942)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1943)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1944)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1945)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1946)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1947))] + ] 1946))] "CGEN_ENABLE_INSN_P (520)" "cpabsla0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -21512,45 +14510,25 @@ (define_insn "cgen_intrinsic_cpabsua0_h_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1948)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1949)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1950)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1951)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1952)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1953)) (set (reg:SI 100) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1954)) - (set (reg:SI 132) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1955))] + ] 1954))] "CGEN_ENABLE_INSN_P (521)" "cpabsua0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -21563,85 +14541,45 @@ (define_insn "cgen_intrinsic_cpabsa0_b_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1956)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1957)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1958)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1959)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1960)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1961)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1962)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1963)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1964)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1965)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1966)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1967)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1968)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1969)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1970)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1971))] + ] 1970))] "CGEN_ENABLE_INSN_P (522)" "cpabsa0.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -21654,85 +14592,45 @@ (define_insn "cgen_intrinsic_cpabsa0u_b_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1972)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1973)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1974)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1975)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1976)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1977)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1978)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1979)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1980)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1981)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1982)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1983)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1984)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1985)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1986)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1987))] + ] 1986))] "CGEN_ENABLE_INSN_P (523)" "cpabsa0u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -21745,55 +14643,30 @@ (define_insn "cgen_intrinsic_cpsubacla0_h_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1988)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1989)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1990)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1991)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1992)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1993)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 1994)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1995)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1996)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 1997))] + ] 1996))] "CGEN_ENABLE_INSN_P (524)" "cpsubacla0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -21806,55 +14679,30 @@ (define_insn "cgen_intrinsic_cpsubacua0_h_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 1998)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 1999)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2000)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2001)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2002)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2003)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2004)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2005)) (set (reg:SI 100) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2006)) - (set (reg:SI 132) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2007))] + ] 2006))] "CGEN_ENABLE_INSN_P (525)" "cpsubacua0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -21867,95 +14715,50 @@ (define_insn "cgen_intrinsic_cpsubaca0_b_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2008)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2009)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2010)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2011)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2012)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2013)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2014)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2015)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2016)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2017)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2018)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2019)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2020)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2021)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2022)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2023)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2024)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2025))] + ] 2024))] "CGEN_ENABLE_INSN_P (526)" "cpsubaca0.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -21968,95 +14771,50 @@ (define_insn "cgen_intrinsic_cpsubaca0u_b_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2026)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2027)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2028)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2029)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2030)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2031)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2032)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2033)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2034)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2035)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2036)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2037)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2038)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2039)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2040)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2041)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2042)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2043))] + ] 2042))] "CGEN_ENABLE_INSN_P (527)" "cpsubaca0u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -22069,45 +14827,25 @@ (define_insn "cgen_intrinsic_cpsubla0_h_P0S" [(set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2044)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2045)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2046)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2047)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2048)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2049)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2050)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2051))] + ] 2050))] "CGEN_ENABLE_INSN_P (528)" "cpsubla0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -22120,45 +14858,25 @@ (define_insn "cgen_intrinsic_cpsubua0_h_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2052)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2053)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2054)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2055)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2056)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2057)) (set (reg:SI 100) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2058)) - (set (reg:SI 132) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2059))] + ] 2058))] "CGEN_ENABLE_INSN_P (529)" "cpsubua0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -22171,85 +14889,45 @@ (define_insn "cgen_intrinsic_cpsuba0_b_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2060)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2061)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2062)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2063)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2064)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2065)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2066)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2067)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2068)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2069)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2070)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2071)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2072)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2073)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2074)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2075))] + ] 2074))] "CGEN_ENABLE_INSN_P (530)" "cpsuba0.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -22262,85 +14940,45 @@ (define_insn "cgen_intrinsic_cpsuba0u_b_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2076)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2077)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2078)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2079)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2080)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2081)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2082)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2083)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2084)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2085)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2086)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2087)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2088)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2089)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2090)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2091))] + ] 2090))] "CGEN_ENABLE_INSN_P (531)" "cpsuba0u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -22353,55 +14991,30 @@ (define_insn "cgen_intrinsic_cpaddacla0_h_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2092)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2093)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2094)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2095)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2096)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2097)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2098)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2099)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2100)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2101))] + ] 2100))] "CGEN_ENABLE_INSN_P (532)" "cpaddacla0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -22414,55 +15027,30 @@ (define_insn "cgen_intrinsic_cpaddacua0_h_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2102)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2103)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2104)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2105)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2106)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2107)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2108)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2109)) (set (reg:SI 100) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2110)) - (set (reg:SI 132) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2111))] + ] 2110))] "CGEN_ENABLE_INSN_P (533)" "cpaddacua0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -22475,95 +15063,50 @@ (define_insn "cgen_intrinsic_cpaddaca0_b_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2112)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2113)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2114)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2115)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2116)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2117)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2118)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2119)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2120)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2121)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2122)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2123)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2124)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2125)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2126)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2127)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2128)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2129))] + ] 2128))] "CGEN_ENABLE_INSN_P (534)" "cpaddaca0.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -22576,95 +15119,50 @@ (define_insn "cgen_intrinsic_cpaddaca0u_b_P0S" [(set (reg:SI 86) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2130)) - (set (reg:SI 124) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2131)) (set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2132)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2133)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2134)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2135)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2136)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2137)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2138)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2139)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2140)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2141)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2142)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2143)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2144)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2145)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2146)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2147))] + ] 2146))] "CGEN_ENABLE_INSN_P (535)" "cpaddaca0u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -22677,45 +15175,25 @@ (define_insn "cgen_intrinsic_cpaddla0_h_P0S" [(set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2148)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2149)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2150)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2151)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2152)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2153)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2154)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2155))] + ] 2154))] "CGEN_ENABLE_INSN_P (536)" "cpaddla0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -22728,45 +15206,25 @@ (define_insn "cgen_intrinsic_cpaddua0_h_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2156)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2157)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2158)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2159)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2160)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2161)) (set (reg:SI 100) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2162)) - (set (reg:SI 132) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2163))] + ] 2162))] "CGEN_ENABLE_INSN_P (537)" "cpaddua0.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -22779,85 +15237,45 @@ (define_insn "cgen_intrinsic_cpadda0_b_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2164)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2165)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2166)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2167)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2168)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2169)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2170)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2171)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2172)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2173)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2174)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2175)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2176)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2177)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2178)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2179))] + ] 2178))] "CGEN_ENABLE_INSN_P (538)" "cpadda0.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -22870,85 +15288,45 @@ (define_insn "cgen_intrinsic_cpadda0u_b_P0S" [(set (reg:SI 103) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") ] 2180)) - (set (reg:SI 129) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2181)) (set (reg:SI 102) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2182)) - (set (reg:SI 130) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2183)) (set (reg:SI 101) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2184)) - (set (reg:SI 131) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2185)) (set (reg:SI 100) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2186)) - (set (reg:SI 132) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2187)) (set (reg:SI 99) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2188)) - (set (reg:SI 125) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2189)) (set (reg:SI 98) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2190)) - (set (reg:SI 126) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2191)) (set (reg:SI 97) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) ] 2192)) - (set (reg:SI 127) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2193)) (set (reg:SI 96) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 2194)) - (set (reg:SI 128) - (unspec:SI [ + (unspec_volatile:SI [ (match_dup 0) (match_dup 1) - ] 2195))] + ] 2194))] "CGEN_ENABLE_INSN_P (539)" "cpadda0u.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -22961,15 +15339,10 @@ (define_insn "cgen_intrinsic_cpcmpge_w_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3282)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3283))] + ] 3282))] "CGEN_ENABLE_INSN_P (540)" "cpcmpge.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -22982,15 +15355,10 @@ (define_insn "cgen_intrinsic_cpcmpge_w_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3282)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3283))] + ] 3282))] "CGEN_ENABLE_INSN_P (541)" "cpcmpge.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -23003,15 +15371,10 @@ (define_insn "cgen_intrinsic_cpcmpgeu_w_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3284)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3285))] + ] 3284))] "CGEN_ENABLE_INSN_P (542)" "cpcmpgeu.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -23024,15 +15387,10 @@ (define_insn "cgen_intrinsic_cpcmpgeu_w_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3284)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3285))] + ] 3284))] "CGEN_ENABLE_INSN_P (543)" "cpcmpgeu.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -23045,15 +15403,10 @@ (define_insn "cgen_intrinsic_cpcmpge_h_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3286)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3287))] + ] 3286))] "CGEN_ENABLE_INSN_P (544)" "cpcmpge.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -23066,15 +15419,10 @@ (define_insn "cgen_intrinsic_cpcmpge_h_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3286)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3287))] + ] 3286))] "CGEN_ENABLE_INSN_P (545)" "cpcmpge.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -23087,15 +15435,10 @@ (define_insn "cgen_intrinsic_cpcmpge_b_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3288)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3289))] + ] 3288))] "CGEN_ENABLE_INSN_P (546)" "cpcmpge.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23108,15 +15451,10 @@ (define_insn "cgen_intrinsic_cpcmpge_b_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3288)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3289))] + ] 3288))] "CGEN_ENABLE_INSN_P (547)" "cpcmpge.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23129,15 +15467,10 @@ (define_insn "cgen_intrinsic_cpcmpgeu_b_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3290)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3291))] + ] 3290))] "CGEN_ENABLE_INSN_P (548)" "cpcmpgeu.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23150,15 +15483,10 @@ (define_insn "cgen_intrinsic_cpcmpgeu_b_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3290)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3291))] + ] 3290))] "CGEN_ENABLE_INSN_P (549)" "cpcmpgeu.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23171,15 +15499,10 @@ (define_insn "cgen_intrinsic_cpcmpgt_w_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3292)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3293))] + ] 3292))] "CGEN_ENABLE_INSN_P (550)" "cpcmpgt.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -23192,15 +15515,10 @@ (define_insn "cgen_intrinsic_cpcmpgt_w_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3292)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3293))] + ] 3292))] "CGEN_ENABLE_INSN_P (551)" "cpcmpgt.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -23213,15 +15531,10 @@ (define_insn "cgen_intrinsic_cpcmpgtu_w_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3294)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3295))] + ] 3294))] "CGEN_ENABLE_INSN_P (552)" "cpcmpgtu.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -23234,15 +15547,10 @@ (define_insn "cgen_intrinsic_cpcmpgtu_w_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3294)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3295))] + ] 3294))] "CGEN_ENABLE_INSN_P (553)" "cpcmpgtu.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -23255,15 +15563,10 @@ (define_insn "cgen_intrinsic_cpcmpgt_h_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3296)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3297))] + ] 3296))] "CGEN_ENABLE_INSN_P (554)" "cpcmpgt.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -23276,15 +15579,10 @@ (define_insn "cgen_intrinsic_cpcmpgt_h_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3296)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3297))] + ] 3296))] "CGEN_ENABLE_INSN_P (555)" "cpcmpgt.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -23297,15 +15595,10 @@ (define_insn "cgen_intrinsic_cpcmpgt_b_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3298)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3299))] + ] 3298))] "CGEN_ENABLE_INSN_P (556)" "cpcmpgt.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23318,15 +15611,10 @@ (define_insn "cgen_intrinsic_cpcmpgt_b_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3298)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3299))] + ] 3298))] "CGEN_ENABLE_INSN_P (557)" "cpcmpgt.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23339,15 +15627,10 @@ (define_insn "cgen_intrinsic_cpcmpgtu_b_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3300)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3301))] + ] 3300))] "CGEN_ENABLE_INSN_P (558)" "cpcmpgtu.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23360,15 +15643,10 @@ (define_insn "cgen_intrinsic_cpcmpgtu_b_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3300)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3301))] + ] 3300))] "CGEN_ENABLE_INSN_P (559)" "cpcmpgtu.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23381,15 +15659,10 @@ (define_insn "cgen_intrinsic_cpcmpne_w_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3302)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3303))] + ] 3302))] "CGEN_ENABLE_INSN_P (560)" "cpcmpne.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -23402,15 +15675,10 @@ (define_insn "cgen_intrinsic_cpcmpne_w_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3302)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3303))] + ] 3302))] "CGEN_ENABLE_INSN_P (561)" "cpcmpne.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -23423,15 +15691,10 @@ (define_insn "cgen_intrinsic_cpcmpne_h_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3304)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3305))] + ] 3304))] "CGEN_ENABLE_INSN_P (562)" "cpcmpne.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -23444,15 +15707,10 @@ (define_insn "cgen_intrinsic_cpcmpne_h_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3304)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3305))] + ] 3304))] "CGEN_ENABLE_INSN_P (563)" "cpcmpne.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -23465,15 +15723,10 @@ (define_insn "cgen_intrinsic_cpcmpne_b_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3306)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3307))] + ] 3306))] "CGEN_ENABLE_INSN_P (564)" "cpcmpne.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23486,15 +15739,10 @@ (define_insn "cgen_intrinsic_cpcmpne_b_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3306)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3307))] + ] 3306))] "CGEN_ENABLE_INSN_P (565)" "cpcmpne.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23507,15 +15755,10 @@ (define_insn "cgen_intrinsic_cpcmpeq_w_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3308)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3309))] + ] 3308))] "CGEN_ENABLE_INSN_P (566)" "cpcmpeq.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -23528,15 +15771,10 @@ (define_insn "cgen_intrinsic_cpcmpeq_w_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3308)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3309))] + ] 3308))] "CGEN_ENABLE_INSN_P (567)" "cpcmpeq.w\\t%0,%1" [(set_attr "may_trap" "no") @@ -23549,15 +15787,10 @@ (define_insn "cgen_intrinsic_cpcmpeq_h_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3310)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3311))] + ] 3310))] "CGEN_ENABLE_INSN_P (568)" "cpcmpeq.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -23570,15 +15803,10 @@ (define_insn "cgen_intrinsic_cpcmpeq_h_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3310)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3311))] + ] 3310))] "CGEN_ENABLE_INSN_P (569)" "cpcmpeq.h\\t%0,%1" [(set_attr "may_trap" "no") @@ -23591,15 +15819,10 @@ (define_insn "cgen_intrinsic_cpcmpeq_b_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3312)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3313))] + ] 3312))] "CGEN_ENABLE_INSN_P (570)" "cpcmpeq.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23612,15 +15835,10 @@ (define_insn "cgen_intrinsic_cpcmpeq_b_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3312)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3313))] + ] 3312))] "CGEN_ENABLE_INSN_P (571)" "cpcmpeq.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23633,15 +15851,10 @@ (define_insn "cgen_intrinsic_cpcmpeqz_b_C3" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3314)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3315))] + ] 3314))] "CGEN_ENABLE_INSN_P (572)" "cpcmpeqz.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -23654,15 +15867,10 @@ (define_insn "cgen_intrinsic_cpcmpeqz_b_P0S_P1" [(set (reg:SI 81) - (unspec:SI [ + (unspec_volatile:SI [ (match_operand:DI 0 "general_operand" "x") (match_operand:DI 1 "general_operand" "x") - ] 3314)) - (set (reg:SI 123) - (unspec:SI [ - (match_dup 0) - (match_dup 1) - ] 3315))] + ] 3314))] "CGEN_ENABLE_INSN_P (573)" "cpcmpeqz.b\\t%0,%1" [(set_attr "may_trap" "no") @@ -24781,7 +16989,7 @@ [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") - ] 4184))] + ] 4172))] "CGEN_ENABLE_INSN_P (648)" "cpmov\\t%0,%1" [(set_attr "may_trap" "no") @@ -24796,7 +17004,7 @@ [(set (match_operand:DI 0 "nonimmediate_operand" "=x") (unspec:DI [ (match_operand:DI 1 "general_operand" "x") - ] 4184))] + ] 4172))] "CGEN_ENABLE_INSN_P (649)" "cpmov\\t%0,%1" [(set_attr "may_trap" "no") @@ -25224,7 +17432,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:DI 1 "general_operand" "x") - ] 4168))] + ] 4156))] "CGEN_ENABLE_INSN_P (676)" "cmovh\\t%0,%1" [(set_attr "may_trap" "no") @@ -25237,9 +17445,9 @@ (define_insn "cgen_intrinsic_cmovh_rn_crm_p0" [(set (match_operand:SI 0 "nonimmediate_operand" "=r") - (unspec_volatile:SI [ + (unspec:SI [ (match_operand:DI 1 "general_operand" "x") - ] 3556))] + ] 4156))] "CGEN_ENABLE_INSN_P (677)" "cmovh\\t%0,%1" [(set_attr "may_trap" "no") @@ -25255,7 +17463,7 @@ (unspec:DI [ (match_operand:DI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 4170))] + ] 4158))] "CGEN_ENABLE_INSN_P (678)" "cmovh\\t%1,%2" [(set_attr "may_trap" "no") @@ -25268,10 +17476,10 @@ (define_insn "cgen_intrinsic_cmovh_crn_rm_p0" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") - (unspec_volatile:DI [ + (unspec:DI [ (match_operand:DI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3558))] + ] 4158))] "CGEN_ENABLE_INSN_P (679)" "cmovh\\t%1,%2" [(set_attr "may_trap" "no") @@ -25286,7 +17494,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec_volatile:SI [ (match_operand:SI 1 "general_operand" "y") - ] 4172))] + ] 4160))] "CGEN_ENABLE_INSN_P (680)" "cmovc\\t%0,%1" [(set_attr "may_trap" "no") @@ -25301,7 +17509,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec_volatile:SI [ (match_operand:SI 1 "general_operand" "y") - ] 3560))] + ] 4160))] "CGEN_ENABLE_INSN_P (681)" "cmovc\\t%0,%1" [(set_attr "may_trap" "no") @@ -25316,7 +17524,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=y") (unspec_volatile:SI [ (match_operand:SI 1 "general_operand" "r") - ] 4174))] + ] 4162))] "CGEN_ENABLE_INSN_P (682)" "cmovc\\t%0,%1" [(set_attr "may_trap" "no") @@ -25331,7 +17539,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=y") (unspec_volatile:SI [ (match_operand:SI 1 "general_operand" "r") - ] 3562))] + ] 4162))] "CGEN_ENABLE_INSN_P (683)" "cmovc\\t%0,%1" [(set_attr "may_trap" "no") @@ -25346,7 +17554,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:DI 1 "general_operand" "x") - ] 4176))] + ] 4164))] "CGEN_ENABLE_INSN_P (684)" "cmov\\t%0,%1" [(set_attr "may_trap" "no") @@ -25359,9 +17567,9 @@ (define_insn "cgen_intrinsic_cmov_rn_crm_p0" [(set (match_operand:SI 0 "nonimmediate_operand" "=r") - (unspec_volatile:SI [ + (unspec:SI [ (match_operand:DI 1 "general_operand" "x") - ] 3564))] + ] 4164))] "CGEN_ENABLE_INSN_P (685)" "cmov\\t%0,%1" [(set_attr "may_trap" "no") @@ -25377,7 +17585,7 @@ (unspec:DI [ (match_operand:DI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 4178))] + ] 4166))] "CGEN_ENABLE_INSN_P (686)" "cmov\\t%1,%2" [(set_attr "may_trap" "no") @@ -25390,9 +17598,9 @@ (define_insn "cgen_intrinsic_cmov_crn_rm_p0" [(set (match_operand:DI 0 "nonimmediate_operand" "=x") - (unspec_volatile:DI [ + (unspec:DI [ (match_operand:SI 1 "general_operand" "r") - ] 3566))] + ] 4166))] "CGEN_ENABLE_INSN_P (687)" "cmov\\t%0,%1" [(set_attr "may_trap" "no") @@ -25409,7 +17617,7 @@ (match_operand:SI 0 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3568) + ] 3556) (const_int 0)) (match_dup 0) (pc))) @@ -25418,13 +17626,13 @@ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3570)) - (set (reg:SI 133) + ] 3558)) + (set (reg:SI 115) (unspec:SI [ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3571))] + ] 3559))] "CGEN_ENABLE_INSN_P (688)" "bsrv\\t%l0" [(set_attr "may_trap" "no") @@ -25441,19 +17649,19 @@ (match_operand:SI 0 "general_operand" "r") (reg:SI 32) (reg:SI 42) - ] 3572)) + ] 3560)) (set (reg:SI 17) (unspec:SI [ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3574)) - (set (reg:SI 133) + ] 3562)) + (set (reg:SI 115) (unspec:SI [ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3575))] + ] 3563))] "CGEN_ENABLE_INSN_P (689)" "jsrv\\t%0" [(set_attr "may_trap" "no") @@ -25467,7 +17675,7 @@ (define_insn "cgen_intrinsic_synccp" [(unspec_volatile [ (const_int 0) - ] 3576)] + ] 3564)] "CGEN_ENABLE_INSN_P (690)" "synccp" [(set_attr "may_trap" "no") @@ -25486,7 +17694,7 @@ (reg:SI 32) (reg:SI 42) (reg:SI 81) - ] 3578) + ] 3566) (const_int 0)) (match_dup 1) (pc)))] @@ -25508,7 +17716,7 @@ (reg:SI 32) (reg:SI 42) (reg:SI 81) - ] 3580) + ] 3568) (const_int 0)) (match_dup 1) (pc)))] @@ -25530,7 +17738,7 @@ (reg:SI 32) (reg:SI 42) (reg:SI 81) - ] 3582) + ] 3570) (const_int 0)) (match_dup 1) (pc)))] @@ -25552,7 +17760,7 @@ (reg:SI 32) (reg:SI 42) (reg:SI 81) - ] 3584) + ] 3572) (const_int 0)) (match_dup 1) (pc)))] @@ -25573,14 +17781,14 @@ (match_operand:DI 3 "cgen_h_sint_10a1_immediate" "") (reg:SI 31) (reg:SI 30) - ] 3586)) + ] 3574)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) (match_dup 3) (reg:SI 31) (reg:SI 30) - ] 3588))] + ] 3576))] "CGEN_ENABLE_INSN_P (695)" "lmcpm1\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -25599,7 +17807,7 @@ (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (reg:SI 31) (reg:SI 30) - ] 3590))] + ] 3578))] "CGEN_ENABLE_INSN_P (696)" "smcpm1\\t%1,(%2+),%3" [(set_attr "may_trap" "no") @@ -25618,7 +17826,7 @@ (reg:SI 31) (reg:SI 30) (mem:SI (scratch:SI)) - ] 3592)) + ] 3580)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) @@ -25626,7 +17834,7 @@ (reg:SI 31) (reg:SI 30) (mem:SI (scratch:SI)) - ] 3594))] + ] 3582))] "CGEN_ENABLE_INSN_P (697)" "lwcpm1\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -25645,7 +17853,7 @@ (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (reg:SI 31) (reg:SI 30) - ] 3596)) + ] 3584)) (set (mem:SI (scratch:SI)) (unspec:SI [ (match_dup 1) @@ -25653,7 +17861,7 @@ (match_dup 3) (reg:SI 31) (reg:SI 30) - ] 3598))] + ] 3586))] "CGEN_ENABLE_INSN_P (698)" "swcpm1\\t%1,(%2+),%3" [(set_attr "may_trap" "no") @@ -25672,7 +17880,7 @@ (reg:SI 31) (reg:SI 30) (mem:SI (scratch:SI)) - ] 3600)) + ] 3588)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) @@ -25680,7 +17888,7 @@ (reg:SI 31) (reg:SI 30) (mem:SI (scratch:SI)) - ] 3602))] + ] 3590))] "CGEN_ENABLE_INSN_P (699)" "lhcpm1\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -25699,7 +17907,7 @@ (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (reg:SI 31) (reg:SI 30) - ] 3604)) + ] 3592)) (set (mem:SI (scratch:SI)) (unspec:SI [ (match_dup 1) @@ -25707,7 +17915,7 @@ (match_dup 3) (reg:SI 31) (reg:SI 30) - ] 3606))] + ] 3594))] "CGEN_ENABLE_INSN_P (700)" "shcpm1\\t%1,(%2+),%3" [(set_attr "may_trap" "no") @@ -25726,7 +17934,7 @@ (reg:SI 31) (reg:SI 30) (mem:SI (scratch:SI)) - ] 3608)) + ] 3596)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) @@ -25734,7 +17942,7 @@ (reg:SI 31) (reg:SI 30) (mem:SI (scratch:SI)) - ] 3610))] + ] 3598))] "CGEN_ENABLE_INSN_P (701)" "lbcpm1\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -25753,7 +17961,7 @@ (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (reg:SI 31) (reg:SI 30) - ] 3612)) + ] 3600)) (set (mem:SI (scratch:SI)) (unspec:SI [ (match_dup 1) @@ -25761,7 +17969,7 @@ (match_dup 3) (reg:SI 31) (reg:SI 30) - ] 3614))] + ] 3602))] "CGEN_ENABLE_INSN_P (702)" "sbcpm1\\t%1,(%2+),%3" [(set_attr "may_trap" "no") @@ -25779,14 +17987,14 @@ (match_operand:DI 3 "cgen_h_sint_10a1_immediate" "") (reg:SI 29) (reg:SI 28) - ] 3616)) + ] 3604)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) (match_dup 3) (reg:SI 29) (reg:SI 28) - ] 3618))] + ] 3606))] "CGEN_ENABLE_INSN_P (703)" "lmcpm0\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -25805,7 +18013,7 @@ (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (reg:SI 29) (reg:SI 28) - ] 3620))] + ] 3608))] "CGEN_ENABLE_INSN_P (704)" "smcpm0\\t%1,(%2+),%3" [(set_attr "may_trap" "no") @@ -25824,7 +18032,7 @@ (reg:SI 29) (reg:SI 28) (mem:SI (scratch:SI)) - ] 3622)) + ] 3610)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) @@ -25832,7 +18040,7 @@ (reg:SI 29) (reg:SI 28) (mem:SI (scratch:SI)) - ] 3624))] + ] 3612))] "CGEN_ENABLE_INSN_P (705)" "lwcpm0\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -25851,7 +18059,7 @@ (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (reg:SI 29) (reg:SI 28) - ] 3626)) + ] 3614)) (set (mem:SI (scratch:SI)) (unspec:SI [ (match_dup 1) @@ -25859,7 +18067,7 @@ (match_dup 3) (reg:SI 29) (reg:SI 28) - ] 3628))] + ] 3616))] "CGEN_ENABLE_INSN_P (706)" "swcpm0\\t%1,(%2+),%3" [(set_attr "may_trap" "no") @@ -25878,7 +18086,7 @@ (reg:SI 29) (reg:SI 28) (mem:SI (scratch:SI)) - ] 3630)) + ] 3618)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) @@ -25886,7 +18094,7 @@ (reg:SI 29) (reg:SI 28) (mem:SI (scratch:SI)) - ] 3632))] + ] 3620))] "CGEN_ENABLE_INSN_P (707)" "lhcpm0\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -25905,7 +18113,7 @@ (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (reg:SI 29) (reg:SI 28) - ] 3634)) + ] 3622)) (set (mem:SI (scratch:SI)) (unspec:SI [ (match_dup 1) @@ -25913,7 +18121,7 @@ (match_dup 3) (reg:SI 29) (reg:SI 28) - ] 3636))] + ] 3624))] "CGEN_ENABLE_INSN_P (708)" "shcpm0\\t%1,(%2+),%3" [(set_attr "may_trap" "no") @@ -25932,7 +18140,7 @@ (reg:SI 29) (reg:SI 28) (mem:SI (scratch:SI)) - ] 3638)) + ] 3626)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) @@ -25940,7 +18148,7 @@ (reg:SI 29) (reg:SI 28) (mem:SI (scratch:SI)) - ] 3640))] + ] 3628))] "CGEN_ENABLE_INSN_P (709)" "lbcpm0\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -25959,7 +18167,7 @@ (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (reg:SI 29) (reg:SI 28) - ] 3642)) + ] 3630)) (set (mem:SI (scratch:SI)) (unspec:SI [ (match_dup 1) @@ -25967,7 +18175,7 @@ (match_dup 3) (reg:SI 29) (reg:SI 28) - ] 3644))] + ] 3632))] "CGEN_ENABLE_INSN_P (710)" "sbcpm0\\t%1,(%2+),%3" [(set_attr "may_trap" "no") @@ -25983,12 +18191,12 @@ (unspec:DI [ (match_operand:SI 2 "general_operand" "1") (match_operand:DI 3 "cgen_h_sint_10a1_immediate" "") - ] 3646)) + ] 3634)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) (match_dup 3) - ] 3648))] + ] 3636))] "CGEN_ENABLE_INSN_P (711)" "lmcpa\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -26005,7 +18213,7 @@ (match_operand:DI 1 "general_operand" "em") (match_operand:SI 2 "general_operand" "0") (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") - ] 3650))] + ] 3638))] "CGEN_ENABLE_INSN_P (712)" "smcpa\\t%1,(%2+),%3" [(set_attr "may_trap" "no") @@ -26022,13 +18230,13 @@ (match_operand:SI 2 "general_operand" "1") (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (mem:SI (scratch:SI)) - ] 3652)) + ] 3640)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) (match_dup 3) (mem:SI (scratch:SI)) - ] 3654))] + ] 3642))] "CGEN_ENABLE_INSN_P (713)" "lwcpa\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -26045,13 +18253,13 @@ (match_operand:SI 1 "general_operand" "em") (match_operand:SI 2 "general_operand" "0") (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") - ] 3656)) + ] 3644)) (set (mem:SI (scratch:SI)) (unspec:SI [ (match_dup 1) (match_dup 2) (match_dup 3) - ] 3658))] + ] 3646))] "CGEN_ENABLE_INSN_P (714)" "swcpa\\t%1,(%2+),%3" [(set_attr "may_trap" "no") @@ -26068,13 +18276,13 @@ (match_operand:SI 2 "general_operand" "1") (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (mem:SI (scratch:SI)) - ] 3660)) + ] 3648)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) (match_dup 3) (mem:SI (scratch:SI)) - ] 3662))] + ] 3650))] "CGEN_ENABLE_INSN_P (715)" "lhcpa\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -26091,13 +18299,13 @@ (match_operand:SI 1 "general_operand" "em") (match_operand:SI 2 "general_operand" "0") (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") - ] 3664)) + ] 3652)) (set (mem:SI (scratch:SI)) (unspec:SI [ (match_dup 1) (match_dup 2) (match_dup 3) - ] 3666))] + ] 3654))] "CGEN_ENABLE_INSN_P (716)" "shcpa\\t%1,(%2+),%3" [(set_attr "may_trap" "no") @@ -26114,13 +18322,13 @@ (match_operand:SI 2 "general_operand" "1") (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (mem:SI (scratch:SI)) - ] 3668)) + ] 3656)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) (match_dup 3) (mem:SI (scratch:SI)) - ] 3670))] + ] 3658))] "CGEN_ENABLE_INSN_P (717)" "lbcpa\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -26137,13 +18345,13 @@ (match_operand:SI 1 "general_operand" "em") (match_operand:SI 2 "general_operand" "0") (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") - ] 3672)) + ] 3660)) (set (mem:SI (scratch:SI)) (unspec:SI [ (match_dup 1) (match_dup 2) (match_dup 3) - ] 3674))] + ] 3662))] "CGEN_ENABLE_INSN_P (718)" "sbcpa\\t%1,(%2+),%3" [(set_attr "may_trap" "no") @@ -26159,7 +18367,7 @@ (unspec:DI [ (match_operand:DI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") - ] 3676))] + ] 3664))] "CGEN_ENABLE_INSN_P (719)" "lmcp\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -26175,7 +18383,7 @@ (match_operand:DI 0 "general_operand" "em") (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") - ] 3678)] + ] 3666)] "CGEN_ENABLE_INSN_P (720)" "smcp\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -26192,7 +18400,7 @@ (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") (mem:SI (scratch:SI)) - ] 3680))] + ] 3668))] "CGEN_ENABLE_INSN_P (721)" "lwcp\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -26209,7 +18417,7 @@ (match_operand:SI 0 "general_operand" "em") (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") - ] 3682))] + ] 3670))] "CGEN_ENABLE_INSN_P (722)" "swcp\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -26224,11 +18432,11 @@ [(set (match_operand:DI 0 "nonimmediate_operand" "=em") (unspec:DI [ (match_operand:SI 2 "general_operand" "1") - ] 3684)) + ] 3672)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) - ] 3686))] + ] 3674))] "CGEN_ENABLE_INSN_P (723)" "lmcpi\\t%0,(%2+)" [(set_attr "may_trap" "no") @@ -26244,7 +18452,7 @@ (unspec:SI [ (match_operand:DI 1 "general_operand" "em") (match_operand:SI 2 "general_operand" "0") - ] 3688))] + ] 3676))] "CGEN_ENABLE_INSN_P (724)" "smcpi\\t%1,(%2+)" [(set_attr "may_trap" "no") @@ -26260,12 +18468,12 @@ (unspec:SI [ (match_operand:SI 2 "general_operand" "1") (mem:SI (scratch:SI)) - ] 3690)) + ] 3678)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) (mem:SI (scratch:SI)) - ] 3692))] + ] 3680))] "CGEN_ENABLE_INSN_P (725)" "lwcpi\\t%0,(%2+)" [(set_attr "may_trap" "no") @@ -26281,12 +18489,12 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "em") (match_operand:SI 2 "general_operand" "0") - ] 3694)) + ] 3682)) (set (mem:SI (scratch:SI)) (unspec:SI [ (match_dup 1) (match_dup 2) - ] 3696))] + ] 3684))] "CGEN_ENABLE_INSN_P (726)" "swcpi\\t%1,(%2+)" [(set_attr "may_trap" "no") @@ -26301,7 +18509,7 @@ [(set (match_operand:DI 0 "nonimmediate_operand" "=em") (unspec:DI [ (match_operand:SI 1 "general_operand" "r") - ] 3698))] + ] 3686))] "CGEN_ENABLE_INSN_P (727)" "lmcp\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -26316,7 +18524,7 @@ [(unspec_volatile [ (match_operand:DI 0 "general_operand" "em") (match_operand:SI 1 "general_operand" "r") - ] 3700)] + ] 3688)] "CGEN_ENABLE_INSN_P (728)" "smcp\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -26332,7 +18540,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (mem:SI (scratch:SI)) - ] 3702))] + ] 3690))] "CGEN_ENABLE_INSN_P (729)" "lwcp\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -26348,7 +18556,7 @@ (unspec:SI [ (match_operand:SI 0 "general_operand" "em") (match_operand:SI 1 "general_operand" "r") - ] 3704))] + ] 3692))] "CGEN_ENABLE_INSN_P (730)" "swcp\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -26364,7 +18572,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3706))] + ] 3694))] "CGEN_ENABLE_INSN_P (731)" "ssubu\\t%1,%2" [(set_attr "may_trap" "no") @@ -26380,7 +18588,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3708))] + ] 3696))] "CGEN_ENABLE_INSN_P (732)" "saddu\\t%1,%2" [(set_attr "may_trap" "no") @@ -26396,7 +18604,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3710))] + ] 3698))] "CGEN_ENABLE_INSN_P (733)" "ssub\\t%1,%2" [(set_attr "may_trap" "no") @@ -26412,7 +18620,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3712))] + ] 3700))] "CGEN_ENABLE_INSN_P (734)" "sadd\\t%1,%2" [(set_attr "may_trap" "no") @@ -26428,7 +18636,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "cgen_h_uint_5a1_immediate" "") - ] 3714))] + ] 3702))] "CGEN_ENABLE_INSN_P (735)" "clipu\\t%1,%2" [(set_attr "may_trap" "no") @@ -26444,7 +18652,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "cgen_h_uint_5a1_immediate" "") - ] 3716))] + ] 3704))] "CGEN_ENABLE_INSN_P (736)" "clip\\t%1,%2" [(set_attr "may_trap" "no") @@ -26460,7 +18668,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3718))] + ] 3706))] "CGEN_ENABLE_INSN_P (737)" "maxu\\t%1,%2" [(set_attr "may_trap" "no") @@ -26476,7 +18684,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3720))] + ] 3708))] "CGEN_ENABLE_INSN_P (738)" "minu\\t%1,%2" [(set_attr "may_trap" "no") @@ -26492,7 +18700,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3722))] + ] 3710))] "CGEN_ENABLE_INSN_P (739)" "max\\t%1,%2" [(set_attr "may_trap" "no") @@ -26508,7 +18716,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3724))] + ] 3712))] "CGEN_ENABLE_INSN_P (740)" "min\\t%1,%2" [(set_attr "may_trap" "no") @@ -26524,7 +18732,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3726))] + ] 3714))] "CGEN_ENABLE_INSN_P (741)" "ave\\t%1,%2" [(set_attr "may_trap" "no") @@ -26540,7 +18748,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3728))] + ] 3716))] "CGEN_ENABLE_INSN_P (742)" "abs\\t%1,%2" [(set_attr "may_trap" "no") @@ -26555,7 +18763,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:SI 1 "general_operand" "r") - ] 3730))] + ] 3718))] "CGEN_ENABLE_INSN_P (743)" "ldz\\t%0,%1" [(set_attr "may_trap" "no") @@ -26570,7 +18778,7 @@ [(set (reg:SI 40) (unspec_volatile:SI [ (reg:SI 40) - ] 3732))] + ] 3720))] "CGEN_ENABLE_INSN_P (744)" "dbreak" [(set_attr "may_trap" "yes") @@ -26586,17 +18794,17 @@ (unspec:SI [ (reg:SI 41) (reg:SI 40) - ] 3734)) + ] 3722)) (set (reg:SI 40) (unspec:SI [ (reg:SI 41) (reg:SI 40) - ] 3736)) - (set (reg:SI 134) + ] 3724)) + (set (reg:SI 116) (unspec:SI [ (reg:SI 41) (reg:SI 40) - ] 3737))] + ] 3725))] "CGEN_ENABLE_INSN_P (745)" "dret" [(set_attr "may_trap" "no") @@ -26612,27 +18820,27 @@ (unspec:SI [ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "general_operand" "r") - ] 3738)) + ] 3726)) (set (reg:SI 24) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3740)) - (set (reg:SI 135) + ] 3728)) + (set (reg:SI 117) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3741)) + ] 3729)) (set (reg:SI 23) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3742)) - (set (reg:SI 136) + ] 3730)) + (set (reg:SI 118) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3743))] + ] 3731))] "CGEN_ENABLE_INSN_P (746)" "divu\\t%0,%1" [(set_attr "may_trap" "yes") @@ -26648,27 +18856,27 @@ (unspec:SI [ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "general_operand" "r") - ] 3744)) + ] 3732)) (set (reg:SI 24) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3746)) - (set (reg:SI 135) + ] 3734)) + (set (reg:SI 117) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3747)) + ] 3735)) (set (reg:SI 23) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3748)) - (set (reg:SI 136) + ] 3736)) + (set (reg:SI 118) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3749))] + ] 3737))] "CGEN_ENABLE_INSN_P (747)" "div\\t%0,%1" [(set_attr "may_trap" "yes") @@ -26686,35 +18894,35 @@ (match_operand:SI 2 "general_operand" "r") (reg:SI 24) (reg:SI 23) - ] 3750)) + ] 3738)) (set (reg:SI 24) (unspec:SI [ (match_dup 1) (match_dup 2) (reg:SI 24) (reg:SI 23) - ] 3752)) - (set (reg:SI 135) + ] 3740)) + (set (reg:SI 117) (unspec:SI [ (match_dup 1) (match_dup 2) (reg:SI 24) (reg:SI 23) - ] 3753)) + ] 3741)) (set (reg:SI 23) (unspec:SI [ (match_dup 1) (match_dup 2) (reg:SI 24) (reg:SI 23) - ] 3754)) - (set (reg:SI 136) + ] 3742)) + (set (reg:SI 118) (unspec:SI [ (match_dup 1) (match_dup 2) (reg:SI 24) (reg:SI 23) - ] 3755))] + ] 3743))] "CGEN_ENABLE_INSN_P (748)" "maddru\\t%1,%2" [(set_attr "may_trap" "no") @@ -26732,35 +18940,35 @@ (match_operand:SI 2 "general_operand" "r") (reg:SI 24) (reg:SI 23) - ] 3756)) + ] 3744)) (set (reg:SI 24) (unspec:SI [ (match_dup 1) (match_dup 2) (reg:SI 24) (reg:SI 23) - ] 3758)) - (set (reg:SI 135) + ] 3746)) + (set (reg:SI 117) (unspec:SI [ (match_dup 1) (match_dup 2) (reg:SI 24) (reg:SI 23) - ] 3759)) + ] 3747)) (set (reg:SI 23) (unspec:SI [ (match_dup 1) (match_dup 2) (reg:SI 24) (reg:SI 23) - ] 3760)) - (set (reg:SI 136) + ] 3748)) + (set (reg:SI 118) (unspec:SI [ (match_dup 1) (match_dup 2) (reg:SI 24) (reg:SI 23) - ] 3761))] + ] 3749))] "CGEN_ENABLE_INSN_P (749)" "maddr\\t%1,%2" [(set_attr "may_trap" "no") @@ -26778,28 +18986,28 @@ (match_operand:SI 1 "general_operand" "r") (reg:SI 24) (reg:SI 23) - ] 3762)) - (set (reg:SI 135) + ] 3750)) + (set (reg:SI 117) (unspec:SI [ (match_dup 0) (match_dup 1) (reg:SI 24) (reg:SI 23) - ] 3763)) + ] 3751)) (set (reg:SI 23) (unspec:SI [ (match_dup 0) (match_dup 1) (reg:SI 24) (reg:SI 23) - ] 3764)) - (set (reg:SI 136) + ] 3752)) + (set (reg:SI 118) (unspec:SI [ (match_dup 0) (match_dup 1) (reg:SI 24) (reg:SI 23) - ] 3765))] + ] 3753))] "CGEN_ENABLE_INSN_P (750)" "maddu\\t%0,%1" [(set_attr "may_trap" "no") @@ -26817,28 +19025,28 @@ (match_operand:SI 1 "general_operand" "r") (reg:SI 24) (reg:SI 23) - ] 3766)) - (set (reg:SI 135) + ] 3754)) + (set (reg:SI 117) (unspec:SI [ (match_dup 0) (match_dup 1) (reg:SI 24) (reg:SI 23) - ] 3767)) + ] 3755)) (set (reg:SI 23) (unspec:SI [ (match_dup 0) (match_dup 1) (reg:SI 24) (reg:SI 23) - ] 3768)) - (set (reg:SI 136) + ] 3756)) + (set (reg:SI 118) (unspec:SI [ (match_dup 0) (match_dup 1) (reg:SI 24) (reg:SI 23) - ] 3769))] + ] 3757))] "CGEN_ENABLE_INSN_P (751)" "madd\\t%0,%1" [(set_attr "may_trap" "no") @@ -26854,27 +19062,27 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3770)) + ] 3758)) (set (reg:SI 24) (unspec:SI [ (match_dup 1) (match_dup 2) - ] 3772)) - (set (reg:SI 135) + ] 3760)) + (set (reg:SI 117) (unspec:SI [ (match_dup 1) (match_dup 2) - ] 3773)) + ] 3761)) (set (reg:SI 23) (unspec:SI [ (match_dup 1) (match_dup 2) - ] 3774)) - (set (reg:SI 136) + ] 3762)) + (set (reg:SI 118) (unspec:SI [ (match_dup 1) (match_dup 2) - ] 3775))] + ] 3763))] "CGEN_ENABLE_INSN_P (752)" "mulru\\t%1,%2" [(set_attr "may_trap" "no") @@ -26890,27 +19098,27 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3776)) + ] 3764)) (set (reg:SI 24) (unspec:SI [ (match_dup 1) (match_dup 2) - ] 3778)) - (set (reg:SI 135) + ] 3766)) + (set (reg:SI 117) (unspec:SI [ (match_dup 1) (match_dup 2) - ] 3779)) + ] 3767)) (set (reg:SI 23) (unspec:SI [ (match_dup 1) (match_dup 2) - ] 3780)) - (set (reg:SI 136) + ] 3768)) + (set (reg:SI 118) (unspec:SI [ (match_dup 1) (match_dup 2) - ] 3781))] + ] 3769))] "CGEN_ENABLE_INSN_P (753)" "mulr\\t%1,%2" [(set_attr "may_trap" "no") @@ -26926,22 +19134,22 @@ (unspec:SI [ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "general_operand" "r") - ] 3782)) - (set (reg:SI 135) + ] 3770)) + (set (reg:SI 117) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3783)) + ] 3771)) (set (reg:SI 23) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3784)) - (set (reg:SI 136) + ] 3772)) + (set (reg:SI 118) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3785))] + ] 3773))] "CGEN_ENABLE_INSN_P (754)" "mulu\\t%0,%1" [(set_attr "may_trap" "no") @@ -26957,22 +19165,22 @@ (unspec:SI [ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "general_operand" "r") - ] 3786)) - (set (reg:SI 135) + ] 3774)) + (set (reg:SI 117) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3787)) + ] 3775)) (set (reg:SI 23) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3788)) - (set (reg:SI 136) + ] 3776)) + (set (reg:SI 118) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3789))] + ] 3777))] "CGEN_ENABLE_INSN_P (755)" "mul\\t%0,%1" [(set_attr "may_trap" "no") @@ -26987,7 +19195,7 @@ [(unspec_volatile [ (match_operand:SI 0 "cgen_h_uint_4a1_immediate" "") (match_operand:SI 1 "general_operand" "r") - ] 3790)] + ] 3778)] "CGEN_ENABLE_INSN_P (756)" "cache\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -27003,12 +19211,12 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (mem:SI (scratch:SI)) - ] 3792)) + ] 3780)) (set (mem:SI (scratch:SI)) (unspec:SI [ (match_dup 1) (mem:SI (scratch:SI)) - ] 3794))] + ] 3782))] "CGEN_ENABLE_INSN_P (757)" "tas\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -27025,7 +19233,7 @@ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "cgen_h_uint_3a1_immediate" "") (mem:SI (scratch:SI)) - ] 3796))] + ] 3784))] "CGEN_ENABLE_INSN_P (758)" "btstm\\t$0,(%1),%2" [(set_attr "may_trap" "no") @@ -27042,7 +19250,7 @@ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "cgen_h_uint_3a1_immediate" "") (mem:SI (scratch:SI)) - ] 3798))] + ] 3786))] "CGEN_ENABLE_INSN_P (759)" "bnotm\\t(%0),%1" [(set_attr "may_trap" "no") @@ -27059,7 +19267,7 @@ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "cgen_h_uint_3a1_immediate" "") (mem:SI (scratch:SI)) - ] 3800))] + ] 3788))] "CGEN_ENABLE_INSN_P (760)" "bclrm\\t(%0),%1" [(set_attr "may_trap" "no") @@ -27076,7 +19284,7 @@ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "cgen_h_uint_3a1_immediate" "") (mem:SI (scratch:SI)) - ] 3802))] + ] 3790))] "CGEN_ENABLE_INSN_P (761)" "bsetm\\t(%0),%1" [(set_attr "may_trap" "no") @@ -27091,7 +19299,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec_volatile:SI [ (match_operand:SI 1 "cgen_h_uint_16a1_immediate" "") - ] 3804))] + ] 3792))] "CGEN_ENABLE_INSN_P (762)" "ldcb\\t%0,%1" [(set_attr "may_trap" "no") @@ -27106,7 +19314,7 @@ [(unspec_volatile [ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "cgen_h_uint_16a1_immediate" "") - ] 3806)] + ] 3794)] "CGEN_ENABLE_INSN_P (763)" "stcb\\t%0,%1" [(set_attr "may_trap" "no") @@ -27120,7 +19328,7 @@ (define_insn "cgen_intrinsic_syncm" [(unspec_volatile [ (const_int 0) - ] 3808)] + ] 3796)] "CGEN_ENABLE_INSN_P (764)" "syncm" [(set_attr "may_trap" "no") @@ -27135,7 +19343,7 @@ [(set (pc) (unspec_volatile:SI [ (const_int 0) - ] 3810))] + ] 3798))] "CGEN_ENABLE_INSN_P (765)" "break" [(set_attr "may_trap" "yes") @@ -27151,7 +19359,7 @@ (unspec_volatile:SI [ (match_operand:SI 0 "cgen_h_uint_2a1_immediate" "") (reg:SI 36) - ] 3812))] + ] 3800))] "CGEN_ENABLE_INSN_P (766)" "swi\\t%0" [(set_attr "may_trap" "yes") @@ -27165,7 +19373,7 @@ (define_insn "cgen_intrinsic_sleep" [(unspec_volatile [ (const_int 0) - ] 3814)] + ] 3802)] "CGEN_ENABLE_INSN_P (767)" "sleep" [(set_attr "may_trap" "no") @@ -27179,7 +19387,7 @@ (define_insn "cgen_intrinsic_halt" [(unspec_volatile [ (reg:SI 32) - ] 3816)] + ] 3804)] "CGEN_ENABLE_INSN_P (768)" "halt" [(set_attr "may_trap" "no") @@ -27197,7 +19405,7 @@ (reg:SI 42) (reg:SI 39) (reg:SI 35) - ] 3818))] + ] 3806))] "CGEN_ENABLE_INSN_P (769)" "reti" [(set_attr "may_trap" "no") @@ -27212,7 +19420,7 @@ [(set (reg:SI 32) (unspec_volatile:SI [ (reg:SI 32) - ] 3820))] + ] 3808))] "CGEN_ENABLE_INSN_P (770)" "ei" [(set_attr "may_trap" "no") @@ -27227,7 +19435,7 @@ [(set (reg:SI 32) (unspec_volatile:SI [ (reg:SI 32) - ] 3822))] + ] 3810))] "CGEN_ENABLE_INSN_P (771)" "di" [(set_attr "may_trap" "no") @@ -27244,7 +19452,7 @@ (match_operand:SI 1 "general_operand" "c") (reg:SI 32) (reg:SI 42) - ] 3824))] + ] 3812))] "CGEN_ENABLE_INSN_P (772)" "ldc\\t%0,%1" [(set_attr "may_trap" "no") @@ -27259,7 +19467,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (reg:SI 24) - ] 3826))] + ] 3814))] "CGEN_ENABLE_INSN_P (773)" "ldc\\t%0,$lo" [(set_attr "may_trap" "no") @@ -27274,7 +19482,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (reg:SI 23) - ] 3828))] + ] 3816))] "CGEN_ENABLE_INSN_P (774)" "ldc\\t%0,$hi" [(set_attr "may_trap" "no") @@ -27289,7 +19497,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (reg:SI 17) - ] 3830))] + ] 3818))] "CGEN_ENABLE_INSN_P (775)" "ldc\\t%0,$lp" [(set_attr "may_trap" "no") @@ -27304,7 +19512,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=c") (unspec_volatile:SI [ (match_operand:SI 1 "general_operand" "r") - ] 3832))] + ] 3820))] "CGEN_ENABLE_INSN_P (776)" "stc\\t%1,%0" [(set_attr "may_trap" "no") @@ -27319,11 +19527,11 @@ [(set (reg:SI 24) (unspec:SI [ (match_operand:SI 0 "general_operand" "r") - ] 3834)) - (set (reg:SI 135) + ] 3822)) + (set (reg:SI 117) (unspec:SI [ (match_dup 0) - ] 3835))] + ] 3823))] "CGEN_ENABLE_INSN_P (777)" "stc\\t%0,$lo" [(set_attr "may_trap" "no") @@ -27338,11 +19546,11 @@ [(set (reg:SI 23) (unspec:SI [ (match_operand:SI 0 "general_operand" "r") - ] 3836)) - (set (reg:SI 136) + ] 3824)) + (set (reg:SI 118) (unspec:SI [ (match_dup 0) - ] 3837))] + ] 3825))] "CGEN_ENABLE_INSN_P (778)" "stc\\t%0,$hi" [(set_attr "may_trap" "no") @@ -27357,11 +19565,11 @@ [(set (reg:SI 17) (unspec:SI [ (match_operand:SI 0 "general_operand" "r") - ] 3838)) - (set (reg:SI 133) + ] 3826)) + (set (reg:SI 115) (unspec:SI [ (match_dup 0) - ] 3839))] + ] 3827))] "CGEN_ENABLE_INSN_P (779)" "stc\\t%0,$lp" [(set_attr "may_trap" "no") @@ -27378,37 +19586,37 @@ (match_operand:SI 0 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3840)) - (set (reg:SI 137) + ] 3828)) + (set (reg:SI 119) (unspec:SI [ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3841)) + ] 3829)) (set (reg:SI 21) (unspec:SI [ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3842)) - (set (reg:SI 138) + ] 3830)) + (set (reg:SI 120) (unspec:SI [ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3843)) + ] 3831)) (set (reg:SI 20) (unspec:SI [ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3844)) - (set (reg:SI 139) + ] 3832)) + (set (reg:SI 121) (unspec:SI [ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3845))] + ] 3833))] "CGEN_ENABLE_INSN_P (780)" "erepeat\\t%l0" [(set_attr "may_trap" "no") @@ -27426,42 +19634,42 @@ (match_operand:SI 1 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3846)) - (set (reg:SI 137) + ] 3834)) + (set (reg:SI 119) (unspec:SI [ (match_dup 0) (match_dup 1) (reg:SI 32) (reg:SI 42) - ] 3847)) + ] 3835)) (set (reg:SI 21) (unspec:SI [ (match_dup 0) (match_dup 1) (reg:SI 32) (reg:SI 42) - ] 3848)) - (set (reg:SI 138) + ] 3836)) + (set (reg:SI 120) (unspec:SI [ (match_dup 0) (match_dup 1) (reg:SI 32) (reg:SI 42) - ] 3849)) + ] 3837)) (set (reg:SI 20) (unspec:SI [ (match_dup 0) (match_dup 1) (reg:SI 32) (reg:SI 42) - ] 3850)) - (set (reg:SI 139) + ] 3838)) + (set (reg:SI 121) (unspec:SI [ (match_dup 0) (match_dup 1) (reg:SI 32) (reg:SI 42) - ] 3851))] + ] 3839))] "CGEN_ENABLE_INSN_P (781)" "repeat\\t%0,%l1" [(set_attr "may_trap" "no") @@ -27478,7 +19686,7 @@ (reg:SI 32) (reg:SI 42) (reg:SI 17) - ] 3852))] + ] 3840))] "CGEN_ENABLE_INSN_P (782)" "ret" [(set_attr "may_trap" "no") @@ -27495,19 +19703,19 @@ (match_operand:SI 0 "general_operand" "r") (reg:SI 32) (reg:SI 42) - ] 3854)) + ] 3842)) (set (reg:SI 17) (unspec:SI [ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3856)) - (set (reg:SI 133) + ] 3844)) + (set (reg:SI 115) (unspec:SI [ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3857))] + ] 3845))] "CGEN_ENABLE_INSN_P (783)" "jsr\\t%0" [(set_attr "may_trap" "no") @@ -27524,7 +19732,7 @@ (match_operand:SI 0 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3858) + ] 3846) (const_int 0)) (match_dup 0) (pc)))] @@ -27544,7 +19752,7 @@ (match_operand:SI 0 "general_operand" "r") (reg:SI 32) (reg:SI 42) - ] 3860))] + ] 3848))] "CGEN_ENABLE_INSN_P (785)" "jmp\\t%0" [(set_attr "may_trap" "no") @@ -27561,7 +19769,7 @@ (match_operand:SI 0 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3866) + ] 3854) (const_int 0)) (match_dup 0) (pc))) @@ -27570,13 +19778,13 @@ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3868)) - (set (reg:SI 133) + ] 3856)) + (set (reg:SI 115) (unspec:SI [ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3869))] + ] 3857))] "CGEN_ENABLE_INSN_P (786)" "bsr\\t%l0" [(set_attr "may_trap" "no") @@ -27593,7 +19801,7 @@ (match_operand:SI 0 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3862) + ] 3850) (const_int 0)) (match_dup 0) (pc))) @@ -27602,13 +19810,13 @@ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3864)) - (set (reg:SI 133) + ] 3852)) + (set (reg:SI 115) (unspec:SI [ (match_dup 0) (reg:SI 32) (reg:SI 42) - ] 3865))] + ] 3853))] "CGEN_ENABLE_INSN_P (787)" "bsr\\t%l0" [(set_attr "may_trap" "no") @@ -27627,7 +19835,7 @@ (match_operand:SI 2 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3870) + ] 3858) (const_int 0)) (match_dup 2) (pc)))] @@ -27649,7 +19857,7 @@ (match_operand:SI 2 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3872) + ] 3860) (const_int 0)) (match_dup 2) (pc)))] @@ -27671,7 +19879,7 @@ (match_operand:SI 2 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3874) + ] 3862) (const_int 0)) (match_dup 2) (pc)))] @@ -27693,7 +19901,7 @@ (match_operand:SI 2 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3876) + ] 3864) (const_int 0)) (match_dup 2) (pc)))] @@ -27715,7 +19923,7 @@ (match_operand:SI 2 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3878) + ] 3866) (const_int 0)) (match_dup 2) (pc)))] @@ -27737,7 +19945,7 @@ (match_operand:SI 2 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3880) + ] 3868) (const_int 0)) (match_dup 2) (pc)))] @@ -27758,7 +19966,7 @@ (match_operand:SI 1 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3882) + ] 3870) (const_int 0)) (match_dup 1) (pc)))] @@ -27779,7 +19987,7 @@ (match_operand:SI 1 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3884) + ] 3872) (const_int 0)) (match_dup 1) (pc)))] @@ -27799,7 +20007,7 @@ (match_operand:SI 0 "immediate_operand" "") (reg:SI 32) (reg:SI 42) - ] 3886) + ] 3874) (const_int 0)) (match_dup 0) (pc)))] @@ -27819,7 +20027,7 @@ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") (reg:SI 18) - ] 3888))] + ] 3876))] "CGEN_ENABLE_INSN_P (797)" "fsft\\t%1,%2" [(set_attr "may_trap" "no") @@ -27835,7 +20043,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "cgen_h_uint_5a1_immediate" "") - ] 3890))] + ] 3878))] "CGEN_ENABLE_INSN_P (798)" "sll3\\t$0,%1,%2" [(set_attr "may_trap" "no") @@ -27851,7 +20059,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "cgen_h_uint_5a1_immediate" "") - ] 3892))] + ] 3880))] "CGEN_ENABLE_INSN_P (799)" "sll\\t%1,%2" [(set_attr "may_trap" "no") @@ -27867,7 +20075,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "cgen_h_uint_5a1_immediate" "") - ] 3894))] + ] 3882))] "CGEN_ENABLE_INSN_P (800)" "srl\\t%1,%2" [(set_attr "may_trap" "no") @@ -27883,7 +20091,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "cgen_h_uint_5a1_immediate" "") - ] 3896))] + ] 3884))] "CGEN_ENABLE_INSN_P (801)" "sra\\t%1,%2" [(set_attr "may_trap" "no") @@ -27899,7 +20107,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3898))] + ] 3886))] "CGEN_ENABLE_INSN_P (802)" "sll\\t%1,%2" [(set_attr "may_trap" "no") @@ -27915,7 +20123,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3900))] + ] 3888))] "CGEN_ENABLE_INSN_P (803)" "srl\\t%1,%2" [(set_attr "may_trap" "no") @@ -27931,7 +20139,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3902))] + ] 3890))] "CGEN_ENABLE_INSN_P (804)" "sra\\t%1,%2" [(set_attr "may_trap" "no") @@ -27947,7 +20155,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "cgen_h_uint_16a1_immediate" "") - ] 3904))] + ] 3892))] "CGEN_ENABLE_INSN_P (805)" "xor3\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -27963,7 +20171,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "cgen_h_uint_16a1_immediate" "") - ] 3906))] + ] 3894))] "CGEN_ENABLE_INSN_P (806)" "and3\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -27979,7 +20187,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "cgen_h_uint_16a1_immediate" "") - ] 3908))] + ] 3896))] "CGEN_ENABLE_INSN_P (807)" "or3\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -27995,7 +20203,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3910))] + ] 3898))] "CGEN_ENABLE_INSN_P (808)" "nor\\t%1,%2" [(set_attr "may_trap" "no") @@ -28011,7 +20219,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3912))] + ] 3900))] "CGEN_ENABLE_INSN_P (809)" "xor\\t%1,%2" [(set_attr "may_trap" "no") @@ -28027,7 +20235,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3914))] + ] 3902))] "CGEN_ENABLE_INSN_P (810)" "and\\t%1,%2" [(set_attr "may_trap" "no") @@ -28043,7 +20251,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3916))] + ] 3904))] "CGEN_ENABLE_INSN_P (811)" "or\\t%1,%2" [(set_attr "may_trap" "no") @@ -28059,7 +20267,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "cgen_h_uint_16a1_immediate" "") - ] 3918))] + ] 3906))] "CGEN_ENABLE_INSN_P (812)" "sltu3\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -28075,7 +20283,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "cgen_h_sint_16a1_immediate" "") - ] 3920))] + ] 3908))] "CGEN_ENABLE_INSN_P (813)" "slt3\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -28091,7 +20299,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "cgen_h_sint_16a1_immediate" "") - ] 3922))] + ] 3910))] "CGEN_ENABLE_INSN_P (814)" "add3\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -28107,7 +20315,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "general_operand" "r") - ] 3924))] + ] 3912))] "CGEN_ENABLE_INSN_P (815)" "sl2ad3\\t$0,%1,%2" [(set_attr "may_trap" "no") @@ -28123,7 +20331,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "general_operand" "r") - ] 3926))] + ] 3914))] "CGEN_ENABLE_INSN_P (816)" "sl1ad3\\t$0,%1,%2" [(set_attr "may_trap" "no") @@ -28139,7 +20347,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "cgen_h_uint_5a1_immediate" "") - ] 3928))] + ] 3916))] "CGEN_ENABLE_INSN_P (817)" "sltu3\\t$0,%1,%2" [(set_attr "may_trap" "no") @@ -28155,7 +20363,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "cgen_h_uint_5a1_immediate" "") - ] 3930))] + ] 3918))] "CGEN_ENABLE_INSN_P (818)" "slt3\\t$0,%1,%2" [(set_attr "may_trap" "no") @@ -28171,7 +20379,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "general_operand" "r") - ] 3932))] + ] 3920))] "CGEN_ENABLE_INSN_P (819)" "sltu3\\t$0,%1,%2" [(set_attr "may_trap" "no") @@ -28187,7 +20395,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "general_operand" "r") - ] 3934))] + ] 3922))] "CGEN_ENABLE_INSN_P (820)" "slt3\\t$0,%1,%2" [(set_attr "may_trap" "no") @@ -28202,7 +20410,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:SI 1 "general_operand" "r") - ] 3936))] + ] 3924))] "CGEN_ENABLE_INSN_P (821)" "neg\\t%0,%1" [(set_attr "may_trap" "no") @@ -28218,7 +20426,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "general_operand" "r") - ] 3938))] + ] 3926))] "CGEN_ENABLE_INSN_P (822)" "sbvck3\\t$0,%1,%2" [(set_attr "may_trap" "no") @@ -28234,7 +20442,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") - ] 3940))] + ] 3928))] "CGEN_ENABLE_INSN_P (823)" "sub\\t%1,%2" [(set_attr "may_trap" "no") @@ -28250,7 +20458,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "general_operand" "r") - ] 3942))] + ] 3930))] "CGEN_ENABLE_INSN_P (824)" "advck3\\t$0,%1,%2" [(set_attr "may_trap" "no") @@ -28266,7 +20474,7 @@ (unspec:SI [ (match_operand:SI 1 "cgen_h_uint_5a4_immediate" "") (reg:SI 15) - ] 3944))] + ] 3932))] "CGEN_ENABLE_INSN_P (825)" "add3\\t%0,$sp,%1" [(set_attr "may_trap" "no") @@ -28282,7 +20490,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "cgen_h_sint_6a1_immediate" "") - ] 3946))] + ] 3934))] "CGEN_ENABLE_INSN_P (826)" "add\\t%1,%2" [(set_attr "may_trap" "no") @@ -28298,7 +20506,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (match_operand:SI 2 "general_operand" "r") - ] 3948))] + ] 3936))] "CGEN_ENABLE_INSN_P (827)" "add3\\t%0,%1,%2" [(set_attr "may_trap" "no") @@ -28313,7 +20521,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:SI 1 "cgen_h_uint_16a1_immediate" "") - ] 3950))] + ] 3938))] "CGEN_ENABLE_INSN_P (828)" "movh\\t%0,%1" [(set_attr "may_trap" "no") @@ -28328,7 +20536,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:SI 1 "cgen_h_uint_16a1_immediate" "") - ] 3952))] + ] 3940))] "CGEN_ENABLE_INSN_P (829)" "movu\\t%0,%1" [(set_attr "may_trap" "no") @@ -28343,7 +20551,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=t") (unspec:SI [ (match_operand:SI 1 "cgen_h_uint_24a1_immediate" "") - ] 3954))] + ] 3942))] "CGEN_ENABLE_INSN_P (830)" "movu\\t%0,%1" [(set_attr "may_trap" "no") @@ -28358,7 +20566,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:SI 1 "cgen_h_sint_8a1_immediate" "") - ] 3958))] + ] 3946))] "CGEN_ENABLE_INSN_P (831)" "mov\\t%0,%1" [(set_attr "may_trap" "no") @@ -28373,7 +20581,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") - ] 3956))] + ] 3944))] "CGEN_ENABLE_INSN_P (832)" "mov\\t%0,%1" [(set_attr "may_trap" "no") @@ -28388,7 +20596,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:SI 1 "general_operand" "r") - ] 3960))] + ] 3948))] "CGEN_ENABLE_INSN_P (833)" "mov\\t%0,%1" [(set_attr "may_trap" "no") @@ -28404,12 +20612,12 @@ (unspec:SI [ (match_operand:SI 0 "cgen_h_sint_2a1_immediate" "") (match_operand:SI 1 "general_operand" "r") - ] 3962)) - (set (reg:SI 140) + ] 3950)) + (set (reg:SI 122) (unspec:SI [ (match_dup 0) (match_dup 1) - ] 3963))] + ] 3951))] "CGEN_ENABLE_INSN_P (834)" "ssarb\\t%0(%1)" [(set_attr "may_trap" "no") @@ -28424,7 +20632,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:SI 1 "general_operand" "0") - ] 3964))] + ] 3952))] "CGEN_ENABLE_INSN_P (835)" "extuh\\t%1" [(set_attr "may_trap" "no") @@ -28439,7 +20647,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:SI 1 "general_operand" "0") - ] 3966))] + ] 3954))] "CGEN_ENABLE_INSN_P (836)" "extub\\t%1" [(set_attr "may_trap" "no") @@ -28454,7 +20662,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:SI 1 "general_operand" "0") - ] 3968))] + ] 3956))] "CGEN_ENABLE_INSN_P (837)" "exth\\t%1" [(set_attr "may_trap" "no") @@ -28469,7 +20677,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec:SI [ (match_operand:SI 1 "general_operand" "0") - ] 3970))] + ] 3958))] "CGEN_ENABLE_INSN_P (838)" "extb\\t%1" [(set_attr "may_trap" "no") @@ -28485,7 +20693,7 @@ (unspec:SI [ (match_operand:SI 1 "cgen_h_uint_22a4_immediate" "") (mem:SI (scratch:SI)) - ] 3972))] + ] 3960))] "CGEN_ENABLE_INSN_P (839)" "lw\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -28501,7 +20709,7 @@ (unspec:SI [ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "cgen_h_uint_22a4_immediate" "") - ] 3974))] + ] 3962))] "CGEN_ENABLE_INSN_P (840)" "sw\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -28518,7 +20726,7 @@ (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") (mem:SI (scratch:SI)) - ] 3976))] + ] 3964))] "CGEN_ENABLE_INSN_P (841)" "lhu\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -28535,7 +20743,7 @@ (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") (mem:SI (scratch:SI)) - ] 3978))] + ] 3966))] "CGEN_ENABLE_INSN_P (842)" "lbu\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -28552,7 +20760,7 @@ (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") (mem:SI (scratch:SI)) - ] 3980))] + ] 3968))] "CGEN_ENABLE_INSN_P (843)" "lw\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -28569,7 +20777,7 @@ (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") (mem:SI (scratch:SI)) - ] 3982))] + ] 3970))] "CGEN_ENABLE_INSN_P (844)" "lh\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -28586,7 +20794,7 @@ (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") (mem:SI (scratch:SI)) - ] 3984))] + ] 3972))] "CGEN_ENABLE_INSN_P (845)" "lb\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -28603,7 +20811,7 @@ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") - ] 3986))] + ] 3974))] "CGEN_ENABLE_INSN_P (846)" "sw\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -28620,7 +20828,7 @@ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") - ] 3988))] + ] 3976))] "CGEN_ENABLE_INSN_P (847)" "sh\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -28637,7 +20845,7 @@ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") - ] 3990))] + ] 3978))] "CGEN_ENABLE_INSN_P (848)" "sb\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -28654,7 +20862,7 @@ (match_operand:SI 1 "cgen_h_uint_6a2_immediate" "") (reg:SI 13) (mem:SI (scratch:SI)) - ] 3992))] + ] 3980))] "CGEN_ENABLE_INSN_P (849)" "lhu\\t%0,%1($tp)" [(set_attr "may_trap" "no") @@ -28671,7 +20879,7 @@ (match_operand:SI 1 "cgen_h_uint_7a1_immediate" "") (reg:SI 13) (mem:SI (scratch:SI)) - ] 3994))] + ] 3982))] "CGEN_ENABLE_INSN_P (850)" "lbu\\t%0,%1($tp)" [(set_attr "may_trap" "no") @@ -28688,7 +20896,7 @@ (match_operand:SI 1 "cgen_h_uint_5a4_immediate" "") (reg:SI 13) (mem:SI (scratch:SI)) - ] 3996))] + ] 3984))] "CGEN_ENABLE_INSN_P (851)" "lw\\t%0,%1($tp)" [(set_attr "may_trap" "no") @@ -28705,7 +20913,7 @@ (match_operand:SI 1 "cgen_h_uint_6a2_immediate" "") (reg:SI 13) (mem:SI (scratch:SI)) - ] 3998))] + ] 3986))] "CGEN_ENABLE_INSN_P (852)" "lh\\t%0,%1($tp)" [(set_attr "may_trap" "no") @@ -28722,7 +20930,7 @@ (match_operand:SI 1 "cgen_h_uint_7a1_immediate" "") (reg:SI 13) (mem:SI (scratch:SI)) - ] 4000))] + ] 3988))] "CGEN_ENABLE_INSN_P (853)" "lb\\t%0,%1($tp)" [(set_attr "may_trap" "no") @@ -28739,7 +20947,7 @@ (match_operand:SI 0 "general_operand" "t") (match_operand:SI 1 "cgen_h_uint_5a4_immediate" "") (reg:SI 13) - ] 4002))] + ] 3990))] "CGEN_ENABLE_INSN_P (854)" "sw\\t%0,%1($tp)" [(set_attr "may_trap" "no") @@ -28756,7 +20964,7 @@ (match_operand:SI 0 "general_operand" "t") (match_operand:SI 1 "cgen_h_uint_6a2_immediate" "") (reg:SI 13) - ] 4004))] + ] 3992))] "CGEN_ENABLE_INSN_P (855)" "sh\\t%0,%1($tp)" [(set_attr "may_trap" "no") @@ -28773,7 +20981,7 @@ (match_operand:SI 0 "general_operand" "t") (match_operand:SI 1 "cgen_h_uint_7a1_immediate" "") (reg:SI 13) - ] 4006))] + ] 3994))] "CGEN_ENABLE_INSN_P (856)" "sb\\t%0,%1($tp)" [(set_attr "may_trap" "no") @@ -28790,7 +20998,7 @@ (match_operand:SI 1 "cgen_h_uint_5a4_immediate" "") (reg:SI 15) (mem:SI (scratch:SI)) - ] 4008))] + ] 3996))] "CGEN_ENABLE_INSN_P (857)" "lw\\t%0,%1($sp)" [(set_attr "may_trap" "no") @@ -28807,7 +21015,7 @@ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "cgen_h_uint_5a4_immediate" "") (reg:SI 15) - ] 4010))] + ] 3998))] "CGEN_ENABLE_INSN_P (858)" "sw\\t%0,%1($sp)" [(set_attr "may_trap" "no") @@ -28823,7 +21031,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (mem:SI (scratch:SI)) - ] 4012))] + ] 4000))] "CGEN_ENABLE_INSN_P (859)" "lhu\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -28839,7 +21047,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (mem:SI (scratch:SI)) - ] 4014))] + ] 4002))] "CGEN_ENABLE_INSN_P (860)" "lbu\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -28855,7 +21063,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (mem:SI (scratch:SI)) - ] 4016))] + ] 4004))] "CGEN_ENABLE_INSN_P (861)" "lw\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -28871,7 +21079,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (mem:SI (scratch:SI)) - ] 4018))] + ] 4006))] "CGEN_ENABLE_INSN_P (862)" "lh\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -28887,7 +21095,7 @@ (unspec:SI [ (match_operand:SI 1 "general_operand" "r") (mem:SI (scratch:SI)) - ] 4020))] + ] 4008))] "CGEN_ENABLE_INSN_P (863)" "lb\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -28903,7 +21111,7 @@ (unspec:SI [ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "general_operand" "r") - ] 4022))] + ] 4010))] "CGEN_ENABLE_INSN_P (864)" "sw\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -28919,7 +21127,7 @@ (unspec:SI [ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "general_operand" "r") - ] 4024))] + ] 4012))] "CGEN_ENABLE_INSN_P (865)" "sh\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -28935,7 +21143,7 @@ (unspec:SI [ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "general_operand" "r") - ] 4026))] + ] 4014))] "CGEN_ENABLE_INSN_P (866)" "sb\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -28951,7 +21159,7 @@ (unspec_volatile:SI [ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "cgen_h_uint_20a1_immediate" "") - ] 4028))] + ] 4016))] "CGEN_ENABLE_INSN_P (867)" "dsp1\\t%1,%2" [(set_attr "may_trap" "no") @@ -28965,7 +21173,7 @@ (define_insn "cgen_intrinsic_dsp0" [(unspec_volatile [ (match_operand:SI 0 "cgen_h_uint_24a1_immediate" "") - ] 4030)] + ] 4018)] "CGEN_ENABLE_INSN_P (868)" "dsp0\\t%0" [(set_attr "may_trap" "no") @@ -28982,7 +21190,7 @@ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") (match_operand:SI 3 "cgen_h_uint_16a1_immediate" "") - ] 4032))] + ] 4020))] "CGEN_ENABLE_INSN_P (869)" "dsp\\t%1,%2,%3" [(set_attr "may_trap" "no") @@ -28999,7 +21207,7 @@ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") (match_operand:SI 3 "cgen_h_uint_16a1_immediate" "") - ] 4034))] + ] 4022))] "CGEN_ENABLE_INSN_P (870)" "uci\\t%1,%2,%3" [(set_attr "may_trap" "no") @@ -29018,7 +21226,7 @@ (reg:SI 31) (reg:SI 30) (mem:SI (scratch:SI)) - ] 4036)) + ] 4024)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) @@ -29026,7 +21234,7 @@ (reg:SI 31) (reg:SI 30) (mem:SI (scratch:SI)) - ] 4038))] + ] 4026))] "CGEN_ENABLE_INSN_P (871)" "lhucpm1\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -29045,7 +21253,7 @@ (reg:SI 31) (reg:SI 30) (mem:SI (scratch:SI)) - ] 4040)) + ] 4028)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) @@ -29053,7 +21261,7 @@ (reg:SI 31) (reg:SI 30) (mem:SI (scratch:SI)) - ] 4042))] + ] 4030))] "CGEN_ENABLE_INSN_P (872)" "lbucpm1\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -29072,7 +21280,7 @@ (reg:SI 29) (reg:SI 28) (mem:SI (scratch:SI)) - ] 4044)) + ] 4032)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) @@ -29080,7 +21288,7 @@ (reg:SI 29) (reg:SI 28) (mem:SI (scratch:SI)) - ] 4046))] + ] 4034))] "CGEN_ENABLE_INSN_P (873)" "lhucpm0\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -29099,7 +21307,7 @@ (reg:SI 29) (reg:SI 28) (mem:SI (scratch:SI)) - ] 4048)) + ] 4036)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) @@ -29107,7 +21315,7 @@ (reg:SI 29) (reg:SI 28) (mem:SI (scratch:SI)) - ] 4050))] + ] 4038))] "CGEN_ENABLE_INSN_P (874)" "lbucpm0\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -29124,13 +21332,13 @@ (match_operand:SI 2 "general_operand" "1") (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (mem:SI (scratch:SI)) - ] 4052)) + ] 4040)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) (match_dup 3) (mem:SI (scratch:SI)) - ] 4054))] + ] 4042))] "CGEN_ENABLE_INSN_P (875)" "lhucpa\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -29147,13 +21355,13 @@ (match_operand:SI 2 "general_operand" "1") (match_operand:SI 3 "cgen_h_sint_10a1_immediate" "") (mem:SI (scratch:SI)) - ] 4056)) + ] 4044)) (set (match_operand:SI 1 "nonimmediate_operand" "=r") (unspec:SI [ (match_dup 2) (match_dup 3) (mem:SI (scratch:SI)) - ] 4058))] + ] 4046))] "CGEN_ENABLE_INSN_P (876)" "lbucpa\\t%0,(%2+),%3" [(set_attr "may_trap" "no") @@ -29170,7 +21378,7 @@ (match_operand:SI 1 "cgen_h_sint_12a1_immediate" "") (match_operand:SI 2 "general_operand" "r") (mem:SI (scratch:SI)) - ] 4060))] + ] 4048))] "CGEN_ENABLE_INSN_P (877)" "lhucp\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -29187,7 +21395,7 @@ (match_operand:SI 1 "cgen_h_sint_12a1_immediate" "") (match_operand:SI 2 "general_operand" "r") (mem:SI (scratch:SI)) - ] 4062))] + ] 4050))] "CGEN_ENABLE_INSN_P (878)" "lhcp\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -29204,7 +21412,7 @@ (match_operand:SI 0 "general_operand" "em") (match_operand:SI 1 "cgen_h_sint_12a1_immediate" "") (match_operand:SI 2 "general_operand" "r") - ] 4064))] + ] 4052))] "CGEN_ENABLE_INSN_P (879)" "shcp\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -29221,7 +21429,7 @@ (match_operand:SI 1 "cgen_h_sint_12a1_immediate" "") (match_operand:SI 2 "general_operand" "r") (mem:SI (scratch:SI)) - ] 4066))] + ] 4054))] "CGEN_ENABLE_INSN_P (880)" "lbucp\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -29238,7 +21446,7 @@ (match_operand:SI 1 "cgen_h_sint_12a1_immediate" "") (match_operand:SI 2 "general_operand" "r") (mem:SI (scratch:SI)) - ] 4068))] + ] 4056))] "CGEN_ENABLE_INSN_P (881)" "lbcp\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -29255,7 +21463,7 @@ (match_operand:SI 0 "general_operand" "em") (match_operand:SI 1 "cgen_h_sint_12a1_immediate" "") (match_operand:SI 2 "general_operand" "r") - ] 4070))] + ] 4058))] "CGEN_ENABLE_INSN_P (882)" "sbcp\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -29272,7 +21480,7 @@ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") (match_operand:SI 3 "general_operand" "r") - ] 4072))] + ] 4060))] "CGEN_ENABLE_INSN_P (883)" "casw3\\t%1,%2,(%3)" [(set_attr "may_trap" "no") @@ -29289,7 +21497,7 @@ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") (match_operand:SI 3 "general_operand" "r") - ] 4074))] + ] 4062))] "CGEN_ENABLE_INSN_P (884)" "cash3\\t%1,%2,(%3)" [(set_attr "may_trap" "no") @@ -29306,7 +21514,7 @@ (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r") (match_operand:SI 3 "general_operand" "r") - ] 4076))] + ] 4064))] "CGEN_ENABLE_INSN_P (885)" "casb3\\t%1,%2,(%3)" [(set_attr "may_trap" "no") @@ -29322,7 +21530,7 @@ (match_operand:SI 0 "cgen_h_uint_4a1_immediate" "") (match_operand:SI 1 "cgen_h_sint_16a1_immediate" "") (match_operand:SI 2 "general_operand" "r") - ] 4078)] + ] 4066)] "CGEN_ENABLE_INSN_P (886)" "pref\\t%0,%1(%2)" [(set_attr "may_trap" "no") @@ -29337,7 +21545,7 @@ [(unspec_volatile [ (match_operand:SI 0 "cgen_h_uint_4a1_immediate" "") (match_operand:SI 1 "general_operand" "r") - ] 4080)] + ] 4068)] "CGEN_ENABLE_INSN_P (887)" "pref\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -29352,7 +21560,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (unspec_volatile:SI [ (match_operand:SI 1 "general_operand" "r") - ] 4082))] + ] 4070))] "CGEN_ENABLE_INSN_P (888)" "ldcb\\t%0,(%1)" [(set_attr "may_trap" "no") @@ -29367,7 +21575,7 @@ [(unspec_volatile [ (match_operand:SI 0 "general_operand" "r") (match_operand:SI 1 "general_operand" "r") - ] 4084)] + ] 4072)] "CGEN_ENABLE_INSN_P (889)" "stcb\\t%0,(%1)" [(set_attr "may_trap" "no") diff --git a/gcc/config/mep/mep-intrin.h b/gcc/config/mep/mep-intrin.h index 8af4cb1ed02..cfefde8dbc5 100644 --- a/gcc/config/mep/mep-intrin.h +++ b/gcc/config/mep/mep-intrin.h @@ -5,88 +5,88 @@ #ifdef WANT_GCC_DECLARATIONS #define FIRST_SHADOW_REGISTER 113 -#define LAST_SHADOW_REGISTER 140 +#define LAST_SHADOW_REGISTER 122 #define FIXED_SHADOW_REGISTERS \ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 #define CALL_USED_SHADOW_REGISTERS FIXED_SHADOW_REGISTERS #define SHADOW_REG_ALLOC_ORDER \ - 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140 + 113, 114, 115, 116, 117, 118, 119, 120, 121, 122 #define SHADOW_REGISTER_NAMES \ - "$shadow87", "$shadow107", "$shadow106", "$shadow105", "$shadow104", "$shadow111", "$shadow110", "$shadow109", "$shadow108", "$shadow84", "$shadow81", "$shadow86", "$shadow99", "$shadow98", "$shadow97", "$shadow96", "$shadow103", "$shadow102", "$shadow101", "$shadow100", "$shadow17", "$shadow40", "$shadow24", "$shadow23", "$shadow22", "$shadow21", "$shadow20", "$shadow18" + "$shadow84", "$shadow81", "$shadow17", "$shadow40", "$shadow24", "$shadow23", "$shadow22", "$shadow21", "$shadow20", "$shadow18" #ifndef __MEP__ enum { - mep_fcmpleis = 597, - mep_fcmplis = 599, - mep_fcmpes = 601, - mep_fcmpules = 603, - mep_fcmpuls = 605, - mep_fcmpues = 607, - mep_fcmpus = 609, - mep_fcvtsw = 611, - mep_ftruncws = 613, - mep_fnegs = 615, - mep_fabss = 617, - mep_fsqrts = 619, - mep_fdivs = 621, - mep_fmuls = 623, - mep_fsubs = 625, - mep_fadds = 627, - mep_fmovs = 629, - mep_cextb = 630, - mep_cexth = 631, - mep_cextub = 632, - mep_cextuh = 633, - mep_xmula0 = 634, - mep_cmula0 = 635, - mep_cneg = 636, - mep_cmovh2 = 638, - mep_cmovh1 = 639, - mep_cmovc2 = 640, - mep_cmovc1 = 641, - mep_cmov2 = 642, - mep_cmov1 = 643, - mep_cmovi = 644, - mep_cpmov = 646, - mep_cmov = 647, - mep_csrai3 = 648, - mep_csrai = 650, - mep_csra3 = 652, - mep_csra = 654, - mep_csrli3 = 656, - mep_csrli = 658, - mep_csrl3 = 660, - mep_csrl = 662, - mep_cslli3 = 664, - mep_cslli = 666, - mep_csll3 = 668, - mep_csll = 670, - mep_cxori3 = 672, - mep_cxori = 674, - mep_cxor3 = 676, - mep_cxor = 678, - mep_cnori3 = 680, - mep_cnori = 682, - mep_cnor3 = 684, - mep_cnor = 686, - mep_cori3 = 688, - mep_cori = 690, - mep_cor3 = 692, - mep_cor = 694, - mep_candi3 = 696, - mep_candi = 698, - mep_cand3 = 700, - mep_cand = 702, - mep_csubi3 = 704, - mep_csubi = 706, - mep_csub3 = 708, - mep_csub = 710, - mep_caddi3 = 712, - mep_caddi = 714, - mep_cadd3 = 716, - mep_cadd = 718 + mep_fcmpleis = 591, + mep_fcmplis = 593, + mep_fcmpes = 595, + mep_fcmpules = 597, + mep_fcmpuls = 599, + mep_fcmpues = 601, + mep_fcmpus = 603, + mep_fcvtsw = 605, + mep_ftruncws = 607, + mep_fnegs = 609, + mep_fabss = 611, + mep_fsqrts = 613, + mep_fdivs = 615, + mep_fmuls = 617, + mep_fsubs = 619, + mep_fadds = 621, + mep_fmovs = 623, + mep_cextb = 624, + mep_cexth = 625, + mep_cextub = 626, + mep_cextuh = 627, + mep_xmula0 = 628, + mep_cmula0 = 629, + mep_cneg = 630, + mep_cmovh2 = 632, + mep_cmovh1 = 633, + mep_cmovc2 = 634, + mep_cmovc1 = 635, + mep_cmov2 = 636, + mep_cmov1 = 637, + mep_cmovi = 638, + mep_cpmov = 640, + mep_cmov = 641, + mep_csrai3 = 642, + mep_csrai = 644, + mep_csra3 = 646, + mep_csra = 648, + mep_csrli3 = 650, + mep_csrli = 652, + mep_csrl3 = 654, + mep_csrl = 656, + mep_cslli3 = 658, + mep_cslli = 660, + mep_csll3 = 662, + mep_csll = 664, + mep_cxori3 = 666, + mep_cxori = 668, + mep_cxor3 = 670, + mep_cxor = 672, + mep_cnori3 = 674, + mep_cnori = 676, + mep_cnor3 = 678, + mep_cnor = 680, + mep_cori3 = 682, + mep_cori = 684, + mep_cor3 = 686, + mep_cor = 688, + mep_candi3 = 690, + mep_candi = 692, + mep_cand3 = 694, + mep_cand = 696, + mep_csubi3 = 698, + mep_csubi = 700, + mep_csub3 = 702, + mep_csub = 704, + mep_caddi3 = 706, + mep_caddi = 708, + mep_cadd3 = 710, + mep_cadd = 712 }; #endif /* ! defined (__MEP__) */ @@ -591,12 +591,6 @@ const char *const cgen_intrinsics[] = { "mep_cpadd3_w", "mep_cpadd3_h", "mep_cpadd3_b", - "mep_cmovh_rn_crm_p0", - "mep_cmovh_crn_rm_p0", - "mep_cmovc_rn_ccrm_p0", - "mep_cmovc_ccrn_rm_p0", - "mep_cmov_rn_crm_p0", - "mep_cmov_crn_rm_p0", "mep_bsrv", "mep_jsrv", "mep_synccp", @@ -6757,7 +6751,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_V8QI, 1 }, { 0, 0, cgen_regnum_operand_type_V8QI, 0 } }, 4 }, - { 646, + { 640, ISA_EXT1, GROUP_NORMAL, CODE_FOR_cgen_intrinsic_cpmov_C3, @@ -6766,7 +6760,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 1 }, { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 } }, 4 }, - { 646, + { 640, ISA_EXT1|ISA_EXT1, GROUP_VLIW, CODE_FOR_cgen_intrinsic_cpmov_P0S_P1, @@ -7009,7 +7003,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_V4UHI, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 638, + { 632, ISA_EXT1, GROUP_NORMAL, CODE_FOR_cgen_intrinsic_cmovh_rn_crm, @@ -7018,16 +7012,16 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 } }, 4 }, - { 389, + { 632, ISA_EXT1, GROUP_VLIW, CODE_FOR_cgen_intrinsic_cmovh_rn_crm_p0, 2, 0, { 0, 1 }, - { { 16, 0, cgen_regnum_operand_type_DEFAULT, 0 }, { 32, 48, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 } }, + { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 } }, 4 }, - { 639, + { 633, ISA_EXT1, GROUP_NORMAL, CODE_FOR_cgen_intrinsic_cmovh_crn_rm, @@ -7036,16 +7030,16 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 390, + { 633, ISA_EXT1, GROUP_VLIW, CODE_FOR_cgen_intrinsic_cmovh_crn_rm_p0, 2, 0, { 0, 0, 1 }, - { { 32, 48, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 }, { 16, 0, cgen_regnum_operand_type_DEFAULT, 0 } }, + { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 640, + { 634, ISA_EXT1, GROUP_NORMAL, CODE_FOR_cgen_intrinsic_cmovc_rn_ccrm, @@ -7054,16 +7048,16 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 64, 80, cgen_regnum_operand_type_DEFAULT, 0 } }, 4 }, - { 391, + { 634, ISA_EXT1, GROUP_VLIW, CODE_FOR_cgen_intrinsic_cmovc_rn_ccrm_p0, 2, 0, { 0, 1 }, - { { 16, 0, cgen_regnum_operand_type_DEFAULT, 0 }, { 64, 80, cgen_regnum_operand_type_DEFAULT, 0 } }, + { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 64, 80, cgen_regnum_operand_type_DEFAULT, 0 } }, 4 }, - { 641, + { 635, ISA_EXT1, GROUP_NORMAL, CODE_FOR_cgen_intrinsic_cmovc_ccrn_rm, @@ -7072,16 +7066,16 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 64, 80, cgen_regnum_operand_type_DEFAULT, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 392, + { 635, ISA_EXT1, GROUP_VLIW, CODE_FOR_cgen_intrinsic_cmovc_ccrn_rm_p0, 2, 0, { 0, 1 }, - { { 64, 80, cgen_regnum_operand_type_DEFAULT, 0 }, { 16, 0, cgen_regnum_operand_type_DEFAULT, 0 } }, + { { 64, 80, cgen_regnum_operand_type_DEFAULT, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 642, + { 636, ISA_EXT1, GROUP_NORMAL, CODE_FOR_cgen_intrinsic_cmov_rn_crm, @@ -7090,16 +7084,16 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 } }, 4 }, - { 393, + { 636, ISA_EXT1, GROUP_VLIW, CODE_FOR_cgen_intrinsic_cmov_rn_crm_p0, 2, 0, { 0, 1 }, - { { 16, 0, cgen_regnum_operand_type_DEFAULT, 0 }, { 32, 48, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 } }, + { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 } }, 4 }, - { 643, + { 637, ISA_EXT1, GROUP_NORMAL, CODE_FOR_cgen_intrinsic_cmov_crn_rm, @@ -7108,16 +7102,16 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 394, + { 637, ISA_EXT1, GROUP_VLIW, CODE_FOR_cgen_intrinsic_cmov_crn_rm_p0, 2, 0, { 0, 1 }, - { { 32, 48, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 }, { 16, 0, cgen_regnum_operand_type_DEFAULT, 0 } }, + { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 395, + { 389, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bsrv, @@ -7126,7 +7120,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 396, + { 390, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_jsrv, @@ -7135,7 +7129,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 397, + { 391, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_synccp, @@ -7144,7 +7138,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_DEFAULT, 0} }, 2 }, - { 398, + { 392, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bcpaf, @@ -7153,7 +7147,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 399, + { 393, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bcpat, @@ -7162,7 +7156,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 400, + { 394, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bcpne, @@ -7171,7 +7165,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 401, + { 395, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bcpeq, @@ -7180,7 +7174,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 402, + { 396, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lmcpm1, @@ -7189,7 +7183,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 403, + { 397, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_smcpm1, @@ -7198,7 +7192,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 404, + { 398, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lwcpm1, @@ -7207,7 +7201,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 405, + { 399, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_swcpm1, @@ -7216,7 +7210,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 406, + { 400, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lhcpm1, @@ -7225,7 +7219,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 407, + { 401, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_shcpm1, @@ -7234,7 +7228,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 408, + { 402, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lbcpm1, @@ -7243,7 +7237,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 409, + { 403, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sbcpm1, @@ -7252,7 +7246,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 410, + { 404, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lmcpm0, @@ -7261,7 +7255,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 411, + { 405, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_smcpm0, @@ -7270,7 +7264,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 412, + { 406, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lwcpm0, @@ -7279,7 +7273,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 413, + { 407, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_swcpm0, @@ -7288,7 +7282,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 414, + { 408, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lhcpm0, @@ -7297,7 +7291,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 415, + { 409, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_shcpm0, @@ -7306,7 +7300,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 416, + { 410, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lbcpm0, @@ -7315,7 +7309,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 417, + { 411, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sbcpm0, @@ -7324,7 +7318,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 418, + { 412, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lmcpa, @@ -7333,7 +7327,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 419, + { 413, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_smcpa, @@ -7342,7 +7336,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 420, + { 414, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lwcpa, @@ -7351,7 +7345,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 421, + { 415, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_swcpa, @@ -7360,7 +7354,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 422, + { 416, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lhcpa, @@ -7369,7 +7363,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 423, + { 417, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_shcpa, @@ -7378,7 +7372,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 424, + { 418, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lbcpa, @@ -7387,7 +7381,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 425, + { 419, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sbcpa, @@ -7396,7 +7390,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 426, + { 420, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lmcp16, @@ -7405,7 +7399,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 427, + { 421, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_smcp16, @@ -7414,7 +7408,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 428, + { 422, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lwcp16, @@ -7423,7 +7417,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 429, + { 423, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_swcp16, @@ -7432,7 +7426,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 430, + { 424, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lmcpi, @@ -7441,7 +7435,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 } }, 2 }, - { 431, + { 425, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_smcpi, @@ -7450,7 +7444,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 } }, 2 }, - { 432, + { 426, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lwcpi, @@ -7459,7 +7453,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 } }, 2 }, - { 433, + { 427, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_swcpi, @@ -7468,7 +7462,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 } }, 2 }, - { 434, + { 428, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lmcp, @@ -7477,7 +7471,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 435, + { 429, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_smcp, @@ -7486,7 +7480,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_CP_DATA_BUS_INT, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 436, + { 430, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lwcp, @@ -7495,7 +7489,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 437, + { 431, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_swcp, @@ -7504,7 +7498,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 438, + { 432, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ssubu, @@ -7513,7 +7507,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 439, + { 433, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_saddu, @@ -7522,7 +7516,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 440, + { 434, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ssub, @@ -7531,7 +7525,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 441, + { 435, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sadd, @@ -7540,7 +7534,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 442, + { 436, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_clipu, @@ -7549,7 +7543,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 443, + { 437, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_clip, @@ -7558,7 +7552,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 444, + { 438, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_maxu, @@ -7567,7 +7561,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 445, + { 439, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_minu, @@ -7576,7 +7570,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 446, + { 440, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_max, @@ -7585,7 +7579,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 447, + { 441, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_min, @@ -7594,7 +7588,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 448, + { 442, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ave, @@ -7603,7 +7597,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 449, + { 443, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_abs, @@ -7612,7 +7606,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 450, + { 444, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ldz, @@ -7621,7 +7615,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 451, + { 445, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_dbreak, @@ -7630,7 +7624,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_DEFAULT, 0} }, 2 }, - { 452, + { 446, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_dret, @@ -7639,7 +7633,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_DEFAULT, 0} }, 2 }, - { 453, + { 447, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_divu, @@ -7648,7 +7642,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 454, + { 448, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_div, @@ -7657,7 +7651,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 455, + { 449, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_maddru, @@ -7666,7 +7660,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 456, + { 450, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_maddr, @@ -7675,7 +7669,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 457, + { 451, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_maddu, @@ -7684,7 +7678,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 458, + { 452, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_madd, @@ -7693,7 +7687,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 459, + { 453, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_mulru, @@ -7702,7 +7696,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 460, + { 454, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_mulr, @@ -7711,7 +7705,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 461, + { 455, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_mulu, @@ -7720,7 +7714,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 462, + { 456, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_mul, @@ -7729,7 +7723,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 463, + { 457, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_cache, @@ -7738,7 +7732,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 464, + { 458, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_tas, @@ -7747,7 +7741,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 465, + { 459, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_btstm, @@ -7756,7 +7750,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 466, + { 460, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bnotm, @@ -7765,7 +7759,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_POINTER, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 467, + { 461, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bclrm, @@ -7774,7 +7768,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_POINTER, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 468, + { 462, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bsetm, @@ -7783,7 +7777,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_POINTER, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 469, + { 463, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ldcb, @@ -7792,7 +7786,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 470, + { 464, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_stcb, @@ -7801,7 +7795,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 471, + { 465, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_syncm, @@ -7810,7 +7804,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_DEFAULT, 0} }, 2 }, - { 472, + { 466, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_break, @@ -7819,7 +7813,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_DEFAULT, 0} }, 2 }, - { 473, + { 467, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_swi, @@ -7828,7 +7822,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 474, + { 468, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sleep, @@ -7837,7 +7831,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_DEFAULT, 0} }, 2 }, - { 475, + { 469, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_halt, @@ -7846,7 +7840,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_DEFAULT, 0} }, 2 }, - { 476, + { 470, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_reti, @@ -7855,7 +7849,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_DEFAULT, 0} }, 2 }, - { 477, + { 471, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ei, @@ -7864,7 +7858,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_DEFAULT, 0} }, 2 }, - { 478, + { 472, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_di, @@ -7873,7 +7867,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_DEFAULT, 0} }, 2 }, - { 479, + { 473, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ldc, @@ -7882,7 +7876,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 32, 16, cgen_regnum_operand_type_DEFAULT, 0 } }, 2 }, - { 480, + { 474, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ldc_lo, @@ -7891,7 +7885,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 } }, 2 }, - { 481, + { 475, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ldc_hi, @@ -7900,7 +7894,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 } }, 2 }, - { 482, + { 476, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ldc_lp, @@ -7909,7 +7903,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 } }, 2 }, - { 483, + { 477, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_stc, @@ -7918,7 +7912,7 @@ const struct cgen_insn cgen_insns[] = { { 1, 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 32, 16, cgen_regnum_operand_type_DEFAULT, 0 } }, 2 }, - { 484, + { 478, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_stc_lo, @@ -7927,7 +7921,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 485, + { 479, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_stc_hi, @@ -7936,7 +7930,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 486, + { 480, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_stc_lp, @@ -7945,7 +7939,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 487, + { 481, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_erepeat, @@ -7954,7 +7948,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 488, + { 482, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_repeat, @@ -7963,7 +7957,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 489, + { 483, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ret, @@ -7972,7 +7966,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_DEFAULT, 0} }, 2 }, - { 490, + { 484, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_jsr, @@ -7981,7 +7975,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 491, + { 485, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_jmp24, @@ -7990,7 +7984,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 492, + { 486, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_jmp, @@ -7999,7 +7993,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 494, + { 488, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bsr12, @@ -8008,7 +8002,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 2 }, - { 493, + { 487, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bsr24, @@ -8017,7 +8011,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 495, + { 489, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bne, @@ -8026,7 +8020,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 496, + { 490, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_beq, @@ -8035,7 +8029,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 497, + { 491, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bgei, @@ -8044,7 +8038,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 498, + { 492, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_blti, @@ -8053,7 +8047,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 499, + { 493, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bnei, @@ -8062,7 +8056,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 500, + { 494, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_beqi, @@ -8071,7 +8065,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 4 }, - { 501, + { 495, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bnez, @@ -8080,7 +8074,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 2 }, - { 502, + { 496, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_beqz, @@ -8089,7 +8083,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 2 }, - { 503, + { 497, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_bra, @@ -8098,7 +8092,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LABEL, 0 } }, 2 }, - { 504, + { 498, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_fsft, @@ -8107,7 +8101,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 505, + { 499, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sll3, @@ -8116,7 +8110,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 506, + { 500, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_slli, @@ -8125,7 +8119,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 507, + { 501, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_srli, @@ -8134,7 +8128,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 508, + { 502, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_srai, @@ -8143,7 +8137,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 509, + { 503, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sll, @@ -8152,7 +8146,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 510, + { 504, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_srl, @@ -8161,7 +8155,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 511, + { 505, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sra, @@ -8170,7 +8164,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 512, + { 506, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_xor3, @@ -8179,7 +8173,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 513, + { 507, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_and3, @@ -8188,7 +8182,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 514, + { 508, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_or3, @@ -8197,7 +8191,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 515, + { 509, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_nor, @@ -8206,7 +8200,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 516, + { 510, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_xor, @@ -8215,7 +8209,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 517, + { 511, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_and, @@ -8224,7 +8218,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 518, + { 512, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_or, @@ -8233,7 +8227,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 519, + { 513, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sltu3x, @@ -8242,7 +8236,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 520, + { 514, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_slt3x, @@ -8251,7 +8245,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 521, + { 515, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_add3x, @@ -8260,7 +8254,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 522, + { 516, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sl2ad3, @@ -8269,7 +8263,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 523, + { 517, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sl1ad3, @@ -8278,7 +8272,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 524, + { 518, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sltu3i, @@ -8287,7 +8281,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 525, + { 519, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_slt3i, @@ -8296,7 +8290,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 526, + { 520, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sltu3, @@ -8305,7 +8299,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 527, + { 521, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_slt3, @@ -8314,7 +8308,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 528, + { 522, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_neg, @@ -8323,7 +8317,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 529, + { 523, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sbvck3, @@ -8332,7 +8326,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 530, + { 524, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sub, @@ -8341,7 +8335,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 531, + { 525, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_advck3, @@ -8350,7 +8344,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 532, + { 526, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_add3i, @@ -8359,7 +8353,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 533, + { 527, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_add, @@ -8368,7 +8362,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 534, + { 528, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_add3, @@ -8377,7 +8371,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 535, + { 529, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_movh, @@ -8386,7 +8380,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 536, + { 530, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_movu16, @@ -8395,7 +8389,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 537, + { 531, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_movu24, @@ -8404,7 +8398,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 539, + { 533, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_movi8, @@ -8413,7 +8407,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 538, + { 532, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_movi16, @@ -8422,7 +8416,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 540, + { 534, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_mov, @@ -8431,7 +8425,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 541, + { 535, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ssarb, @@ -8440,7 +8434,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 542, + { 536, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_extuh, @@ -8449,7 +8443,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 } }, 2 }, - { 543, + { 537, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_extub, @@ -8458,7 +8452,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 } }, 2 }, - { 544, + { 538, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_exth, @@ -8467,7 +8461,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 } }, 2 }, - { 545, + { 539, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_extb, @@ -8476,7 +8470,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 } }, 2 }, - { 546, + { 540, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lw24, @@ -8485,7 +8479,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 547, + { 541, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sw24, @@ -8494,7 +8488,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 548, + { 542, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lhu16, @@ -8503,7 +8497,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 549, + { 543, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lbu16, @@ -8512,7 +8506,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 550, + { 544, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lw16, @@ -8521,7 +8515,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 551, + { 545, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lh16, @@ -8530,7 +8524,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 552, + { 546, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lb16, @@ -8539,7 +8533,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 553, + { 547, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sw16, @@ -8548,7 +8542,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 554, + { 548, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sh16, @@ -8557,7 +8551,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 555, + { 549, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sb16, @@ -8566,7 +8560,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 556, + { 550, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lhu_tp, @@ -8575,7 +8569,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 557, + { 551, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lbu_tp, @@ -8584,7 +8578,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 558, + { 552, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lw_tp, @@ -8593,7 +8587,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 559, + { 553, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lh_tp, @@ -8602,7 +8596,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 560, + { 554, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lb_tp, @@ -8611,7 +8605,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 561, + { 555, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sw_tp, @@ -8620,7 +8614,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 562, + { 556, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sh_tp, @@ -8629,7 +8623,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 563, + { 557, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sb_tp, @@ -8638,7 +8632,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 564, + { 558, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lw_sp, @@ -8647,7 +8641,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 565, + { 559, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sw_sp, @@ -8656,7 +8650,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 2 }, - { 566, + { 560, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lhu, @@ -8665,7 +8659,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 567, + { 561, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lbu, @@ -8674,7 +8668,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 568, + { 562, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lw, @@ -8683,7 +8677,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 569, + { 563, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lh, @@ -8692,7 +8686,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 570, + { 564, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lb, @@ -8701,7 +8695,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 571, + { 565, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sw, @@ -8710,7 +8704,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 572, + { 566, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sh, @@ -8719,7 +8713,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 573, + { 567, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sb, @@ -8728,7 +8722,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 574, + { 568, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_dsp1, @@ -8737,7 +8731,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 575, + { 569, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_dsp0, @@ -8746,7 +8740,7 @@ const struct cgen_insn cgen_insns[] = { { 0 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 576, + { 570, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_dsp, @@ -8755,7 +8749,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 577, + { 571, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_uci, @@ -8764,7 +8758,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 578, + { 572, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lhucpm1, @@ -8773,7 +8767,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 579, + { 573, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lbucpm1, @@ -8782,7 +8776,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 580, + { 574, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lhucpm0, @@ -8791,7 +8785,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 581, + { 575, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lbucpm0, @@ -8800,7 +8794,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 582, + { 576, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lhucpa, @@ -8809,7 +8803,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 583, + { 577, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lbucpa, @@ -8818,7 +8812,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 584, + { 578, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lhucp, @@ -8827,7 +8821,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 585, + { 579, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lhcp, @@ -8836,7 +8830,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 586, + { 580, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_shcp, @@ -8845,7 +8839,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 587, + { 581, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lbucp, @@ -8854,7 +8848,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 588, + { 582, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_lbcp, @@ -8863,7 +8857,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 589, + { 583, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_sbcp, @@ -8872,7 +8866,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_SI, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 590, + { 584, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_casw3, @@ -8881,7 +8875,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 591, + { 585, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_cash3, @@ -8890,7 +8884,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 592, + { 586, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_casb3, @@ -8899,7 +8893,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 } }, 4 }, - { 593, + { 587, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_prefd, @@ -8908,7 +8902,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1, 2 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 4 }, - { 594, + { 588, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_pref, @@ -8917,7 +8911,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 0 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 595, + { 589, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_ldcb_r, @@ -8926,7 +8920,7 @@ const struct cgen_insn cgen_insns[] = { { 0, 1 }, { { 0, 0, cgen_regnum_operand_type_LONG, 1 }, { 0, 0, cgen_regnum_operand_type_POINTER, 0 } }, 2 }, - { 596, + { 590, ISA_MEP|ISA_EXT1, GROUP_NORMAL|GROUP_VLIW, CODE_FOR_cgen_intrinsic_stcb_r, diff --git a/gcc/config/mep/mep-ivc2.cpu b/gcc/config/mep/mep-ivc2.cpu index 68cab5b9a2c..1ae0caca328 100644 --- a/gcc/config/mep/mep-ivc2.cpu +++ b/gcc/config/mep/mep-ivc2.cpu @@ -314,8 +314,8 @@ (ifield f-ivc2-ccrn-lo)))) ) -(dnop ivc2rm "reg Rm" (all-mep-isas (CDATA REGNUM)) h-gpr f-ivc2-crm) -(dnop ivc2crn "copro Rn (0-31, 64-bit" (all-mep-isas (CDATA REGNUM)) h-cr64 f-ivc2-crnx) +(dnop ivc2rm "reg Rm" (all-mep-isas) h-gpr f-ivc2-crm) +(dnop ivc2crn "copro Rn (0-31, 64-bit" (all-mep-isas (CDATA CP_DATA_BUS_INT)) h-cr64 f-ivc2-crnx) (dnop ivc2ccrn "copro control reg CCRn" (all-mep-isas (CDATA REGNUM)) h-ccr-ivc2 f-ivc2-ccrn) (dnop ivc2c3ccrn "copro control reg CCRn" (all-mep-isas (CDATA REGNUM)) h-ccr-ivc2 f-ivc2-ccrn-c3) @@ -393,7 +393,7 @@ ; nnnnmmmm 11110000 0000N000 0000 cmov =crn,rm (dni cmov-crn-rm-p0 "cmov CRn,Rm" - (OPTIONAL_CP_INSN ivc2-p0-isa (SLOTS P0)) + (OPTIONAL_CP_INSN ivc2-p0-isa (SLOTS P0) (INTRINSIC "cmov1")) "cmov $ivc2crn,$ivc2rm" (+ ivc2crn ivc2rm (f-ivc2-cmov1 #xf00) (f-21 0) (f-ivc2-cmov2 #x00) (f-ivc2-cmov3 0)) (set ivc2crn ivc2rm) @@ -403,7 +403,7 @@ ; nnnnmmmm 11110000 0000N001 0000 cmov =rm,crn (dni cmov-rn-crm-p0 "cmov Rm,CRn" - (OPTIONAL_CP_INSN ivc2-p0-isa (SLOTS P0)) + (OPTIONAL_CP_INSN ivc2-p0-isa (SLOTS P0) (INTRINSIC "cmov2")) "cmov $ivc2rm,$ivc2crn" (+ ivc2crn ivc2rm (f-ivc2-cmov1 #xf00) (f-21 0) (f-ivc2-cmov2 #x10) (f-ivc2-cmov3 0)) (set ivc2rm ivc2crn) @@ -413,7 +413,7 @@ ; nnnnmmmm 11110000 0000NN10 0000 cmovc =ccrn,rm (dni cmovc-ccrn-rm-p0 "cmovc CCRn,Rm" - (OPTIONAL_CP_INSN ivc2-p0-isa (SLOTS P0)) + (OPTIONAL_CP_INSN ivc2-p0-isa (SLOTS P0) (INTRINSIC "cmovc1")) "cmovc $ivc2ccrn,$ivc2rm" (+ ivc2ccrn ivc2rm (f-ivc2-cmov1 #xf00) (f-ivc2-cmov2 #x20) (f-ivc2-cmov3 0)) (set ivc2ccrn ivc2rm) @@ -423,7 +423,7 @@ ; nnnnmmmm 11110000 0000NN11 0000 cmovc =rm,ccrn (dni cmovc-rn-ccrm-p0 "cmovc Rm,CCRn" - (OPTIONAL_CP_INSN ivc2-p0-isa (SLOTS P0)) + (OPTIONAL_CP_INSN ivc2-p0-isa (SLOTS P0) (INTRINSIC "cmovc2")) "cmovc $ivc2rm,$ivc2ccrn" (+ ivc2ccrn ivc2rm (f-ivc2-cmov1 #xf00) (f-ivc2-cmov2 #x30) (f-ivc2-cmov3 0)) (set ivc2rm ivc2ccrn) @@ -433,7 +433,7 @@ ; nnnnmmmm 11110001 0000N000 0000 cmovh =crn,rm (dni cmovh-crn-rm-p0 "cmovh CRn,Rm" - (OPTIONAL_CP_INSN ivc2-p0-isa (SLOTS P0)) + (OPTIONAL_CP_INSN ivc2-p0-isa (SLOTS P0) (INTRINSIC "cmovh1")) "cmovh $ivc2crn,$ivc2rm" (+ ivc2crn ivc2rm (f-ivc2-cmov1 #xf10) (f-21 0) (f-ivc2-cmov2 #x00) (f-ivc2-cmov3 0)) (set ivc2crn (or (sll (zext DI ivc2rm) 32) (and DI ivc2crn #xffffffff))) @@ -443,7 +443,7 @@ ; nnnnmmmm 11110001 0000N001 0000 cmovh =rm,crn (dni cmovh-rn-crm-p0 "cmovh Rm,CRn" - (OPTIONAL_CP_INSN ivc2-p0-isa (SLOTS P0)) + (OPTIONAL_CP_INSN ivc2-p0-isa (SLOTS P0) (INTRINSIC "cmovh2")) "cmovh $ivc2rm,$ivc2crn" (+ ivc2crn ivc2rm (f-ivc2-cmov1 #xf10) (f-21 0) (f-ivc2-cmov2 #x10) (f-ivc2-cmov3 0)) (set ivc2rm (srl ivc2crn 32)) @@ -1883,7 +1883,7 @@ ; 1111 0000 0000 0111 10010 qqqqq ppppp 0 cpcmpeqz.b crqc,crpc (c3_1) (dni cpcmpeqz_b_C3 "cpcmpeqz.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpeqz_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpeqz_b") (CPTYPE V8QI) VOLATILE) "cpcmpeqz.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x0) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -1896,7 +1896,7 @@ ; 1111 0000 0001 0111 10010 qqqqq ppppp 0 cpcmpeq.b crqc,crpc (c3_1) (dni cpcmpeq_b_C3 "cpcmpeq.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpeq_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpeq_b") (CPTYPE V8QI) VOLATILE) "cpcmpeq.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -1909,7 +1909,7 @@ ; 1111 0000 0011 0111 10010 qqqqq ppppp 0 cpcmpeq.h crqc,crpc (c3_1) (dni cpcmpeq_h_C3 "cpcmpeq.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpeq_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpeq_h") (CPTYPE V4HI) VOLATILE) "cpcmpeq.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x3) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -1922,7 +1922,7 @@ ; 1111 0000 0101 0111 10010 qqqqq ppppp 0 cpcmpeq.w crqc,crpc (c3_1) (dni cpcmpeq_w_C3 "cpcmpeq.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpeq_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpeq_w") (CPTYPE V2SI) VOLATILE) "cpcmpeq.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x5) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -1935,7 +1935,7 @@ ; 1111 0000 1001 0111 10010 qqqqq ppppp 0 cpcmpne.b crqc,crpc (c3_1) (dni cpcmpne_b_C3 "cpcmpne.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpne_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpne_b") (CPTYPE V8QI) VOLATILE) "cpcmpne.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x9) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -1948,7 +1948,7 @@ ; 1111 0000 1011 0111 10010 qqqqq ppppp 0 cpcmpne.h crqc,crpc (c3_1) (dni cpcmpne_h_C3 "cpcmpne.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpne_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpne_h") (CPTYPE V4HI) VOLATILE) "cpcmpne.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xb) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -1961,7 +1961,7 @@ ; 1111 0000 1101 0111 10010 qqqqq ppppp 0 cpcmpne.w crqc,crpc (c3_1) (dni cpcmpne_w_C3 "cpcmpne.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpne_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpne_w") (CPTYPE V2SI) VOLATILE) "cpcmpne.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xd) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -1974,7 +1974,7 @@ ; 1111 0001 0000 0111 10010 qqqqq ppppp 0 cpcmpgtu.b crqc,crpc (c3_1) (dni cpcmpgtu_b_C3 "cpcmpgtu.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgtu_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgtu_b") (CPTYPE V8UQI) VOLATILE) "cpcmpgtu.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x10) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -1987,7 +1987,7 @@ ; 1111 0001 0001 0111 10010 qqqqq ppppp 0 cpcmpgt.b crqc,crpc (c3_1) (dni cpcmpgt_b_C3 "cpcmpgt.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgt_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgt_b") (CPTYPE V8QI) VOLATILE) "cpcmpgt.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x11) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -2000,7 +2000,7 @@ ; 1111 0001 0011 0111 10010 qqqqq ppppp 0 cpcmpgt.h crqc,crpc (c3_1) (dni cpcmpgt_h_C3 "cpcmpgt.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgt_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgt_h") (CPTYPE V4HI) VOLATILE) "cpcmpgt.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x13) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -2013,7 +2013,7 @@ ; 1111 0001 0100 0111 10010 qqqqq ppppp 0 cpcmpgtu.w crqc,crpc (c3_1) (dni cpcmpgtu_w_C3 "cpcmpgtu.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgtu_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgtu_w") (CPTYPE V2USI) VOLATILE) "cpcmpgtu.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x14) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -2026,7 +2026,7 @@ ; 1111 0001 0101 0111 10010 qqqqq ppppp 0 cpcmpgt.w crqc,crpc (c3_1) (dni cpcmpgt_w_C3 "cpcmpgt.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgt_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgt_w") (CPTYPE V2SI) VOLATILE) "cpcmpgt.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x15) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -2039,7 +2039,7 @@ ; 1111 0001 1000 0111 10010 qqqqq ppppp 0 cpcmpgeu.b crqc,crpc (c3_1) (dni cpcmpgeu_b_C3 "cpcmpgeu.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgeu_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgeu_b") (CPTYPE V8UQI) VOLATILE) "cpcmpgeu.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x18) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -2052,7 +2052,7 @@ ; 1111 0001 1001 0111 10010 qqqqq ppppp 0 cpcmpge.b crqc,crpc (c3_1) (dni cpcmpge_b_C3 "cpcmpge.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpge_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpge_b") (CPTYPE V8QI) VOLATILE) "cpcmpge.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x19) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -2065,7 +2065,7 @@ ; 1111 0001 1011 0111 10010 qqqqq ppppp 0 cpcmpge.h crqc,crpc (c3_1) (dni cpcmpge_h_C3 "cpcmpge.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpge_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpge_h") (CPTYPE V4HI) VOLATILE) "cpcmpge.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1b) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -2078,7 +2078,7 @@ ; 1111 0001 1100 0111 10010 qqqqq ppppp 0 cpcmpgeu.w crqc,crpc (c3_1) (dni cpcmpgeu_w_C3 "cpcmpgeu.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgeu_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpgeu_w") (CPTYPE V2USI) VOLATILE) "cpcmpgeu.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1c) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -2091,7 +2091,7 @@ ; 1111 0001 1101 0111 10010 qqqqq ppppp 0 cpcmpge.w crqc,crpc (c3_1) (dni cpcmpge_w_C3 "cpcmpge.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpge_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpcmpge_w") (CPTYPE V2SI) VOLATILE) "cpcmpge.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1d) (f-sub4 7) (f-ivc2-5u16 #x12) crqc crpc (f-ivc2-1u31 #x0) ) @@ -2820,7 +2820,7 @@ ; 1111 0000 0000 0111 00000 qqqqq ppppp 1 cpadda1u.b crqc,crpc (c3_1) (dni cpadda1u_b_C3 "cpadda1u.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpadda1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpadda1u_b") (CPTYPE V8UQI) VOLATILE) "cpadda1u.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x0) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -2840,7 +2840,7 @@ ; 1111 0000 0001 0111 00000 qqqqq ppppp 1 cpadda1.b crqc,crpc (c3_1) (dni cpadda1_b_C3 "cpadda1.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpadda1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpadda1_b") (CPTYPE V8QI) VOLATILE) "cpadda1.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -2860,7 +2860,7 @@ ; 1111 0000 0010 0111 00000 qqqqq ppppp 1 cpaddua1.h crqc,crpc (c3_1) (dni cpaddua1_h_C3 "cpaddua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpaddua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpaddua1_h") (CPTYPE V4HI) VOLATILE) "cpaddua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x2) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -2876,7 +2876,7 @@ ; 1111 0000 0011 0111 00000 qqqqq ppppp 1 cpaddla1.h crqc,crpc (c3_1) (dni cpaddla1_h_C3 "cpaddla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpaddla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpaddla1_h") (CPTYPE V4HI) VOLATILE) "cpaddla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x3) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -2892,7 +2892,7 @@ ; 1111 0000 0100 0111 00000 qqqqq ppppp 1 cpaddaca1u.b crqc,crpc (c3_1) (dni cpaddaca1u_b_C3 "cpaddaca1u.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpaddaca1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpaddaca1u_b") (CPTYPE V8UQI) VOLATILE) "cpaddaca1u.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x4) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -2913,7 +2913,7 @@ ; 1111 0000 0101 0111 00000 qqqqq ppppp 1 cpaddaca1.b crqc,crpc (c3_1) (dni cpaddaca1_b_C3 "cpaddaca1.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpaddaca1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpaddaca1_b") (CPTYPE V8QI) VOLATILE) "cpaddaca1.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x5) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -2934,7 +2934,7 @@ ; 1111 0000 0110 0111 00000 qqqqq ppppp 1 cpaddacua1.h crqc,crpc (c3_1) (dni cpaddacua1_h_C3 "cpaddacua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpaddacua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpaddacua1_h") (CPTYPE V4HI) VOLATILE) "cpaddacua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x6) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -2951,7 +2951,7 @@ ; 1111 0000 0111 0111 00000 qqqqq ppppp 1 cpaddacla1.h crqc,crpc (c3_1) (dni cpaddacla1_h_C3 "cpaddacla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpaddacla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpaddacla1_h") (CPTYPE V4HI) VOLATILE) "cpaddacla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x7) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -2968,7 +2968,7 @@ ; 1111 0000 1000 0111 00000 qqqqq ppppp 1 cpsuba1u.b crqc,crpc (c3_1) (dni cpsuba1u_b_C3 "cpsuba1u.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsuba1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsuba1u_b") (CPTYPE V8UQI) VOLATILE) "cpsuba1u.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x8) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -2988,7 +2988,7 @@ ; 1111 0000 1001 0111 00000 qqqqq ppppp 1 cpsuba1.b crqc,crpc (c3_1) (dni cpsuba1_b_C3 "cpsuba1.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsuba1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsuba1_b") (CPTYPE V8QI) VOLATILE) "cpsuba1.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x9) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3008,7 +3008,7 @@ ; 1111 0000 1010 0111 00000 qqqqq ppppp 1 cpsubua1.h crqc,crpc (c3_1) (dni cpsubua1_h_C3 "cpsubua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsubua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsubua1_h") (CPTYPE V4HI) VOLATILE) "cpsubua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xa) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3024,7 +3024,7 @@ ; 1111 0000 1011 0111 00000 qqqqq ppppp 1 cpsubla1.h crqc,crpc (c3_1) (dni cpsubla1_h_C3 "cpsubla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsubla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsubla1_h") (CPTYPE V4HI) VOLATILE) "cpsubla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xb) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3040,7 +3040,7 @@ ; 1111 0000 1100 0111 00000 qqqqq ppppp 1 cpsubaca1u.b crqc,crpc (c3_1) (dni cpsubaca1u_b_C3 "cpsubaca1u.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsubaca1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsubaca1u_b") (CPTYPE V8UQI) VOLATILE) "cpsubaca1u.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xc) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3061,7 +3061,7 @@ ; 1111 0000 1101 0111 00000 qqqqq ppppp 1 cpsubaca1.b crqc,crpc (c3_1) (dni cpsubaca1_b_C3 "cpsubaca1.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsubaca1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsubaca1_b") (CPTYPE V8QI) VOLATILE) "cpsubaca1.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xd) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3082,7 +3082,7 @@ ; 1111 0000 1110 0111 00000 qqqqq ppppp 1 cpsubacua1.h crqc,crpc (c3_1) (dni cpsubacua1_h_C3 "cpsubacua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsubacua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsubacua1_h") (CPTYPE V4HI) VOLATILE) "cpsubacua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xe) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3099,7 +3099,7 @@ ; 1111 0000 1111 0111 00000 qqqqq ppppp 1 cpsubacla1.h crqc,crpc (c3_1) (dni cpsubacla1_h_C3 "cpsubacla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsubacla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsubacla1_h") (CPTYPE V4HI) VOLATILE) "cpsubacla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xf) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3116,7 +3116,7 @@ ; 1111 0001 0000 0111 00000 qqqqq ppppp 1 cpabsa1u.b crqc,crpc (c3_1) (dni cpabsa1u_b_C3 "cpabsa1u.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpabsa1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpabsa1u_b") (CPTYPE V8UQI) VOLATILE) "cpabsa1u.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x10) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3136,7 +3136,7 @@ ; 1111 0001 0001 0111 00000 qqqqq ppppp 1 cpabsa1.b crqc,crpc (c3_1) (dni cpabsa1_b_C3 "cpabsa1.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpabsa1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpabsa1_b") (CPTYPE V8QI) VOLATILE) "cpabsa1.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x11) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3156,7 +3156,7 @@ ; 1111 0001 0010 0111 00000 qqqqq ppppp 1 cpabsua1.h crqc,crpc (c3_1) (dni cpabsua1_h_C3 "cpabsua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpabsua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpabsua1_h") (CPTYPE V4HI) VOLATILE) "cpabsua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x12) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3172,7 +3172,7 @@ ; 1111 0001 0011 0111 00000 qqqqq ppppp 1 cpabsla1.h crqc,crpc (c3_1) (dni cpabsla1_h_C3 "cpabsla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpabsla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpabsla1_h") (CPTYPE V4HI) VOLATILE) "cpabsla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x13) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3188,7 +3188,7 @@ ; 1111 0001 0100 0111 00000 qqqqq ppppp 1 cpsada1u.b crqc,crpc (c3_1) (dni cpsada1u_b_C3 "cpsada1u.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsada1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsada1u_b") (CPTYPE V8UQI) VOLATILE) "cpsada1u.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x14) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3209,7 +3209,7 @@ ; 1111 0001 0101 0111 00000 qqqqq ppppp 1 cpsada1.b crqc,crpc (c3_1) (dni cpsada1_b_C3 "cpsada1.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsada1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsada1_b") (CPTYPE V8QI) VOLATILE) "cpsada1.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x15) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3230,7 +3230,7 @@ ; 1111 0001 0110 0111 00000 qqqqq ppppp 1 cpsadua1.h crqc,crpc (c3_1) (dni cpsadua1_h_C3 "cpsadua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsadua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsadua1_h") (CPTYPE V4HI) VOLATILE) "cpsadua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x16) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3247,7 +3247,7 @@ ; 1111 0001 0111 0111 00000 qqqqq ppppp 1 cpsadla1.h crqc,crpc (c3_1) (dni cpsadla1_h_C3 "cpsadla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsadla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsadla1_h") (CPTYPE V4HI) VOLATILE) "cpsadla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x17) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3264,7 +3264,7 @@ ; 1111 0010 0000 0111 00000 qqqqq ppppp 1 cpseta1.h crqc,crpc (c3_1) (dni cpseta1_h_C3 "cpseta1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpseta1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpseta1_h") (CPTYPE V4HI) VOLATILE) "cpseta1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x1) (f-ivc2-5u7 #x0) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3284,7 +3284,7 @@ ; 1111 0010 0010 0111 00000 qqqqq ppppp 1 cpsetua1.w crqc,crpc (c3_1) (dni cpsetua1_w_C3 "cpsetua1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsetua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsetua1_w") (CPTYPE V2SI) VOLATILE) "cpsetua1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x1) (f-ivc2-5u7 #x2) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3300,7 +3300,7 @@ ; 1111 0010 0011 0111 00000 qqqqq ppppp 1 cpsetla1.w crqc,crpc (c3_1) (dni cpsetla1_w_C3 "cpsetla1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsetla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsetla1_w") (CPTYPE V2SI) VOLATILE) "cpsetla1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x1) (f-ivc2-5u7 #x3) (f-sub4 7) (f-ivc2-5u16 #x0) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3496,7 +3496,7 @@ ; 1111 0000 0000 0111 00010 qqqqq 00000 1 cpsrla1 crqc (c3_1) (dni cpsrla1_C3 "cpsrla1 $crqc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsrla1")) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsrla1") VOLATILE) "cpsrla1 $crqc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x0) (f-sub4 7) (f-ivc2-5u16 #x2) crqc (f-ivc2-5u26 #x0) (f-ivc2-1u31 #x1) ) @@ -3516,7 +3516,7 @@ ; 1111 0000 0001 0111 00010 qqqqq 00000 1 cpsraa1 crqc (c3_1) (dni cpsraa1_C3 "cpsraa1 $crqc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsraa1")) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsraa1") VOLATILE) "cpsraa1 $crqc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1) (f-sub4 7) (f-ivc2-5u16 #x2) crqc (f-ivc2-5u26 #x0) (f-ivc2-1u31 #x1) ) @@ -3536,7 +3536,7 @@ ; 1111 0000 0010 0111 00010 qqqqq 00000 1 cpslla1 crqc (c3_1) (dni cpslla1_C3 "cpslla1 $crqc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpslla1")) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpslla1") VOLATILE) "cpslla1 $crqc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x2) (f-sub4 7) (f-ivc2-5u16 #x2) crqc (f-ivc2-5u26 #x0) (f-ivc2-1u31 #x1) ) @@ -3556,7 +3556,7 @@ ; 1111 00xi iiii 0111 00011 00000 00000 1 cpsrlia1 imm5p7 (c3_imm) (dni cpsrlia1_P1 "cpsrlia1 imm5p7 C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsrlia1")) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsrlia1") VOLATILE) "cpsrlia1 $imm5p7" (+ MAJ_15 ivc-x-6-1 (f-ivc2-2u4 #x0) imm5p7 (f-sub4 7) (f-ivc2-5u16 #x3) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x0) (f-ivc2-1u31 #x1) ) @@ -3576,7 +3576,7 @@ ; 1111 01xi iiii 0111 00011 00000 00000 1 cpsraia1 imm5p7 (c3_imm) (dni cpsraia1_P1 "cpsraia1 imm5p7 C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsraia1")) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsraia1") VOLATILE) "cpsraia1 $imm5p7" (+ MAJ_15 ivc-x-6-1 (f-ivc2-2u4 #x1) imm5p7 (f-sub4 7) (f-ivc2-5u16 #x3) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x0) (f-ivc2-1u31 #x1) ) @@ -3596,7 +3596,7 @@ ; 1111 10xi iiii 0111 00011 00000 00000 1 cpsllia1 imm5p7 (c3_imm) (dni cpsllia1_P1 "cpsllia1 imm5p7 C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsllia1")) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsllia1") VOLATILE) "cpsllia1 $imm5p7" (+ MAJ_15 ivc-x-6-1 (f-ivc2-2u4 #x2) imm5p7 (f-sub4 7) (f-ivc2-5u16 #x3) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x0) (f-ivc2-1u31 #x1) ) @@ -3616,7 +3616,7 @@ ; 1111 0000 0000 0111 00001 qqqqq ppppp 1 cpssqa1u.b crqc,crpc (c3_1) (dni cpssqa1u_b_C3 "cpssqa1u.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpssqa1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpssqa1u_b") (CPTYPE V8UQI) VOLATILE) "cpssqa1u.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x0) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3636,7 +3636,7 @@ ; 1111 0000 0001 0111 00001 qqqqq ppppp 1 cpssqa1.b crqc,crpc (c3_1) (dni cpssqa1_b_C3 "cpssqa1.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpssqa1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpssqa1_b") (CPTYPE V8QI) VOLATILE) "cpssqa1.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3656,7 +3656,7 @@ ; 1111 0000 0100 0111 00001 qqqqq ppppp 1 cpssda1u.b crqc,crpc (c3_1) (dni cpssda1u_b_C3 "cpssda1u.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpssda1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpssda1u_b") (CPTYPE V8UQI) VOLATILE) "cpssda1u.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x4) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3677,7 +3677,7 @@ ; 1111 0000 0101 0111 00001 qqqqq ppppp 1 cpssda1.b crqc,crpc (c3_1) (dni cpssda1_b_C3 "cpssda1.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpssda1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpssda1_b") (CPTYPE V8QI) VOLATILE) "cpssda1.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x5) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3698,7 +3698,7 @@ ; 1111 0000 1000 0111 00001 qqqqq ppppp 1 cpmula1u.b crqc,crpc (c3_1) (dni cpmula1u_b_C3 "cpmula1u.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmula1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmula1u_b") (CPTYPE V8UQI) VOLATILE) "cpmula1u.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x8) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3718,7 +3718,7 @@ ; 1111 0000 1001 0111 00001 qqqqq ppppp 1 cpmula1.b crqc,crpc (c3_1) (dni cpmula1_b_C3 "cpmula1.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmula1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmula1_b") (CPTYPE V8QI) VOLATILE) "cpmula1.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x9) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3738,7 +3738,7 @@ ; 1111 0000 1010 0111 00001 qqqqq ppppp 1 cpmulua1.h crqc,crpc (c3_1) (dni cpmulua1_h_C3 "cpmulua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulua1_h") (CPTYPE V4HI) VOLATILE) "cpmulua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xa) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3754,7 +3754,7 @@ ; 1111 0000 1011 0111 00001 qqqqq ppppp 1 cpmulla1.h crqc,crpc (c3_1) (dni cpmulla1_h_C3 "cpmulla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulla1_h") (CPTYPE V4HI) VOLATILE) "cpmulla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xb) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3770,7 +3770,7 @@ ; 1111 0000 1100 0111 00001 qqqqq ppppp 1 cpmulua1u.w crqc,crpc (c3_1) (dni cpmulua1u_w_C3 "cpmulua1u.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulua1u_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulua1u_w") (CPTYPE V2USI) VOLATILE) "cpmulua1u.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xc) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3786,7 +3786,7 @@ ; 1111 0000 1101 0111 00001 qqqqq ppppp 1 cpmulla1u.w crqc,crpc (c3_1) (dni cpmulla1u_w_C3 "cpmulla1u.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulla1u_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulla1u_w") (CPTYPE V2USI) VOLATILE) "cpmulla1u.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xd) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3802,7 +3802,7 @@ ; 1111 0000 1110 0111 00001 qqqqq ppppp 1 cpmulua1.w crqc,crpc (c3_1) (dni cpmulua1_w_C3 "cpmulua1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulua1_w") (CPTYPE V2SI) VOLATILE) "cpmulua1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xe) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3818,7 +3818,7 @@ ; 1111 0000 1111 0111 00001 qqqqq ppppp 1 cpmulla1.w crqc,crpc (c3_1) (dni cpmulla1_w_C3 "cpmulla1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulla1_w") (CPTYPE V2SI) VOLATILE) "cpmulla1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #xf) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3834,7 +3834,7 @@ ; 1111 0001 0000 0111 00001 qqqqq ppppp 1 cpmada1u.b crqc,crpc (c3_1) (dni cpmada1u_b_C3 "cpmada1u.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmada1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmada1u_b") (CPTYPE V8UQI) VOLATILE) "cpmada1u.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x10) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3855,7 +3855,7 @@ ; 1111 0001 0001 0111 00001 qqqqq ppppp 1 cpmada1.b crqc,crpc (c3_1) (dni cpmada1_b_C3 "cpmada1.b $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmada1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmada1_b") (CPTYPE V8QI) VOLATILE) "cpmada1.b $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x11) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3876,7 +3876,7 @@ ; 1111 0001 0010 0111 00001 qqqqq ppppp 1 cpmadua1.h crqc,crpc (c3_1) (dni cpmadua1_h_C3 "cpmadua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmadua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmadua1_h") (CPTYPE V4HI) VOLATILE) "cpmadua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x12) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3893,7 +3893,7 @@ ; 1111 0001 0011 0111 00001 qqqqq ppppp 1 cpmadla1.h crqc,crpc (c3_1) (dni cpmadla1_h_C3 "cpmadla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmadla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmadla1_h") (CPTYPE V4HI) VOLATILE) "cpmadla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x13) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3910,7 +3910,7 @@ ; 1111 0001 0100 0111 00001 qqqqq ppppp 1 cpmadua1u.w crqc,crpc (c3_1) (dni cpmadua1u_w_C3 "cpmadua1u.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmadua1u_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmadua1u_w") (CPTYPE V2USI) VOLATILE) "cpmadua1u.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x14) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3927,7 +3927,7 @@ ; 1111 0001 0101 0111 00001 qqqqq ppppp 1 cpmadla1u.w crqc,crpc (c3_1) (dni cpmadla1u_w_C3 "cpmadla1u.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmadla1u_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmadla1u_w") (CPTYPE V2USI) VOLATILE) "cpmadla1u.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x15) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3944,7 +3944,7 @@ ; 1111 0001 0110 0111 00001 qqqqq ppppp 1 cpmadua1.w crqc,crpc (c3_1) (dni cpmadua1_w_C3 "cpmadua1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmadua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmadua1_w") (CPTYPE V2SI) VOLATILE) "cpmadua1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x16) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3961,7 +3961,7 @@ ; 1111 0001 0111 0111 00001 qqqqq ppppp 1 cpmadla1.w crqc,crpc (c3_1) (dni cpmadla1_w_C3 "cpmadla1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmadla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmadla1_w") (CPTYPE V2SI) VOLATILE) "cpmadla1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x17) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3978,7 +3978,7 @@ ; 1111 0001 1010 0111 00001 qqqqq ppppp 1 cpmsbua1.h crqc,crpc (c3_1) (dni cpmsbua1_h_C3 "cpmsbua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmsbua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmsbua1_h") (CPTYPE V4HI) VOLATILE) "cpmsbua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1a) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -3995,7 +3995,7 @@ ; 1111 0001 1011 0111 00001 qqqqq ppppp 1 cpmsbla1.h crqc,crpc (c3_1) (dni cpmsbla1_h_C3 "cpmsbla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmsbla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmsbla1_h") (CPTYPE V4HI) VOLATILE) "cpmsbla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1b) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4012,7 +4012,7 @@ ; 1111 0001 1100 0111 00001 qqqqq ppppp 1 cpmsbua1u.w crqc,crpc (c3_1) (dni cpmsbua1u_w_C3 "cpmsbua1u.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmsbua1u_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmsbua1u_w") (CPTYPE V2USI) VOLATILE) "cpmsbua1u.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1c) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4029,7 +4029,7 @@ ; 1111 0001 1101 0111 00001 qqqqq ppppp 1 cpmsbla1u.w crqc,crpc (c3_1) (dni cpmsbla1u_w_C3 "cpmsbla1u.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmsbla1u_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmsbla1u_w") (CPTYPE V2USI) VOLATILE) "cpmsbla1u.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1d) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4046,7 +4046,7 @@ ; 1111 0001 1110 0111 00001 qqqqq ppppp 1 cpmsbua1.w crqc,crpc (c3_1) (dni cpmsbua1_w_C3 "cpmsbua1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmsbua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmsbua1_w") (CPTYPE V2SI) VOLATILE) "cpmsbua1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1e) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4063,7 +4063,7 @@ ; 1111 0001 1111 0111 00001 qqqqq ppppp 1 cpmsbla1.w crqc,crpc (c3_1) (dni cpmsbla1_w_C3 "cpmsbla1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmsbla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmsbla1_w") (CPTYPE V2SI) VOLATILE) "cpmsbla1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x0) (f-ivc2-5u7 #x1f) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4080,7 +4080,7 @@ ; 1111 0011 0010 0111 00001 qqqqq ppppp 1 cpsmadua1.h crqc,crpc (c3_1) (dni cpsmadua1_h_C3 "cpsmadua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadua1_h") (CPTYPE V4HI) VOLATILE) "cpsmadua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x1) (f-ivc2-5u7 #x12) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4097,7 +4097,7 @@ ; 1111 0011 0011 0111 00001 qqqqq ppppp 1 cpsmadla1.h crqc,crpc (c3_1) (dni cpsmadla1_h_C3 "cpsmadla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadla1_h") (CPTYPE V4HI) VOLATILE) "cpsmadla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x1) (f-ivc2-5u7 #x13) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4114,7 +4114,7 @@ ; 1111 0011 0110 0111 00001 qqqqq ppppp 1 cpsmadua1.w crqc,crpc (c3_1) (dni cpsmadua1_w_C3 "cpsmadua1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadua1_w") (CPTYPE V2SI) VOLATILE) "cpsmadua1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x1) (f-ivc2-5u7 #x16) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4131,7 +4131,7 @@ ; 1111 0011 0111 0111 00001 qqqqq ppppp 1 cpsmadla1.w crqc,crpc (c3_1) (dni cpsmadla1_w_C3 "cpsmadla1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadla1_w") (CPTYPE V2SI) VOLATILE) "cpsmadla1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x1) (f-ivc2-5u7 #x17) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4148,7 +4148,7 @@ ; 1111 0011 1010 0111 00001 qqqqq ppppp 1 cpsmsbua1.h crqc,crpc (c3_1) (dni cpsmsbua1_h_C3 "cpsmsbua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbua1_h") (CPTYPE V4HI) VOLATILE) "cpsmsbua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x1) (f-ivc2-5u7 #x1a) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4165,7 +4165,7 @@ ; 1111 0011 1011 0111 00001 qqqqq ppppp 1 cpsmsbla1.h crqc,crpc (c3_1) (dni cpsmsbla1_h_C3 "cpsmsbla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbla1_h") (CPTYPE V4HI) VOLATILE) "cpsmsbla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x1) (f-ivc2-5u7 #x1b) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4182,7 +4182,7 @@ ; 1111 0011 1110 0111 00001 qqqqq ppppp 1 cpsmsbua1.w crqc,crpc (c3_1) (dni cpsmsbua1_w_C3 "cpsmsbua1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbua1_w") (CPTYPE V2SI) VOLATILE) "cpsmsbua1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x1) (f-ivc2-5u7 #x1e) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4199,7 +4199,7 @@ ; 1111 0011 1111 0111 00001 qqqqq ppppp 1 cpsmsbla1.w crqc,crpc (c3_1) (dni cpsmsbla1_w_C3 "cpsmsbla1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbla1_w") (CPTYPE V2SI) VOLATILE) "cpsmsbla1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x1) (f-ivc2-5u7 #x1f) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4216,7 +4216,7 @@ ; 1111 0100 1010 0111 00001 qqqqq ppppp 1 cpmulslua1.h crqc,crpc (c3_1) (dni cpmulslua1_h_C3 "cpmulslua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulslua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulslua1_h") (CPTYPE V4HI) VOLATILE) "cpmulslua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x2) (f-ivc2-5u7 #xa) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4233,7 +4233,7 @@ ; 1111 0100 1011 0111 00001 qqqqq ppppp 1 cpmulslla1.h crqc,crpc (c3_1) (dni cpmulslla1_h_C3 "cpmulslla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulslla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulslla1_h") (CPTYPE V4HI) VOLATILE) "cpmulslla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x2) (f-ivc2-5u7 #xb) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4250,7 +4250,7 @@ ; 1111 0100 1110 0111 00001 qqqqq ppppp 1 cpmulslua1.w crqc,crpc (c3_1) (dni cpmulslua1_w_C3 "cpmulslua1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulslua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulslua1_w") (CPTYPE V2SI) VOLATILE) "cpmulslua1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x2) (f-ivc2-5u7 #xe) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4267,7 +4267,7 @@ ; 1111 0100 1111 0111 00001 qqqqq ppppp 1 cpmulslla1.w crqc,crpc (c3_1) (dni cpmulslla1_w_C3 "cpmulslla1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulslla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmulslla1_w") (CPTYPE V2SI) VOLATILE) "cpmulslla1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x2) (f-ivc2-5u7 #xf) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4284,7 +4284,7 @@ ; 1111 0111 0010 0111 00001 qqqqq ppppp 1 cpsmadslua1.h crqc,crpc (c3_1) (dni cpsmadslua1_h_C3 "cpsmadslua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadslua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadslua1_h") (CPTYPE V4HI) VOLATILE) "cpsmadslua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x3) (f-ivc2-5u7 #x12) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4301,7 +4301,7 @@ ; 1111 0111 0011 0111 00001 qqqqq ppppp 1 cpsmadslla1.h crqc,crpc (c3_1) (dni cpsmadslla1_h_C3 "cpsmadslla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadslla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadslla1_h") (CPTYPE V4HI) VOLATILE) "cpsmadslla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x3) (f-ivc2-5u7 #x13) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4318,7 +4318,7 @@ ; 1111 0111 0110 0111 00001 qqqqq ppppp 1 cpsmadslua1.w crqc,crpc (c3_1) (dni cpsmadslua1_w_C3 "cpsmadslua1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadslua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadslua1_w") (CPTYPE V2SI) VOLATILE) "cpsmadslua1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x3) (f-ivc2-5u7 #x16) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4335,7 +4335,7 @@ ; 1111 0111 0111 0111 00001 qqqqq ppppp 1 cpsmadslla1.w crqc,crpc (c3_1) (dni cpsmadslla1_w_C3 "cpsmadslla1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadslla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmadslla1_w") (CPTYPE V2SI) VOLATILE) "cpsmadslla1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x3) (f-ivc2-5u7 #x17) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4352,7 +4352,7 @@ ; 1111 0111 1010 0111 00001 qqqqq ppppp 1 cpsmsbslua1.h crqc,crpc (c3_1) (dni cpsmsbslua1_h_C3 "cpsmsbslua1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbslua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbslua1_h") (CPTYPE V4HI) VOLATILE) "cpsmsbslua1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x3) (f-ivc2-5u7 #x1a) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4369,7 +4369,7 @@ ; 1111 0111 1011 0111 00001 qqqqq ppppp 1 cpsmsbslla1.h crqc,crpc (c3_1) (dni cpsmsbslla1_h_C3 "cpsmsbslla1.h $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbslla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbslla1_h") (CPTYPE V4HI) VOLATILE) "cpsmsbslla1.h $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x3) (f-ivc2-5u7 #x1b) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4386,7 +4386,7 @@ ; 1111 0111 1110 0111 00001 qqqqq ppppp 1 cpsmsbslua1.w crqc,crpc (c3_1) (dni cpsmsbslua1_w_C3 "cpsmsbslua1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbslua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbslua1_w") (CPTYPE V2SI) VOLATILE) "cpsmsbslua1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x3) (f-ivc2-5u7 #x1e) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4403,7 +4403,7 @@ ; 1111 0111 1111 0111 00001 qqqqq ppppp 1 cpsmsbslla1.w crqc,crpc (c3_1) (dni cpsmsbslla1_w_C3 "cpsmsbslla1.w $crqc,$crpc C3" - (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbslla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsmsbslla1_w") (CPTYPE V2SI) VOLATILE) "cpsmsbslla1.w $crqc,$crpc" (+ MAJ_15 (f-ivc2-3u4 #x3) (f-ivc2-5u7 #x1f) (f-sub4 7) (f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x1) ) @@ -4981,7 +4981,7 @@ ; 10010 qqqqq ppppp 00000 cpcmpeqz.b crqp,crpp (p0_1) (dni cpcmpeqz_b_P0S_P1 "cpcmpeqz.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpeqz_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpeqz_b") (CPTYPE V8QI) VOLATILE) "cpcmpeqz.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -4993,7 +4993,7 @@ ; 10010 qqqqq ppppp 00001 cpcmpeq.b crqp,crpp (p0_1) (dni cpcmpeq_b_P0S_P1 "cpcmpeq.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpeq_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpeq_b") (CPTYPE V8QI) VOLATILE) "cpcmpeq.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x1) (f-ivc2-4u28 0)) (sequence () @@ -5005,7 +5005,7 @@ ; 10010 qqqqq ppppp 00011 cpcmpeq.h crqp,crpp (p0_1) (dni cpcmpeq_h_P0S_P1 "cpcmpeq.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpeq_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpeq_h") (CPTYPE V4HI) VOLATILE) "cpcmpeq.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x3) (f-ivc2-4u28 0)) (sequence () @@ -5017,7 +5017,7 @@ ; 10010 qqqqq ppppp 00101 cpcmpeq.w crqp,crpp (p0_1) (dni cpcmpeq_w_P0S_P1 "cpcmpeq.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpeq_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpeq_w") (CPTYPE V2SI) VOLATILE) "cpcmpeq.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x5) (f-ivc2-4u28 0)) (sequence () @@ -5029,7 +5029,7 @@ ; 10010 qqqqq ppppp 01001 cpcmpne.b crqp,crpp (p0_1) (dni cpcmpne_b_P0S_P1 "cpcmpne.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpne_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpne_b") (CPTYPE V8QI) VOLATILE) "cpcmpne.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x9) (f-ivc2-4u28 0)) (sequence () @@ -5041,7 +5041,7 @@ ; 10010 qqqqq ppppp 01011 cpcmpne.h crqp,crpp (p0_1) (dni cpcmpne_h_P0S_P1 "cpcmpne.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpne_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpne_h") (CPTYPE V4HI) VOLATILE) "cpcmpne.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #xb) (f-ivc2-4u28 0)) (sequence () @@ -5053,7 +5053,7 @@ ; 10010 qqqqq ppppp 01101 cpcmpne.w crqp,crpp (p0_1) (dni cpcmpne_w_P0S_P1 "cpcmpne.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpne_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpne_w") (CPTYPE V2SI) VOLATILE) "cpcmpne.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #xd) (f-ivc2-4u28 0)) (sequence () @@ -5065,7 +5065,7 @@ ; 10010 qqqqq ppppp 10000 cpcmpgtu.b crqp,crpp (p0_1) (dni cpcmpgtu_b_P0S_P1 "cpcmpgtu.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgtu_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgtu_b") (CPTYPE V8UQI) VOLATILE) "cpcmpgtu.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x10) (f-ivc2-4u28 0)) (sequence () @@ -5077,7 +5077,7 @@ ; 10010 qqqqq ppppp 10001 cpcmpgt.b crqp,crpp (p0_1) (dni cpcmpgt_b_P0S_P1 "cpcmpgt.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgt_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgt_b") (CPTYPE V8QI) VOLATILE) "cpcmpgt.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x11) (f-ivc2-4u28 0)) (sequence () @@ -5089,7 +5089,7 @@ ; 10010 qqqqq ppppp 10011 cpcmpgt.h crqp,crpp (p0_1) (dni cpcmpgt_h_P0S_P1 "cpcmpgt.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgt_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgt_h") (CPTYPE V4HI) VOLATILE) "cpcmpgt.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x13) (f-ivc2-4u28 0)) (sequence () @@ -5101,7 +5101,7 @@ ; 10010 qqqqq ppppp 10100 cpcmpgtu.w crqp,crpp (p0_1) (dni cpcmpgtu_w_P0S_P1 "cpcmpgtu.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgtu_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgtu_w") (CPTYPE V2USI) VOLATILE) "cpcmpgtu.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x14) (f-ivc2-4u28 0)) (sequence () @@ -5113,7 +5113,7 @@ ; 10010 qqqqq ppppp 10101 cpcmpgt.w crqp,crpp (p0_1) (dni cpcmpgt_w_P0S_P1 "cpcmpgt.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgt_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgt_w") (CPTYPE V2SI) VOLATILE) "cpcmpgt.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x15) (f-ivc2-4u28 0)) (sequence () @@ -5125,7 +5125,7 @@ ; 10010 qqqqq ppppp 11000 cpcmpgeu.b crqp,crpp (p0_1) (dni cpcmpgeu_b_P0S_P1 "cpcmpgeu.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgeu_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgeu_b") (CPTYPE V8UQI) VOLATILE) "cpcmpgeu.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x18) (f-ivc2-4u28 0)) (sequence () @@ -5137,7 +5137,7 @@ ; 10010 qqqqq ppppp 11001 cpcmpge.b crqp,crpp (p0_1) (dni cpcmpge_b_P0S_P1 "cpcmpge.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpge_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpge_b") (CPTYPE V8QI) VOLATILE) "cpcmpge.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x19) (f-ivc2-4u28 0)) (sequence () @@ -5149,7 +5149,7 @@ ; 10010 qqqqq ppppp 11011 cpcmpge.h crqp,crpp (p0_1) (dni cpcmpge_h_P0S_P1 "cpcmpge.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpge_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpge_h") (CPTYPE V4HI) VOLATILE) "cpcmpge.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x1b) (f-ivc2-4u28 0)) (sequence () @@ -5161,7 +5161,7 @@ ; 10010 qqqqq ppppp 11100 cpcmpgeu.w crqp,crpp (p0_1) (dni cpcmpgeu_w_P0S_P1 "cpcmpgeu.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgeu_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpgeu_w") (CPTYPE V2USI) VOLATILE) "cpcmpgeu.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x1c) (f-ivc2-4u28 0)) (sequence () @@ -5173,7 +5173,7 @@ ; 10010 qqqqq ppppp 11101 cpcmpge.w crqp,crpp (p0_1) (dni cpcmpge_w_P0S_P1 "cpcmpge.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpge_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpcmpge_w") (CPTYPE V2SI) VOLATILE) "cpcmpge.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x12) crqp crpp (f-ivc2-5u23 #x1d) (f-ivc2-4u28 0)) (sequence () @@ -5185,7 +5185,7 @@ ; 11000 qqqqq ppppp 00000 cpadda0u.b crqp,crpp (p0_1) (dni cpadda0u_b_P0S "cpadda0u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpadda0u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpadda0u_b") (CPTYPE V8UQI) VOLATILE) "cpadda0u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -5204,7 +5204,7 @@ ; 11000 qqqqq ppppp 00001 cpadda0.b crqp,crpp (p0_1) (dni cpadda0_b_P0S "cpadda0.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpadda0_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpadda0_b") (CPTYPE V8QI) VOLATILE) "cpadda0.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x1) (f-ivc2-4u28 0)) (sequence () @@ -5223,7 +5223,7 @@ ; 11000 qqqqq ppppp 00010 cpaddua0.h crqp,crpp (p0_1) (dni cpaddua0_h_P0S "cpaddua0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaddua0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaddua0_h") (CPTYPE V4HI) VOLATILE) "cpaddua0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x2) (f-ivc2-4u28 0)) (sequence () @@ -5238,7 +5238,7 @@ ; 11000 qqqqq ppppp 00011 cpaddla0.h crqp,crpp (p0_1) (dni cpaddla0_h_P0S "cpaddla0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaddla0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaddla0_h") (CPTYPE V4HI) VOLATILE) "cpaddla0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x3) (f-ivc2-4u28 0)) (sequence () @@ -5253,7 +5253,7 @@ ; 11000 qqqqq ppppp 00100 cpaddaca0u.b crqp,crpp (p0_1) (dni cpaddaca0u_b_P0S "cpaddaca0u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaddaca0u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaddaca0u_b") (CPTYPE V8UQI) VOLATILE) "cpaddaca0u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x4) (f-ivc2-4u28 0)) (sequence () @@ -5273,7 +5273,7 @@ ; 11000 qqqqq ppppp 00101 cpaddaca0.b crqp,crpp (p0_1) (dni cpaddaca0_b_P0S "cpaddaca0.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaddaca0_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaddaca0_b") (CPTYPE V8QI) VOLATILE) "cpaddaca0.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x5) (f-ivc2-4u28 0)) (sequence () @@ -5293,7 +5293,7 @@ ; 11000 qqqqq ppppp 00110 cpaddacua0.h crqp,crpp (p0_1) (dni cpaddacua0_h_P0S "cpaddacua0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaddacua0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaddacua0_h") (CPTYPE V4HI) VOLATILE) "cpaddacua0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x6) (f-ivc2-4u28 0)) (sequence () @@ -5309,7 +5309,7 @@ ; 11000 qqqqq ppppp 00111 cpaddacla0.h crqp,crpp (p0_1) (dni cpaddacla0_h_P0S "cpaddacla0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaddacla0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaddacla0_h") (CPTYPE V4HI) VOLATILE) "cpaddacla0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x7) (f-ivc2-4u28 0)) (sequence () @@ -5325,7 +5325,7 @@ ; 11000 qqqqq ppppp 01000 cpsuba0u.b crqp,crpp (p0_1) (dni cpsuba0u_b_P0S "cpsuba0u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsuba0u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsuba0u_b") (CPTYPE V8UQI) VOLATILE) "cpsuba0u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x8) (f-ivc2-4u28 0)) (sequence () @@ -5344,7 +5344,7 @@ ; 11000 qqqqq ppppp 01001 cpsuba0.b crqp,crpp (p0_1) (dni cpsuba0_b_P0S "cpsuba0.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsuba0_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsuba0_b") (CPTYPE V8QI) VOLATILE) "cpsuba0.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x9) (f-ivc2-4u28 0)) (sequence () @@ -5363,7 +5363,7 @@ ; 11000 qqqqq ppppp 01010 cpsubua0.h crqp,crpp (p0_1) (dni cpsubua0_h_P0S "cpsubua0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsubua0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsubua0_h") (CPTYPE V4HI) VOLATILE) "cpsubua0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #xa) (f-ivc2-4u28 0)) (sequence () @@ -5378,7 +5378,7 @@ ; 11000 qqqqq ppppp 01011 cpsubla0.h crqp,crpp (p0_1) (dni cpsubla0_h_P0S "cpsubla0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsubla0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsubla0_h") (CPTYPE V4HI) VOLATILE) "cpsubla0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #xb) (f-ivc2-4u28 0)) (sequence () @@ -5393,7 +5393,7 @@ ; 11000 qqqqq ppppp 01100 cpsubaca0u.b crqp,crpp (p0_1) (dni cpsubaca0u_b_P0S "cpsubaca0u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsubaca0u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsubaca0u_b") (CPTYPE V8UQI) VOLATILE) "cpsubaca0u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #xc) (f-ivc2-4u28 0)) (sequence () @@ -5413,7 +5413,7 @@ ; 11000 qqqqq ppppp 01101 cpsubaca0.b crqp,crpp (p0_1) (dni cpsubaca0_b_P0S "cpsubaca0.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsubaca0_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsubaca0_b") (CPTYPE V8QI) VOLATILE) "cpsubaca0.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #xd) (f-ivc2-4u28 0)) (sequence () @@ -5433,7 +5433,7 @@ ; 11000 qqqqq ppppp 01110 cpsubacua0.h crqp,crpp (p0_1) (dni cpsubacua0_h_P0S "cpsubacua0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsubacua0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsubacua0_h") (CPTYPE V4HI) VOLATILE) "cpsubacua0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #xe) (f-ivc2-4u28 0)) (sequence () @@ -5449,7 +5449,7 @@ ; 11000 qqqqq ppppp 01111 cpsubacla0.h crqp,crpp (p0_1) (dni cpsubacla0_h_P0S "cpsubacla0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsubacla0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsubacla0_h") (CPTYPE V4HI) VOLATILE) "cpsubacla0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #xf) (f-ivc2-4u28 0)) (sequence () @@ -5465,7 +5465,7 @@ ; 11000 qqqqq ppppp 10000 cpabsa0u.b crqp,crpp (p0_1) (dni cpabsa0u_b_P0S "cpabsa0u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpabsa0u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpabsa0u_b") (CPTYPE V8UQI) VOLATILE) "cpabsa0u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x10) (f-ivc2-4u28 0)) (sequence () @@ -5484,7 +5484,7 @@ ; 11000 qqqqq ppppp 10001 cpabsa0.b crqp,crpp (p0_1) (dni cpabsa0_b_P0S "cpabsa0.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpabsa0_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpabsa0_b") (CPTYPE V8QI) VOLATILE) "cpabsa0.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x11) (f-ivc2-4u28 0)) (sequence () @@ -5503,7 +5503,7 @@ ; 11000 qqqqq ppppp 10010 cpabsua0.h crqp,crpp (p0_1) (dni cpabsua0_h_P0S "cpabsua0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpabsua0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpabsua0_h") (CPTYPE V4HI) VOLATILE) "cpabsua0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x12) (f-ivc2-4u28 0)) (sequence () @@ -5518,7 +5518,7 @@ ; 11000 qqqqq ppppp 10011 cpabsla0.h crqp,crpp (p0_1) (dni cpabsla0_h_P0S "cpabsla0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpabsla0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpabsla0_h") (CPTYPE V4HI) VOLATILE) "cpabsla0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x13) (f-ivc2-4u28 0)) (sequence () @@ -5533,7 +5533,7 @@ ; 11000 qqqqq ppppp 10100 cpsada0u.b crqp,crpp (p0_1) (dni cpsada0u_b_P0S "cpsada0u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsada0u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsada0u_b") (CPTYPE V8UQI) VOLATILE) "cpsada0u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x14) (f-ivc2-4u28 0)) (sequence () @@ -5553,7 +5553,7 @@ ; 11000 qqqqq ppppp 10101 cpsada0.b crqp,crpp (p0_1) (dni cpsada0_b_P0S "cpsada0.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsada0_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsada0_b") (CPTYPE V8QI) VOLATILE) "cpsada0.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x15) (f-ivc2-4u28 0)) (sequence () @@ -5573,7 +5573,7 @@ ; 11000 qqqqq ppppp 10110 cpsadua0.h crqp,crpp (p0_1) (dni cpsadua0_h_P0S "cpsadua0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsadua0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsadua0_h") (CPTYPE V4HI) VOLATILE) "cpsadua0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x16) (f-ivc2-4u28 0)) (sequence () @@ -5589,7 +5589,7 @@ ; 11000 qqqqq ppppp 10111 cpsadla0.h crqp,crpp (p0_1) (dni cpsadla0_h_P0S "cpsadla0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsadla0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsadla0_h") (CPTYPE V4HI) VOLATILE) "cpsadla0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x17) (f-ivc2-4u28 0)) (sequence () @@ -5605,7 +5605,7 @@ ; 11000 qqqqq ppppp 11011 cpseta0.h crqp,crpp (p0_1) (dni cpseta0_h_P0S "cpseta0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpseta0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpseta0_h") (CPTYPE V4HI) VOLATILE) "cpseta0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x1b) (f-ivc2-4u28 0)) (sequence () @@ -5624,7 +5624,7 @@ ; 11000 qqqqq ppppp 11100 cpsetua0.w crqp,crpp (p0_1) (dni cpsetua0_w_P0S "cpsetua0.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsetua0_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsetua0_w") (CPTYPE V2SI) VOLATILE) "cpsetua0.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x1c) (f-ivc2-4u28 0)) (sequence () @@ -5639,7 +5639,7 @@ ; 11000 qqqqq ppppp 11101 cpsetla0.w crqp,crpp (p0_1) (dni cpsetla0_w_P0S "cpsetla0.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsetla0_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsetla0_w") (CPTYPE V2SI) VOLATILE) "cpsetla0.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x1d) (f-ivc2-4u28 0)) (sequence () @@ -5819,7 +5819,7 @@ ; 11001 00000 10000 00000 cpacsuma0 (p0_1) (dni cpacsuma0_P0S "cpacsuma0 Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpacsuma0")) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpacsuma0") VOLATILE) "cpacsuma0" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x10) (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -5839,7 +5839,7 @@ ; 11001 00000 10001 00000 cpaccpa0 (p0_1) (dni cpaccpa0_P0S "cpaccpa0 Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaccpa0")) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpaccpa0") VOLATILE) "cpaccpa0" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x11) (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -5858,7 +5858,7 @@ ; 11001 qqqqq 11000 00000 cpsrla0 crqp (p0_1) (dni cpsrla0_P0S "cpsrla0 $crqp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsrla0")) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsrla0") VOLATILE) "cpsrla0 $crqp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) crqp (f-ivc2-5u18 #x18) (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -5877,7 +5877,7 @@ ; 11001 qqqqq 11001 00000 cpsraa0 crqp (p0_1) (dni cpsraa0_P0S "cpsraa0 $crqp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsraa0")) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsraa0") VOLATILE) "cpsraa0 $crqp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) crqp (f-ivc2-5u18 #x19) (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -5896,7 +5896,7 @@ ; 11001 qqqqq 11010 00000 cpslla0 crqp (p0_1) (dni cpslla0_P0S "cpslla0 $crqp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpslla0")) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpslla0") VOLATILE) "cpslla0 $crqp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) crqp (f-ivc2-5u18 #x1a) (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -5915,7 +5915,7 @@ ; 11001 00000 11100 iiiii cpsrlia0 imm5p23 (p0_1) (dni cpsrlia0_P0S "cpsrlia0 imm5p23 Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsrlia0")) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsrlia0") VOLATILE) "cpsrlia0 $imm5p23" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x1c) imm5p23 (f-ivc2-4u28 0)) (sequence () @@ -5934,7 +5934,7 @@ ; 11001 00000 11101 iiiii cpsraia0 imm5p23 (p0_1) (dni cpsraia0_P0S "cpsraia0 imm5p23 Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsraia0")) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsraia0") VOLATILE) "cpsraia0 $imm5p23" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x1d) imm5p23 (f-ivc2-4u28 0)) (sequence () @@ -5953,7 +5953,7 @@ ; 11001 00000 11110 iiiii cpsllia0 imm5p23 (p0_1) (dni cpsllia0_P0S "cpsllia0 imm5p23 Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsllia0")) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpsllia0") VOLATILE) "cpsllia0 $imm5p23" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x1e) imm5p23 (f-ivc2-4u28 0)) (sequence () @@ -5972,7 +5972,7 @@ ; 11111 qqqqq ppppp 00000 cpfsftba0s0u.b crqp,crpp (p0_1) (dni cpfsftba0s0u_b_P0S "cpfsftba0s0u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftba0s0u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftba0s0u_b") (CPTYPE V8UQI) VOLATILE) "cpfsftba0s0u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -5991,7 +5991,7 @@ ; 11111 qqqqq ppppp 00001 cpfsftba0s0.b crqp,crpp (p0_1) (dni cpfsftba0s0_b_P0S "cpfsftba0s0.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftba0s0_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftba0s0_b") (CPTYPE V8QI) VOLATILE) "cpfsftba0s0.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x1) (f-ivc2-4u28 0)) (sequence () @@ -6010,7 +6010,7 @@ ; 11111 qqqqq ppppp 00010 cpfsftbua0s0.h crqp,crpp (p0_1) (dni cpfsftbua0s0_h_P0S "cpfsftbua0s0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftbua0s0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftbua0s0_h") (CPTYPE V4HI) VOLATILE) "cpfsftbua0s0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x2) (f-ivc2-4u28 0)) (sequence () @@ -6025,7 +6025,7 @@ ; 11111 qqqqq ppppp 00011 cpfsftbla0s0.h crqp,crpp (p0_1) (dni cpfsftbla0s0_h_P0S "cpfsftbla0s0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftbla0s0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftbla0s0_h") (CPTYPE V4HI) VOLATILE) "cpfsftbla0s0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x3) (f-ivc2-4u28 0)) (sequence () @@ -6040,7 +6040,7 @@ ; 11111 qqqqq ppppp 00100 cpfaca0s0u.b crqp,crpp (p0_1) (dni cpfaca0s0u_b_P0S "cpfaca0s0u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfaca0s0u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfaca0s0u_b") (CPTYPE V8UQI) VOLATILE) "cpfaca0s0u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x4) (f-ivc2-4u28 0)) (sequence () @@ -6060,7 +6060,7 @@ ; 11111 qqqqq ppppp 00101 cpfaca0s0.b crqp,crpp (p0_1) (dni cpfaca0s0_b_P0S "cpfaca0s0.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfaca0s0_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfaca0s0_b") (CPTYPE V8QI) VOLATILE) "cpfaca0s0.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x5) (f-ivc2-4u28 0)) (sequence () @@ -6080,7 +6080,7 @@ ; 11111 qqqqq ppppp 00110 cpfacua0s0.h crqp,crpp (p0_1) (dni cpfacua0s0_h_P0S "cpfacua0s0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfacua0s0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfacua0s0_h") (CPTYPE V4HI) VOLATILE) "cpfacua0s0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x6) (f-ivc2-4u28 0)) (sequence () @@ -6096,7 +6096,7 @@ ; 11111 qqqqq ppppp 00111 cpfacla0s0.h crqp,crpp (p0_1) (dni cpfacla0s0_h_P0S "cpfacla0s0.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfacla0s0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfacla0s0_h") (CPTYPE V4HI) VOLATILE) "cpfacla0s0.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x7) (f-ivc2-4u28 0)) (sequence () @@ -6112,7 +6112,7 @@ ; 11111 qqqqq ppppp 01000 cpfsftba0s1u.b crqp,crpp (p0_1) (dni cpfsftba0s1u_b_P0S "cpfsftba0s1u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftba0s1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftba0s1u_b") (CPTYPE V8UQI) VOLATILE) "cpfsftba0s1u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x8) (f-ivc2-4u28 0)) (sequence () @@ -6131,7 +6131,7 @@ ; 11111 qqqqq ppppp 01001 cpfsftba0s1.b crqp,crpp (p0_1) (dni cpfsftba0s1_b_P0S "cpfsftba0s1.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftba0s1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftba0s1_b") (CPTYPE V8QI) VOLATILE) "cpfsftba0s1.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x9) (f-ivc2-4u28 0)) (sequence () @@ -6150,7 +6150,7 @@ ; 11111 qqqqq ppppp 01010 cpfsftbua0s1.h crqp,crpp (p0_1) (dni cpfsftbua0s1_h_P0S "cpfsftbua0s1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftbua0s1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftbua0s1_h") (CPTYPE V4HI) VOLATILE) "cpfsftbua0s1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #xa) (f-ivc2-4u28 0)) (sequence () @@ -6165,7 +6165,7 @@ ; 11111 qqqqq ppppp 01011 cpfsftbla0s1.h crqp,crpp (p0_1) (dni cpfsftbla0s1_h_P0S "cpfsftbla0s1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftbla0s1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfsftbla0s1_h") (CPTYPE V4HI) VOLATILE) "cpfsftbla0s1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #xb) (f-ivc2-4u28 0)) (sequence () @@ -6180,7 +6180,7 @@ ; 11111 qqqqq ppppp 01100 cpfaca0s1u.b crqp,crpp (p0_1) (dni cpfaca0s1u_b_P0S "cpfaca0s1u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfaca0s1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfaca0s1u_b") (CPTYPE V8UQI) VOLATILE) "cpfaca0s1u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #xc) (f-ivc2-4u28 0)) (sequence () @@ -6200,7 +6200,7 @@ ; 11111 qqqqq ppppp 01101 cpfaca0s1.b crqp,crpp (p0_1) (dni cpfaca0s1_b_P0S "cpfaca0s1.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfaca0s1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfaca0s1_b") (CPTYPE V8QI) VOLATILE) "cpfaca0s1.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #xd) (f-ivc2-4u28 0)) (sequence () @@ -6220,7 +6220,7 @@ ; 11111 qqqqq ppppp 01110 cpfacua0s1.h crqp,crpp (p0_1) (dni cpfacua0s1_h_P0S "cpfacua0s1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfacua0s1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfacua0s1_h") (CPTYPE V4HI) VOLATILE) "cpfacua0s1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #xe) (f-ivc2-4u28 0)) (sequence () @@ -6236,7 +6236,7 @@ ; 11111 qqqqq ppppp 01111 cpfacla0s1.h crqp,crpp (p0_1) (dni cpfacla0s1_h_P0S "cpfacla0s1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfacla0s1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpfacla0s1_h") (CPTYPE V4HI) VOLATILE) "cpfacla0s1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #xf) (f-ivc2-4u28 0)) (sequence () @@ -7640,7 +7640,7 @@ ; 00000000 11000 qqqqq ppppp 00000 cpadda1u.b crqp,crpp (p0_1) (dni cpadda1u_b_P1 "cpadda1u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpadda1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpadda1u_b") (CPTYPE V8UQI) VOLATILE) "cpadda1u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -7659,7 +7659,7 @@ ; 00000000 11000 qqqqq ppppp 00001 cpadda1.b crqp,crpp (p0_1) (dni cpadda1_b_P1 "cpadda1.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpadda1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpadda1_b") (CPTYPE V8QI) VOLATILE) "cpadda1.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x1) (f-ivc2-4u28 0)) (sequence () @@ -7678,7 +7678,7 @@ ; 00000000 11000 qqqqq ppppp 00010 cpaddua1.h crqp,crpp (p0_1) (dni cpaddua1_h_P1 "cpaddua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaddua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaddua1_h") (CPTYPE V4HI) VOLATILE) "cpaddua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x2) (f-ivc2-4u28 0)) (sequence () @@ -7693,7 +7693,7 @@ ; 00000000 11000 qqqqq ppppp 00011 cpaddla1.h crqp,crpp (p0_1) (dni cpaddla1_h_P1 "cpaddla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaddla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaddla1_h") (CPTYPE V4HI) VOLATILE) "cpaddla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x3) (f-ivc2-4u28 0)) (sequence () @@ -7708,7 +7708,7 @@ ; 00000000 11000 qqqqq ppppp 00100 cpaddaca1u.b crqp,crpp (p0_1) (dni cpaddaca1u_b_P1 "cpaddaca1u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaddaca1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaddaca1u_b") (CPTYPE V8UQI) VOLATILE) "cpaddaca1u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x4) (f-ivc2-4u28 0)) (sequence () @@ -7728,7 +7728,7 @@ ; 00000000 11000 qqqqq ppppp 00101 cpaddaca1.b crqp,crpp (p0_1) (dni cpaddaca1_b_P1 "cpaddaca1.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaddaca1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaddaca1_b") (CPTYPE V8QI) VOLATILE) "cpaddaca1.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x5) (f-ivc2-4u28 0)) (sequence () @@ -7748,7 +7748,7 @@ ; 00000000 11000 qqqqq ppppp 00110 cpaddacua1.h crqp,crpp (p0_1) (dni cpaddacua1_h_P1 "cpaddacua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaddacua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaddacua1_h") (CPTYPE V4HI) VOLATILE) "cpaddacua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x6) (f-ivc2-4u28 0)) (sequence () @@ -7764,7 +7764,7 @@ ; 00000000 11000 qqqqq ppppp 00111 cpaddacla1.h crqp,crpp (p0_1) (dni cpaddacla1_h_P1 "cpaddacla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaddacla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaddacla1_h") (CPTYPE V4HI) VOLATILE) "cpaddacla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x7) (f-ivc2-4u28 0)) (sequence () @@ -7780,7 +7780,7 @@ ; 00000000 11000 qqqqq ppppp 01000 cpsuba1u.b crqp,crpp (p0_1) (dni cpsuba1u_b_P1 "cpsuba1u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsuba1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsuba1u_b") (CPTYPE V8UQI) VOLATILE) "cpsuba1u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x8) (f-ivc2-4u28 0)) (sequence () @@ -7799,7 +7799,7 @@ ; 00000000 11000 qqqqq ppppp 01001 cpsuba1.b crqp,crpp (p0_1) (dni cpsuba1_b_P1 "cpsuba1.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsuba1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsuba1_b") (CPTYPE V8QI) VOLATILE) "cpsuba1.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x9) (f-ivc2-4u28 0)) (sequence () @@ -7818,7 +7818,7 @@ ; 00000000 11000 qqqqq ppppp 01010 cpsubua1.h crqp,crpp (p0_1) (dni cpsubua1_h_P1 "cpsubua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsubua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsubua1_h") (CPTYPE V4HI) VOLATILE) "cpsubua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #xa) (f-ivc2-4u28 0)) (sequence () @@ -7833,7 +7833,7 @@ ; 00000000 11000 qqqqq ppppp 01011 cpsubla1.h crqp,crpp (p0_1) (dni cpsubla1_h_P1 "cpsubla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsubla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsubla1_h") (CPTYPE V4HI) VOLATILE) "cpsubla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #xb) (f-ivc2-4u28 0)) (sequence () @@ -7848,7 +7848,7 @@ ; 00000000 11000 qqqqq ppppp 01100 cpsubaca1u.b crqp,crpp (p0_1) (dni cpsubaca1u_b_P1 "cpsubaca1u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsubaca1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsubaca1u_b") (CPTYPE V8UQI) VOLATILE) "cpsubaca1u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #xc) (f-ivc2-4u28 0)) (sequence () @@ -7868,7 +7868,7 @@ ; 00000000 11000 qqqqq ppppp 01101 cpsubaca1.b crqp,crpp (p0_1) (dni cpsubaca1_b_P1 "cpsubaca1.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsubaca1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsubaca1_b") (CPTYPE V8QI) VOLATILE) "cpsubaca1.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #xd) (f-ivc2-4u28 0)) (sequence () @@ -7888,7 +7888,7 @@ ; 00000000 11000 qqqqq ppppp 01110 cpsubacua1.h crqp,crpp (p0_1) (dni cpsubacua1_h_P1 "cpsubacua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsubacua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsubacua1_h") (CPTYPE V4HI) VOLATILE) "cpsubacua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #xe) (f-ivc2-4u28 0)) (sequence () @@ -7904,7 +7904,7 @@ ; 00000000 11000 qqqqq ppppp 01111 cpsubacla1.h crqp,crpp (p0_1) (dni cpsubacla1_h_P1 "cpsubacla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsubacla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsubacla1_h") (CPTYPE V4HI) VOLATILE) "cpsubacla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #xf) (f-ivc2-4u28 0)) (sequence () @@ -7920,7 +7920,7 @@ ; 00000000 11000 qqqqq ppppp 10000 cpabsa1u.b crqp,crpp (p0_1) (dni cpabsa1u_b_P1 "cpabsa1u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpabsa1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpabsa1u_b") (CPTYPE V8UQI) VOLATILE) "cpabsa1u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x10) (f-ivc2-4u28 0)) (sequence () @@ -7939,7 +7939,7 @@ ; 00000000 11000 qqqqq ppppp 10001 cpabsa1.b crqp,crpp (p0_1) (dni cpabsa1_b_P1 "cpabsa1.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpabsa1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpabsa1_b") (CPTYPE V8QI) VOLATILE) "cpabsa1.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x11) (f-ivc2-4u28 0)) (sequence () @@ -7958,7 +7958,7 @@ ; 00000000 11000 qqqqq ppppp 10010 cpabsua1.h crqp,crpp (p0_1) (dni cpabsua1_h_P1 "cpabsua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpabsua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpabsua1_h") (CPTYPE V4HI) VOLATILE) "cpabsua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x12) (f-ivc2-4u28 0)) (sequence () @@ -7973,7 +7973,7 @@ ; 00000000 11000 qqqqq ppppp 10011 cpabsla1.h crqp,crpp (p0_1) (dni cpabsla1_h_P1 "cpabsla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpabsla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpabsla1_h") (CPTYPE V4HI) VOLATILE) "cpabsla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x13) (f-ivc2-4u28 0)) (sequence () @@ -7988,7 +7988,7 @@ ; 00000000 11000 qqqqq ppppp 10100 cpsada1u.b crqp,crpp (p0_1) (dni cpsada1u_b_P1 "cpsada1u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsada1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsada1u_b") (CPTYPE V8UQI) VOLATILE) "cpsada1u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x14) (f-ivc2-4u28 0)) (sequence () @@ -8008,7 +8008,7 @@ ; 00000000 11000 qqqqq ppppp 10101 cpsada1.b crqp,crpp (p0_1) (dni cpsada1_b_P1 "cpsada1.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsada1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsada1_b") (CPTYPE V8QI) VOLATILE) "cpsada1.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x15) (f-ivc2-4u28 0)) (sequence () @@ -8028,7 +8028,7 @@ ; 00000000 11000 qqqqq ppppp 10110 cpsadua1.h crqp,crpp (p0_1) (dni cpsadua1_h_P1 "cpsadua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsadua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsadua1_h") (CPTYPE V4HI) VOLATILE) "cpsadua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x16) (f-ivc2-4u28 0)) (sequence () @@ -8044,7 +8044,7 @@ ; 00000000 11000 qqqqq ppppp 10111 cpsadla1.h crqp,crpp (p0_1) (dni cpsadla1_h_P1 "cpsadla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsadla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsadla1_h") (CPTYPE V4HI) VOLATILE) "cpsadla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x17) (f-ivc2-4u28 0)) (sequence () @@ -8060,7 +8060,7 @@ ; 00000000 11000 qqqqq ppppp 11011 cpseta1.h crqp,crpp (p0_1) (dni cpseta1_h_P1 "cpseta1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpseta1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpseta1_h") (CPTYPE V4HI) VOLATILE) "cpseta1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x1b) (f-ivc2-4u28 0)) (sequence () @@ -8079,7 +8079,7 @@ ; 00000000 11000 qqqqq ppppp 11100 cpsetua1.w crqp,crpp (p0_1) (dni cpsetua1_w_P1 "cpsetua1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsetua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsetua1_w") (CPTYPE V2SI) VOLATILE) "cpsetua1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x1c) (f-ivc2-4u28 0)) (sequence () @@ -8094,7 +8094,7 @@ ; 00000000 11000 qqqqq ppppp 11101 cpsetla1.w crqp,crpp (p0_1) (dni cpsetla1_w_P1 "cpsetla1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsetla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsetla1_w") (CPTYPE V2SI) VOLATILE) "cpsetla1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x18) crqp crpp (f-ivc2-5u23 #x1d) (f-ivc2-4u28 0)) (sequence () @@ -8274,7 +8274,7 @@ ; 00000000 11001 00000 10000 00000 cpacsuma1 (p0_1) (dni cpacsuma1_P1 "cpacsuma1 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpacsuma1")) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpacsuma1") VOLATILE) "cpacsuma1" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x10) (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -8294,7 +8294,7 @@ ; 00000000 11001 00000 10001 00000 cpaccpa1 (p0_1) (dni cpaccpa1_P1 "cpaccpa1 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaccpa1")) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpaccpa1") VOLATILE) "cpaccpa1" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x11) (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -8340,7 +8340,7 @@ ; 00000000 11001 qqqqq 11000 00000 cpsrla1 crqp (p0_1) (dni cpsrla1_P1 "cpsrla1 $crqp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsrla1")) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsrla1") VOLATILE) "cpsrla1 $crqp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) crqp (f-ivc2-5u18 #x18) (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -8359,7 +8359,7 @@ ; 00000000 11001 qqqqq 11001 00000 cpsraa1 crqp (p0_1) (dni cpsraa1_P1 "cpsraa1 $crqp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsraa1")) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsraa1") VOLATILE) "cpsraa1 $crqp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) crqp (f-ivc2-5u18 #x19) (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -8378,7 +8378,7 @@ ; 00000000 11001 qqqqq 11010 00000 cpslla1 crqp (p0_1) (dni cpslla1_P1 "cpslla1 $crqp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpslla1")) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpslla1") VOLATILE) "cpslla1 $crqp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) crqp (f-ivc2-5u18 #x1a) (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -8397,7 +8397,7 @@ ; 00000000 11001 00000 11100 iiiii cpsrlia1 imm5p23 (p0_1) (dni cpsrlia1_1_p1 "cpsrlia1 imm5p23 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsrlia1")) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsrlia1") VOLATILE) "cpsrlia1 $imm5p23" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x1c) imm5p23 (f-ivc2-4u28 0)) (sequence () @@ -8416,7 +8416,7 @@ ; 00000000 11001 00000 11101 iiiii cpsraia1 imm5p23 (p0_1) (dni cpsraia1_1_p1 "cpsraia1 imm5p23 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsraia1")) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsraia1") VOLATILE) "cpsraia1 $imm5p23" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x1d) imm5p23 (f-ivc2-4u28 0)) (sequence () @@ -8435,7 +8435,7 @@ ; 00000000 11001 00000 11110 iiiii cpsllia1 imm5p23 (p0_1) (dni cpsllia1_1_p1 "cpsllia1 imm5p23 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsllia1")) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsllia1") VOLATILE) "cpsllia1 $imm5p23" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x1e) imm5p23 (f-ivc2-4u28 0)) (sequence () @@ -8454,7 +8454,7 @@ ; iiiiiiii 11111 qqqqq ppppp 00000 cpfmulia1s0u.b crqp,crpp,simm8p0 (p0_1) (dni cpfmulia1s0u_b_P1 "cpfmulia1s0u.b $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulia1s0u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulia1s0u_b") (CPTYPE V8UQI) VOLATILE) "cpfmulia1s0u.b $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -8473,7 +8473,7 @@ ; iiiiiiii 11111 qqqqq ppppp 00001 cpfmulia1s0.b crqp,crpp,simm8p0 (p0_1) (dni cpfmulia1s0_b_P1 "cpfmulia1s0.b $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulia1s0_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulia1s0_b") (CPTYPE V8QI) VOLATILE) "cpfmulia1s0.b $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x1) (f-ivc2-4u28 0)) (sequence () @@ -8492,7 +8492,7 @@ ; iiiiiiii 11111 qqqqq ppppp 00010 cpfmuliua1s0.h crqp,crpp,simm8p0 (p0_1) (dni cpfmuliua1s0_h_P1 "cpfmuliua1s0.h $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmuliua1s0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmuliua1s0_h") (CPTYPE V4HI) VOLATILE) "cpfmuliua1s0.h $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x2) (f-ivc2-4u28 0)) (sequence () @@ -8507,7 +8507,7 @@ ; iiiiiiii 11111 qqqqq ppppp 00011 cpfmulila1s0.h crqp,crpp,simm8p0 (p0_1) (dni cpfmulila1s0_h_P1 "cpfmulila1s0.h $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulila1s0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulila1s0_h") (CPTYPE V4HI) VOLATILE) "cpfmulila1s0.h $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x3) (f-ivc2-4u28 0)) (sequence () @@ -8522,7 +8522,7 @@ ; iiiiiiii 11111 qqqqq ppppp 00100 cpfmadia1s0u.b crqp,crpp,simm8p0 (p0_1) (dni cpfmadia1s0u_b_P1 "cpfmadia1s0u.b $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadia1s0u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadia1s0u_b") (CPTYPE V8UQI) VOLATILE) "cpfmadia1s0u.b $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x4) (f-ivc2-4u28 0)) (sequence () @@ -8542,7 +8542,7 @@ ; iiiiiiii 11111 qqqqq ppppp 00101 cpfmadia1s0.b crqp,crpp,simm8p0 (p0_1) (dni cpfmadia1s0_b_P1 "cpfmadia1s0.b $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadia1s0_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadia1s0_b") (CPTYPE V8QI) VOLATILE) "cpfmadia1s0.b $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x5) (f-ivc2-4u28 0)) (sequence () @@ -8562,7 +8562,7 @@ ; iiiiiiii 11111 qqqqq ppppp 00110 cpfmadiua1s0.h crqp,crpp,simm8p0 (p0_1) (dni cpfmadiua1s0_h_P1 "cpfmadiua1s0.h $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadiua1s0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadiua1s0_h") (CPTYPE V4HI) VOLATILE) "cpfmadiua1s0.h $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x6) (f-ivc2-4u28 0)) (sequence () @@ -8578,7 +8578,7 @@ ; iiiiiiii 11111 qqqqq ppppp 00111 cpfmadila1s0.h crqp,crpp,simm8p0 (p0_1) (dni cpfmadila1s0_h_P1 "cpfmadila1s0.h $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadila1s0_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadila1s0_h") (CPTYPE V4HI) VOLATILE) "cpfmadila1s0.h $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x7) (f-ivc2-4u28 0)) (sequence () @@ -8594,7 +8594,7 @@ ; iiiiiiii 11111 qqqqq ppppp 01000 cpfmulia1s1u.b crqp,crpp,simm8p0 (p0_1) (dni cpfmulia1s1u_b_P1 "cpfmulia1s1u.b $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulia1s1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulia1s1u_b") (CPTYPE V8UQI) VOLATILE) "cpfmulia1s1u.b $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x8) (f-ivc2-4u28 0)) (sequence () @@ -8613,7 +8613,7 @@ ; iiiiiiii 11111 qqqqq ppppp 01001 cpfmulia1s1.b crqp,crpp,simm8p0 (p0_1) (dni cpfmulia1s1_b_P1 "cpfmulia1s1.b $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulia1s1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulia1s1_b") (CPTYPE V8QI) VOLATILE) "cpfmulia1s1.b $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x9) (f-ivc2-4u28 0)) (sequence () @@ -8632,7 +8632,7 @@ ; iiiiiiii 11111 qqqqq ppppp 01010 cpfmuliua1s1.h crqp,crpp,simm8p0 (p0_1) (dni cpfmuliua1s1_h_P1 "cpfmuliua1s1.h $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmuliua1s1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmuliua1s1_h") (CPTYPE V4HI) VOLATILE) "cpfmuliua1s1.h $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #xa) (f-ivc2-4u28 0)) (sequence () @@ -8647,7 +8647,7 @@ ; iiiiiiii 11111 qqqqq ppppp 01011 cpfmulila1s1.h crqp,crpp,simm8p0 (p0_1) (dni cpfmulila1s1_h_P1 "cpfmulila1s1.h $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulila1s1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulila1s1_h") (CPTYPE V4HI) VOLATILE) "cpfmulila1s1.h $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #xb) (f-ivc2-4u28 0)) (sequence () @@ -8662,7 +8662,7 @@ ; iiiiiiii 11111 qqqqq ppppp 01100 cpfmadia1s1u.b crqp,crpp,simm8p0 (p0_1) (dni cpfmadia1s1u_b_P1 "cpfmadia1s1u.b $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadia1s1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadia1s1u_b") (CPTYPE V8UQI) VOLATILE) "cpfmadia1s1u.b $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #xc) (f-ivc2-4u28 0)) (sequence () @@ -8682,7 +8682,7 @@ ; iiiiiiii 11111 qqqqq ppppp 01101 cpfmadia1s1.b crqp,crpp,simm8p0 (p0_1) (dni cpfmadia1s1_b_P1 "cpfmadia1s1.b $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadia1s1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadia1s1_b") (CPTYPE V8QI) VOLATILE) "cpfmadia1s1.b $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #xd) (f-ivc2-4u28 0)) (sequence () @@ -8702,7 +8702,7 @@ ; iiiiiiii 11111 qqqqq ppppp 01110 cpfmadiua1s1.h crqp,crpp,simm8p0 (p0_1) (dni cpfmadiua1s1_h_P1 "cpfmadiua1s1.h $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadiua1s1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadiua1s1_h") (CPTYPE V4HI) VOLATILE) "cpfmadiua1s1.h $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #xe) (f-ivc2-4u28 0)) (sequence () @@ -8718,7 +8718,7 @@ ; iiiiiiii 11111 qqqqq ppppp 01111 cpfmadila1s1.h crqp,crpp,simm8p0 (p0_1) (dni cpfmadila1s1_h_P1 "cpfmadila1s1.h $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadila1s1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadila1s1_h") (CPTYPE V4HI) VOLATILE) "cpfmadila1s1.h $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #xf) (f-ivc2-4u28 0)) (sequence () @@ -8734,7 +8734,7 @@ ; iiiiiiii 11111 qqqqq ppppp 10000 cpamulia1u.b crqp,crpp,simm8p0 (p0_1) (dni cpamulia1u_b_P1 "cpamulia1u.b $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamulia1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamulia1u_b") (CPTYPE V8UQI) VOLATILE) "cpamulia1u.b $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x10) (f-ivc2-4u28 0)) (sequence () @@ -8753,7 +8753,7 @@ ; iiiiiiii 11111 qqqqq ppppp 10001 cpamulia1.b crqp,crpp,simm8p0 (p0_1) (dni cpamulia1_b_P1 "cpamulia1.b $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamulia1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamulia1_b") (CPTYPE V8QI) VOLATILE) "cpamulia1.b $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x11) (f-ivc2-4u28 0)) (sequence () @@ -8772,7 +8772,7 @@ ; iiiiiiii 11111 qqqqq ppppp 10010 cpamuliua1.h crqp,crpp,simm8p0 (p0_1) (dni cpamuliua1_h_P1 "cpamuliua1.h $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamuliua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamuliua1_h") (CPTYPE V4HI) VOLATILE) "cpamuliua1.h $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x12) (f-ivc2-4u28 0)) (sequence () @@ -8787,7 +8787,7 @@ ; iiiiiiii 11111 qqqqq ppppp 10011 cpamulila1.h crqp,crpp,simm8p0 (p0_1) (dni cpamulila1_h_P1 "cpamulila1.h $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamulila1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamulila1_h") (CPTYPE V4HI) VOLATILE) "cpamulila1.h $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x13) (f-ivc2-4u28 0)) (sequence () @@ -8802,7 +8802,7 @@ ; iiiiiiii 11111 qqqqq ppppp 10100 cpamadia1u.b crqp,crpp,simm8p0 (p0_1) (dni cpamadia1u_b_P1 "cpamadia1u.b $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamadia1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamadia1u_b") (CPTYPE V8UQI) VOLATILE) "cpamadia1u.b $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x14) (f-ivc2-4u28 0)) (sequence () @@ -8822,7 +8822,7 @@ ; iiiiiiii 11111 qqqqq ppppp 10101 cpamadia1.b crqp,crpp,simm8p0 (p0_1) (dni cpamadia1_b_P1 "cpamadia1.b $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamadia1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamadia1_b") (CPTYPE V8QI) VOLATILE) "cpamadia1.b $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x15) (f-ivc2-4u28 0)) (sequence () @@ -8842,7 +8842,7 @@ ; iiiiiiii 11111 qqqqq ppppp 10110 cpamadiua1.h crqp,crpp,simm8p0 (p0_1) (dni cpamadiua1_h_P1 "cpamadiua1.h $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamadiua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamadiua1_h") (CPTYPE V4HI) VOLATILE) "cpamadiua1.h $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x16) (f-ivc2-4u28 0)) (sequence () @@ -8858,7 +8858,7 @@ ; iiiiiiii 11111 qqqqq ppppp 10111 cpamadila1.h crqp,crpp,simm8p0 (p0_1) (dni cpamadila1_h_P1 "cpamadila1.h $crqp,$crpp,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamadila1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpamadila1_h") (CPTYPE V4HI) VOLATILE) "cpamadila1.h $crqp,$crpp,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1f) crqp crpp (f-ivc2-5u23 #x17) (f-ivc2-4u28 0)) (sequence () @@ -8874,7 +8874,7 @@ ; iiiiiiii 11100 qqqqq ppppp 00 III cpfmulia1u.b crqp,crpp,imm3p25,simm8p0 (cpfm) (dni cpfmulia1u_b_P1 "cpfmulia1u.b $crqp,$crpp,imm3p25,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulia1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulia1u_b") (CPTYPE V8UQI) VOLATILE) "cpfmulia1u.b $crqp,$crpp,$imm3p25,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1c) crqp crpp (f-ivc2-2u23 #x0) imm3p25 (f-ivc2-4u28 0)) (sequence () @@ -8893,7 +8893,7 @@ ; iiiiiiii 11100 qqqqq ppppp 01 III cpfmulia1.b crqp,crpp,imm3p25,simm8p0 (cpfm) (dni cpfmulia1_b_P1 "cpfmulia1.b $crqp,$crpp,imm3p25,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulia1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulia1_b") (CPTYPE V8QI) VOLATILE) "cpfmulia1.b $crqp,$crpp,$imm3p25,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1c) crqp crpp (f-ivc2-2u23 #x1) imm3p25 (f-ivc2-4u28 0)) (sequence () @@ -8912,7 +8912,7 @@ ; iiiiiiii 11100 qqqqq ppppp 10 III cpfmuliua1.h crqp,crpp,imm3p25,simm8p0 (cpfm) (dni cpfmuliua1_h_P1 "cpfmuliua1.h $crqp,$crpp,imm3p25,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmuliua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmuliua1_h") (CPTYPE V4HI) VOLATILE) "cpfmuliua1.h $crqp,$crpp,$imm3p25,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1c) crqp crpp (f-ivc2-2u23 #x2) imm3p25 (f-ivc2-4u28 0)) (sequence () @@ -8927,7 +8927,7 @@ ; iiiiiiii 11100 qqqqq ppppp 11 III cpfmulila1.h crqp,crpp,imm3p25,simm8p0 (cpfm) (dni cpfmulila1_h_P1 "cpfmulila1.h $crqp,$crpp,imm3p25,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulila1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmulila1_h") (CPTYPE V4HI) VOLATILE) "cpfmulila1.h $crqp,$crpp,$imm3p25,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1c) crqp crpp (f-ivc2-2u23 #x3) imm3p25 (f-ivc2-4u28 0)) (sequence () @@ -8942,7 +8942,7 @@ ; iiiiiiii 11101 qqqqq ppppp 00 III cpfmadia1u.b crqp,crpp,imm3p25,simm8p0 (cpfm) (dni cpfmadia1u_b_P1 "cpfmadia1u.b $crqp,$crpp,imm3p25,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadia1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadia1u_b") (CPTYPE V8UQI) VOLATILE) "cpfmadia1u.b $crqp,$crpp,$imm3p25,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1d) crqp crpp (f-ivc2-2u23 #x0) imm3p25 (f-ivc2-4u28 0)) (sequence () @@ -8962,7 +8962,7 @@ ; iiiiiiii 11101 qqqqq ppppp 01 III cpfmadia1.b crqp,crpp,imm3p25,simm8p0 (cpfm) (dni cpfmadia1_b_P1 "cpfmadia1.b $crqp,$crpp,imm3p25,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadia1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadia1_b") (CPTYPE V8QI) VOLATILE) "cpfmadia1.b $crqp,$crpp,$imm3p25,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1d) crqp crpp (f-ivc2-2u23 #x1) imm3p25 (f-ivc2-4u28 0)) (sequence () @@ -8982,7 +8982,7 @@ ; iiiiiiii 11101 qqqqq ppppp 10 III cpfmadiua1.h crqp,crpp,imm3p25,simm8p0 (cpfm) (dni cpfmadiua1_h_P1 "cpfmadiua1.h $crqp,$crpp,imm3p25,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadiua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadiua1_h") (CPTYPE V4HI) VOLATILE) "cpfmadiua1.h $crqp,$crpp,$imm3p25,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1d) crqp crpp (f-ivc2-2u23 #x2) imm3p25 (f-ivc2-4u28 0)) (sequence () @@ -8998,7 +8998,7 @@ ; iiiiiiii 11101 qqqqq ppppp 11 III cpfmadila1.h crqp,crpp,imm3p25,simm8p0 (cpfm) (dni cpfmadila1_h_P1 "cpfmadila1.h $crqp,$crpp,imm3p25,simm8p0 Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadila1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpfmadila1_h") (CPTYPE V4HI) VOLATILE) "cpfmadila1.h $crqp,$crpp,$imm3p25,$simm8p0" (+ simm8p0 (f-ivc2-5u8 #x1d) crqp crpp (f-ivc2-2u23 #x3) imm3p25 (f-ivc2-4u28 0)) (sequence () @@ -9014,7 +9014,7 @@ ; 00000000 11110 qqqqq ppppp 00000 cpssqa1u.b crqp,crpp (p0_1) (dni cpssqa1u_b_P1 "cpssqa1u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpssqa1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpssqa1u_b") (CPTYPE V8UQI) VOLATILE) "cpssqa1u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x0) (f-ivc2-4u28 0)) (sequence () @@ -9033,7 +9033,7 @@ ; 00000000 11110 qqqqq ppppp 00001 cpssqa1.b crqp,crpp (p0_1) (dni cpssqa1_b_P1 "cpssqa1.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpssqa1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpssqa1_b") (CPTYPE V8QI) VOLATILE) "cpssqa1.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1) (f-ivc2-4u28 0)) (sequence () @@ -9052,7 +9052,7 @@ ; 00000000 11110 qqqqq ppppp 00100 cpssda1u.b crqp,crpp (p0_1) (dni cpssda1u_b_P1 "cpssda1u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpssda1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpssda1u_b") (CPTYPE V8UQI) VOLATILE) "cpssda1u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x4) (f-ivc2-4u28 0)) (sequence () @@ -9071,7 +9071,7 @@ ; 00000000 11110 qqqqq ppppp 00101 cpssda1.b crqp,crpp (p0_1) (dni cpssda1_b_P1 "cpssda1.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpssda1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpssda1_b") (CPTYPE V8QI) VOLATILE) "cpssda1.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x5) (f-ivc2-4u28 0)) (sequence () @@ -9090,7 +9090,7 @@ ; 00000000 11110 qqqqq ppppp 01000 cpmula1u.b crqp,crpp (p0_1) (dni cpmula1u_b_P1 "cpmula1u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmula1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmula1u_b") (CPTYPE V8UQI) VOLATILE) "cpmula1u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x8) (f-ivc2-4u28 0)) (sequence () @@ -9109,7 +9109,7 @@ ; 00000000 11110 qqqqq ppppp 01001 cpmula1.b crqp,crpp (p0_1) (dni cpmula1_b_P1 "cpmula1.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmula1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmula1_b") (CPTYPE V8QI) VOLATILE) "cpmula1.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x9) (f-ivc2-4u28 0)) (sequence () @@ -9128,7 +9128,7 @@ ; 00000000 11110 qqqqq ppppp 01010 cpmulua1.h crqp,crpp (p0_1) (dni cpmulua1_h_P1 "cpmulua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulua1_h") (CPTYPE V4HI) VOLATILE) "cpmulua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #xa) (f-ivc2-4u28 0)) (sequence () @@ -9143,7 +9143,7 @@ ; 00000000 11110 qqqqq ppppp 01011 cpmulla1.h crqp,crpp (p0_1) (dni cpmulla1_h_P1 "cpmulla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulla1_h") (CPTYPE V4HI) VOLATILE) "cpmulla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #xb) (f-ivc2-4u28 0)) (sequence () @@ -9158,7 +9158,7 @@ ; 00000000 11110 qqqqq ppppp 01100 cpmulua1u.w crqp,crpp (p0_1) (dni cpmulua1u_w_P1 "cpmulua1u.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulua1u_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulua1u_w") (CPTYPE V2USI) VOLATILE) "cpmulua1u.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #xc) (f-ivc2-4u28 0)) (sequence () @@ -9173,7 +9173,7 @@ ; 00000000 11110 qqqqq ppppp 01101 cpmulla1u.w crqp,crpp (p0_1) (dni cpmulla1u_w_P1 "cpmulla1u.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulla1u_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulla1u_w") (CPTYPE V2USI) VOLATILE) "cpmulla1u.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #xd) (f-ivc2-4u28 0)) (sequence () @@ -9188,7 +9188,7 @@ ; 00000000 11110 qqqqq ppppp 01110 cpmulua1.w crqp,crpp (p0_1) (dni cpmulua1_w_P1 "cpmulua1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulua1_w") (CPTYPE V2SI) VOLATILE) "cpmulua1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #xe) (f-ivc2-4u28 0)) (sequence () @@ -9203,7 +9203,7 @@ ; 00000000 11110 qqqqq ppppp 01111 cpmulla1.w crqp,crpp (p0_1) (dni cpmulla1_w_P1 "cpmulla1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulla1_w") (CPTYPE V2SI) VOLATILE) "cpmulla1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #xf) (f-ivc2-4u28 0)) (sequence () @@ -9218,7 +9218,7 @@ ; 00000000 11110 qqqqq ppppp 10000 cpmada1u.b crqp,crpp (p0_1) (dni cpmada1u_b_P1 "cpmada1u.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmada1u_b") (CPTYPE V8UQI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmada1u_b") (CPTYPE V8UQI) VOLATILE) "cpmada1u.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x10) (f-ivc2-4u28 0)) (sequence () @@ -9238,7 +9238,7 @@ ; 00000000 11110 qqqqq ppppp 10001 cpmada1.b crqp,crpp (p0_1) (dni cpmada1_b_P1 "cpmada1.b $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmada1_b") (CPTYPE V8QI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmada1_b") (CPTYPE V8QI) VOLATILE) "cpmada1.b $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x11) (f-ivc2-4u28 0)) (sequence () @@ -9258,7 +9258,7 @@ ; 00000000 11110 qqqqq ppppp 10010 cpmadua1.h crqp,crpp (p0_1) (dni cpmadua1_h_P1 "cpmadua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmadua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmadua1_h") (CPTYPE V4HI) VOLATILE) "cpmadua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x12) (f-ivc2-4u28 0)) (sequence () @@ -9274,7 +9274,7 @@ ; 00000000 11110 qqqqq ppppp 10011 cpmadla1.h crqp,crpp (p0_1) (dni cpmadla1_h_P1 "cpmadla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmadla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmadla1_h") (CPTYPE V4HI) VOLATILE) "cpmadla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x13) (f-ivc2-4u28 0)) (sequence () @@ -9290,7 +9290,7 @@ ; 00000000 11110 qqqqq ppppp 10100 cpmadua1u.w crqp,crpp (p0_1) (dni cpmadua1u_w_P1 "cpmadua1u.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmadua1u_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmadua1u_w") (CPTYPE V2USI) VOLATILE) "cpmadua1u.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x14) (f-ivc2-4u28 0)) (sequence () @@ -9306,7 +9306,7 @@ ; 00000000 11110 qqqqq ppppp 10101 cpmadla1u.w crqp,crpp (p0_1) (dni cpmadla1u_w_P1 "cpmadla1u.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmadla1u_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmadla1u_w") (CPTYPE V2USI) VOLATILE) "cpmadla1u.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x15) (f-ivc2-4u28 0)) (sequence () @@ -9322,7 +9322,7 @@ ; 00000000 11110 qqqqq ppppp 10110 cpmadua1.w crqp,crpp (p0_1) (dni cpmadua1_w_P1 "cpmadua1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmadua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmadua1_w") (CPTYPE V2SI) VOLATILE) "cpmadua1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x16) (f-ivc2-4u28 0)) (sequence () @@ -9338,7 +9338,7 @@ ; 00000000 11110 qqqqq ppppp 10111 cpmadla1.w crqp,crpp (p0_1) (dni cpmadla1_w_P1 "cpmadla1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmadla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmadla1_w") (CPTYPE V2SI) VOLATILE) "cpmadla1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x17) (f-ivc2-4u28 0)) (sequence () @@ -9354,7 +9354,7 @@ ; 00000000 11110 qqqqq ppppp 11010 cpmsbua1.h crqp,crpp (p0_1) (dni cpmsbua1_h_P1 "cpmsbua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmsbua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmsbua1_h") (CPTYPE V4HI) VOLATILE) "cpmsbua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1a) (f-ivc2-4u28 0)) (sequence () @@ -9370,7 +9370,7 @@ ; 00000000 11110 qqqqq ppppp 11011 cpmsbla1.h crqp,crpp (p0_1) (dni cpmsbla1_h_P1 "cpmsbla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmsbla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmsbla1_h") (CPTYPE V4HI) VOLATILE) "cpmsbla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1b) (f-ivc2-4u28 0)) (sequence () @@ -9386,7 +9386,7 @@ ; 00000000 11110 qqqqq ppppp 11100 cpmsbua1u.w crqp,crpp (p0_1) (dni cpmsbua1u_w_P1 "cpmsbua1u.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmsbua1u_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmsbua1u_w") (CPTYPE V2USI) VOLATILE) "cpmsbua1u.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1c) (f-ivc2-4u28 0)) (sequence () @@ -9402,7 +9402,7 @@ ; 00000000 11110 qqqqq ppppp 11101 cpmsbla1u.w crqp,crpp (p0_1) (dni cpmsbla1u_w_P1 "cpmsbla1u.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmsbla1u_w") (CPTYPE V2USI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmsbla1u_w") (CPTYPE V2USI) VOLATILE) "cpmsbla1u.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1d) (f-ivc2-4u28 0)) (sequence () @@ -9418,7 +9418,7 @@ ; 00000000 11110 qqqqq ppppp 11110 cpmsbua1.w crqp,crpp (p0_1) (dni cpmsbua1_w_P1 "cpmsbua1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmsbua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmsbua1_w") (CPTYPE V2SI) VOLATILE) "cpmsbua1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1e) (f-ivc2-4u28 0)) (sequence () @@ -9434,7 +9434,7 @@ ; 00000000 11110 qqqqq ppppp 11111 cpmsbla1.w crqp,crpp (p0_1) (dni cpmsbla1_w_P1 "cpmsbla1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmsbla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmsbla1_w") (CPTYPE V2SI) VOLATILE) "cpmsbla1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1f) (f-ivc2-4u28 0)) (sequence () @@ -9450,7 +9450,7 @@ ; 00000001 11110 qqqqq ppppp 10010 cpsmadua1.h crqp,crpp (p0_1) (dni cpsmadua1_h_P1 "cpsmadua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadua1_h") (CPTYPE V4HI) VOLATILE) "cpsmadua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x1) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x12) (f-ivc2-4u28 0)) (sequence () @@ -9466,7 +9466,7 @@ ; 00000001 11110 qqqqq ppppp 10011 cpsmadla1.h crqp,crpp (p0_1) (dni cpsmadla1_h_P1 "cpsmadla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadla1_h") (CPTYPE V4HI) VOLATILE) "cpsmadla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x1) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x13) (f-ivc2-4u28 0)) (sequence () @@ -9482,7 +9482,7 @@ ; 00000001 11110 qqqqq ppppp 10110 cpsmadua1.w crqp,crpp (p0_1) (dni cpsmadua1_w_P1 "cpsmadua1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadua1_w") (CPTYPE V2SI) VOLATILE) "cpsmadua1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x1) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x16) (f-ivc2-4u28 0)) (sequence () @@ -9498,7 +9498,7 @@ ; 00000001 11110 qqqqq ppppp 10111 cpsmadla1.w crqp,crpp (p0_1) (dni cpsmadla1_w_P1 "cpsmadla1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadla1_w") (CPTYPE V2SI) VOLATILE) "cpsmadla1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x1) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x17) (f-ivc2-4u28 0)) (sequence () @@ -9514,7 +9514,7 @@ ; 00000001 11110 qqqqq ppppp 11010 cpsmsbua1.h crqp,crpp (p0_1) (dni cpsmsbua1_h_P1 "cpsmsbua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbua1_h") (CPTYPE V4HI) VOLATILE) "cpsmsbua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x1) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1a) (f-ivc2-4u28 0)) (sequence () @@ -9530,7 +9530,7 @@ ; 00000001 11110 qqqqq ppppp 11011 cpsmsbla1.h crqp,crpp (p0_1) (dni cpsmsbla1_h_P1 "cpsmsbla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbla1_h") (CPTYPE V4HI) VOLATILE) "cpsmsbla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x1) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1b) (f-ivc2-4u28 0)) (sequence () @@ -9546,7 +9546,7 @@ ; 00000001 11110 qqqqq ppppp 11110 cpsmsbua1.w crqp,crpp (p0_1) (dni cpsmsbua1_w_P1 "cpsmsbua1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbua1_w") (CPTYPE V2SI) VOLATILE) "cpsmsbua1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x1) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1e) (f-ivc2-4u28 0)) (sequence () @@ -9562,7 +9562,7 @@ ; 00000001 11110 qqqqq ppppp 11111 cpsmsbla1.w crqp,crpp (p0_1) (dni cpsmsbla1_w_P1 "cpsmsbla1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbla1_w") (CPTYPE V2SI) VOLATILE) "cpsmsbla1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x1) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1f) (f-ivc2-4u28 0)) (sequence () @@ -9578,7 +9578,7 @@ ; 00000010 11110 qqqqq ppppp 01010 cpmulslua1.h crqp,crpp (p0_1) (dni cpmulslua1_h_P1 "cpmulslua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulslua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulslua1_h") (CPTYPE V4HI) VOLATILE) "cpmulslua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x2) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #xa) (f-ivc2-4u28 0)) (sequence () @@ -9594,7 +9594,7 @@ ; 00000010 11110 qqqqq ppppp 01011 cpmulslla1.h crqp,crpp (p0_1) (dni cpmulslla1_h_P1 "cpmulslla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulslla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulslla1_h") (CPTYPE V4HI) VOLATILE) "cpmulslla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x2) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #xb) (f-ivc2-4u28 0)) (sequence () @@ -9610,7 +9610,7 @@ ; 00000010 11110 qqqqq ppppp 01110 cpmulslua1.w crqp,crpp (p0_1) (dni cpmulslua1_w_P1 "cpmulslua1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulslua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulslua1_w") (CPTYPE V2SI) VOLATILE) "cpmulslua1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x2) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #xe) (f-ivc2-4u28 0)) (sequence () @@ -9626,7 +9626,7 @@ ; 00000010 11110 qqqqq ppppp 01111 cpmulslla1.w crqp,crpp (p0_1) (dni cpmulslla1_w_P1 "cpmulslla1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulslla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmulslla1_w") (CPTYPE V2SI) VOLATILE) "cpmulslla1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x2) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #xf) (f-ivc2-4u28 0)) (sequence () @@ -9642,7 +9642,7 @@ ; 00000011 11110 qqqqq ppppp 10010 cpsmadslua1.h crqp,crpp (p0_1) (dni cpsmadslua1_h_P1 "cpsmadslua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadslua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadslua1_h") (CPTYPE V4HI) VOLATILE) "cpsmadslua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x3) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x12) (f-ivc2-4u28 0)) (sequence () @@ -9658,7 +9658,7 @@ ; 00000011 11110 qqqqq ppppp 10011 cpsmadslla1.h crqp,crpp (p0_1) (dni cpsmadslla1_h_P1 "cpsmadslla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadslla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadslla1_h") (CPTYPE V4HI) VOLATILE) "cpsmadslla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x3) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x13) (f-ivc2-4u28 0)) (sequence () @@ -9674,7 +9674,7 @@ ; 00000011 11110 qqqqq ppppp 10110 cpsmadslua1.w crqp,crpp (p0_1) (dni cpsmadslua1_w_P1 "cpsmadslua1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadslua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadslua1_w") (CPTYPE V2SI) VOLATILE) "cpsmadslua1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x3) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x16) (f-ivc2-4u28 0)) (sequence () @@ -9690,7 +9690,7 @@ ; 00000011 11110 qqqqq ppppp 10111 cpsmadslla1.w crqp,crpp (p0_1) (dni cpsmadslla1_w_P1 "cpsmadslla1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadslla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmadslla1_w") (CPTYPE V2SI) VOLATILE) "cpsmadslla1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x3) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x17) (f-ivc2-4u28 0)) (sequence () @@ -9706,7 +9706,7 @@ ; 00000011 11110 qqqqq ppppp 11010 cpsmsbslua1.h crqp,crpp (p0_1) (dni cpsmsbslua1_h_P1 "cpsmsbslua1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbslua1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbslua1_h") (CPTYPE V4HI) VOLATILE) "cpsmsbslua1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x3) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1a) (f-ivc2-4u28 0)) (sequence () @@ -9722,7 +9722,7 @@ ; 00000011 11110 qqqqq ppppp 11011 cpsmsbslla1.h crqp,crpp (p0_1) (dni cpsmsbslla1_h_P1 "cpsmsbslla1.h $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbslla1_h") (CPTYPE V4HI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbslla1_h") (CPTYPE V4HI) VOLATILE) "cpsmsbslla1.h $crqp,$crpp" (+ (f-ivc2-8u0 #x3) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1b) (f-ivc2-4u28 0)) (sequence () @@ -9738,7 +9738,7 @@ ; 00000011 11110 qqqqq ppppp 11110 cpsmsbslua1.w crqp,crpp (p0_1) (dni cpsmsbslua1_w_P1 "cpsmsbslua1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbslua1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbslua1_w") (CPTYPE V2SI) VOLATILE) "cpsmsbslua1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x3) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1e) (f-ivc2-4u28 0)) (sequence () @@ -9754,7 +9754,7 @@ ; 00000011 11110 qqqqq ppppp 11111 cpsmsbslla1.w crqp,crpp (p0_1) (dni cpsmsbslla1_w_P1 "cpsmsbslla1.w $crqp,$crpp Pn" - (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbslla1_w") (CPTYPE V2SI)) + (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpsmsbslla1_w") (CPTYPE V2SI) VOLATILE) "cpsmsbslla1.w $crqp,$crpp" (+ (f-ivc2-8u0 #x3) (f-ivc2-5u8 #x1e) crqp crpp (f-ivc2-5u23 #x1f) (f-ivc2-4u28 0)) (sequence () diff --git a/gcc/config/mep/mep.c b/gcc/config/mep/mep.c index 88d6a0761a5..5bb372ad31f 100644 --- a/gcc/config/mep/mep.c +++ b/gcc/config/mep/mep.c @@ -2525,6 +2525,13 @@ mep_interrupt_saved_reg (int r) /* Functions we call might clobber these. */ if (call_used_regs[r] && !fixed_regs[r]) return true; + /* Additional registers that need to be saved for IVC2. */ + if (TARGET_IVC2 + && (r == FIRST_CCR_REGNO + 1 + || (r >= FIRST_CCR_REGNO + 8 && r <= FIRST_CCR_REGNO + 11) + || (r >= FIRST_CCR_REGNO + 16 && r <= FIRST_CCR_REGNO + 31))) + return true; + return false; } @@ -7228,19 +7235,6 @@ mep_handle_option (size_t code, for (i=6; i<8; i++) call_used_regs[i+48] = 0; - call_used_regs[FIRST_CCR_REGNO + 1] = 0; - fixed_regs[FIRST_CCR_REGNO + 1] = 0; - for (i=8; i<=11; i++) - { - call_used_regs[FIRST_CCR_REGNO + i] = 0; - fixed_regs[FIRST_CCR_REGNO + i] = 0; - } - for (i=16; i<=31; i++) - { - call_used_regs[FIRST_CCR_REGNO + i] = 0; - fixed_regs[FIRST_CCR_REGNO + i] = 0; - } - #define RN(n,s) reg_names[FIRST_CCR_REGNO + n] = s RN (0, "$csar0"); RN (1, "$cc"); diff --git a/gcc/config/mep/mep.h b/gcc/config/mep/mep.h index 511abfcfc2d..7c69a5d4fba 100644 --- a/gcc/config/mep/mep.h +++ b/gcc/config/mep/mep.h @@ -34,7 +34,6 @@ along with GCC; see the file COPYING3. If not see -D__vliw=__attribute__((vliw)) \ -D__interrupt=__attribute__((interrupt)) \ -D__disinterrupt=__attribute__((disinterrupt)) \ --D__cop=__attribute__((cop)) \ %{!meb:%{!mel:-D__BIG_ENDIAN__}} \ %{meb:-U__LITTLE_ENDIAN__ -D__BIG_ENDIAN__} \ %{mel:-U__BIG_ENDIAN__ -D__LITTLE_ENDIAN__} \ @@ -492,8 +491,6 @@ extern unsigned int mep_selected_isa; -#define FRAME_POINTER_REQUIRED 0 - #define ELIMINABLE_REGS \ { \ {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ @@ -852,9 +849,3 @@ typedef struct The typical use of this macro is to handle addresses containing a label_ref or symbol_ref within an UNSPEC. */ #define FIND_BASE_TERM(X) mep_find_base_term (X) - -/* start-sanitize-never */ - -#define INCLUDE_MEP_EEMBC -#define NO_GCSE_BACK_EDGE_INSERTIONS -/* end-sanitize-never */ diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h index bbae18a13a5..d5d6eeea8d5 100644 --- a/gcc/config/mips/mips-protos.h +++ b/gcc/config/mips/mips-protos.h @@ -1,6 +1,6 @@ /* Prototypes of target machine for GNU compiler. MIPS version. Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2001, 2002, 2003, 2004, 2005, 2007, 2008 + 1999, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by A. Lichnewsky (lich@inria.inria.fr). Changed by Michael Meissner (meissner@osf.org). @@ -272,7 +272,6 @@ extern void mips_finish_declare_object (FILE *, tree, int, int); extern bool mips_small_data_pattern_p (rtx); extern rtx mips_rewrite_small_data (rtx); -extern bool mips_frame_pointer_required (void); extern HOST_WIDE_INT mips_initial_elimination_offset (int, int); extern rtx mips_return_addr (int, rtx); extern enum mips_loadgp_style mips_current_loadgp_style (void); diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 62753a3fea7..361589282ec 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -8918,9 +8918,9 @@ mips_current_loadgp_style (void) return TARGET_NEWABI ? LOADGP_NEWABI : LOADGP_OLDABI; } -/* Implement FRAME_POINTER_REQUIRED. */ +/* Implement TARGET_FRAME_POINTER_REQUIRED. */ -bool +static bool mips_frame_pointer_required (void) { /* If the function contains dynamic stack allocations, we need to @@ -14931,6 +14931,9 @@ mips_final_postscan_insn (FILE *file, rtx insn, rtx *opvec, int noperands) #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_P mips_legitimate_address_p +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED mips_frame_pointer_required + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-mips.h" diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 3d2fcac45f5..c8ea60590d1 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1767,8 +1767,6 @@ enum mips_code_readable_setting { #define HARD_FRAME_POINTER_REGNUM \ (TARGET_MIPS16 ? GP_REG_FIRST + 17 : GP_REG_FIRST + 30) -#define FRAME_POINTER_REQUIRED (mips_frame_pointer_required ()) - /* Register in which static-chain is passed to a function. */ #define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 15) diff --git a/gcc/config/mmix/mmix.c b/gcc/config/mmix/mmix.c index d2115a5d703..f81512401f6 100644 --- a/gcc/config/mmix/mmix.c +++ b/gcc/config/mmix/mmix.c @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for MMIX. - Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 + Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by Hans-Peter Nilsson (hp@bitrange.com) @@ -36,7 +36,7 @@ along with GCC; see the file COPYING3. If not see #include "toplev.h" #include "recog.h" #include "ggc.h" -#include "dwarf2.h" +#include "elf/dwarf2.h" #include "debug.h" #include "tm_p.h" #include "integrate.h" @@ -137,6 +137,7 @@ static bool mmix_rtx_costs (rtx, int, int, int *, bool); static rtx mmix_struct_value_rtx (tree, int); static bool mmix_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, const_tree, bool); +static bool mmix_frame_pointer_required (void); /* Target structure macros. Listed by node. See `Using and Porting GCC' for a general description. */ @@ -210,6 +211,9 @@ static bool mmix_pass_by_reference (CUMULATIVE_ARGS *, #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED mmix_frame_pointer_required + struct gcc_target targetm = TARGET_INITIALIZER; /* Functions that are expansions for target macros. @@ -2697,6 +2701,17 @@ mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED, return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM); } +/* Worker function for TARGET_FRAME_POINTER_REQUIRED. + + FIXME: Is this requirement built-in? Anyway, we should try to get rid + of it; we can deduce the value. */ + +bool +mmix_frame_pointer_required (void) +{ + return (cfun->has_nonlocal_label); +} + /* * Local variables: * eval: (c-set-style "gnu") diff --git a/gcc/config/mmix/mmix.h b/gcc/config/mmix/mmix.h index 03a747f8cfe..72e35680ef5 100644 --- a/gcc/config/mmix/mmix.h +++ b/gcc/config/mmix/mmix.h @@ -585,9 +585,6 @@ enum reg_class /* Node: Elimination */ -/* FIXME: Is this requirement built-in? Anyway, we should try to get rid - of it; we can deduce the value. */ -#define FRAME_POINTER_REQUIRED cfun->has_nonlocal_label /* The frame-pointer is stored in a location that either counts to the offset of incoming parameters, or that counts to the offset of the diff --git a/gcc/config/moxie/moxie-protos.h b/gcc/config/moxie/moxie-protos.h index d475aac6a69..17bb4fc7cf7 100644 --- a/gcc/config/moxie/moxie-protos.h +++ b/gcc/config/moxie/moxie-protos.h @@ -17,12 +17,15 @@ You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ +extern void moxie_override_options (void); extern void moxie_expand_prologue (void); extern void moxie_expand_epilogue (void); extern int moxie_initial_elimination_offset (int, int); -extern rtx moxie_function_value (tree, tree, bool ATTRIBUTE_UNUSED); +extern rtx moxie_function_value (const_tree, const_tree, + bool ATTRIBUTE_UNUSED); extern void moxie_print_operand (FILE *, rtx, int); extern void moxie_print_operand_address (FILE *, rtx); #ifdef RTX_CODE -extern rtx moxie_function_arg (CUMULATIVE_ARGS, enum machine_mode, tree, int); +extern rtx moxie_function_arg (CUMULATIVE_ARGS, + enum machine_mode, tree, int); #endif /* RTX_CODE */ diff --git a/gcc/config/moxie/moxie.c b/gcc/config/moxie/moxie.c index 03e9f3f2485..897717b40df 100644 --- a/gcc/config/moxie/moxie.c +++ b/gcc/config/moxie/moxie.c @@ -72,8 +72,8 @@ moxie_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) We always return values in register $r0 for moxie. */ rtx -moxie_function_value (tree valtype, - tree fntype_or_decl ATTRIBUTE_UNUSED, +moxie_function_value (const_tree valtype, + const_tree fntype_or_decl ATTRIBUTE_UNUSED, bool outgoing ATTRIBUTE_UNUSED) { return gen_rtx_REG (TYPE_MODE (valtype), MOXIE_R0); @@ -273,14 +273,25 @@ moxie_expand_prologue (void) if (cfun->machine->size_for_adjusting_sp > 0) { - insn = - emit_insn (gen_movsi (gen_rtx_REG (Pmode, MOXIE_R12), - GEN_INT (-cfun->machine->size_for_adjusting_sp))); - RTX_FRAME_RELATED_P (insn) = 1; - insn = emit_insn (gen_addsi3 (stack_pointer_rtx, - stack_pointer_rtx, - gen_rtx_REG (Pmode, MOXIE_R12))); - RTX_FRAME_RELATED_P (insn) = 1; + if (cfun->machine->size_for_adjusting_sp <= 255) + { + insn = emit_insn (gen_subsi3 (stack_pointer_rtx, + stack_pointer_rtx, + GEN_INT (cfun->machine->size_for_adjusting_sp))); + RTX_FRAME_RELATED_P (insn) = 1; + } + else + { + insn = + emit_insn (gen_movsi + (gen_rtx_REG (Pmode, MOXIE_R12), + GEN_INT (-cfun->machine->size_for_adjusting_sp))); + RTX_FRAME_RELATED_P (insn) = 1; + insn = emit_insn (gen_addsi3 (stack_pointer_rtx, + stack_pointer_rtx, + gen_rtx_REG (Pmode, MOXIE_R12))); + RTX_FRAME_RELATED_P (insn) = 1; + } } } @@ -293,26 +304,25 @@ moxie_expand_epilogue (void) if (cfun->machine->callee_saved_reg_size != 0) { reg = gen_rtx_REG (Pmode, MOXIE_R12); - emit_move_insn (reg, - GEN_INT (-cfun->machine->callee_saved_reg_size)); - emit_insn (gen_addsi3 (reg, reg, hard_frame_pointer_rtx)); - insn = emit_move_insn (stack_pointer_rtx, reg); - RTX_FRAME_RELATED_P (insn) = 1; - add_reg_note (insn, REG_CFA_DEF_CFA, - plus_constant (stack_pointer_rtx, - cfun->machine->callee_saved_reg_size)); + if (cfun->machine->callee_saved_reg_size <= 255) + { + emit_move_insn (reg, hard_frame_pointer_rtx); + emit_insn (gen_subsi3 + (reg, reg, + GEN_INT (cfun->machine->callee_saved_reg_size))); + } + else + { + emit_move_insn (reg, + GEN_INT (-cfun->machine->callee_saved_reg_size)); + emit_insn (gen_addsi3 (reg, reg, hard_frame_pointer_rtx)); + } for (regno = FIRST_PSEUDO_REGISTER; regno-- > 0; ) if (!fixed_regs[regno] && !call_used_regs[regno] && df_regs_ever_live_p (regno)) { - reg = gen_rtx_REG (Pmode, regno); - insn = emit_insn (gen_movsi_pop (reg)); - RTX_FRAME_RELATED_P (insn) = 1; - add_reg_note (insn, REG_CFA_ADJUST_CFA, - gen_rtx_SET (VOIDmode, stack_pointer_rtx, - plus_constant (stack_pointer_rtx, - UNITS_PER_WORD))); - add_reg_note (insn, REG_CFA_RESTORE, reg); + rtx preg = gen_rtx_REG (Pmode, regno); + insn = emit_insn (gen_movsi_pop (reg, preg)); } } @@ -475,6 +485,9 @@ moxie_arg_partial_bytes (CUMULATIVE_ARGS *cum, #undef TARGET_FUNCTION_VALUE #define TARGET_FUNCTION_VALUE moxie_function_value +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED hook_bool_void_true + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-moxie.h" diff --git a/gcc/config/moxie/moxie.h b/gcc/config/moxie/moxie.h index cbe8eed0f61..bf3d7e3eb6b 100644 --- a/gcc/config/moxie/moxie.h +++ b/gcc/config/moxie/moxie.h @@ -127,7 +127,7 @@ enum reg_class NO_REGS, GENERAL_REGS, SPECIAL_REGS, - CC_REG, + CC_REGS, ALL_REGS, LIM_REG_CLASSES }; @@ -156,7 +156,7 @@ enum reg_class "NO_REGS", \ "GENERAL_REGS", \ "SPECIAL_REGS", \ - "CC_REG", \ + "CC_REGS", \ "ALL_REGS" } #define FIXED_REGISTERS { 1, 1, 0, 0, \ @@ -183,7 +183,7 @@ enum reg_class /* A C expression whose value is a register class containing hard register REGNO. */ #define REGNO_REG_CLASS(R) ((R < MOXIE_PC) ? GENERAL_REGS : \ - (R == MOXIE_CC ? CC_REG : SPECIAL_REGS)) + (R == MOXIE_CC ? CC_REGS : SPECIAL_REGS)) /* A C expression for the number of consecutive hard registers, starting at register number REGNO, required to hold a value of mode @@ -519,8 +519,6 @@ do \ an immediate operand on the target machine. */ #define LEGITIMATE_CONSTANT_P(X) 1 -#define FRAME_POINTER_REQUIRED 1 - /* A C expression that is 1 if the RTX X is a constant which is a valid address. */ #define CONSTANT_ADDRESS_P(X) CONSTANT_P(X) diff --git a/gcc/config/moxie/moxie.md b/gcc/config/moxie/moxie.md index 7f3729fdad5..02072f48388 100644 --- a/gcc/config/moxie/moxie.md +++ b/gcc/config/moxie/moxie.md @@ -195,10 +195,10 @@ ;; Pop a register from the stack (define_insn "movsi_pop" - [(set:SI (match_operand:SI 0 "register_operand" "=r") - (mem:SI (post_inc:SI (reg:SI 1))))] + [(set:SI (match_operand:SI 1 "register_operand" "=r") + (mem:SI (post_inc:SI (match_operand:SI 0 "register_operand" "r"))))] "" - "pop $sp, %0") + "pop %0, %1") (define_expand "movsi" [(set (match_operand:SI 0 "general_operand" "") diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index 0d03ff52615..ed64d5de2fe 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -93,7 +93,7 @@ static inline rtx force_mode (enum machine_mode, rtx); static void pa_reorg (void); static void pa_combine_instructions (void); static int pa_can_combine_p (rtx, rtx, rtx, int, rtx, rtx, rtx); -static int forward_branch_p (rtx); +static bool forward_branch_p (rtx); static void compute_zdepwi_operands (unsigned HOST_WIDE_INT, unsigned *); static int compute_movmem_length (rtx); static int compute_clrmem_length (rtx); @@ -4751,6 +4751,7 @@ pa_adjust_insn_length (rtx insn, int length) /* Adjust a short backwards conditional with an unfilled delay slot. */ if (GET_CODE (pat) == SET && length == 4 + && JUMP_LABEL (insn) != NULL_RTX && ! forward_branch_p (insn)) return 4; else if (GET_CODE (pat) == PARALLEL @@ -8578,22 +8579,28 @@ non_hard_reg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) return ! (GET_CODE (op) == REG && REGNO (op) < FIRST_PSEUDO_REGISTER); } -/* Return 1 if INSN branches forward. Should be using insn_addresses - to avoid walking through all the insns... */ -static int +/* Return TRUE if INSN branches forward. */ + +static bool forward_branch_p (rtx insn) { - rtx label = JUMP_LABEL (insn); + rtx lab = JUMP_LABEL (insn); + + /* The INSN must have a jump label. */ + gcc_assert (lab != NULL_RTX); + + if (INSN_ADDRESSES_SET_P ()) + return INSN_ADDRESSES (INSN_UID (lab)) > INSN_ADDRESSES (INSN_UID (insn)); while (insn) { - if (insn == label) - break; + if (insn == lab) + return true; else insn = NEXT_INSN (insn); } - return (insn == label); + return false; } /* Return 1 if OP is an equality comparison, else return 0. */ diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index 576916f5b7b..3b0ddeda64a 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -1,6 +1,7 @@ /* Definitions of target machine for GNU compiler, for the HP Spectrum. Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, - 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. + 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 + Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for Software Science at the University of Utah. @@ -356,10 +357,6 @@ typedef struct GTY(()) machine_function /* Base register for access to local variables of the function. */ #define FRAME_POINTER_REGNUM 3 -/* Value should be nonzero if functions must have frame pointers. */ -#define FRAME_POINTER_REQUIRED \ - (cfun->calls_alloca) - /* Don't allow hard registers to be renamed into r2 unless r2 is already live or already being saved (due to eh). */ diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 1f5a69b9352..a20f406d347 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -7130,7 +7130,7 @@ (clobber (match_scratch:SI 2 "=&r")) (clobber (match_scratch:SI 3 "=&r"))] "flag_pic" - "{bl .+8,%2\;depi 0,31,2,%2|mfia %2}\;ldo {16|20}(%2),%2\;\ + "{bl .+8,%2\;depi 0,31,2,%2|mfia %2}\;ldo {%l1-.|%l1+4-.}(%2),%2\;\ {ldwx|ldw},s %0(%2),%3\;{addl|add,l} %2,%3,%3\;bv,n %%r0(%3)" [(set_attr "type" "multi") (set (attr "length") @@ -7148,7 +7148,7 @@ (clobber (match_scratch:DI 2 "=&r")) (clobber (match_scratch:DI 3 "=&r"))] "" - "mfia %2\;ldo 24(%2),%2\;ldw,s %0(%2),%3\;extrd,s %3,63,32,%3\;\ + "mfia %2\;ldo %l1+4-.(%2),%2\;ldw,s %0(%2),%3\;extrd,s %3,63,32,%3\;\ add,l %2,%3,%3\;bv,n %%r0(%3)" [(set_attr "type" "multi") (set_attr "length" "24")]) diff --git a/gcc/config/rs6000/darwin-fallback.c b/gcc/config/rs6000/darwin-fallback.c index 4591071ea74..e4d5afe50ac 100644 --- a/gcc/config/rs6000/darwin-fallback.c +++ b/gcc/config/rs6000/darwin-fallback.c @@ -28,7 +28,7 @@ #include "tsystem.h" #include "coretypes.h" #include "tm.h" -#include "dwarf2.h" +#include "elf/dwarf2.h" #include "unwind.h" #include "unwind-dw2.h" #include <stdint.h> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 20657215128..aa97f381820 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -13471,7 +13471,7 @@ print_operand (FILE *file, rtx x, int code) && GET_CODE (tmp) == PRE_MODIFY) tmp = XEXP (tmp, 1); if (GET_CODE (tmp) == REG) - fprintf (file, "%s,%s", reg_names[0], reg_names[REGNO (tmp)]); + fprintf (file, "0,%s", reg_names[REGNO (tmp)]); else { if (!GET_CODE (tmp) == PLUS diff --git a/gcc/config/score/score.h b/gcc/config/score/score.h index e6c8b7504ba..ed3f1a4b3c0 100644 --- a/gcc/config/score/score.h +++ b/gcc/config/score/score.h @@ -557,11 +557,6 @@ extern enum reg_class score_char_to_class[256]; #define STATIC_CHAIN_REGNUM 23 /* Elimination Frame Pointer and Arg Pointer */ -/* Value should be nonzero if functions must have frame pointers. - Zero means the frame pointer need not be set up (and parms - may be accessed via the stack pointer) in functions that seem suitable. - This is computed in `reload', in reload1.c. */ -#define FRAME_POINTER_REQUIRED cfun->calls_alloca #define ELIMINABLE_REGS \ {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index 7c72f0098f1..08cae31b995 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -38,7 +38,7 @@ along with GCC; see the file COPYING3. If not see #include "toplev.h" #include "recog.h" #include "integrate.h" -#include "dwarf2.h" +#include "elf/dwarf2.h" #include "tm_p.h" #include "target.h" #include "target-def.h" diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index 7f90147bccd..d8b9a297834 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -1031,11 +1031,6 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \ { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},} -/* Given FROM and TO register numbers, say whether this elimination - is allowed. */ -#define CAN_ELIMINATE(FROM, TO) \ - (!((FROM) == HARD_FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED)) - /* Define the offset between two registers, one to be eliminated, and the other its replacement, at the start of a routine. */ diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h index 8b3547ad907..552d5596331 100644 --- a/gcc/config/sparc/sparc-protos.h +++ b/gcc/config/sparc/sparc-protos.h @@ -1,5 +1,5 @@ /* Prototypes of target machine for SPARC. - Copyright (C) 1999, 2000, 2003, 2004, 2005, 2007, 2008 + Copyright (C) 1999, 2000, 2003, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@cygnus.com). 64-bit SPARC-V9 support by Michael Tiemann, Jim Wilson, and Doug Evans, @@ -50,6 +50,7 @@ extern int short_branch (int, int); extern void sparc_profile_hook (int); extern void sparc_override_options (void); extern void sparc_output_scratch_registers (FILE *); +extern bool sparc_can_eliminate (const int, const int); #ifdef RTX_CODE extern enum machine_mode select_cc_mode (enum rtx_code, rtx, rtx); diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index af67a46eaf7..baba1d98057 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -417,6 +417,7 @@ static int sparc_arg_partial_bytes (CUMULATIVE_ARGS *, static void sparc_dwarf_handle_frame_unspec (const char *, rtx, int); static void sparc_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; static void sparc_file_end (void); +static bool sparc_frame_pointer_required (void); #ifdef TARGET_ALTERNATE_LONG_DOUBLE_MANGLING static const char *sparc_mangle_type (const_tree); #endif @@ -591,6 +592,9 @@ static bool fpu_option_set = false; #undef TARGET_ASM_FILE_END #define TARGET_ASM_FILE_END sparc_file_end +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED sparc_frame_pointer_required + #ifdef TARGET_ALTERNATE_LONG_DOUBLE_MANGLING #undef TARGET_MANGLE_TYPE #define TARGET_MANGLE_TYPE sparc_mangle_type @@ -9137,4 +9141,24 @@ sparc_expand_compare_and_swap_12 (rtx result, rtx mem, rtx oldval, rtx newval) emit_move_insn (result, gen_lowpart (GET_MODE (result), res)); } +/* Implement TARGET_FRAME_POINTER_REQUIRED. */ + +bool +sparc_frame_pointer_required (void) +{ + return !(leaf_function_p () && only_leaf_regs_used ()); +} + +/* The way this is structured, we can't eliminate SFP in favor of SP + if the frame pointer is required: we want to use the SFP->HFP elimination + in that case. But the test in update_eliminables doesn't know we are + assuming below that we only do the former elimination. */ + +bool +sparc_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to) +{ + return (to == HARD_FRAME_POINTER_REGNUM + || !targetm.frame_pointer_required ()); +} + #include "gt-sparc.h" diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 406ee68cf2f..31c74095f75 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -967,13 +967,6 @@ extern int sparc_mode_class[]; } \ } while (0) -/* Value should be nonzero if functions must have frame pointers. - Zero means the frame pointer need not be set up (and parms - may be accessed via the stack pointer) in functions that seem suitable. - Used in flow.c, global.c, ra.c and reload1.c. */ -#define FRAME_POINTER_REQUIRED \ - (! (leaf_function_p () && only_leaf_regs_used ())) - /* Base register for access to arguments of the function. */ #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM @@ -1390,8 +1383,7 @@ extern char leaf_reg_remap[]; if the frame pointer is required: we want to use the SFP->HFP elimination in that case. But the test in update_eliminables doesn't know we are assuming below that we only do the former elimination. */ -#define CAN_ELIMINATE(FROM, TO) \ - ((TO) == HARD_FRAME_POINTER_REGNUM || !FRAME_POINTER_REQUIRED) +#define CAN_ELIMINATE(FROM, TO) sparc_can_eliminate((FROM), (TO)) /* We always pretend that this is a leaf function because if it's not, there's no point in trying to eliminate the frame pointer. If it diff --git a/gcc/config/vax/lib1funcs.asm b/gcc/config/vax/lib1funcs.asm new file mode 100644 index 00000000000..1d57b56dad9 --- /dev/null +++ b/gcc/config/vax/lib1funcs.asm @@ -0,0 +1,92 @@ +/* Copyright (C) 2009 Free Software Foundation, Inc. + This file is part of GCC. + Contributed by Maciej W. Rozycki <macro@linux-mips.org>. + + This file is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 3, or (at your option) any + later version. + + This file is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +#ifdef L_udivsi3 + .text + .globl __udivsi3 + .type __udivsi3, @function +__udivsi3: + .word 0 + movl 8(%ap), %r1 + blss 0f /* Check bit #31 of divisor. */ + movl 4(%ap), %r2 + blss 1f /* Check bit #31 of dividend. */ + + /* Both zero, do a standard division. */ + + divl3 %r1, %r2, %r0 + ret + + /* MSB of divisor set, only 1 or 0 may result. */ +0: + decl %r1 + clrl %r0 + cmpl %r1, 4(%ap) + adwc $0, %r0 + ret + + /* MSB of dividend set, do an extended division. */ +1: + clrl %r3 + ediv %r1, %r2, %r0, %r3 + ret + .size __udivsi3, . - __udivsi3 + .previous +#endif + +#ifdef L_umodsi3 + .text + .globl __umodsi3 + .type __umodsi3, @function +__umodsi3: + .word 0 + movl 8(%ap), %r1 + blss 0f /* Check bit #31 of divisor. */ + movl 4(%ap), %r2 + blss 1f /* Check bit #31 of dividend. */ + + /* Both zero, do a standard division. */ + + divl3 %r1, %r2, %r0 + mull2 %r0, %r1 + subl3 %r1, %r2, %r0 + ret + + /* MSB of divisor set, subtract the divisor at most once. */ +0: + movl 4(%ap), %r2 + clrl %r0 + cmpl %r2, %r1 + sbwc $0, %r0 + bicl2 %r0, %r1 + subl3 %r1, %r2, %r0 + ret + + /* MSB of dividend set, do an extended division. */ +1: + clrl %r3 + ediv %r1, %r2, %r3, %r0 + ret + .size __umodsi3, . - __umodsi3 + .previous +#endif diff --git a/gcc/config/vax/linux.h b/gcc/config/vax/linux.h index c8e50cddcbb..1087069adbb 100644 --- a/gcc/config/vax/linux.h +++ b/gcc/config/vax/linux.h @@ -37,6 +37,10 @@ along with GCC; see the file COPYING3. If not see #undef TARGET_DEFAULT #define TARGET_DEFAULT (MASK_QMATH | MASK_G_FLOAT) +/* Use standard names for udiv and umod libgcc calls. */ +#undef TARGET_BSD_DIVMOD +#define TARGET_BSD_DIVMOD 0 + #undef CPP_SPEC #define CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}" diff --git a/gcc/config/vax/t-linux b/gcc/config/vax/t-linux new file mode 100644 index 00000000000..9af1edb0fab --- /dev/null +++ b/gcc/config/vax/t-linux @@ -0,0 +1,2 @@ +LIB1ASMSRC = vax/lib1funcs.asm +LIB1ASMFUNCS = _udivsi3 _umodsi3 diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c index a783b6f7131..4dfaa2e9dd1 100644 --- a/gcc/config/vax/vax.c +++ b/gcc/config/vax/vax.c @@ -98,6 +98,9 @@ static rtx vax_builtin_setjmp_frame_value (void); #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_P vax_legitimate_address_p +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED hook_bool_void_true + struct gcc_target targetm = TARGET_INITIALIZER; /* Set global variables as needed for the options enabled. */ @@ -172,8 +175,11 @@ vax_file_start (void) static void vax_init_libfuncs (void) { - set_optab_libfunc (udiv_optab, SImode, TARGET_ELF ? "*__udiv" : "*udiv"); - set_optab_libfunc (umod_optab, SImode, TARGET_ELF ? "*__urem" : "*urem"); + if (TARGET_BSD_DIVMOD) + { + set_optab_libfunc (udiv_optab, SImode, TARGET_ELF ? "*__udiv" : "*udiv"); + set_optab_libfunc (umod_optab, SImode, TARGET_ELF ? "*__urem" : "*urem"); + } } /* This is like nonimmediate_operand with a restriction on the type of MEM. */ diff --git a/gcc/config/vax/vax.h b/gcc/config/vax/vax.h index e22fbd74386..0ac7ba58b57 100644 --- a/gcc/config/vax/vax.h +++ b/gcc/config/vax/vax.h @@ -63,6 +63,9 @@ along with GCC; see the file COPYING3. If not see /* Nonzero if ELF. Redefined by vax/elf.h. */ #define TARGET_ELF 0 +/* Use BSD names for udiv and umod libgcc calls. */ +#define TARGET_BSD_DIVMOD 1 + /* Default target_flags if no switches specified. */ #ifndef TARGET_DEFAULT @@ -175,12 +178,6 @@ along with GCC; see the file COPYING3. If not see /* Base register for access to local variables of the function. */ #define FRAME_POINTER_REGNUM VAX_FP_REGNUM -/* Value should be nonzero if functions must have frame pointers. - Zero means the frame pointer need not be set up (and parms - may be accessed via the stack pointer) in functions that seem suitable. - This is computed in `reload', in reload1.c. */ -#define FRAME_POINTER_REQUIRED 1 - /* Offset from the frame pointer register value to the top of stack. */ #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0 diff --git a/gcc/config/xtensa/unwind-dw2-xtensa.c b/gcc/config/xtensa/unwind-dw2-xtensa.c index e7ca86a10fb..235b8a12563 100644 --- a/gcc/config/xtensa/unwind-dw2-xtensa.c +++ b/gcc/config/xtensa/unwind-dw2-xtensa.c @@ -28,7 +28,7 @@ #include "tsystem.h" #include "coretypes.h" #include "tm.h" -#include "dwarf2.h" +#include "elf/dwarf2.h" #include "unwind.h" #ifdef __USING_SJLJ_EXCEPTIONS__ # define NO_SIZE_OF_ENCODED_VALUE diff --git a/gcc/config/xtensa/xtensa-protos.h b/gcc/config/xtensa/xtensa-protos.h index c60917f07ed..73176f6f8f6 100644 --- a/gcc/config/xtensa/xtensa-protos.h +++ b/gcc/config/xtensa/xtensa-protos.h @@ -1,5 +1,5 @@ /* Prototypes of target machine for GNU compiler for Xtensa. - Copyright 2001, 2002, 2003, 2004, 2005, 2007, 2008 + Copyright 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. @@ -84,7 +84,6 @@ extern void xtensa_setup_frame_addresses (void); extern int xtensa_dbx_register_number (int); extern void override_options (void); extern long compute_frame_size (int); -extern int xtensa_frame_pointer_required (void); extern void xtensa_expand_prologue (void); extern void order_regs_for_local_alloc (void); extern void xtensa_trampoline_template (FILE *); diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c index 773223b2f35..38f300aeef7 100644 --- a/gcc/config/xtensa/xtensa.c +++ b/gcc/config/xtensa/xtensa.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Tensilica's Xtensa architecture. - Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 + Copyright 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. @@ -145,6 +145,7 @@ static void xtensa_init_builtins (void); static tree xtensa_fold_builtin (tree, tree, bool); static rtx xtensa_expand_builtin (tree, rtx, rtx, enum machine_mode, int); static void xtensa_va_start (tree, rtx); +static bool xtensa_frame_pointer_required (void); static const int reg_nonleaf_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER; @@ -227,6 +228,9 @@ static const int reg_nonleaf_alloc_order[FIRST_PSEUDO_REGISTER] = #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_P xtensa_legitimate_address_p +#undef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED xtensa_frame_pointer_required + struct gcc_target targetm = TARGET_INITIALIZER; @@ -1534,7 +1538,7 @@ xtensa_expand_atomic (enum rtx_code code, rtx target, rtx mem, rtx val, void xtensa_setup_frame_addresses (void) { - /* Set flag to cause FRAME_POINTER_REQUIRED to be set. */ + /* Set flag to cause TARGET_FRAME_POINTER_REQUIRED to return true. */ cfun->machine->accesses_prev_frame = 1; emit_library_call @@ -2495,7 +2499,7 @@ compute_frame_size (int size) } -int +bool xtensa_frame_pointer_required (void) { /* The code to expand builtin_frame_addr and builtin_return_addr @@ -2504,9 +2508,9 @@ xtensa_frame_pointer_required (void) This function is derived from the i386 code. */ if (cfun->machine->accesses_prev_frame) - return 1; + return true; - return 0; + return false; } diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h index 120ae75da70..a9987c7609f 100644 --- a/gcc/config/xtensa/xtensa.h +++ b/gcc/config/xtensa/xtensa.h @@ -380,12 +380,6 @@ extern char xtensa_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER]; either the stack pointer or the hard frame pointer. */ #define FRAME_POINTER_REGNUM (GP_REG_FIRST + 16) -/* Value should be nonzero if functions must have frame pointers. - Zero means the frame pointer need not be set up (and parms - may be accessed via the stack pointer) in functions that seem suitable. - This is computed in 'reload', in reload1.c. */ -#define FRAME_POINTER_REQUIRED xtensa_frame_pointer_required () - /* Base register for access to arguments of the function. */ #define ARG_POINTER_REGNUM (GP_REG_FIRST + 17) diff --git a/gcc/convert.c b/gcc/convert.c index 8245e1647fb..706dc41985c 100644 --- a/gcc/convert.c +++ b/gcc/convert.c @@ -772,10 +772,16 @@ convert_to_integer (tree type, tree expr) case COND_EXPR: /* It is sometimes worthwhile to push the narrowing down through - the conditional and never loses. */ + the conditional and never loses. A COND_EXPR may have a throw + as one operand, which then has void type. Just leave void + operands as they are. */ return fold_build3 (COND_EXPR, type, TREE_OPERAND (expr, 0), - convert (type, TREE_OPERAND (expr, 1)), - convert (type, TREE_OPERAND (expr, 2))); + VOID_TYPE_P (TREE_TYPE (TREE_OPERAND (expr, 1))) + ? TREE_OPERAND (expr, 1) + : convert (type, TREE_OPERAND (expr, 1)), + VOID_TYPE_P (TREE_TYPE (TREE_OPERAND (expr, 2))) + ? TREE_OPERAND (expr, 2) + : convert (type, TREE_OPERAND (expr, 2))); default: break; diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 80e55c190c0..e3fe9c25b81 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,129 @@ +2009-07-04 Jason Merrill <jason@redhat.com> + + * pt.c (retrieve_specialization): Don't get confused by a + using-declaration that brings in another instance of this template + from a base class. + + * ptree.c (cxx_print_type): Fix logic. + + * cp-tree.h (LANG_DECL_FN_CHECK): Fix non-checking version. + + PR c++/40619 + * cp-tree.h (struct lang_decl_parm): New. + (struct lang_decl): Add it. + (LANG_DECL_PARM_CHECK): New. + (DECL_PARM_INDEX): New. + * decl2.c (parm_index): Remove. + * lex.c (retrofit_lang_decl): Handle parms. + (cxx_dup_lang_specific_decl): Likewise. + * mangle.c (write_expression): Adjust. + * tree.c (cp_tree_equal): Adjust. + (decl_linkage): Only check DECL_COMDAT for functions and variables. + * parser.c (cp_parser_parameter_declaration_list): Set + DECL_PARM_INDEX. + * pt.c (iterative_hash_template_arg): Hash it. + +2009-07-03 Jason Merrill <jason@redhat.com> + + * cp-tree.h (struct lang_decl): Overhaul. + (struct lang_decl_flags): Remove. + (struct lang_decl_base): New. + (struct lang_decl_min): New. + (struct lang_decl_fn): New. + (struct lang_decl_ns): New. + (CAN_HAVE_FULL_LANG_DECL_P): Replace with LANG_DECL_HAS_MIN. + (LANG_DECL_MIN_CHECK): New. + (LANG_DECL_FN_CHECK): New. + (LANG_DECL_NS_CHECK): New. + (STRIP_TEMPLATE): New. + (NON_THUNK_FUNCTION_CHECK): Remove. + (DECL_DECLARES_FUNCTION_P): New. + (lots): Adjust. + * lex.c (retrofit_lang_decl, cxx_dup_lang_specific_decl): Adjust. + * decl.c (push_local_name, duplicate_decls): Adjust. + * decl2.c (start_objects): Don't set u2sel. + * semantics.c (finish_omp_threadprivate): Adjust. + * class.c (build_clone): Don't do much on TEMPLATE_DECLs. + (decl_cloned_function_p): Out-of-line implementation of macros. + (clone_function_decl, adjust_clone_args): Use DECL_CLONED_FUNCTION_P. + * mangle.c (write_unqualified_name): Don't check function flags + on non-functions. + * method.c (make_alias_for): Don't set DECL_CLONED_FUNCTION. + * pt.c (build_template_decl): Don't set function flags. + (check_default_tmpl_args): Check that it's a function. + (instantiate_template): Use DECL_ABSTRACT_ORIGIN to find the + cloned template. + + * pt.c (tsubst_decl) [FUNCTION_DECL]: Don't tsubst + DECL_CLONED_FUNCTION. + + * cp-tree.h (struct lang_type_class): Move sorted_fields here. + * class.c (finish_struct_1): Adjust. + * ptree.c (cxx_print_decl, cxx_print_type): Adjust. + * search.c (lookup_field_1): Adjust. + + * cp-tree.h (CLASSTYPE_INLINE_FRIENDS): Remove. + * decl.c (finish_method): Don't add to it. + * class.c (fixup_pending_inline): Remove. + (fixup_inline_methods): Remove. + (finish_struct_1): Don't call it. + + * error.c (dump_function_name): Handle null name. + +2009-07-02 Mark Mitchell <mark@codesourcery.com> + + * typeck.c (cp_build_binary_op): Move warnings about use of NULL + in arithmetic earlier and allow comparisions of NULL with + pointers-to-members. + +2009-07-02 Jason Merrill <jason@redhat.com> + + Use hash tables for template specialization lookup. + * pt.c (struct spec_entry): New type. + (decl_specializations, type_specializations): New hash tables. + (register_specialization, retrieve_specialization): Use them. + (reregister_specialization, lookup_template_class): Use them. + (eq_specializations, hash_tmpl_and_args, hash_specialization): New. + (iterative_hash_template_arg): New. + (init_template_processing): New + (process_partial_specialization): Don't look to see if we already + have this partial specialization. + (maybe_process_partial_specialization): Handle reassigning + full specializations when we get an explicit specialization + of the partial instantiation. + (tsubst_friend_function): Adjust specialization reassignment code. + (instantiate_template): Only do one lookup. + (instantiate_decl): Don't do any lookup. + * cp-tree.h: Declare init_template_processing. + * decl.c (duplicate_decls): Pass args to reregister_specialization. + +2009-07-01 Jason Merrill <jason@redhat.com> + + * cp-tree.h (DECL_CLASS_TEMPLATE_P): Use DECL_IMPLICIT_TYPEDEF_P. + + * pt.c (register_specialization): Use duplicate_decls to merge + the argument with a previous specialization. + (check_explicit_specialization): Call register_specialization to + merge the TEMPLATE_DECL with a previous version. + (determine_specialization): Return the args even if fn is a template. + +2009-07-01 Ian Lance Taylor <iant@google.com> + + * g++spec.c (lang_specific_driver): Bump num_args by 1. + +2009-06-30 Jason Merrill <jason@redhat.com> + + PR c++/40595 + * pt.c (tsubst_pack_expansion): Handle unexpanded packs in an + EXPR_PACK_EXPANSION. + +2009-06-29 Jason Merrill <jason@redhat.com> + + PR c++/40274 + * error.c (dump_template_parms): Pass all args to + count_non_default_template_args. + (count_non_default_template_args): Pull out the inner ones. + 2009-06-26 H.J. Lu <hongjiu.lu@intel.com> * decl.c (duplicate_decls): Re-indent. diff --git a/gcc/cp/class.c b/gcc/cp/class.c index 12192e61393..4668c68d008 100644 --- a/gcc/cp/class.c +++ b/gcc/cp/class.c @@ -151,8 +151,6 @@ static void check_bases_and_members (tree); static tree create_vtable_ptr (tree, tree *); static void include_empty_classes (record_layout_info); static void layout_class_type (tree, tree *); -static void fixup_pending_inline (tree); -static void fixup_inline_methods (tree); static void propagate_binfo_offsets (tree, tree); static void layout_virtual_bases (record_layout_info, splay_tree); static void build_vbase_offset_vtbl_entries (tree, vtbl_init_data *); @@ -3799,12 +3797,27 @@ build_clone (tree fn, tree name) /* Copy the function. */ clone = copy_decl (fn); - /* Remember where this function came from. */ - DECL_CLONED_FUNCTION (clone) = fn; - DECL_ABSTRACT_ORIGIN (clone) = fn; /* Reset the function name. */ DECL_NAME (clone) = name; SET_DECL_ASSEMBLER_NAME (clone, NULL_TREE); + /* Remember where this function came from. */ + DECL_ABSTRACT_ORIGIN (clone) = fn; + /* Make it easy to find the CLONE given the FN. */ + TREE_CHAIN (clone) = TREE_CHAIN (fn); + TREE_CHAIN (fn) = clone; + + /* If this is a template, do the rest on the DECL_TEMPLATE_RESULT. */ + if (TREE_CODE (clone) == TEMPLATE_DECL) + { + tree result = build_clone (DECL_TEMPLATE_RESULT (clone), name); + DECL_TEMPLATE_RESULT (clone) = result; + DECL_TEMPLATE_INFO (result) = copy_node (DECL_TEMPLATE_INFO (result)); + DECL_TI_TEMPLATE (result) = clone; + TREE_TYPE (clone) = TREE_TYPE (result); + return clone; + } + + DECL_CLONED_FUNCTION (clone) = fn; /* There's no pending inline data for this function. */ DECL_PENDING_INLINE_INFO (clone) = NULL; DECL_PENDING_INLINE_P (clone) = 0; @@ -3852,61 +3865,79 @@ build_clone (tree fn, tree name) TYPE_ATTRIBUTES (TREE_TYPE (fn))); } - /* Copy the function parameters. But, DECL_ARGUMENTS on a TEMPLATE_DECL - aren't function parameters; those are the template parameters. */ - if (TREE_CODE (clone) != TEMPLATE_DECL) + /* Copy the function parameters. */ + DECL_ARGUMENTS (clone) = copy_list (DECL_ARGUMENTS (clone)); + /* Remove the in-charge parameter. */ + if (DECL_HAS_IN_CHARGE_PARM_P (clone)) + { + TREE_CHAIN (DECL_ARGUMENTS (clone)) + = TREE_CHAIN (TREE_CHAIN (DECL_ARGUMENTS (clone))); + DECL_HAS_IN_CHARGE_PARM_P (clone) = 0; + } + /* And the VTT parm, in a complete [cd]tor. */ + if (DECL_HAS_VTT_PARM_P (fn)) { - DECL_ARGUMENTS (clone) = copy_list (DECL_ARGUMENTS (clone)); - /* Remove the in-charge parameter. */ - if (DECL_HAS_IN_CHARGE_PARM_P (clone)) + if (DECL_NEEDS_VTT_PARM_P (clone)) + DECL_HAS_VTT_PARM_P (clone) = 1; + else { TREE_CHAIN (DECL_ARGUMENTS (clone)) = TREE_CHAIN (TREE_CHAIN (DECL_ARGUMENTS (clone))); - DECL_HAS_IN_CHARGE_PARM_P (clone) = 0; - } - /* And the VTT parm, in a complete [cd]tor. */ - if (DECL_HAS_VTT_PARM_P (fn)) - { - if (DECL_NEEDS_VTT_PARM_P (clone)) - DECL_HAS_VTT_PARM_P (clone) = 1; - else - { - TREE_CHAIN (DECL_ARGUMENTS (clone)) - = TREE_CHAIN (TREE_CHAIN (DECL_ARGUMENTS (clone))); - DECL_HAS_VTT_PARM_P (clone) = 0; - } + DECL_HAS_VTT_PARM_P (clone) = 0; } + } - for (parms = DECL_ARGUMENTS (clone); parms; parms = TREE_CHAIN (parms)) - { - DECL_CONTEXT (parms) = clone; - cxx_dup_lang_specific_decl (parms); - } + for (parms = DECL_ARGUMENTS (clone); parms; parms = TREE_CHAIN (parms)) + { + DECL_CONTEXT (parms) = clone; + cxx_dup_lang_specific_decl (parms); } /* Create the RTL for this function. */ SET_DECL_RTL (clone, NULL_RTX); rest_of_decl_compilation (clone, /*top_level=*/1, at_eof); - /* Make it easy to find the CLONE given the FN. */ - TREE_CHAIN (clone) = TREE_CHAIN (fn); - TREE_CHAIN (fn) = clone; + if (pch_file) + note_decl_for_pch (clone); - /* If this is a template, handle the DECL_TEMPLATE_RESULT as well. */ - if (TREE_CODE (clone) == TEMPLATE_DECL) - { - tree result; + return clone; +} - DECL_TEMPLATE_RESULT (clone) - = build_clone (DECL_TEMPLATE_RESULT (clone), name); - result = DECL_TEMPLATE_RESULT (clone); - DECL_TEMPLATE_INFO (result) = copy_node (DECL_TEMPLATE_INFO (result)); - DECL_TI_TEMPLATE (result) = clone; +/* Implementation of DECL_CLONED_FUNCTION and DECL_CLONED_FUNCTION_P, do + not invoke this function directly. + + For a non-thunk function, returns the address of the slot for storing + the function it is a clone of. Otherwise returns NULL_TREE. + + If JUST_TESTING, looks through TEMPLATE_DECL and returns NULL if + cloned_function is unset. This is to support the separate + DECL_CLONED_FUNCTION and DECL_CLONED_FUNCTION_P modes; using the latter + on a template makes sense, but not the former. */ + +tree * +decl_cloned_function_p (const_tree decl, bool just_testing) +{ + tree *ptr; + if (just_testing) + decl = STRIP_TEMPLATE (decl); + + if (TREE_CODE (decl) != FUNCTION_DECL + || !DECL_LANG_SPECIFIC (decl) + || DECL_LANG_SPECIFIC (decl)->u.fn.thunk_p) + { +#if defined ENABLE_TREE_CHECKING && (GCC_VERSION >= 2007) + if (!just_testing) + lang_check_failed (__FILE__, __LINE__, __FUNCTION__); + else +#endif + return NULL; } - else if (pch_file) - note_decl_for_pch (clone); - return clone; + ptr = &DECL_LANG_SPECIFIC (decl)->u.fn.u5.cloned_function; + if (just_testing && *ptr == NULL_TREE) + return NULL; + else + return ptr; } /* Produce declarations for all appropriate clones of FN. If @@ -3920,7 +3951,7 @@ clone_function_decl (tree fn, int update_method_vec_p) /* Avoid inappropriate cloning. */ if (TREE_CHAIN (fn) - && DECL_CLONED_FUNCTION (TREE_CHAIN (fn))) + && DECL_CLONED_FUNCTION_P (TREE_CHAIN (fn))) return; if (DECL_MAYBE_IN_CHARGE_CONSTRUCTOR_P (fn)) @@ -3977,7 +4008,7 @@ adjust_clone_args (tree decl) { tree clone; - for (clone = TREE_CHAIN (decl); clone && DECL_CLONED_FUNCTION (clone); + for (clone = TREE_CHAIN (decl); clone && DECL_CLONED_FUNCTION_P (clone); clone = TREE_CHAIN (clone)) { tree orig_clone_parms = TYPE_ARG_TYPES (TREE_TYPE (clone)); @@ -4447,54 +4478,6 @@ create_vtable_ptr (tree t, tree* virtuals_p) return NULL_TREE; } -/* Fixup the inline function given by INFO now that the class is - complete. */ - -static void -fixup_pending_inline (tree fn) -{ - if (DECL_PENDING_INLINE_INFO (fn)) - { - tree args = DECL_ARGUMENTS (fn); - while (args) - { - DECL_CONTEXT (args) = fn; - args = TREE_CHAIN (args); - } - } -} - -/* Fixup the inline methods and friends in TYPE now that TYPE is - complete. */ - -static void -fixup_inline_methods (tree type) -{ - tree method = TYPE_METHODS (type); - VEC(tree,gc) *friends; - unsigned ix; - - if (method && TREE_CODE (method) == TREE_VEC) - { - if (TREE_VEC_ELT (method, 1)) - method = TREE_VEC_ELT (method, 1); - else if (TREE_VEC_ELT (method, 0)) - method = TREE_VEC_ELT (method, 0); - else - method = TREE_VEC_ELT (method, 2); - } - - /* Do inline member functions. */ - for (; method; method = TREE_CHAIN (method)) - fixup_pending_inline (method); - - /* Do friends. */ - for (friends = CLASSTYPE_INLINE_FRIENDS (type), ix = 0; - VEC_iterate (tree, friends, ix, method); ix++) - fixup_pending_inline (method); - CLASSTYPE_INLINE_FRIENDS (type) = NULL; -} - /* Add OFFSET to all base types of BINFO which is a base in the hierarchy dominated by T. @@ -5219,8 +5202,6 @@ finish_struct_1 (tree t) TYPE_SIZE (t) = NULL_TREE; CLASSTYPE_PRIMARY_BINFO (t) = NULL_TREE; - fixup_inline_methods (t); - /* Make assumptions about the class; we'll reset the flags if necessary. */ CLASSTYPE_EMPTY_P (t) = 1; @@ -5332,9 +5313,7 @@ finish_struct_1 (tree t) add_fields_to_record_type (TYPE_FIELDS (t), field_vec, 0); qsort (field_vec->elts, n_fields, sizeof (tree), field_decl_cmp); - if (! DECL_LANG_SPECIFIC (TYPE_MAIN_DECL (t))) - retrofit_lang_decl (TYPE_MAIN_DECL (t)); - DECL_SORTED_FIELDS (TYPE_MAIN_DECL (t)) = field_vec; + CLASSTYPE_SORTED_FIELDS (t) = field_vec; } /* Complain if one of the field types requires lower visibility. */ diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h index c49a8778617..24351b4dad6 100644 --- a/gcc/cp/cp-tree.h +++ b/gcc/cp/cp-tree.h @@ -199,21 +199,13 @@ framework extensions, you must include this file before toplev.h, not after. TREE_CHECK(NODE,BOUND_TEMPLATE_TEMPLATE_PARM) #if defined ENABLE_TREE_CHECKING && (GCC_VERSION >= 2007) -#define NON_THUNK_FUNCTION_CHECK(NODE) __extension__ \ -({ __typeof(NODE) const __t = (NODE); \ - if (TREE_CODE (__t) != FUNCTION_DECL && \ - TREE_CODE (__t) != TEMPLATE_DECL && __t->decl_common.lang_specific \ - && __t->decl_common.lang_specific->decl_flags.thunk_p) \ - tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, 0); \ - __t; }) #define THUNK_FUNCTION_CHECK(NODE) __extension__ \ ({ __typeof (NODE) const __t = (NODE); \ - if (TREE_CODE (__t) != FUNCTION_DECL || !__t->decl_common.lang_specific \ - || !__t->decl_common.lang_specific->decl_flags.thunk_p) \ + if (TREE_CODE (__t) != FUNCTION_DECL || !__t->decl_common.lang_specific \ + || !__t->decl_common.lang_specific->u.fn.thunk_p) \ tree_check_failed (__t, __FILE__, __LINE__, __FUNCTION__, 0); \ __t; }) #else -#define NON_THUNK_FUNCTION_CHECK(NODE) (NODE) #define THUNK_FUNCTION_CHECK(NODE) (NODE) #endif @@ -1160,6 +1152,10 @@ struct GTY(()) lang_type_class { as a list of adopted protocols or a pointer to a corresponding @interface. See objc/objc-act.h for details. */ tree objc_info; + /* sorted_fields is sorted based on a pointer, so we need to be able + to resort it if pointers get rearranged. */ + struct sorted_fields_type * GTY ((reorder ("resort_sorted_fields"))) + sorted_fields; }; struct GTY(()) lang_type_ptrmem { @@ -1197,13 +1193,6 @@ struct GTY(()) lang_type { #endif /* ENABLE_TREE_CHECKING */ -/* Fields used for storing information before the class is defined. - After the class is defined, these fields hold other information. */ - -/* VEC(tree) of friends which were defined inline in this class - definition. */ -#define CLASSTYPE_INLINE_FRIENDS(NODE) CLASSTYPE_PURE_VIRTUALS (NODE) - /* Nonzero for _CLASSTYPE means that operator delete is defined. */ #define TYPE_GETS_DELETE(NODE) (LANG_TYPE_CLASS_CHECK (NODE)->gets_delete) #define TYPE_GETS_REG_DELETE(NODE) (TYPE_GETS_DELETE (NODE) & 1) @@ -1563,142 +1552,205 @@ struct GTY(()) lang_type { /* The binding level associated with the namespace. */ #define NAMESPACE_LEVEL(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.u.level) + (LANG_DECL_NS_CHECK (NODE)->level) +/* Flags shared by all forms of DECL_LANG_SPECIFIC. -/* If a DECL has DECL_LANG_SPECIFIC, it is either a lang_decl_flags or - a lang_decl (which has lang_decl_flags as its initial prefix). - This macro is nonzero for tree nodes whose DECL_LANG_SPECIFIC is - the full lang_decl, and not just lang_decl_flags. Keep these - checks in ascending code order. */ -#define CAN_HAVE_FULL_LANG_DECL_P(NODE) \ - (!(TREE_CODE (NODE) == FIELD_DECL \ - || TREE_CODE (NODE) == VAR_DECL \ - || TREE_CODE (NODE) == CONST_DECL \ - || TREE_CODE (NODE) == USING_DECL)) + Some of the flags live here only to make lang_decl_min/fn smaller. Do + not make this struct larger than 32 bits; instead, make sel smaller. */ -struct GTY(()) lang_decl_flags { +struct GTY(()) lang_decl_base { + unsigned selector : 16; /* Larger than necessary for faster access. */ ENUM_BITFIELD(languages) language : 4; + unsigned use_template : 2; + unsigned not_really_extern : 1; /* var or fn */ + unsigned initialized_in_class : 1; /* var or fn */ + unsigned repo_available_p : 1; /* var or fn */ + unsigned threadprivate_or_deleted_p : 1; /* var or fn */ + unsigned anticipated_p : 1; /* fn or type */ + unsigned friend_attr : 1; /* fn or type */ + unsigned template_conv_p : 1; /* template only? */ + unsigned u2sel : 1; + /* 2 spare bits */ +}; + +/* True for DECL codes which have template info and access. */ +#define LANG_DECL_HAS_MIN(NODE) \ + (TREE_CODE (NODE) == FUNCTION_DECL \ + || TREE_CODE (NODE) == FIELD_DECL \ + || TREE_CODE (NODE) == VAR_DECL \ + || TREE_CODE (NODE) == CONST_DECL \ + || TREE_CODE (NODE) == TYPE_DECL \ + || TREE_CODE (NODE) == TEMPLATE_DECL \ + || TREE_CODE (NODE) == USING_DECL) + +/* DECL_LANG_SPECIFIC for the above codes. */ + +struct GTY(()) lang_decl_min { + struct lang_decl_base base; + + /* In a FUNCTION_DECL for which DECL_THUNK_P holds, this is + THUNK_ALIAS. + In a FUNCTION_DECL for which DECL_THUNK_P does not hold, + VAR_DECL, TYPE_DECL, or TEMPLATE_DECL, this is + DECL_TEMPLATE_INFO. */ + tree template_info; + + union lang_decl_u2 { + /* In a FUNCTION_DECL for which DECL_THUNK_P holds, this is + THUNK_VIRTUAL_OFFSET. + Otherwise this is DECL_ACCESS. */ + tree GTY ((tag ("0"))) access; + + /* For VAR_DECL in function, this is DECL_DISCRIMINATOR. */ + int GTY ((tag ("1"))) discriminator; + } GTY ((desc ("%0.u.base.u2sel"))) u2; +}; + +/* Additional DECL_LANG_SPECIFIC information for functions. */ + +struct GTY(()) lang_decl_fn { + struct lang_decl_min min; + + /* In an overloaded operator, this is the value of + DECL_OVERLOADED_OPERATOR_P. */ + ENUM_BITFIELD (tree_code) operator_code : 16; + unsigned global_ctor_p : 1; unsigned global_dtor_p : 1; - unsigned anticipated_p : 1; - unsigned template_conv_p : 1; - - unsigned operator_attr : 1; unsigned constructor_attr : 1; unsigned destructor_attr : 1; - unsigned friend_attr : 1; + unsigned assignment_operator_p : 1; unsigned static_function : 1; unsigned pure_virtual : 1; + unsigned defaulted_p : 1; + unsigned has_in_charge_parm_p : 1; unsigned has_vtt_parm_p : 1; - - unsigned deferred : 1; - unsigned use_template : 2; + unsigned pending_inline_p : 1; unsigned nonconverting : 1; - unsigned not_really_extern : 1; - unsigned initialized_in_class : 1; - unsigned assignment_operator_p : 1; - unsigned u1sel : 1; - - unsigned u2sel : 1; - unsigned can_be_full : 1; unsigned thunk_p : 1; unsigned this_thunk_p : 1; - unsigned repo_available_p : 1; unsigned hidden_friend_p : 1; - unsigned threadprivate_or_deleted_p : 1; - unsigned defaulted_p : 1; + unsigned deferred : 1; + /* No spare bits; consider adding to lang_decl_base instead. */ - union lang_decl_u { - /* In a FUNCTION_DECL for which DECL_THUNK_P holds, this is - THUNK_ALIAS. - In a FUNCTION_DECL for which DECL_THUNK_P does not hold, - VAR_DECL, TYPE_DECL, or TEMPLATE_DECL, this is - DECL_TEMPLATE_INFO. */ - tree GTY ((tag ("0"))) template_info; + /* For a non-thunk function decl, this is a tree list of + friendly classes. For a thunk function decl, it is the + thunked to function decl. */ + tree befriending_classes; - /* In a NAMESPACE_DECL, this is NAMESPACE_LEVEL. */ - struct cp_binding_level * GTY ((tag ("1"))) level; - } GTY ((desc ("%1.u1sel"))) u; + /* For a non-virtual FUNCTION_DECL, this is + DECL_FRIEND_CONTEXT. For a virtual FUNCTION_DECL for which + DECL_THIS_THUNK_P does not hold, this is DECL_THUNKS. Both + this pointer and result pointer adjusting thunks are + chained here. This pointer thunks to return pointer thunks + will be chained on the return pointer thunk. */ + tree context; - union lang_decl_u2 { - /* In a FUNCTION_DECL for which DECL_THUNK_P holds, this is - THUNK_VIRTUAL_OFFSET. - Otherwise this is DECL_ACCESS. */ - tree GTY ((tag ("0"))) access; + union lang_decl_u5 + { + /* In a non-thunk FUNCTION_DECL or TEMPLATE_DECL, this is + DECL_CLONED_FUNCTION. */ + tree GTY ((tag ("0"))) cloned_function; + + /* In a FUNCTION_DECL for which THUNK_P holds this is the + THUNK_FIXED_OFFSET. */ + HOST_WIDE_INT GTY ((tag ("1"))) fixed_offset; + } GTY ((desc ("%1.thunk_p"))) u5; + + union lang_decl_u3 + { + struct cp_token_cache * GTY ((tag ("1"))) pending_inline_info; + struct language_function * GTY ((tag ("0"))) + saved_language_function; + } GTY ((desc ("%1.pending_inline_p"))) u; - /* For VAR_DECL in function, this is DECL_DISCRIMINATOR. */ - int GTY ((tag ("1"))) discriminator; - } GTY ((desc ("%1.u2sel"))) u2; }; -/* sorted_fields is sorted based on a pointer, so we need to be able - to resort it if pointers get rearranged. */ +/* DECL_LANG_SPECIFIC for namespaces. */ + +struct GTY(()) lang_decl_ns { + struct lang_decl_base base; + struct cp_binding_level *level; +}; + +/* DECL_LANG_SPECIFIC for parameters. */ + +struct GTY(()) lang_decl_parm { + struct lang_decl_base base; + int index; +}; + +/* DECL_LANG_SPECIFIC for all types. It would be nice to just make this a + union rather than a struct containing a union as its only field, but + tree.h declares it as a struct. */ struct GTY(()) lang_decl { - struct lang_decl_flags decl_flags; - - union lang_decl_u4 - { - struct full_lang_decl - { - /* In an overloaded operator, this is the value of - DECL_OVERLOADED_OPERATOR_P. */ - ENUM_BITFIELD (tree_code) operator_code : 16; - - unsigned u3sel : 1; - unsigned pending_inline_p : 1; - unsigned spare : 14; - - /* For a non-thunk function decl, this is a tree list of - friendly classes. For a thunk function decl, it is the - thunked to function decl. */ - tree befriending_classes; - - /* For a non-virtual FUNCTION_DECL, this is - DECL_FRIEND_CONTEXT. For a virtual FUNCTION_DECL for which - DECL_THIS_THUNK_P does not hold, this is DECL_THUNKS. Both - this pointer and result pointer adjusting thunks are - chained here. This pointer thunks to return pointer thunks - will be chained on the return pointer thunk. */ - tree context; - - union lang_decl_u5 - { - /* In a non-thunk FUNCTION_DECL or TEMPLATE_DECL, this is - DECL_CLONED_FUNCTION. */ - tree GTY ((tag ("0"))) cloned_function; - - /* In a FUNCTION_DECL for which THUNK_P holds this is the - THUNK_FIXED_OFFSET. */ - HOST_WIDE_INT GTY ((tag ("1"))) fixed_offset; - } GTY ((desc ("%0.decl_flags.thunk_p"))) u5; - - union lang_decl_u3 - { - struct sorted_fields_type * GTY ((tag ("0"), reorder ("resort_sorted_fields"))) - sorted_fields; - struct cp_token_cache * GTY ((tag ("2"))) pending_inline_info; - struct language_function * GTY ((tag ("1"))) - saved_language_function; - } GTY ((desc ("%1.u3sel + %1.pending_inline_p"))) u; - } GTY ((tag ("1"))) f; - } GTY ((desc ("%1.decl_flags.can_be_full"))) u; + union GTY((desc ("%h.base.selector"))) lang_decl_u { + struct lang_decl_base GTY ((default)) base; + struct lang_decl_min GTY((tag ("0"))) min; + struct lang_decl_fn GTY ((tag ("1"))) fn; + struct lang_decl_ns GTY((tag ("2"))) ns; + struct lang_decl_parm GTY((tag ("3"))) parm; + } u; }; +/* Looks through a template (if present) to find what it declares. */ +#define STRIP_TEMPLATE(NODE) \ + (TREE_CODE (NODE) == TEMPLATE_DECL ? DECL_TEMPLATE_RESULT (NODE) : NODE) + #if defined ENABLE_TREE_CHECKING && (GCC_VERSION >= 2007) +#define LANG_DECL_MIN_CHECK(NODE) __extension__ \ +({ struct lang_decl *lt = DECL_LANG_SPECIFIC (NODE); \ + if (!LANG_DECL_HAS_MIN (NODE)) \ + lang_check_failed (__FILE__, __LINE__, __FUNCTION__); \ + <->u.min; }) + +/* We want to be able to check DECL_CONSTRUCTOR_P and such on a function + template, not just on a FUNCTION_DECL. So when looking for things in + lang_decl_fn, look down through a TEMPLATE_DECL into its result. */ +#define LANG_DECL_FN_CHECK(NODE) __extension__ \ +({ struct lang_decl *lt = DECL_LANG_SPECIFIC (STRIP_TEMPLATE (NODE)); \ + if (!DECL_DECLARES_FUNCTION_P (NODE) || lt->u.base.selector != 1) \ + lang_check_failed (__FILE__, __LINE__, __FUNCTION__); \ + <->u.fn; }) + +#define LANG_DECL_NS_CHECK(NODE) __extension__ \ +({ struct lang_decl *lt = DECL_LANG_SPECIFIC (NODE); \ + if (TREE_CODE (NODE) != NAMESPACE_DECL || lt->u.base.selector != 2) \ + lang_check_failed (__FILE__, __LINE__, __FUNCTION__); \ + <->u.ns; }) + +#define LANG_DECL_PARM_CHECK(NODE) __extension__ \ +({ struct lang_decl *lt = DECL_LANG_SPECIFIC (NODE); \ + if (TREE_CODE (NODE) != PARM_DECL) \ + lang_check_failed (__FILE__, __LINE__, __FUNCTION__); \ + <->u.parm; }) + #define LANG_DECL_U2_CHECK(NODE, TF) __extension__ \ ({ struct lang_decl *lt = DECL_LANG_SPECIFIC (NODE); \ - if (lt->decl_flags.u2sel != TF) \ + if (lt->u.base.u2sel != TF) \ lang_check_failed (__FILE__, __LINE__, __FUNCTION__); \ - <->decl_flags.u2; }) + <->u.min.u2; }) #else +#define LANG_DECL_MIN_CHECK(NODE) \ + (&DECL_LANG_SPECIFIC (NODE)->u.min) + +#define LANG_DECL_FN_CHECK(NODE) \ + (&DECL_LANG_SPECIFIC (STRIP_TEMPLATE (NODE))->u.fn) + +#define LANG_DECL_NS_CHECK(NODE) \ + (&DECL_LANG_SPECIFIC (NODE)->u.ns) + +#define LANG_DECL_PARM_CHECK(NODE) \ + (&DECL_LANG_SPECIFIC (NODE)->u.parm) + #define LANG_DECL_U2_CHECK(NODE, TF) \ - (&DECL_LANG_SPECIFIC (NODE)->decl_flags.u2) + (&DECL_LANG_SPECIFIC (NODE)->u.min.u2) #endif /* ENABLE_TREE_CHECKING */ @@ -1713,17 +1765,17 @@ struct GTY(()) lang_decl { we do create DECL_LANG_SPECIFIC for variables with non-C++ linkage. */ #define DECL_LANGUAGE(NODE) \ (DECL_LANG_SPECIFIC (NODE) \ - ? DECL_LANG_SPECIFIC (NODE)->decl_flags.language \ + ? DECL_LANG_SPECIFIC (NODE)->u.base.language \ : (TREE_CODE (NODE) == FUNCTION_DECL \ ? lang_c : lang_cplusplus)) /* Set the language linkage for NODE to LANGUAGE. */ #define SET_DECL_LANGUAGE(NODE, LANGUAGE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.language = (LANGUAGE)) + (DECL_LANG_SPECIFIC (NODE)->u.base.language = (LANGUAGE)) /* For FUNCTION_DECLs: nonzero means that this function is a constructor. */ #define DECL_CONSTRUCTOR_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.constructor_attr) + (LANG_DECL_FN_CHECK (NODE)->constructor_attr) /* Nonzero if NODE (a FUNCTION_DECL) is a constructor for a complete object. */ @@ -1741,7 +1793,8 @@ struct GTY(()) lang_decl { specialized in-charge constructor or the specialized not-in-charge constructor. */ #define DECL_MAYBE_IN_CHARGE_CONSTRUCTOR_P(NODE) \ - (DECL_CONSTRUCTOR_P (NODE) && !DECL_CLONED_FUNCTION_P (NODE)) + (DECL_DECLARES_FUNCTION_P (NODE) && DECL_CONSTRUCTOR_P (NODE) \ + && !DECL_CLONED_FUNCTION_P (NODE)) /* Nonzero if NODE (a FUNCTION_DECL) is a copy constructor. */ #define DECL_COPY_CONSTRUCTOR_P(NODE) \ @@ -1753,13 +1806,14 @@ struct GTY(()) lang_decl { /* Nonzero if NODE is a destructor. */ #define DECL_DESTRUCTOR_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.destructor_attr) + (LANG_DECL_FN_CHECK (NODE)->destructor_attr) /* Nonzero if NODE (a FUNCTION_DECL) is a destructor, but not the specialized in-charge constructor, in-charge deleting constructor, or the base destructor. */ #define DECL_MAYBE_IN_CHARGE_DESTRUCTOR_P(NODE) \ - (DECL_DESTRUCTOR_P (NODE) && !DECL_CLONED_FUNCTION_P (NODE)) + (DECL_DECLARES_FUNCTION_P (NODE) && DECL_DESTRUCTOR_P (NODE) \ + && !DECL_CLONED_FUNCTION_P (NODE)) /* Nonzero if NODE (a FUNCTION_DECL) is a destructor for a complete object. */ @@ -1781,17 +1835,11 @@ struct GTY(()) lang_decl { /* Nonzero if NODE (a FUNCTION_DECL) is a cloned constructor or destructor. */ -#define DECL_CLONED_FUNCTION_P(NODE) \ - ((TREE_CODE (NODE) == FUNCTION_DECL \ - || TREE_CODE (NODE) == TEMPLATE_DECL) \ - && DECL_LANG_SPECIFIC (NODE) \ - && !DECL_LANG_SPECIFIC (NODE)->decl_flags.thunk_p \ - && DECL_CLONED_FUNCTION (NODE) != NULL_TREE) +#define DECL_CLONED_FUNCTION_P(NODE) (!!decl_cloned_function_p (NODE, true)) /* If DECL_CLONED_FUNCTION_P holds, this is the function that was cloned. */ -#define DECL_CLONED_FUNCTION(NODE) \ - (DECL_LANG_SPECIFIC (NON_THUNK_FUNCTION_CHECK(NODE))->u.f.u5.cloned_function) +#define DECL_CLONED_FUNCTION(NODE) (*decl_cloned_function_p (NODE, false)) /* Perform an action for each clone of FN, if FN is a function with clones. This macro should be used like: @@ -1816,9 +1864,14 @@ struct GTY(()) lang_decl { /* Discriminator for name mangling. */ #define DECL_DISCRIMINATOR(NODE) (LANG_DECL_U2_CHECK (NODE, 1)->discriminator) +/* The index of a user-declared parameter in its function, starting at 1. + All artificial parameters will have index 0. */ +#define DECL_PARM_INDEX(NODE) \ + (LANG_DECL_PARM_CHECK (NODE)->index) + /* Nonzero if the VTT parm has been added to NODE. */ #define DECL_HAS_VTT_PARM_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.has_vtt_parm_p) + (LANG_DECL_FN_CHECK (NODE)->has_vtt_parm_p) /* Nonzero if NODE is a FUNCTION_DECL for which a VTT parameter is required. */ @@ -1840,11 +1893,11 @@ struct GTY(()) lang_decl { conversion operator to a type dependent on the innermost template args. */ #define DECL_TEMPLATE_CONV_FN_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.template_conv_p) + (DECL_LANG_SPECIFIC (TEMPLATE_DECL_CHECK (NODE))->u.base.template_conv_p) /* Set the overloaded operator code for NODE to CODE. */ #define SET_OVERLOADED_OPERATOR_CODE(NODE, CODE) \ - (DECL_LANG_SPECIFIC (NODE)->u.f.operator_code = (CODE)) + (LANG_DECL_FN_CHECK (NODE)->operator_code = (CODE)) /* If NODE is an overloaded operator, then this returns the TREE_CODE associated with the overloaded operator. @@ -1855,17 +1908,17 @@ struct GTY(()) lang_decl { to test whether or not NODE is an overloaded operator. */ #define DECL_OVERLOADED_OPERATOR_P(NODE) \ (IDENTIFIER_OPNAME_P (DECL_NAME (NODE)) \ - ? DECL_LANG_SPECIFIC (NODE)->u.f.operator_code : ERROR_MARK) + ? LANG_DECL_FN_CHECK (NODE)->operator_code : ERROR_MARK) /* Nonzero if NODE is an assignment operator (including += and such). */ #define DECL_ASSIGNMENT_OPERATOR_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.assignment_operator_p) + (LANG_DECL_FN_CHECK (NODE)->assignment_operator_p) /* For FUNCTION_DECLs: nonzero means that this function is a constructor or a destructor with an extra in-charge parameter to control whether or not virtual bases are constructed. */ #define DECL_HAS_IN_CHARGE_PARM_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.has_in_charge_parm_p) + (LANG_DECL_FN_CHECK (NODE)->has_in_charge_parm_p) /* Nonzero if DECL is a declaration of __builtin_constant_p. */ #define DECL_IS_BUILTIN_CONSTANT_P(NODE) \ @@ -1917,20 +1970,21 @@ struct GTY(()) lang_decl { rather than outside the class. This is used for both static member VAR_DECLS, and FUNCTION_DECLS that are defined in the class. */ #define DECL_INITIALIZED_IN_CLASS_P(DECL) \ - (DECL_LANG_SPECIFIC (DECL)->decl_flags.initialized_in_class) + (DECL_LANG_SPECIFIC (VAR_OR_FUNCTION_DECL_CHECK (DECL)) \ + ->u.base.initialized_in_class) /* Nonzero for DECL means that this decl is just a friend declaration, and should not be added to the list of members for this class. */ -#define DECL_FRIEND_P(NODE) (DECL_LANG_SPECIFIC (NODE)->decl_flags.friend_attr) +#define DECL_FRIEND_P(NODE) (DECL_LANG_SPECIFIC (NODE)->u.base.friend_attr) /* A TREE_LIST of the types which have befriended this FUNCTION_DECL. */ #define DECL_BEFRIENDING_CLASSES(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->u.f.befriending_classes) + (LANG_DECL_FN_CHECK (NODE)->befriending_classes) /* Nonzero for FUNCTION_DECL means that this decl is a static member function. */ #define DECL_STATIC_FUNCTION_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.static_function) + (LANG_DECL_FN_CHECK (NODE)->static_function) /* Nonzero for FUNCTION_DECL means that this decl is a non-static member function. */ @@ -1940,7 +1994,7 @@ struct GTY(()) lang_decl { /* Nonzero for FUNCTION_DECL means that this decl is a member function (static or non-static). */ #define DECL_FUNCTION_MEMBER_P(NODE) \ - (DECL_NONSTATIC_MEMBER_FUNCTION_P (NODE) || DECL_STATIC_FUNCTION_P (NODE)) + (DECL_NONSTATIC_MEMBER_FUNCTION_P (NODE) || DECL_STATIC_FUNCTION_P (NODE)) /* Nonzero for FUNCTION_DECL means that this member function has `this' as const X *const. */ @@ -1968,12 +2022,12 @@ struct GTY(()) lang_decl { /* Nonzero for _DECL means that this constructor or conversion function is non-converting. */ #define DECL_NONCONVERTING_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.nonconverting) + (LANG_DECL_FN_CHECK (NODE)->nonconverting) /* Nonzero for FUNCTION_DECL means that this member function is a pure virtual function. */ #define DECL_PURE_VIRTUAL_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.pure_virtual) + (LANG_DECL_FN_CHECK (NODE)->pure_virtual) /* True (in a FUNCTION_DECL) if NODE is a virtual function that is an invalid overrider for a function from a base class. Once we have @@ -1984,27 +2038,26 @@ struct GTY(()) lang_decl { /* The thunks associated with NODE, a FUNCTION_DECL. */ #define DECL_THUNKS(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->u.f.context) + (LANG_DECL_FN_CHECK (NODE)->context) /* Nonzero if NODE is a thunk, rather than an ordinary function. */ #define DECL_THUNK_P(NODE) \ (TREE_CODE (NODE) == FUNCTION_DECL \ && DECL_LANG_SPECIFIC (NODE) \ - && DECL_LANG_SPECIFIC (NODE)->decl_flags.thunk_p) + && LANG_DECL_FN_CHECK (NODE)->thunk_p) /* Set DECL_THUNK_P for node. */ #define SET_DECL_THUNK_P(NODE, THIS_ADJUSTING) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.thunk_p = 1, \ - DECL_LANG_SPECIFIC (NODE)->u.f.u3sel = 1, \ - DECL_LANG_SPECIFIC (NODE)->decl_flags.this_thunk_p = (THIS_ADJUSTING)) + (LANG_DECL_FN_CHECK (NODE)->thunk_p = 1, \ + LANG_DECL_FN_CHECK (NODE)->this_thunk_p = (THIS_ADJUSTING)) /* Nonzero if NODE is a this pointer adjusting thunk. */ #define DECL_THIS_THUNK_P(NODE) \ - (DECL_THUNK_P (NODE) && DECL_LANG_SPECIFIC (NODE)->decl_flags.this_thunk_p) + (DECL_THUNK_P (NODE) && LANG_DECL_FN_CHECK (NODE)->this_thunk_p) /* Nonzero if NODE is a result pointer adjusting thunk. */ #define DECL_RESULT_THUNK_P(NODE) \ - (DECL_THUNK_P (NODE) && !DECL_LANG_SPECIFIC (NODE)->decl_flags.this_thunk_p) + (DECL_THUNK_P (NODE) && !LANG_DECL_FN_CHECK (NODE)->this_thunk_p) /* Nonzero if NODE is a FUNCTION_DECL, but not a thunk. */ #define DECL_NON_THUNK_FUNCTION_P(NODE) \ @@ -2021,7 +2074,7 @@ struct GTY(()) lang_decl { /* True iff DECL is an entity with vague linkage whose definition is available in this translation unit. */ #define DECL_REPO_AVAILABLE_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.repo_available_p) + (DECL_LANG_SPECIFIC (NODE)->u.base.repo_available_p) /* Nonzero if this DECL is the __PRETTY_FUNCTION__ variable in a template function. */ @@ -2040,13 +2093,14 @@ struct GTY(()) lang_decl { the DECL_FRIEND_CONTEXT for `f' will be `S'. */ #define DECL_FRIEND_CONTEXT(NODE) \ - ((DECL_FRIEND_P (NODE) && !DECL_FUNCTION_MEMBER_P (NODE)) \ - ? DECL_LANG_SPECIFIC (NODE)->u.f.context \ + ((DECL_DECLARES_FUNCTION_P (NODE) \ + && DECL_FRIEND_P (NODE) && !DECL_FUNCTION_MEMBER_P (NODE)) \ + ? LANG_DECL_FN_CHECK (NODE)->context \ : NULL_TREE) /* Set the DECL_FRIEND_CONTEXT for NODE to CONTEXT. */ #define SET_DECL_FRIEND_CONTEXT(NODE, CONTEXT) \ - (DECL_LANG_SPECIFIC (NODE)->u.f.context = (CONTEXT)) + (LANG_DECL_FN_CHECK (NODE)->context = (CONTEXT)) /* NULL_TREE in DECL_CONTEXT represents the global namespace. */ #define CP_DECL_CONTEXT(NODE) \ @@ -2153,21 +2207,21 @@ extern void decl_shadowed_for_var_insert (tree, tree); the class definition. We have saved away the text of the function, but have not yet processed it. */ #define DECL_PENDING_INLINE_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->u.f.pending_inline_p) + (LANG_DECL_FN_CHECK (NODE)->pending_inline_p) /* If DECL_PENDING_INLINE_P holds, this is the saved text of the function. */ #define DECL_PENDING_INLINE_INFO(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->u.f.u.pending_inline_info) + (LANG_DECL_FN_CHECK (NODE)->u.pending_inline_info) -/* For a TYPE_DECL: if this structure has many fields, we'll sort them +/* For a class type: if this structure has many fields, we'll sort them and put them into a TREE_VEC. */ -#define DECL_SORTED_FIELDS(NODE) \ - (DECL_LANG_SPECIFIC (TYPE_DECL_CHECK (NODE))->u.f.u.sorted_fields) +#define CLASSTYPE_SORTED_FIELDS(NODE) \ + (LANG_TYPE_CLASS_CHECK (NODE)->sorted_fields) /* True if on the deferred_fns (see decl2.c) list. */ #define DECL_DEFERRED_FN(DECL) \ - (DECL_LANG_SPECIFIC (DECL)->decl_flags.deferred) + (LANG_DECL_FN_CHECK (DECL)->deferred) /* If non-NULL for a VAR_DECL, FUNCTION_DECL, TYPE_DECL or TEMPLATE_DECL, the entity is either a template specialization (if @@ -2190,7 +2244,7 @@ extern void decl_shadowed_for_var_insert (tree, tree); will be non-NULL, but DECL_USE_TEMPLATE will be zero. */ #define DECL_TEMPLATE_INFO(NODE) \ (DECL_LANG_SPECIFIC (VAR_TEMPL_TYPE_OR_FUNCTION_DECL_CHECK (NODE)) \ - ->decl_flags.u.template_info) + ->u.min.template_info) /* For a VAR_DECL, indicates that the variable is actually a non-static data member of anonymous union that has been promoted to @@ -2440,8 +2494,8 @@ extern void decl_shadowed_for_var_insert (tree, tree); /* In a FUNCTION_DECL, the saved language-specific per-function data. */ #define DECL_SAVED_FUNCTION_DATA(NODE) \ - (DECL_LANG_SPECIFIC (FUNCTION_DECL_CHECK (NODE)) \ - ->u.f.u.saved_language_function) + (LANG_DECL_FN_CHECK (FUNCTION_DECL_CHECK (NODE)) \ + ->u.saved_language_function) /* Indicates an indirect_expr is for converting a reference. */ #define REFERENCE_REF_P(NODE) \ @@ -2617,26 +2671,26 @@ more_aggr_init_expr_args_p (const aggr_init_expr_arg_iterator *iter) declared inside a class. In the latter case DECL_HIDDEN_FRIEND_P will be set. */ #define DECL_ANTICIPATED(NODE) \ - (DECL_LANG_SPECIFIC (DECL_COMMON_CHECK (NODE))->decl_flags.anticipated_p) + (DECL_LANG_SPECIFIC (DECL_COMMON_CHECK (NODE))->u.base.anticipated_p) /* Nonzero if NODE is a FUNCTION_DECL which was declared as a friend within a class but has not been declared in the surrounding scope. The function is invisible except via argument dependent lookup. */ #define DECL_HIDDEN_FRIEND_P(NODE) \ - (DECL_LANG_SPECIFIC (DECL_COMMON_CHECK (NODE))->decl_flags.hidden_friend_p) + (LANG_DECL_FN_CHECK (DECL_COMMON_CHECK (NODE))->hidden_friend_p) /* Nonzero if DECL has been declared threadprivate by #pragma omp threadprivate. */ #define CP_DECL_THREADPRIVATE_P(DECL) \ - (DECL_LANG_SPECIFIC (VAR_DECL_CHECK (DECL))->decl_flags.threadprivate_or_deleted_p) + (DECL_LANG_SPECIFIC (VAR_DECL_CHECK (DECL))->u.base.threadprivate_or_deleted_p) /* Nonzero if DECL was declared with '= delete'. */ #define DECL_DELETED_FN(DECL) \ - (DECL_LANG_SPECIFIC (FUNCTION_DECL_CHECK (DECL))->decl_flags.threadprivate_or_deleted_p) + (DECL_LANG_SPECIFIC (FUNCTION_DECL_CHECK (DECL))->u.base.threadprivate_or_deleted_p) /* Nonzero if DECL was declared with '= default'. */ #define DECL_DEFAULTED_FN(DECL) \ - (DECL_LANG_SPECIFIC (FUNCTION_DECL_CHECK (DECL))->decl_flags.defaulted_p) + (LANG_DECL_FN_CHECK (DECL)->defaulted_p) /* Record whether a typedef for type `int' was actually `signed int'. */ #define C_TYPEDEF_EXPLICITLY_SIGNED(EXP) DECL_LANG_FLAG_1 (EXP) @@ -3046,11 +3100,11 @@ more_aggr_init_expr_args_p (const aggr_init_expr_arg_iterator *iter) /* Nonzero if the FUNCTION_DECL is a global constructor. */ #define DECL_GLOBAL_CTOR_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.global_ctor_p) + (LANG_DECL_FN_CHECK (NODE)->global_ctor_p) /* Nonzero if the FUNCTION_DECL is a global destructor. */ #define DECL_GLOBAL_DTOR_P(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.global_dtor_p) + (LANG_DECL_FN_CHECK (NODE)->global_dtor_p) /* Accessor macros for C++ template decl nodes. */ @@ -3072,15 +3126,18 @@ more_aggr_init_expr_args_p (const aggr_init_expr_arg_iterator *iter) TREE_VEC_LENGTH (DECL_INNERMOST_TEMPLATE_PARMS (NODE)) /* For function, method, class-data templates. */ #define DECL_TEMPLATE_RESULT(NODE) DECL_RESULT_FLD (NODE) -/* For a static member variable template, the - DECL_TEMPLATE_INSTANTIATIONS list contains the explicitly and - implicitly generated instantiations of the variable. There are no - partial instantiations of static member variables, so all of these - will be full instantiations. +/* For a function template at namespace scope, DECL_TEMPLATE_INSTANTIATIONS + lists all instantiations and specializations of the function so that + tsubst_friend_function can reassign them to another template if we find + that the namespace-scope template is really a partial instantiation of a + friend template. For a class template the DECL_TEMPLATE_INSTANTIATIONS lists holds all instantiations and specializations of the class type, including - partial instantiations and partial specializations. + partial instantiations and partial specializations, so that if we + explicitly specialize a partial instantiation we can walk the list + in maybe_process_partial_specialization and reassign them or complain + as appropriate. In both cases, the TREE_PURPOSE of each node contains the arguments used; the TREE_VALUE contains the generated variable. The template @@ -3096,29 +3153,9 @@ more_aggr_init_expr_args_p (const aggr_init_expr_arg_iterator *iter) DECL_TEMPLATE_INSTANTIATIONS list for `template <class T> template <class U> struct S1<T>::S2'. - This list is not used for function templates. */ + This list is not used for other templates. */ #define DECL_TEMPLATE_INSTANTIATIONS(NODE) DECL_VINDEX (NODE) -/* For a function template, the DECL_TEMPLATE_SPECIALIZATIONS lists - contains all instantiations and specializations of the function, - including partial instantiations. For a partial instantiation - which is a specialization, this list holds only full - specializations of the template that are instantiations of the - partial instantiation. For example, given: - - template <class T> struct S { - template <class U> void f(U); - template <> void f(T); - }; - - the `S<int>::f<int>(int)' function will appear on the - DECL_TEMPLATE_SPECIALIZATIONS list for both `template <class T> - template <class U> void S<T>::f(U)' and `template <class T> void - S<int>::f(T)'. In the latter case, however, it will have only the - innermost set of arguments (T, in this case). The DECL_TI_TEMPLATE - for the function declaration will point at the specialization, not - the fully general template. - - For a class template, this list contains the partial +/* For a class template, this list contains the partial specializations of this template. (Full specializations are not recorded on this list.) The TREE_PURPOSE holds the arguments used in the partial specialization (e.g., for `template <class T> struct @@ -3128,7 +3165,7 @@ more_aggr_init_expr_args_p (const aggr_init_expr_arg_iterator *iter) example above.) The TREE_TYPE is the _TYPE node for the partial specialization. - This list is not used for static variable templates. */ + This list is not used for other templates. */ #define DECL_TEMPLATE_SPECIALIZATIONS(NODE) DECL_SIZE (NODE) /* Nonzero for a DECL which is actually a template parameter. Keep @@ -3159,16 +3196,19 @@ more_aggr_init_expr_args_p (const aggr_init_expr_arg_iterator *iter) && TREE_CODE (DECL_TEMPLATE_RESULT (NODE)) == FUNCTION_DECL) /* Nonzero for a DECL that represents a template class. */ -#define DECL_CLASS_TEMPLATE_P(NODE) \ - (TREE_CODE (NODE) == TEMPLATE_DECL \ - && !DECL_UNBOUND_CLASS_TEMPLATE_P (NODE) \ - && TREE_CODE (DECL_TEMPLATE_RESULT (NODE)) == TYPE_DECL \ - && !DECL_TEMPLATE_TEMPLATE_PARM_P (NODE)) +#define DECL_CLASS_TEMPLATE_P(NODE) \ + (TREE_CODE (NODE) == TEMPLATE_DECL \ + && DECL_TEMPLATE_RESULT (NODE) != NULL_TREE \ + && DECL_IMPLICIT_TYPEDEF_P (DECL_TEMPLATE_RESULT (NODE))) /* Nonzero if NODE which declares a type. */ #define DECL_DECLARES_TYPE_P(NODE) \ (TREE_CODE (NODE) == TYPE_DECL || DECL_CLASS_TEMPLATE_P (NODE)) +/* Nonzero if NODE declares a function. */ +#define DECL_DECLARES_FUNCTION_P(NODE) \ + (TREE_CODE (NODE) == FUNCTION_DECL || DECL_FUNCTION_TEMPLATE_P (NODE)) + /* Nonzero if NODE is the typedef implicitly generated for a type when the type is declared. In C++, `struct S {};' is roughly equivalent to `struct S {}; typedef struct S S;' in C. @@ -3222,7 +3262,7 @@ more_aggr_init_expr_args_p (const aggr_init_expr_arg_iterator *iter) If DECL_USE_TEMPLATE is nonzero, then DECL_TEMPLATE_INFO will also be non-NULL. */ -#define DECL_USE_TEMPLATE(NODE) (DECL_LANG_SPECIFIC (NODE)->decl_flags.use_template) +#define DECL_USE_TEMPLATE(NODE) (DECL_LANG_SPECIFIC (NODE)->u.base.use_template) /* Like DECL_USE_TEMPLATE, but for class types. */ #define CLASSTYPE_USE_TEMPLATE(NODE) \ @@ -3295,7 +3335,7 @@ more_aggr_init_expr_args_p (const aggr_init_expr_arg_iterator *iter) current translation unit; it indicates whether or not we should emit the decl at the end of compilation if it is defined and needed. */ #define DECL_NOT_REALLY_EXTERN(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->decl_flags.not_really_extern) + (DECL_LANG_SPECIFIC (NODE)->u.base.not_really_extern) #define DECL_REALLY_EXTERN(NODE) \ (DECL_EXTERNAL (NODE) && ! DECL_NOT_REALLY_EXTERN (NODE)) @@ -3342,7 +3382,7 @@ more_aggr_init_expr_args_p (const aggr_init_expr_arg_iterator *iter) /* An integer indicating how many bytes should be subtracted from the this or result pointer when this function is called. */ #define THUNK_FIXED_OFFSET(DECL) \ - (DECL_LANG_SPECIFIC (THUNK_FUNCTION_CHECK (DECL))->u.f.u5.fixed_offset) + (DECL_LANG_SPECIFIC (THUNK_FUNCTION_CHECK (DECL))->u.fn.u5.fixed_offset) /* A tree indicating how to perform the virtual adjustment. For a this adjusting thunk it is the number of bytes to be added to the vtable @@ -3359,12 +3399,12 @@ more_aggr_init_expr_args_p (const aggr_init_expr_arg_iterator *iter) /* A thunk which is equivalent to another thunk. */ #define THUNK_ALIAS(DECL) \ - (DECL_LANG_SPECIFIC (FUNCTION_DECL_CHECK (DECL))->decl_flags.u.template_info) + (DECL_LANG_SPECIFIC (FUNCTION_DECL_CHECK (DECL))->u.min.template_info) /* For thunk NODE, this is the FUNCTION_DECL thunked to. It is possible for the target to be a thunk too. */ #define THUNK_TARGET(NODE) \ - (DECL_LANG_SPECIFIC (NODE)->u.f.befriending_classes) + (LANG_DECL_FN_CHECK (NODE)->befriending_classes) /* True for a SCOPE_REF iff the "template" keyword was used to indicate that the qualified name denotes a template. */ @@ -4276,6 +4316,7 @@ extern bool type_has_user_provided_constructor (tree); extern bool type_has_user_provided_default_constructor (tree); extern bool defaultable_fn_p (tree); extern void fixup_type_variants (tree); +extern tree* decl_cloned_function_p (const_tree, bool); extern void clone_function_decl (tree, int); extern void adjust_clone_args (tree); @@ -4620,6 +4661,7 @@ extern tree fold_non_dependent_expr (tree); extern bool explicit_class_specialization_p (tree); extern struct tinst_level *outermost_tinst_level(void); extern bool parameter_of_template_p (tree, tree); +extern void init_template_processing (void); /* in repo.c */ extern void init_repo (void); diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c index 04b144adf68..dc2ef1eb30c 100644 --- a/gcc/cp/decl.c +++ b/gcc/cp/decl.c @@ -873,7 +873,7 @@ push_local_name (tree decl) { if (!DECL_LANG_SPECIFIC (decl)) retrofit_lang_decl (decl); - DECL_LANG_SPECIFIC (decl)->decl_flags.u2sel = 1; + DECL_LANG_SPECIFIC (decl)->u.base.u2sel = 1; if (DECL_LANG_SPECIFIC (t)) DECL_DISCRIMINATOR (decl) = DECL_DISCRIMINATOR (t) + 1; else @@ -1109,7 +1109,7 @@ duplicate_decls (tree newdecl, tree olddecl, bool newdecl_is_friend) unsigned olddecl_uid = DECL_UID (olddecl); int olddecl_friend = 0, types_match = 0, hidden_friend = 0; int new_defines_function = 0; - tree new_template; + tree new_template_info; if (newdecl == olddecl) return olddecl; @@ -1786,9 +1786,7 @@ duplicate_decls (tree newdecl, tree olddecl, bool newdecl_is_friend) { DECL_INITIAL (newdecl) = DECL_INITIAL (olddecl); DECL_SOURCE_LOCATION (newdecl) = DECL_SOURCE_LOCATION (olddecl); - if (CAN_HAVE_FULL_LANG_DECL_P (newdecl) - && DECL_LANG_SPECIFIC (newdecl) - && DECL_LANG_SPECIFIC (olddecl)) + if (TREE_CODE (newdecl) == FUNCTION_DECL) { DECL_SAVED_TREE (newdecl) = DECL_SAVED_TREE (olddecl); DECL_STRUCT_FUNCTION (newdecl) = DECL_STRUCT_FUNCTION (olddecl); @@ -1855,7 +1853,7 @@ duplicate_decls (tree newdecl, tree olddecl, bool newdecl_is_friend) if (! DECL_EXTERNAL (olddecl)) DECL_EXTERNAL (newdecl) = 0; - new_template = NULL_TREE; + new_template_info = NULL_TREE; if (DECL_LANG_SPECIFIC (newdecl) && DECL_LANG_SPECIFIC (olddecl)) { bool new_redefines_gnu_inline = false; @@ -1894,24 +1892,27 @@ duplicate_decls (tree newdecl, tree olddecl, bool newdecl_is_friend) /* Don't really know how much of the language-specific values we should copy from old to new. */ DECL_IN_AGGR_P (newdecl) = DECL_IN_AGGR_P (olddecl); - DECL_LANG_SPECIFIC (newdecl)->decl_flags.u2 = - DECL_LANG_SPECIFIC (olddecl)->decl_flags.u2; - DECL_NONCONVERTING_P (newdecl) = DECL_NONCONVERTING_P (olddecl); DECL_REPO_AVAILABLE_P (newdecl) = DECL_REPO_AVAILABLE_P (olddecl); - if (DECL_TEMPLATE_INFO (newdecl)) - new_template = DECL_TI_TEMPLATE (newdecl); - DECL_TEMPLATE_INFO (newdecl) = DECL_TEMPLATE_INFO (olddecl); DECL_INITIALIZED_IN_CLASS_P (newdecl) |= DECL_INITIALIZED_IN_CLASS_P (olddecl); - olddecl_friend = DECL_FRIEND_P (olddecl); - hidden_friend = (DECL_ANTICIPATED (olddecl) - && DECL_HIDDEN_FRIEND_P (olddecl) - && newdecl_is_friend); - /* Only functions have DECL_BEFRIENDING_CLASSES. */ + if (LANG_DECL_HAS_MIN (newdecl)) + { + DECL_LANG_SPECIFIC (newdecl)->u.min.u2 = + DECL_LANG_SPECIFIC (olddecl)->u.min.u2; + if (DECL_TEMPLATE_INFO (newdecl)) + new_template_info = DECL_TEMPLATE_INFO (newdecl); + DECL_TEMPLATE_INFO (newdecl) = DECL_TEMPLATE_INFO (olddecl); + } + /* Only functions have these fields. */ if (TREE_CODE (newdecl) == FUNCTION_DECL || DECL_FUNCTION_TEMPLATE_P (newdecl)) { + DECL_NONCONVERTING_P (newdecl) = DECL_NONCONVERTING_P (olddecl); + olddecl_friend = DECL_FRIEND_P (olddecl); + hidden_friend = (DECL_ANTICIPATED (olddecl) + && DECL_HIDDEN_FRIEND_P (olddecl) + && newdecl_is_friend); DECL_BEFRIENDING_CLASSES (newdecl) = chainon (DECL_BEFRIENDING_CLASSES (newdecl), DECL_BEFRIENDING_CLASSES (olddecl)); @@ -2097,7 +2098,7 @@ duplicate_decls (tree newdecl, tree olddecl, bool newdecl_is_friend) memcpy ((char *) olddecl + sizeof (struct tree_decl_common), (char *) newdecl + sizeof (struct tree_decl_common), sizeof (struct tree_function_decl) - sizeof (struct tree_decl_common)); - if (new_template) + if (new_template_info) /* If newdecl is a template instantiation, it is possible that the following sequence of events has occurred: @@ -2120,7 +2121,7 @@ duplicate_decls (tree newdecl, tree olddecl, bool newdecl_is_friend) instantiations so that if we try to do the instantiation again we won't get the clobbered declaration. */ reregister_specialization (newdecl, - new_template, + new_template_info, olddecl); } else @@ -3459,6 +3460,7 @@ cxx_init_decl_processing (void) /* Perform other language dependent initializations. */ init_class_processing (); init_rtti_processing (); + init_template_processing (); if (flag_exceptions) init_exception_processing (); @@ -12581,16 +12583,6 @@ finish_method (tree decl) DECL_INITIAL (fndecl) = old_initial; - /* We used to check if the context of FNDECL was different from - current_class_type as another way to get inside here. This didn't work - for String.cc in libg++. */ - if (DECL_FRIEND_P (fndecl)) - { - VEC_safe_push (tree, gc, CLASSTYPE_INLINE_FRIENDS (current_class_type), - fndecl); - decl = void_type_node; - } - return decl; } diff --git a/gcc/cp/decl2.c b/gcc/cp/decl2.c index 119196408e8..b3b567e0f6c 100644 --- a/gcc/cp/decl2.c +++ b/gcc/cp/decl2.c @@ -2634,7 +2634,6 @@ start_objects (int method_type, int initp) DECL_GLOBAL_CTOR_P (current_function_decl) = 1; else DECL_GLOBAL_DTOR_P (current_function_decl) = 1; - DECL_LANG_SPECIFIC (current_function_decl)->decl_flags.u2sel = 1; body = begin_compound_stmt (BCS_FN_BODY); @@ -3911,27 +3910,4 @@ mark_used (tree decl) processing_template_decl = saved_processing_template_decl; } -/* Given function PARM_DECL PARM, return its index in the function's list - of parameters, beginning with 1. */ - -int -parm_index (tree parm) -{ - int index; - tree arg; - - for (index = 1, arg = DECL_ARGUMENTS (DECL_CONTEXT (parm)); - arg; - ++index, arg = TREE_CHAIN (arg)) - { - if (DECL_NAME (parm) == DECL_NAME (arg)) - break; - if (DECL_ARTIFICIAL (arg)) - --index; - } - - gcc_assert (arg); - return index; -} - #include "gt-cp-decl2.h" diff --git a/gcc/cp/error.c b/gcc/cp/error.c index 98dacb1d606..850f4069a17 100644 --- a/gcc/cp/error.c +++ b/gcc/cp/error.c @@ -165,7 +165,8 @@ dump_template_argument (tree arg, int flags) static int count_non_default_template_args (tree args, tree params) { - int n = TREE_VEC_LENGTH (args); + tree inner_args = INNERMOST_TEMPLATE_ARGS (args); + int n = TREE_VEC_LENGTH (inner_args); int last; if (params == NULL_TREE || !flag_pretty_templates) @@ -184,7 +185,7 @@ count_non_default_template_args (tree args, tree params) def = tsubst_copy_and_build (def, args, tf_none, NULL_TREE, false, true); --processing_template_decl; } - if (!cp_tree_equal (TREE_VEC_ELT (args, last), def)) + if (!cp_tree_equal (TREE_VEC_ELT (inner_args, last), def)) break; } @@ -1405,7 +1406,7 @@ dump_function_name (tree t, int flags) pp_cxx_ws_string (cxx_pp, "operator"); dump_type (TREE_TYPE (TREE_TYPE (t)), flags); } - else if (IDENTIFIER_OPNAME_P (name)) + else if (name && IDENTIFIER_OPNAME_P (name)) pp_cxx_tree_identifier (cxx_pp, name); else dump_decl (name, flags); @@ -1434,7 +1435,7 @@ dump_template_parms (tree info, int primary, int flags) pp_cxx_begin_template_argument_list (cxx_pp); /* Be careful only to print things when we have them, so as not - to crash producing error messages. */ + to crash producing error messages. */ if (args && !primary) { int len, ix; @@ -1443,11 +1444,9 @@ dump_template_parms (tree info, int primary, int flags) ? DECL_INNERMOST_TEMPLATE_PARMS (TI_TEMPLATE (info)) : NULL_TREE); - if (TMPL_ARGS_HAVE_MULTIPLE_LEVELS (args)) - args = TREE_VEC_ELT (args, TREE_VEC_LENGTH (args) - 1); - len = count_non_default_template_args (args, params); + args = INNERMOST_TEMPLATE_ARGS (args); for (ix = 0; ix != len; ix++) { tree arg = TREE_VEC_ELT (args, ix); diff --git a/gcc/cp/g++spec.c b/gcc/cp/g++spec.c index ab50f578425..7ad268fabf9 100644 --- a/gcc/cp/g++spec.c +++ b/gcc/cp/g++spec.c @@ -273,7 +273,7 @@ lang_specific_driver (int *in_argc, const char *const **in_argv, /* Make sure to have room for the trailing NULL argument. Add one for shared_libgcc or extra static library. */ - num_args = argc + added + need_math + (library > 0) * 4 + 1; + num_args = argc + added + need_math + (library > 0) * 4 + 2; arglist = XNEWVEC (const char *, num_args); i = 0; diff --git a/gcc/cp/lex.c b/gcc/cp/lex.c index bf507411d6f..5eb182d3caf 100644 --- a/gcc/cp/lex.c +++ b/gcc/cp/lex.c @@ -532,19 +532,22 @@ retrofit_lang_decl (tree t) { struct lang_decl *ld; size_t size; - - if (CAN_HAVE_FULL_LANG_DECL_P (t)) - size = sizeof (struct lang_decl); + int sel; + + if (TREE_CODE (t) == FUNCTION_DECL) + sel = 1, size = sizeof (struct lang_decl_fn); + else if (TREE_CODE (t) == NAMESPACE_DECL) + sel = 2, size = sizeof (struct lang_decl_ns); + else if (TREE_CODE (t) == PARM_DECL) + sel = 3, size = sizeof (struct lang_decl_parm); + else if (LANG_DECL_HAS_MIN (t)) + sel = 0, size = sizeof (struct lang_decl_min); else - size = sizeof (struct lang_decl_flags); + gcc_unreachable (); ld = GGC_CNEWVAR (struct lang_decl, size); - ld->decl_flags.can_be_full = CAN_HAVE_FULL_LANG_DECL_P (t) ? 1 : 0; - ld->decl_flags.u1sel = TREE_CODE (t) == NAMESPACE_DECL ? 1 : 0; - ld->decl_flags.u2sel = 0; - if (ld->decl_flags.can_be_full) - ld->u.f.u3sel = TREE_CODE (t) == FUNCTION_DECL ? 1 : 0; + ld->u.base.selector = sel; DECL_LANG_SPECIFIC (t) = ld; if (current_lang_name == lang_name_cplusplus @@ -572,10 +575,17 @@ cxx_dup_lang_specific_decl (tree node) if (! DECL_LANG_SPECIFIC (node)) return; - if (!CAN_HAVE_FULL_LANG_DECL_P (node)) - size = sizeof (struct lang_decl_flags); + if (TREE_CODE (node) == FUNCTION_DECL) + size = sizeof (struct lang_decl_fn); + else if (TREE_CODE (node) == NAMESPACE_DECL) + size = sizeof (struct lang_decl_ns); + else if (TREE_CODE (node) == PARM_DECL) + size = sizeof (struct lang_decl_parm); + else if (LANG_DECL_HAS_MIN (node)) + size = sizeof (struct lang_decl_min); else - size = sizeof (struct lang_decl); + gcc_unreachable (); + ld = GGC_NEWVAR (struct lang_decl, size); memcpy (ld, DECL_LANG_SPECIFIC (node), size); DECL_LANG_SPECIFIC (node) = ld; diff --git a/gcc/cp/mangle.c b/gcc/cp/mangle.c index f7d9d416988..c49439d0e07 100644 --- a/gcc/cp/mangle.c +++ b/gcc/cp/mangle.c @@ -1088,43 +1088,54 @@ write_unqualified_name (const tree decl) { MANGLE_TRACE_TREE ("unqualified-name", decl); - if (DECL_LANG_SPECIFIC (decl) != NULL && DECL_CONSTRUCTOR_P (decl)) - write_special_name_constructor (decl); - else if (DECL_LANG_SPECIFIC (decl) != NULL && DECL_DESTRUCTOR_P (decl)) - write_special_name_destructor (decl); - else if (DECL_NAME (decl) == NULL_TREE) + if (DECL_NAME (decl) == NULL_TREE) { gcc_assert (DECL_ASSEMBLER_NAME_SET_P (decl)); write_source_name (DECL_ASSEMBLER_NAME (decl)); + return; } - else if (DECL_CONV_FN_P (decl)) + else if (DECL_DECLARES_FUNCTION_P (decl)) { - /* Conversion operator. Handle it right here. - <operator> ::= cv <type> */ - tree type; - if (decl_is_template_id (decl, NULL)) + bool found = true; + if (DECL_CONSTRUCTOR_P (decl)) + write_special_name_constructor (decl); + else if (DECL_DESTRUCTOR_P (decl)) + write_special_name_destructor (decl); + else if (DECL_CONV_FN_P (decl)) { - tree fn_type; - fn_type = get_mostly_instantiated_function_type (decl); - type = TREE_TYPE (fn_type); + /* Conversion operator. Handle it right here. + <operator> ::= cv <type> */ + tree type; + if (decl_is_template_id (decl, NULL)) + { + tree fn_type; + fn_type = get_mostly_instantiated_function_type (decl); + type = TREE_TYPE (fn_type); + } + else + type = DECL_CONV_FN_TYPE (decl); + write_conversion_operator_name (type); + } + else if (DECL_OVERLOADED_OPERATOR_P (decl)) + { + operator_name_info_t *oni; + if (DECL_ASSIGNMENT_OPERATOR_P (decl)) + oni = assignment_operator_name_info; + else + oni = operator_name_info; + + write_string (oni[DECL_OVERLOADED_OPERATOR_P (decl)].mangled_name); } else - type = DECL_CONV_FN_TYPE (decl); - write_conversion_operator_name (type); - } - else if (DECL_OVERLOADED_OPERATOR_P (decl)) - { - operator_name_info_t *oni; - if (DECL_ASSIGNMENT_OPERATOR_P (decl)) - oni = assignment_operator_name_info; - else - oni = operator_name_info; + found = false; - write_string (oni[DECL_OVERLOADED_OPERATOR_P (decl)].mangled_name); + if (found) + return; } - else if (VAR_OR_FUNCTION_DECL_P (decl) && ! TREE_PUBLIC (decl) - && DECL_NAMESPACE_SCOPE_P (decl) - && decl_linkage (decl) == lk_internal) + + if (VAR_OR_FUNCTION_DECL_P (decl) && ! TREE_PUBLIC (decl) + && DECL_NAMESPACE_SCOPE_P (decl) + && decl_linkage (decl) == lk_internal) { MANGLE_TRACE_TREE ("local-source-name", decl); write_char ('L'); @@ -2188,7 +2199,8 @@ write_expression (tree expr) else if (code == PARM_DECL) { /* A function parameter used in a late-specified return type. */ - int index = parm_index (expr); + int index = DECL_PARM_INDEX (expr); + gcc_assert (index >= 1); write_string ("fp"); if (index > 1) write_unsigned_number (index - 2); diff --git a/gcc/cp/method.c b/gcc/cp/method.c index af58afe135e..4e22a208510 100644 --- a/gcc/cp/method.c +++ b/gcc/cp/method.c @@ -277,7 +277,6 @@ make_alias_for (tree function, tree newid) DECL_SAVED_FUNCTION_DATA (alias) = NULL; DECL_DESTRUCTOR_P (alias) = 0; DECL_CONSTRUCTOR_P (alias) = 0; - DECL_CLONED_FUNCTION (alias) = NULL_TREE; DECL_EXTERNAL (alias) = 0; DECL_ARTIFICIAL (alias) = 1; DECL_NO_STATIC_CHAIN (alias) = 1; diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c index f71ea46f8cb..f3122bc76fd 100644 --- a/gcc/cp/parser.c +++ b/gcc/cp/parser.c @@ -14111,6 +14111,7 @@ cp_parser_parameter_declaration_list (cp_parser* parser, bool *is_error) tree parameters = NULL_TREE; tree *tail = ¶meters; bool saved_in_unbraced_linkage_specification_p; + int index = 0; /* Assume all will go well. */ *is_error = false; @@ -14162,6 +14163,12 @@ cp_parser_parameter_declaration_list (cp_parser* parser, bool *is_error) if (DECL_NAME (decl)) decl = pushdecl (decl); + if (decl != error_mark_node) + { + retrofit_lang_decl (decl); + DECL_PARM_INDEX (decl) = ++index; + } + /* Add the new parameter to the list. */ *tail = build_tree_list (parameter->default_argument, decl); tail = &TREE_CHAIN (*tail); diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c index e0a413bfb28..4143bb121d9 100644 --- a/gcc/cp/pt.c +++ b/gcc/cp/pt.c @@ -82,6 +82,19 @@ static tree cur_stmt_expr; local variables. */ static htab_t local_specializations; +typedef struct GTY(()) spec_entry +{ + tree tmpl; + tree args; + tree spec; +} spec_entry; + +static GTY ((param_is (spec_entry))) + htab_t decl_specializations; + +static GTY ((param_is (spec_entry))) + htab_t type_specializations; + /* Contains canonical template parameter types. The vector is indexed by the TEMPLATE_TYPE_IDX of the template parameter. Each element is a TREE_LIST, whose TREE_VALUEs contain the canonical template @@ -133,6 +146,7 @@ static bool inline_needs_template_parms (tree); static void push_inline_template_parms_recursive (tree, int); static tree retrieve_local_specialization (tree); static void register_local_specialization (tree, tree); +static hashval_t hash_specialization (const void *p); static tree reduce_template_parm_level (tree, tree, int, tree, tsubst_flags_t); static int mark_template_parm (tree, void *); static int template_parm_this_level_p (tree, void *); @@ -176,6 +190,7 @@ static tree tsubst_pack_expansion (tree, tree, tsubst_flags_t, tree); static tree tsubst_decl (tree, tree, tsubst_flags_t); static void perform_typedefs_access_check (tree tmpl, tree targs); static void append_type_to_template_for_access_check_1 (tree, tree, tree); +static hashval_t iterative_hash_template_arg (tree arg, hashval_t val); /* Make the current scope suitable for access checking when we are processing T. T can be FUNCTION_DECL for instantiated function @@ -811,13 +826,13 @@ maybe_process_partial_specialization (tree type) && !COMPLETE_TYPE_P (type)) { tree t; + tree tmpl = CLASSTYPE_TI_TEMPLATE (type); if (current_namespace - != decl_namespace_context (CLASSTYPE_TI_TEMPLATE (type))) + != decl_namespace_context (tmpl)) { permerror (input_location, "specializing %q#T in different namespace", type); - permerror (input_location, " from definition of %q+#D", - CLASSTYPE_TI_TEMPLATE (type)); + permerror (input_location, " from definition of %q+#D", tmpl); } /* Check for invalid specialization after instantiation: @@ -825,13 +840,38 @@ maybe_process_partial_specialization (tree type) template <> template <> class C<int>::D<int>; template <> template <class U> class C<int>::D; */ - for (t = DECL_TEMPLATE_INSTANTIATIONS - (most_general_template (CLASSTYPE_TI_TEMPLATE (type))); + for (t = DECL_TEMPLATE_INSTANTIATIONS (tmpl); t; t = TREE_CHAIN (t)) - if (TREE_VALUE (t) != type - && TYPE_CONTEXT (TREE_VALUE (t)) == context) - error ("specialization %qT after instantiation %qT", - type, TREE_VALUE (t)); + { + tree inst = TREE_VALUE (t); + if (CLASSTYPE_TEMPLATE_SPECIALIZATION (inst)) + { + /* We already have a full specialization of this partial + instantiation. Reassign it to the new member + specialization template. */ + spec_entry elt; + spec_entry **slot; + + elt.tmpl = most_general_template (tmpl); + elt.args = CLASSTYPE_TI_ARGS (inst); + elt.spec = inst; + + htab_remove_elt (type_specializations, &elt); + + elt.tmpl = tmpl; + elt.args = INNERMOST_TEMPLATE_ARGS (elt.args); + + slot = (spec_entry **) + htab_find_slot (type_specializations, &elt, INSERT); + *slot = GGC_NEW (spec_entry); + **slot = elt; + } + else if (COMPLETE_TYPE_P (inst) || TYPE_BEING_DEFINED (inst)) + /* But if we've had an implicit instantiation, that's a + problem ([temp.expl.spec]/6). */ + error ("specialization %qT after instantiation %qT", + type, inst); + } /* Mark TYPE as a specialization. And as a result, we only have one level of template argument for the innermost @@ -895,8 +935,7 @@ optimize_specialization_lookup_p (tree tmpl) parameter is ignored if TMPL is not a class template. */ static tree -retrieve_specialization (tree tmpl, tree args, - bool class_specializations_p) +retrieve_specialization (tree tmpl, tree args, hashval_t hash) { if (args == error_mark_node) return NULL_TREE; @@ -921,8 +960,7 @@ retrieve_specialization (tree tmpl, tree args, arguments. */ class_template = CLASSTYPE_TI_TEMPLATE (DECL_CONTEXT (tmpl)); class_specialization - = retrieve_specialization (class_template, args, - /*class_specializations_p=*/false); + = retrieve_specialization (class_template, args, 0); if (!class_specialization) return NULL_TREE; /* Now, find the appropriate entry in the CLASSTYPE_METHOD_VEC @@ -936,46 +974,34 @@ retrieve_specialization (tree tmpl, tree args, for (fns = VEC_index (tree, methods, idx); fns; fns = OVL_NEXT (fns)) { tree fn = OVL_CURRENT (fns); - if (DECL_TEMPLATE_INFO (fn) && DECL_TI_TEMPLATE (fn) == tmpl) + if (DECL_TEMPLATE_INFO (fn) && DECL_TI_TEMPLATE (fn) == tmpl + /* using-declarations can add base methods to the method vec, + and we don't want those here. */ + && DECL_CONTEXT (fn) == class_specialization) return fn; } return NULL_TREE; } else { - tree *sp; - tree *head; - - /* Class templates store their instantiations on the - DECL_TEMPLATE_INSTANTIATIONS list; other templates use the - DECL_TEMPLATE_SPECIALIZATIONS list. */ - if (!class_specializations_p - && TREE_CODE (DECL_TEMPLATE_RESULT (tmpl)) == TYPE_DECL - && !is_typedef_decl (DECL_TEMPLATE_RESULT (tmpl)) - && TAGGED_TYPE_P (TREE_TYPE (tmpl))) - sp = &DECL_TEMPLATE_INSTANTIATIONS (tmpl); + spec_entry *found; + spec_entry elt; + htab_t specializations; + + elt.tmpl = tmpl; + elt.args = args; + elt.spec = NULL_TREE; + + if (DECL_CLASS_TEMPLATE_P (tmpl)) + specializations = type_specializations; else - sp = &DECL_TEMPLATE_SPECIALIZATIONS (tmpl); - head = sp; - /* Iterate through the list until we find a matching template. */ - while (*sp != NULL_TREE) - { - tree spec = *sp; + specializations = decl_specializations; - if (comp_template_args (TREE_PURPOSE (spec), args)) - { - /* Use the move-to-front heuristic to speed up future - searches. */ - if (spec != *head) - { - *sp = TREE_CHAIN (*sp); - TREE_CHAIN (spec) = *head; - *head = spec; - } - return TREE_VALUE (spec); - } - sp = &TREE_CHAIN (spec); - } + if (hash == 0) + hash = hash_specialization (&elt); + found = (spec_entry *) htab_find_with_hash (specializations, &elt, hash); + if (found) + return found->spec; } return NULL_TREE; @@ -1214,11 +1240,14 @@ is_specialization_of_friend (tree decl, tree friend_decl) equivalent prior declaration, if available. */ static tree -register_specialization (tree spec, tree tmpl, tree args, bool is_friend) +register_specialization (tree spec, tree tmpl, tree args, bool is_friend, + hashval_t hash) { tree fn; + spec_entry **slot = NULL; + spec_entry elt; - gcc_assert (TREE_CODE (tmpl) == TEMPLATE_DECL); + gcc_assert (TREE_CODE (tmpl) == TEMPLATE_DECL && DECL_P (spec)); if (TREE_CODE (spec) == FUNCTION_DECL && uses_template_parms (DECL_TI_ARGS (spec))) @@ -1235,8 +1264,27 @@ register_specialization (tree spec, tree tmpl, tree args, bool is_friend) instantiation unless and until it is actually needed. */ return spec; - fn = retrieve_specialization (tmpl, args, - /*class_specializations_p=*/false); + if (optimize_specialization_lookup_p (tmpl)) + /* We don't put these specializations in the hash table, but we might + want to give an error about a mismatch. */ + fn = retrieve_specialization (tmpl, args, 0); + else + { + elt.tmpl = tmpl; + elt.args = args; + elt.spec = spec; + + if (hash == 0) + hash = hash_specialization (&elt); + + slot = (spec_entry **) + htab_find_slot_with_hash (decl_specializations, &elt, hash, INSERT); + if (*slot) + fn = (*slot)->spec; + else + fn = NULL_TREE; + } + /* We can sometimes try to re-register a specialization that we've already got. In particular, regenerate_decl_from_template calls duplicate_decls which will update the specialization list. But, @@ -1312,6 +1360,8 @@ register_specialization (tree spec, tree tmpl, tree args, bool is_friend) return fn; } } + else if (fn) + return duplicate_decls (spec, fn, is_friend); /* A specialization must be declared in the same namespace as the template it is specializing. */ @@ -1320,32 +1370,214 @@ register_specialization (tree spec, tree tmpl, tree args, bool is_friend) DECL_CONTEXT (spec) = DECL_CONTEXT (tmpl); if (!optimize_specialization_lookup_p (tmpl)) - DECL_TEMPLATE_SPECIALIZATIONS (tmpl) - = tree_cons (args, spec, DECL_TEMPLATE_SPECIALIZATIONS (tmpl)); + { + gcc_assert (tmpl && args && spec); + *slot = GGC_NEW (spec_entry); + **slot = elt; + if (TREE_CODE (spec) == FUNCTION_DECL && DECL_NAMESPACE_SCOPE_P (spec) + && PRIMARY_TEMPLATE_P (tmpl) + && DECL_SAVED_TREE (DECL_TEMPLATE_RESULT (tmpl)) == NULL_TREE) + /* TMPL is a forward declaration of a template function; keep a list + of all specializations in case we need to reassign them to a friend + template later in tsubst_friend_function. */ + DECL_TEMPLATE_INSTANTIATIONS (tmpl) + = tree_cons (args, spec, DECL_TEMPLATE_INSTANTIATIONS (tmpl)); + } return spec; } +/* Returns true iff two spec_entry nodes are equivalent. Only compares the + TMPL and ARGS members, ignores SPEC. */ + +static int +eq_specializations (const void *p1, const void *p2) +{ + const spec_entry *e1 = (const spec_entry *)p1; + const spec_entry *e2 = (const spec_entry *)p2; + + return (e1->tmpl == e2->tmpl + && comp_template_args (e1->args, e2->args)); +} + +/* Returns a hash for a template TMPL and template arguments ARGS. */ + +static hashval_t +hash_tmpl_and_args (tree tmpl, tree args) +{ + hashval_t val = DECL_UID (tmpl); + return iterative_hash_template_arg (args, val); +} + +/* Returns a hash for a spec_entry node based on the TMPL and ARGS members, + ignoring SPEC. */ + +static hashval_t +hash_specialization (const void *p) +{ + const spec_entry *e = (const spec_entry *)p; + return hash_tmpl_and_args (e->tmpl, e->args); +} + +/* Recursively calculate a hash value for a template argument ARG, for use + in the hash tables of template specializations. */ + +static hashval_t +iterative_hash_template_arg (tree arg, hashval_t val) +{ + unsigned HOST_WIDE_INT i; + enum tree_code code; + char tclass; + + if (arg == NULL_TREE) + return iterative_hash_object (arg, val); + + if (!TYPE_P (arg)) + STRIP_NOPS (arg); + + code = TREE_CODE (arg); + tclass = TREE_CODE_CLASS (code); + + val = iterative_hash_object (code, val); + + switch (code) + { + case ERROR_MARK: + return val; + + case IDENTIFIER_NODE: + return iterative_hash_object (IDENTIFIER_HASH_VALUE (arg), val); + + case TREE_VEC: + { + int i, len = TREE_VEC_LENGTH (arg); + for (i = 0; i < len; ++i) + val = iterative_hash_template_arg (TREE_VEC_ELT (arg, i), val); + return val; + } + + case TYPE_PACK_EXPANSION: + case EXPR_PACK_EXPANSION: + return iterative_hash_template_arg (PACK_EXPANSION_PATTERN (arg), val); + + case ARGUMENT_PACK_SELECT: + /* We can get one of these when re-hashing a previous entry in the middle + of substituting into a pack expansion. Just look through it... */ + arg = ARGUMENT_PACK_SELECT_FROM_PACK (arg); + /* ...and fall through. */ + case TYPE_ARGUMENT_PACK: + case NONTYPE_ARGUMENT_PACK: + return iterative_hash_template_arg (ARGUMENT_PACK_ARGS (arg), val); + + case TREE_LIST: + for (; arg; arg = TREE_CHAIN (arg)) + val = iterative_hash_template_arg (TREE_VALUE (arg), val); + return val; + + case OVERLOAD: + for (; arg; arg = OVL_CHAIN (arg)) + val = iterative_hash_template_arg (OVL_FUNCTION (arg), val); + return val; + + case CONSTRUCTOR: + { + tree field, value; + FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (arg), i, field, value) + { + val = iterative_hash_template_arg (field, val); + val = iterative_hash_template_arg (value, val); + } + return val; + } + + case PARM_DECL: + val = iterative_hash_object (DECL_PARM_INDEX (arg), val); + return iterative_hash_template_arg (TREE_TYPE (arg), val); + + case TARGET_EXPR: + return iterative_hash_template_arg (TARGET_EXPR_INITIAL (arg), val); + + case PTRMEM_CST: + val = iterative_hash_template_arg (PTRMEM_CST_CLASS (arg), val); + return iterative_hash_template_arg (PTRMEM_CST_MEMBER (arg), val); + + case TEMPLATE_PARM_INDEX: + val = iterative_hash_template_arg + (TREE_TYPE (TEMPLATE_PARM_DECL (arg)), val); + val = iterative_hash_object (TEMPLATE_PARM_LEVEL (arg), val); + return iterative_hash_object (TEMPLATE_PARM_IDX (arg), val); + + case TRAIT_EXPR: + val = iterative_hash_object (TRAIT_EXPR_KIND (arg), val); + val = iterative_hash_template_arg (TRAIT_EXPR_TYPE1 (arg), val); + return iterative_hash_template_arg (TRAIT_EXPR_TYPE2 (arg), val); + + case BASELINK: + val = iterative_hash_template_arg (BINFO_TYPE (BASELINK_BINFO (arg)), + val); + return iterative_hash_template_arg (DECL_NAME (get_first_fn (arg)), + val); + + case MODOP_EXPR: + val = iterative_hash_template_arg (TREE_OPERAND (arg, 0), val); + code = TREE_CODE (TREE_OPERAND (arg, 1)); + val = iterative_hash_object (code, val); + return iterative_hash_template_arg (TREE_OPERAND (arg, 2), val); + + default: + switch (tclass) + { + case tcc_type: + if (TYPE_CANONICAL (arg)) + return iterative_hash_object (TYPE_HASH (TYPE_CANONICAL (arg)), + val); + else if (TREE_CODE (arg) == DECLTYPE_TYPE) + return iterative_hash_template_arg (DECLTYPE_TYPE_EXPR (arg), val); + /* Otherwise just compare the types during lookup. */ + return val; + + case tcc_declaration: + case tcc_constant: + return iterative_hash_expr (arg, val); + + default: + gcc_assert (IS_EXPR_CODE_CLASS (tclass)); + { + unsigned n = TREE_OPERAND_LENGTH (arg); + for (i = 0; i < n; ++i) + val = iterative_hash_template_arg (TREE_OPERAND (arg, i), val); + return val; + } + } + } + gcc_unreachable (); + return 0; +} + /* Unregister the specialization SPEC as a specialization of TMPL. Replace it with NEW_SPEC, if NEW_SPEC is non-NULL. Returns true - if the SPEC was listed as a specialization of TMPL. */ + if the SPEC was listed as a specialization of TMPL. + + Note that SPEC has been ggc_freed, so we can't look inside it. */ bool -reregister_specialization (tree spec, tree tmpl, tree new_spec) +reregister_specialization (tree spec, tree tinfo, tree new_spec) { - tree* s; + spec_entry **slot; + spec_entry elt; - for (s = &DECL_TEMPLATE_SPECIALIZATIONS (tmpl); - *s != NULL_TREE; - s = &TREE_CHAIN (*s)) - if (TREE_VALUE (*s) == spec) - { - if (!new_spec) - *s = TREE_CHAIN (*s); - else - TREE_VALUE (*s) = new_spec; - return 1; - } + elt.tmpl = most_general_template (TI_TEMPLATE (tinfo)); + elt.args = TI_ARGS (tinfo); + elt.spec = NULL_TREE; + + slot = (spec_entry **) htab_find_slot (decl_specializations, &elt, INSERT); + if (*slot) + { + gcc_assert ((*slot)->spec == spec || (*slot)->spec == new_spec); + gcc_assert (new_spec != NULL_TREE); + (*slot)->spec = new_spec; + return 1; + } return 0; } @@ -1701,12 +1933,13 @@ determine_specialization (tree template_id, if (candidates) { tree fn = TREE_VALUE (candidates); - /* DECL is a re-declaration of a template function. */ + *targs_out = copy_node (DECL_TI_ARGS (fn)); + /* DECL is a re-declaration or partial instantiation of a template + function. */ if (TREE_CODE (fn) == TEMPLATE_DECL) return fn; /* It was a specialization of an ordinary member function in a template class. */ - *targs_out = copy_node (DECL_TI_ARGS (fn)); return DECL_TI_TEMPLATE (fn); } @@ -2237,7 +2470,8 @@ check_explicit_specialization (tree declarator, parm = TREE_CHAIN (parm)) DECL_CONTEXT (parm) = result; } - return tmpl; + return register_specialization (tmpl, gen_tmpl, targs, + is_friend, 0); } /* Set up the DECL_TEMPLATE_INFO for DECL. */ @@ -2315,7 +2549,7 @@ check_explicit_specialization (tree declarator, /* Register this specialization so that we can find it again. */ - decl = register_specialization (decl, gen_tmpl, targs, is_friend); + decl = register_specialization (decl, gen_tmpl, targs, is_friend, 0); } } @@ -3225,17 +3459,6 @@ build_template_decl (tree decl, tree parms, bool member_template_p) DECL_TEMPLATE_PARMS (tmpl) = parms; DECL_CONTEXT (tmpl) = DECL_CONTEXT (decl); DECL_MEMBER_TEMPLATE_P (tmpl) = member_template_p; - if (DECL_LANG_SPECIFIC (decl)) - { - DECL_STATIC_FUNCTION_P (tmpl) = DECL_STATIC_FUNCTION_P (decl); - DECL_CONSTRUCTOR_P (tmpl) = DECL_CONSTRUCTOR_P (decl); - DECL_DESTRUCTOR_P (tmpl) = DECL_DESTRUCTOR_P (decl); - DECL_NONCONVERTING_P (tmpl) = DECL_NONCONVERTING_P (decl); - DECL_ASSIGNMENT_OPERATOR_P (tmpl) = DECL_ASSIGNMENT_OPERATOR_P (decl); - if (DECL_OVERLOADED_OPERATOR_P (decl)) - SET_OVERLOADED_OPERATOR_CODE (tmpl, - DECL_OVERLOADED_OPERATOR_P (decl)); - } return tmpl; } @@ -3510,10 +3733,8 @@ process_partial_specialization (tree decl) } } - if (retrieve_specialization (maintmpl, specargs, - /*class_specializations_p=*/true)) - /* We've already got this specialization. */ - return decl; + /* We should only get here once. */ + gcc_assert (!COMPLETE_TYPE_P (type)); DECL_TEMPLATE_SPECIALIZATIONS (maintmpl) = tree_cons (specargs, inner_parms, @@ -3561,6 +3782,7 @@ check_default_tmpl_args (tree decl, tree parms, int is_primary, if (current_class_type && !TYPE_BEING_DEFINED (current_class_type) && DECL_LANG_SPECIFIC (decl) + && DECL_DECLARES_FUNCTION_P (decl) /* If this is either a friend defined in the scope of the class or a member function. */ && (DECL_FUNCTION_MEMBER_P (decl) @@ -3993,7 +4215,7 @@ push_template_decl_real (tree decl, bool is_friend) register_specialization (new_tmpl, most_general_template (tmpl), args, - is_friend); + is_friend, 0); return decl; } @@ -5613,6 +5835,10 @@ lookup_template_class (tree d1, { tree templ = NULL_TREE, parmlist; tree t; + spec_entry **slot; + spec_entry *entry; + spec_entry elt; + hashval_t hash; timevar_push (TV_NAME_LOOKUP); @@ -5778,7 +6004,6 @@ lookup_template_class (tree d1, /* From here on, we're only interested in the most general template. */ - templ = gen_tmpl; /* Calculate the BOUND_ARGS. These will be the args that are actually tsubst'd into the definition to create the @@ -5792,12 +6017,12 @@ lookup_template_class (tree d1, tree bound_args = make_tree_vec (parm_depth); for (i = saved_depth, - t = DECL_TEMPLATE_PARMS (templ); + t = DECL_TEMPLATE_PARMS (gen_tmpl); i > 0 && t != NULL_TREE; --i, t = TREE_CHAIN (t)) { tree a = coerce_template_parms (TREE_VALUE (t), - arglist, templ, + arglist, gen_tmpl, complain, /*require_all_args=*/true, /*use_default_args=*/true); @@ -5828,7 +6053,7 @@ lookup_template_class (tree d1, arglist = coerce_template_parms (INNERMOST_TEMPLATE_PARMS (parmlist), INNERMOST_TEMPLATE_ARGS (arglist), - templ, + gen_tmpl, complain, /*require_all_args=*/true, /*use_default_args=*/true); @@ -5846,7 +6071,7 @@ lookup_template_class (tree d1, the `C<T>' is just the same as `C'. Outside of the class, however, such a reference is an instantiation. */ if ((entering_scope - || !PRIMARY_TEMPLATE_P (templ) + || !PRIMARY_TEMPLATE_P (gen_tmpl) || currently_open_class (template_type)) /* comp_template_args is expensive, check it last. */ && comp_template_args (TYPE_TI_ARGS (template_type), @@ -5854,10 +6079,14 @@ lookup_template_class (tree d1, POP_TIMEVAR_AND_RETURN (TV_NAME_LOOKUP, template_type); /* If we already have this specialization, return it. */ - found = retrieve_specialization (templ, arglist, - /*class_specializations_p=*/false); - if (found) - POP_TIMEVAR_AND_RETURN (TV_NAME_LOOKUP, found); + elt.tmpl = gen_tmpl; + elt.args = arglist; + hash = hash_specialization (&elt); + entry = (spec_entry *) htab_find_with_hash (type_specializations, + &elt, hash); + + if (entry) + POP_TIMEVAR_AND_RETURN (TV_NAME_LOOKUP, entry->spec); /* This type is a "partial instantiation" if any of the template arguments still involve template parameters. Note that we set @@ -5868,22 +6097,22 @@ lookup_template_class (tree d1, /* If the deduced arguments are invalid, then the binding failed. */ if (!is_partial_instantiation - && check_instantiated_args (templ, + && check_instantiated_args (gen_tmpl, INNERMOST_TEMPLATE_ARGS (arglist), complain)) POP_TIMEVAR_AND_RETURN (TV_NAME_LOOKUP, error_mark_node); if (!is_partial_instantiation - && !PRIMARY_TEMPLATE_P (templ) - && TREE_CODE (CP_DECL_CONTEXT (templ)) == NAMESPACE_DECL) + && !PRIMARY_TEMPLATE_P (gen_tmpl) + && TREE_CODE (CP_DECL_CONTEXT (gen_tmpl)) == NAMESPACE_DECL) { - found = xref_tag_from_type (TREE_TYPE (templ), - DECL_NAME (templ), + found = xref_tag_from_type (TREE_TYPE (gen_tmpl), + DECL_NAME (gen_tmpl), /*tag_scope=*/ts_global); POP_TIMEVAR_AND_RETURN (TV_NAME_LOOKUP, found); } - context = tsubst (DECL_CONTEXT (templ), arglist, + context = tsubst (DECL_CONTEXT (gen_tmpl), arglist, complain, in_decl); if (!context) context = global_namespace; @@ -5919,7 +6148,7 @@ lookup_template_class (tree d1, /* A local class. Make sure the decl gets registered properly. */ if (context == current_function_decl) - pushtag (DECL_NAME (templ), t, /*tag_scope=*/ts_current); + pushtag (DECL_NAME (gen_tmpl), t, /*tag_scope=*/ts_current); if (comp_template_args (CLASSTYPE_TI_ARGS (template_type), arglist)) /* This instantiation is another name for the primary @@ -5939,7 +6168,7 @@ lookup_template_class (tree d1, { TYPE_CONTEXT (t) = FROB_CONTEXT (context); - type_decl = create_implicit_typedef (DECL_NAME (templ), t); + type_decl = create_implicit_typedef (DECL_NAME (gen_tmpl), t); DECL_CONTEXT (type_decl) = TYPE_CONTEXT (t); TYPE_STUB_DECL (t) = type_decl; DECL_SOURCE_LOCATION (type_decl) @@ -5962,65 +6191,32 @@ lookup_template_class (tree d1, template is the immediate parent if this is a full instantiation. */ if (parm_depth == 1 || is_partial_instantiation - || !PRIMARY_TEMPLATE_P (templ)) + || !PRIMARY_TEMPLATE_P (gen_tmpl)) /* This case is easy; there are no member templates involved. */ - found = templ; + found = gen_tmpl; else { - /* This is a full instantiation of a member template. Look - for a partial instantiation of which this is an instance. */ - - for (found = DECL_TEMPLATE_INSTANTIATIONS (templ); - found; found = TREE_CHAIN (found)) - { - int success; - tree tmpl = CLASSTYPE_TI_TEMPLATE (TREE_VALUE (found)); - - /* We only want partial instantiations, here, not - specializations or full instantiations. */ - if (CLASSTYPE_TEMPLATE_SPECIALIZATION (TREE_VALUE (found)) - || !uses_template_parms (TREE_VALUE (found))) - continue; - - /* Temporarily reduce by one the number of levels in the - ARGLIST and in FOUND so as to avoid comparing the - last set of arguments. */ - TREE_VEC_LENGTH (arglist)--; - TREE_VEC_LENGTH (TREE_PURPOSE (found)) --; - - /* See if the arguments match. If they do, then TMPL is - the partial instantiation we want. */ - success = comp_template_args (TREE_PURPOSE (found), arglist); - - /* Restore the argument vectors to their full size. */ - TREE_VEC_LENGTH (arglist)++; - TREE_VEC_LENGTH (TREE_PURPOSE (found))++; - - if (success) - { - found = tmpl; - break; - } - } - - if (!found) - { - /* There was no partial instantiation. This happens - where C<T> is a member template of A<T> and it's used - in something like - - template <typename T> struct B { A<T>::C<int> m; }; - B<float>; - - Create the partial instantiation. - */ - TREE_VEC_LENGTH (arglist)--; - found = tsubst (templ, arglist, complain, NULL_TREE); - TREE_VEC_LENGTH (arglist)++; - } + /* This is a full instantiation of a member template. Find + the partial instantiation of which this is an instance. */ + + /* Temporarily reduce by one the number of levels in the ARGLIST + so as to avoid comparing the last set of arguments. */ + TREE_VEC_LENGTH (arglist)--; + found = tsubst (gen_tmpl, arglist, complain, NULL_TREE); + TREE_VEC_LENGTH (arglist)++; + found = CLASSTYPE_TI_TEMPLATE (found); } SET_TYPE_TEMPLATE_INFO (t, tree_cons (found, arglist, NULL_TREE)); + + elt.spec = t; + slot = (spec_entry **) htab_find_slot_with_hash (type_specializations, + &elt, hash, INSERT); + *slot = GGC_NEW (spec_entry); + **slot = elt; + + /* Note this use of the partial instantiation so we can check it + later in maybe_process_partial_specialization. */ DECL_TEMPLATE_INSTANTIATIONS (templ) = tree_cons (arglist, t, DECL_TEMPLATE_INSTANTIATIONS (templ)); @@ -6628,46 +6824,58 @@ tsubst_friend_function (tree decl, tree args) ; else { + tree new_template = TI_TEMPLATE (new_friend_template_info); + tree new_args = TI_ARGS (new_friend_template_info); + /* Overwrite whatever template info was there before, if any, with the new template information pertaining to the declaration. */ DECL_TEMPLATE_INFO (old_decl) = new_friend_template_info; if (TREE_CODE (old_decl) != TEMPLATE_DECL) - reregister_specialization (new_friend, - most_general_template (old_decl), - old_decl); + /* We should have called reregister_specialization in + duplicate_decls. */ + gcc_assert (retrieve_specialization (new_template, + new_args, 0) + == old_decl); else { tree t; - tree new_friend_args; + /* Indicate that the old function template is a partial + instantiation. */ DECL_TEMPLATE_INFO (DECL_TEMPLATE_RESULT (old_decl)) = new_friend_result_template_info; - new_friend_args = TI_ARGS (new_friend_template_info); - for (t = DECL_TEMPLATE_SPECIALIZATIONS (old_decl); + gcc_assert (new_template + == most_general_template (new_template)); + gcc_assert (new_template != old_decl); + + /* Reassign any specializations already in the hash table + to the new more general template, and add the + additional template args. */ + for (t = DECL_TEMPLATE_INSTANTIATIONS (old_decl); t != NULL_TREE; t = TREE_CHAIN (t)) { tree spec = TREE_VALUE (t); + spec_entry elt; + + elt.tmpl = old_decl; + elt.args = DECL_TI_ARGS (spec); + elt.spec = NULL_TREE; + + htab_remove_elt (decl_specializations, &elt); DECL_TI_ARGS (spec) - = add_outermost_template_args (new_friend_args, + = add_outermost_template_args (new_args, DECL_TI_ARGS (spec)); - } - /* Now, since specializations are always supposed to - hang off of the most general template, we must move - them. */ - t = most_general_template (old_decl); - if (t != old_decl) - { - DECL_TEMPLATE_SPECIALIZATIONS (t) - = chainon (DECL_TEMPLATE_SPECIALIZATIONS (t), - DECL_TEMPLATE_SPECIALIZATIONS (old_decl)); - DECL_TEMPLATE_SPECIALIZATIONS (old_decl) = NULL_TREE; + register_specialization + (spec, new_template, DECL_TI_ARGS (spec), true, 0); + } + DECL_TEMPLATE_INSTANTIATIONS (old_decl) = NULL_TREE; } } @@ -7630,8 +7838,15 @@ tsubst_pack_expansion (tree t, tree args, tsubst_flags_t complain, and return a PACK_EXPANSION_*. The caller will need to deal with that. */ if (unsubstituted_packs) - return make_pack_expansion (tsubst (pattern, args, complain, - in_decl)); + { + tree new_pat; + if (TREE_CODE (t) == EXPR_PACK_EXPANSION) + new_pat = tsubst_expr (pattern, args, complain, in_decl, + /*integral_constant_expression_p=*/false); + else + new_pat = tsubst (pattern, args, complain, in_decl); + return make_pack_expansion (new_pat); + } /* We could not find any argument packs that work. */ if (len < 0) @@ -8079,6 +8294,7 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) location_t saved_loc; tree r = NULL_TREE; tree in_decl = t; + hashval_t hash = 0; /* Set the filename and linenumber to improve error-reporting. */ saved_loc = input_location; @@ -8139,8 +8355,8 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) changed. */ gcc_assert (full_args != tmpl_args); - spec = retrieve_specialization (t, full_args, - /*class_specializations_p=*/true); + hash = hash_tmpl_and_args (t, full_args); + spec = retrieve_specialization (t, full_args, hash); if (spec != NULL_TREE) { r = spec; @@ -8207,7 +8423,7 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) /* Record this non-type partial instantiation. */ register_specialization (r, t, DECL_TI_ARGS (DECL_TEMPLATE_RESULT (r)), - false); + false, hash); } break; @@ -8249,8 +8465,8 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) args, complain, in_decl); /* Check to see if we already have this specialization. */ - spec = retrieve_specialization (gen_tmpl, argvec, - /*class_specializations_p=*/false); + hash = hash_tmpl_and_args (gen_tmpl, argvec); + spec = retrieve_specialization (gen_tmpl, argvec, hash); if (spec) { @@ -8369,13 +8585,8 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) DECL_SAVED_TREE (r) = NULL_TREE; DECL_STRUCT_FUNCTION (r) = NULL; TREE_USED (r) = 0; - if (DECL_CLONED_FUNCTION (r)) - { - DECL_CLONED_FUNCTION (r) = tsubst (DECL_CLONED_FUNCTION (t), - args, complain, t); - TREE_CHAIN (r) = TREE_CHAIN (DECL_CLONED_FUNCTION (r)); - TREE_CHAIN (DECL_CLONED_FUNCTION (r)) = r; - } + /* We'll re-clone as appropriate in instantiate_template. */ + DECL_CLONED_FUNCTION (r) = NULL_TREE; /* Set up the DECL_TEMPLATE_INFO for R. There's no need to do this in the special friend case mentioned above where @@ -8385,7 +8596,7 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) DECL_TEMPLATE_INFO (r) = tree_cons (gen_tmpl, argvec, NULL_TREE); SET_DECL_IMPLICIT_INSTANTIATION (r); - register_specialization (r, gen_tmpl, argvec, false); + register_specialization (r, gen_tmpl, argvec, false, hash); /* We're not supposed to instantiate default arguments until they are called, for a template. But, for a @@ -8675,9 +8886,8 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) tmpl = DECL_TI_TEMPLATE (t); gen_tmpl = most_general_template (tmpl); argvec = tsubst (DECL_TI_ARGS (t), args, complain, in_decl); - spec = (retrieve_specialization - (gen_tmpl, argvec, - /*class_specializations_p=*/false)); + hash = hash_tmpl_and_args (gen_tmpl, argvec); + spec = retrieve_specialization (gen_tmpl, argvec, hash); } } else @@ -8789,7 +8999,7 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) processing here. */ DECL_EXTERNAL (r) = 1; - register_specialization (r, gen_tmpl, argvec, false); + register_specialization (r, gen_tmpl, argvec, false, hash); DECL_TEMPLATE_INFO (r) = tree_cons (tmpl, argvec, NULL_TREE); SET_DECL_IMPLICIT_INSTANTIATION (r); } @@ -9119,7 +9329,7 @@ tsubst (tree t, tree args, tsubst_flags_t complain, tree in_decl) { tree tmpl = most_general_template (DECL_TI_TEMPLATE (decl)); tree gen_args = tsubst (DECL_TI_ARGS (decl), args, complain, in_decl); - r = retrieve_specialization (tmpl, gen_args, false); + r = retrieve_specialization (tmpl, gen_args, 0); } else if (DECL_FUNCTION_SCOPE_P (decl) && DECL_TEMPLATE_INFO (DECL_CONTEXT (decl)) @@ -12087,8 +12297,9 @@ check_instantiated_args (tree tmpl, tree args, tsubst_flags_t complain) the template arguments in TARG_PTR. */ tree -instantiate_template (tree tmpl, tree targ_ptr, tsubst_flags_t complain) +instantiate_template (tree tmpl, tree orig_args, tsubst_flags_t complain) { + tree targ_ptr = orig_args; tree fndecl; tree gen_tmpl; tree spec; @@ -12105,8 +12316,10 @@ instantiate_template (tree tmpl, tree targ_ptr, tsubst_flags_t complain) tree spec; tree clone; - spec = instantiate_template (DECL_CLONED_FUNCTION (tmpl), targ_ptr, - complain); + /* Use DECL_ABSTRACT_ORIGIN because only FUNCTION_DECLs have + DECL_CLONED_FUNCTION. */ + spec = instantiate_template (DECL_ABSTRACT_ORIGIN (tmpl), + targ_ptr, complain); if (spec == error_mark_node) return error_mark_node; @@ -12120,26 +12333,25 @@ instantiate_template (tree tmpl, tree targ_ptr, tsubst_flags_t complain) } /* Check to see if we already have this specialization. */ - spec = retrieve_specialization (tmpl, targ_ptr, - /*class_specializations_p=*/false); - if (spec != NULL_TREE) - return spec; - gen_tmpl = most_general_template (tmpl); if (tmpl != gen_tmpl) - { - /* The TMPL is a partial instantiation. To get a full set of - arguments we must add the arguments used to perform the - partial instantiation. */ - targ_ptr = add_outermost_template_args (DECL_TI_ARGS (tmpl), - targ_ptr); + /* The TMPL is a partial instantiation. To get a full set of + arguments we must add the arguments used to perform the + partial instantiation. */ + targ_ptr = add_outermost_template_args (DECL_TI_ARGS (tmpl), + targ_ptr); - /* Check to see if we already have this specialization. */ - spec = retrieve_specialization (gen_tmpl, targ_ptr, - /*class_specializations_p=*/false); - if (spec != NULL_TREE) - return spec; - } + /* It would be nice to avoid hashing here and then again in tsubst_decl, + but it doesn't seem to be on the hot path. */ + spec = retrieve_specialization (gen_tmpl, targ_ptr, 0); + + gcc_assert (tmpl == gen_tmpl + || ((fndecl = retrieve_specialization (tmpl, orig_args, 0)) + == spec) + || fndecl == NULL_TREE); + + if (spec != NULL_TREE) + return spec; if (check_instantiated_args (gen_tmpl, INNERMOST_TEMPLATE_ARGS (targ_ptr), complain)) @@ -15484,25 +15696,28 @@ instantiate_decl (tree d, int defer_ok, if (TREE_CODE (d) == FUNCTION_DECL && DECL_CLONED_FUNCTION_P (d)) d = DECL_CLONED_FUNCTION (d); - if (DECL_TEMPLATE_INSTANTIATED (d)) - /* D has already been instantiated. It might seem reasonable to - check whether or not D is an explicit instantiation, and, if so, - stop here. But when an explicit instantiation is deferred - until the end of the compilation, DECL_EXPLICIT_INSTANTIATION - is set, even though we still need to do the instantiation. */ + if (DECL_TEMPLATE_INSTANTIATED (d) + || DECL_TEMPLATE_SPECIALIZATION (d)) + /* D has already been instantiated or explicitly specialized, so + there's nothing for us to do here. + + It might seem reasonable to check whether or not D is an explicit + instantiation, and, if so, stop here. But when an explicit + instantiation is deferred until the end of the compilation, + DECL_EXPLICIT_INSTANTIATION is set, even though we still need to do + the instantiation. */ return d; - /* If we already have a specialization of this declaration, then - there's no reason to instantiate it. Note that - retrieve_specialization gives us both instantiations and - specializations, so we must explicitly check - DECL_TEMPLATE_SPECIALIZATION. */ gen_tmpl = most_general_template (tmpl); gen_args = DECL_TI_ARGS (d); - spec = retrieve_specialization (gen_tmpl, gen_args, - /*class_specializations_p=*/false); - if (spec != NULL_TREE && DECL_TEMPLATE_SPECIALIZATION (spec)) - return spec; + + if (tmpl != gen_tmpl) + /* We should already have the extra args. */ + gcc_assert (TMPL_PARMS_DEPTH (DECL_TEMPLATE_PARMS (gen_tmpl)) + == TMPL_ARGS_DEPTH (gen_args)); + /* And what's in the hash table should match D. */ + gcc_assert ((spec = retrieve_specialization (gen_tmpl, gen_args, 0)) == d + || spec == NULL_TREE); /* This needs to happen before any tsubsting. */ if (! push_tinst_level (d)) @@ -17395,4 +17610,19 @@ append_type_to_template_for_access_check (tree templ, append_type_to_template_for_access_check_1 (templ, type_decl, scope); } +/* Set up the hash tables for template instantiations. */ + +void +init_template_processing (void) +{ + decl_specializations = htab_create_ggc (37, + hash_specialization, + eq_specializations, + ggc_free); + type_specializations = htab_create_ggc (37, + hash_specialization, + eq_specializations, + ggc_free); +} + #include "gt-cp-pt.h" diff --git a/gcc/cp/ptree.c b/gcc/cp/ptree.c index 2452abc4622..69279cd4883 100644 --- a/gcc/cp/ptree.c +++ b/gcc/cp/ptree.c @@ -65,10 +65,6 @@ cxx_print_decl (FILE *file, tree node, int indent) && DECL_PENDING_INLINE_INFO (node)) fprintf (file, " pending-inline-info %p", (void *) DECL_PENDING_INLINE_INFO (node)); - if (TREE_CODE (node) == TYPE_DECL - && DECL_SORTED_FIELDS (node)) - fprintf (file, " sorted-fields %p", - (void *) DECL_SORTED_FIELDS (node)); if ((TREE_CODE (node) == FUNCTION_DECL || TREE_CODE (node) == VAR_DECL) && DECL_TEMPLATE_INFO (node)) fprintf (file, " template-info %p", @@ -97,9 +93,6 @@ cxx_print_type (FILE *file, tree node, int indent) case RECORD_TYPE: case UNION_TYPE: - indent_to (file, indent + 4); - fprintf (file, "full-name \"%s\"", - type_as_string (node, TFF_CLASS_KEY_OR_ENUM)); break; default: @@ -113,6 +106,10 @@ cxx_print_type (FILE *file, tree node, int indent) if (! CLASS_TYPE_P (node)) return; + indent_to (file, indent + 4); + fprintf (file, "full-name \"%s\"", + type_as_string (node, TFF_CLASS_KEY_OR_ENUM)); + indent_to (file, indent + 3); if (TYPE_NEEDS_CONSTRUCTING (node)) @@ -140,6 +137,9 @@ cxx_print_type (FILE *file, tree node, int indent) fputs (" delete[]", file); if (TYPE_HAS_ASSIGN_REF (node)) fputs (" this=(X&)", file); + if (CLASSTYPE_SORTED_FIELDS (node)) + fprintf (file, " sorted-fields %p", + (void *) CLASSTYPE_SORTED_FIELDS (node)); if (TREE_CODE (node) == RECORD_TYPE) { diff --git a/gcc/cp/search.c b/gcc/cp/search.c index 4f36e643268..c50cc4a0841 100644 --- a/gcc/cp/search.c +++ b/gcc/cp/search.c @@ -395,12 +395,10 @@ lookup_field_1 (tree type, tree name, bool want_type) The TYPE_FIELDS of TYPENAME_TYPE is its TYPENAME_TYPE_FULLNAME. */ return NULL_TREE; - if (TYPE_NAME (type) - && DECL_LANG_SPECIFIC (TYPE_NAME (type)) - && DECL_SORTED_FIELDS (TYPE_NAME (type))) + if (CLASSTYPE_SORTED_FIELDS (type)) { - tree *fields = &DECL_SORTED_FIELDS (TYPE_NAME (type))->elts[0]; - int lo = 0, hi = DECL_SORTED_FIELDS (TYPE_NAME (type))->len; + tree *fields = &CLASSTYPE_SORTED_FIELDS (type)->elts[0]; + int lo = 0, hi = CLASSTYPE_SORTED_FIELDS (type)->len; int i; while (lo < hi) diff --git a/gcc/cp/semantics.c b/gcc/cp/semantics.c index 9a43863c6bb..59a5312bca8 100644 --- a/gcc/cp/semantics.c +++ b/gcc/cp/semantics.c @@ -3861,7 +3861,7 @@ finish_omp_threadprivate (tree vars) /* Make sure that DECL_DISCRIMINATOR_P continues to be true after the allocation of the lang_decl structure. */ if (DECL_DISCRIMINATOR_P (v)) - DECL_LANG_SPECIFIC (v)->decl_flags.u2sel = 1; + DECL_LANG_SPECIFIC (v)->u.base.u2sel = 1; } if (! DECL_THREAD_LOCAL_P (v)) diff --git a/gcc/cp/tree.c b/gcc/cp/tree.c index 7c48a3257b3..644e53cef9f 100644 --- a/gcc/cp/tree.c +++ b/gcc/cp/tree.c @@ -1997,7 +1997,7 @@ cp_tree_equal (tree t1, tree t2) /* For comparing uses of parameters in late-specified return types with an out-of-class definition of the function. */ if (same_type_p (TREE_TYPE (t1), TREE_TYPE (t2)) - && parm_index (t1) == parm_index (t2)) + && DECL_PARM_INDEX (t1) == DECL_PARM_INDEX (t2)) return true; else return false; @@ -2723,7 +2723,8 @@ decl_linkage (tree decl) template instantiations have internal linkage (in the object file), but the symbols should still be treated as having external linkage from the point of view of the language. */ - if (TREE_CODE (decl) != TYPE_DECL && DECL_LANG_SPECIFIC (decl) + if ((TREE_CODE (decl) == FUNCTION_DECL + || TREE_CODE (decl) == VAR_DECL) && DECL_COMDAT (decl)) return lk_external; diff --git a/gcc/cp/typeck.c b/gcc/cp/typeck.c index e502021d451..871c1d36319 100644 --- a/gcc/cp/typeck.c +++ b/gcc/cp/typeck.c @@ -3419,7 +3419,6 @@ cp_build_binary_op (location_t location, /* If an error was already reported for one of the arguments, avoid reporting another error. */ - if (code0 == ERROR_MARK || code1 == ERROR_MARK) return error_mark_node; @@ -3430,6 +3429,25 @@ cp_build_binary_op (location_t location, return error_mark_node; } + /* Issue warnings about peculiar, but valid, uses of NULL. */ + if ((orig_op0 == null_node || orig_op1 == null_node) + /* It's reasonable to use pointer values as operands of && + and ||, so NULL is no exception. */ + && code != TRUTH_ANDIF_EXPR && code != TRUTH_ORIF_EXPR + && ( /* Both are NULL (or 0) and the operation was not a + comparison or a pointer subtraction. */ + (null_ptr_cst_p (orig_op0) && null_ptr_cst_p (orig_op1) + && code != EQ_EXPR && code != NE_EXPR && code != MINUS_EXPR) + /* Or if one of OP0 or OP1 is neither a pointer nor NULL. */ + || (!null_ptr_cst_p (orig_op0) + && !TYPE_PTR_P (type0) && !TYPE_PTR_TO_MEMBER_P (type0)) + || (!null_ptr_cst_p (orig_op1) + && !TYPE_PTR_P (type1) && !TYPE_PTR_TO_MEMBER_P (type1))) + && (complain & tf_warning)) + /* Some sort of arithmetic operation involving NULL was + performed. */ + warning (OPT_Wpointer_arith, "NULL used in arithmetic"); + switch (code) { case MINUS_EXPR: @@ -4031,25 +4049,6 @@ cp_build_binary_op (location_t location, } } - /* Issue warnings about peculiar, but valid, uses of NULL. */ - if ((orig_op0 == null_node || orig_op1 == null_node) - /* It's reasonable to use pointer values as operands of && - and ||, so NULL is no exception. */ - && code != TRUTH_ANDIF_EXPR && code != TRUTH_ORIF_EXPR - && ( /* Both are NULL (or 0) and the operation was not a comparison. */ - (null_ptr_cst_p (orig_op0) && null_ptr_cst_p (orig_op1) - && code != EQ_EXPR && code != NE_EXPR) - /* Or if one of OP0 or OP1 is neither a pointer nor NULL. */ - || (!null_ptr_cst_p (orig_op0) && TREE_CODE (TREE_TYPE (op0)) != POINTER_TYPE) - || (!null_ptr_cst_p (orig_op1) && TREE_CODE (TREE_TYPE (op1)) != POINTER_TYPE)) - && (complain & tf_warning)) - /* Some sort of arithmetic operation involving NULL was - performed. Note that pointer-difference and pointer-addition - have already been handled above, and so we don't end up here in - that case. */ - warning (OPT_Wpointer_arith, "NULL used in arithmetic"); - - /* If CONVERTED is zero, both args will be converted to type RESULT_TYPE. Then the expression will be built. It will be given type FINAL_TYPE if that is nonzero; diff --git a/gcc/defaults.h b/gcc/defaults.h index 0db07a9f18a..11873a8c8a5 100644 --- a/gcc/defaults.h +++ b/gcc/defaults.h @@ -1154,8 +1154,4 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define GO_IF_MODE_DEPENDENT_ADDRESS(X, WIN) #endif -#ifndef FRAME_POINTER_REQUIRED -#define FRAME_POINTER_REQUIRED false -#endif - #endif /* ! GCC_DEFAULTS_H */ diff --git a/gcc/doc/contrib.texi b/gcc/doc/contrib.texi index 0499f96b131..d2d1673cc3b 100644 --- a/gcc/doc/contrib.texi +++ b/gcc/doc/contrib.texi @@ -215,7 +215,7 @@ Mo DeJong for GCJ and libgcj bug fixes. @item DJ Delorie for the DJGPP port, build and libiberty maintenance, -various bug fixes, and the M32C port. +various bug fixes, and the M32C and MeP ports. @item Arnaud Desitter for helping to debug GNU Fortran. diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 2a9fffa2d06..162d27f3e0a 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -2137,6 +2137,12 @@ present. The @code{deprecated} attribute can also be used for variables and types (@pxref{Variable Attributes}, @pxref{Type Attributes}.) +@item disinterrupt +@cindex @code{disinterrupt} attribute +On MeP targets, this attribute causes the compiler to emit +instructions to disable interrupts for the duration of the given +function. + @item dllexport @cindex @code{__declspec(dllexport)} On Microsoft Windows targets and Symbian OS targets the @@ -2263,6 +2269,10 @@ At the end of a function, it will jump to a board-specific routine instead of using @code{rts}. The board-specific return routine simulates the @code{rtc}. +On MeP targets this causes the compiler to use a calling convention +which assumes the called function is too far away for the built-in +addressing modes. + @item fastcall @cindex functions that pop the argument stack on the 386 On the Intel 386, the @code{fastcall} attribute causes the compiler to @@ -2450,7 +2460,7 @@ This attribute is ignored for R8C target. @item interrupt @cindex interrupt handler functions -Use this attribute on the ARM, AVR, CRX, M32C, M32R/D, m68k, MIPS +Use this attribute on the ARM, AVR, CRX, M32C, M32R/D, m68k, MeP, MIPS and Xstormy16 ports to indicate that the specified function is an interrupt handler. The compiler will generate function entry and exit sequences suitable for use in an interrupt handler when this attribute @@ -2669,6 +2679,10 @@ use the normal calling convention based on @code{jsr} and @code{rts}. This attribute can be used to cancel the effect of the @option{-mlong-calls} option. +On MeP targets this attribute causes the compiler to assume the called +function is close enough to use the normal calling convention, +overriding the @code{-mtf} command line option. + @item nesting @cindex Allow nesting in an interrupt handler on the Blackfin processor. Use this attribute together with @code{interrupt_handler}, @@ -3323,6 +3337,13 @@ visibility of their template. If both the template and enclosing class have explicit visibility, the visibility from the template is used. +@item vliw +@cindex @code{vliw} attribute +On MeP, the @code{vliw} attribute tells the compiler to emit +instructions in VLIW mode instead of core mode. Note that this +attribute is not allowed unless a VLIW coprocessor has been configured +and enabled through command line options. + @item warn_unused_result @cindex @code{warn_unused_result} attribute The @code{warn_unused_result} attribute causes a warning to be emitted @@ -4150,6 +4171,64 @@ Medium and large model objects may live anywhere in the 32-bit address space addresses). @end table +@anchor{MeP Variable Attributes} +@subsection MeP Variable Attributes + +The MeP target has a number of addressing modes and busses. The +@code{near} space spans the standard memory space's first 16 megabytes +(24 bits). The @code{far} space spans the entire 32-bit memory space. +The @code{based} space is a 128 byte region in the memory space which +is addressed relative to the @code{$tp} register. The @code{tiny} +space is a 65536 byte region relative to the @code{$gp} register. In +addition to these memory regions, the MeP target has a separate 16-bit +control bus which is specified with @code{cb} attributes. + +@table @code + +@item based +Any variable with the @code{based} attribute will be assigned to the +@code{.based} section, and will be accessed with relative to the +@code{$tp} register. + +@item tiny +Likewise, the @code{tiny} attribute assigned variables to the +@code{.tiny} section, relative to the @code{$gp} register. + +@item near +Variables with the @code{near} attribute are assumed to have addresses +that fit in a 24-bit addressing mode. This is the default for large +variables (@code{-mtiny=4} is the default) but this attribute can +override @code{-mtiny=} for small variables, or override @code{-ml}. + +@item far +Variables with the @code{far} attribute are addressed using a full +32-bit address. Since this covers the entire memory space, this +allows modules to make no assumptions about where variables might be +stored. + +@item io +@item io (@var{addr}) +Variables with the @code{io} attribute are used to address +memory-mapped peripherals. If an address is specified, the variable +is assigned that address, else it is not assigned an address (it is +assumed some other module will assign an address). Example: + +@example +int timer_count __attribute__((io(0x123))); +@end example + +@item cb +@item cb (@var{addr}) +Variables with the @code{cb} attribute are used to access the control +bus, using special instructions. @code{addr} indicates the control bus +address. Example: + +@example +int cpu_clock __attribute__((cb(0x123))); +@end example + +@end table + @anchor{i386 Variable Attributes} @subsection i386 Variable Attributes @@ -4652,6 +4731,14 @@ virtual table for @code{C} is not exported. (You can use @code{__attribute__} instead of @code{__declspec} if you prefer, but most Symbian OS code uses @code{__declspec}.) +@anchor{MeP Type Attributes} +@subsection MeP Type Attributes + +Many of the MeP variable attributes may be applied to types as well. +Specifically, the @code{based}, @code{tiny}, @code{near}, and +@code{far} attributes may be applied to either. The @code{io} and +@code{cb} attributes may not be applied to types. + @anchor{i386 Type Attributes} @subsection i386 Type Attributes @@ -11703,6 +11790,7 @@ for further explanation. @menu * ARM Pragmas:: * M32C Pragmas:: +* MeP Pragmas:: * RS/6000 and PowerPC Pragmas:: * Darwin Pragmas:: * Solaris Pragmas:: @@ -11753,6 +11841,78 @@ as it may allow you to reduce the number of memregs used. @end table +@node MeP Pragmas +@subsection MeP Pragmas + +@table @code + +@item custom io_volatile (on|off) +@cindex pragma, custom io_volatile +Overrides the command line option @code{-mio-volatile} for the current +file. Note that for compatibility with future GCC releases, this +option should only be used once before any @code{io} variables in each +file. + +@item GCC coprocessor available @var{registers} +@cindex pragma, coprocessor available +Specifies which coprocessor registers are available to the register +allocator. @var{registers} may be a single register, register range +separated by ellipses, or comma-separated list of those. Example: + +@example +#pragma GCC coprocessor available $c0...$c10, $c28 +@end example + +@item GCC coprocessor call_saved @var{registers} +@cindex pragma, coprocessor call_saved +Specifies which coprocessor registers are to be saved and restored by +any function using them. @var{registers} may be a single register, +register range separated by ellipses, or comma-separated list of +those. Example: + +@example +#pragma GCC coprocessor call_saved $c4...$c6, $c31 +@end example + +@item GCC coprocessor subclass '(A|B|C|D)' = @var{registers} +@cindex pragma, coprocessor subclass +Creates and defines a register class. These register classes can be +used by inline @code{asm} constructs. @var{registers} may be a single +register, register range separated by ellipses, or comma-separated +list of those. Example: + +@example +#pragma GCC coprocessor subclass 'B' = $c2, $c4, $c6 + +asm ("cpfoo %0" : "=B" (x)); +@end example + +@item GCC disinterrupt @var{name} , @var{name} @dots{} +@cindex pragma, disinterrupt +For the named functions, the compiler adds code to disable interrupts +for the duration of those functions. Any functions so named, which +are not encountered in the source, cause a warning that the pragma was +not used. Examples: + +@example +#pragma disinterrupt foo +#pragma disinterrupt bar, grill +int foo () @{ @dots{} @} +@end example + +@item GCC call @var{name} , @var{name} @dots{} +@cindex pragma, call +For the named functions, the compiler always uses a register-indirect +call model when calling the named functions. Examples: + +@example +extern int foo (); +#pragma call foo +@end example + +@end table + + @node RS/6000 and PowerPC Pragmas @subsection RS/6000 and PowerPC Pragmas diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 4f7e433c614..06794590491 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -2785,6 +2785,8 @@ information are. @item @uref{#m68k-uclinux,,m68k-uclinux} @item +@uref{#mep-x-elf,,mep-*-elf} +@item @uref{#mips-x-x,,mips-*-*} @item @uref{#mips-sgi-irix5,,mips-sgi-irix5} @@ -3624,6 +3626,14 @@ both of which were ABI changes. However, you can still use the original ABI by configuring for @samp{m68k-uclinuxoldabi} or @samp{m68k-@var{vendor}-uclinuxoldabi}. + +@html +<hr /> +@end html +@heading @anchor{mep-x-elf}mep-*-elf +Toshiba Media embedded Processor. +This configuration is intended for embedded systems. + @html <hr /> @end html diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index a3f27539df7..c3ad771aab8 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -657,6 +657,13 @@ Objective-C and Objective-C++ Dialects}. -mno-callgraph-data -mslow-bytes -mno-slow-bytes -mno-lsim @gol -mlittle-endian -mbig-endian -m210 -m340 -mstack-increment} +@emph{MeP Options} +@gccoptlist{-mabsdiff -mall-opts -maverage -mbased=@var{n} -mbitops @gol +-mc=@var{n} -mclip -mconfig=@var{name} -mcop -mcop32 -mcop64 -mivc2 @gol +-mdc -mdiv -meb -mel -mio-volatile -ml -mleadz -mm -mminmax @gol +-mmult -mno-opts -mrepeat -ms -msatur -msdram -msim -msimnovec -mtf @gol +-mtiny=@var{n}} + @emph{MIPS Options} @gccoptlist{-EL -EB -march=@var{arch} -mtune=@var{arch} @gol -mips1 -mips2 -mips3 -mips4 -mips32 -mips32r2 @gol @@ -9074,6 +9081,7 @@ platform. * M680x0 Options:: * M68hc1x Options:: * MCore Options:: +* MeP Options:: * MIPS Options:: * MMIX Options:: * MN10300 Options:: @@ -12759,6 +12767,170 @@ value is 0x1000. @end table +@node MeP Options +@subsection MeP Options +@cindex MeP options + +@table @gcctabopt + +@item -mabsdiff +@opindex mabsdiff +Enables the @code{abs} instruction, which is the absolute difference +between two registers. + +@item -mall-opts +@opindex mall-opts +Enables all the optional instructions - average, multiply, divide, bit +operations, leading zero, absolute difference, min/max, clip, and +saturation. + + +@item -maverage +@opindex maverage +Enables the @code{ave} instruction, which computes the average of two +registers. + +@item -mbased=@var{n} +@opindex mbased= +Variables of size @var{n} bytes or smaller will be placed in the +@code{.based} section by default. Based variables use the @code{$tp} +register as a base register, and there is a 128 byte limit to the +@code{.based} section. + +@item -mbitops +@opindex mbitops +Enables the bit operation instructions - bit test (@code{btstm}), set +(@code{bsetm}), clear (@code{bclrm}), invert (@code{bnotm}), and +test-and-set (@code{tas}). + +@item -mc=@var{name} +@opindex mc= +Selects which section constant data will be placed in. @var{name} may +be @code{tiny}, @code{near}, or @code{far}. + +@item -mclip +@opindex mclip +Enables the @code{clip} instruction. Note that @code{-mclip} is not +useful unless you also provide @code{-mminmax}. + +@item -mconfig=@var{name} +@opindex mconfig= +Selects one of the build-in core configurations. Each MeP chip has +one or more modules in it; each module has a core CPU and a variety of +coprocessors, optional instructions, and peripherals. The +@code{MeP-Integrator} tool, not part of GCC, provides these +configurations through this option; using this option is the same as +using all the corresponding command line options. The default +configuration is @code{default}. + +@item -mcop +@opindex mcop +Enables the coprocessor instructions. By default, this is a 32-bit +coprocessor. Note that the coprocessor is normally enabled via the +@code{-mconfig=} option. + +@item -mcop32 +@opindex mcop32 +Enables the 32-bit coprocessor's instructions. + +@item -mcop64 +@opindex mcop64 +Enables the 64-bit coprocessor's instructions. + +@item -mivc2 +@opindex mivc2 +Enables IVC2 scheduling. IVC2 is a 64-bit VLIW coprocessor. + +@item -mdc +@opindex mdc +Causes constant variables to be placed in the @code{.near} section. + +@item -mdiv +@opindex mdiv +Enables the @code{div} and @code{divu} instructions. + +@item -meb +@opindex meb +Generate big-endian code. + +@item -mel +@opindex mel +Generate little-endian code. + +@item -mio-volatile +@opindex mio-volatile +Tells the compiler that any variable marked with the @code{io} +attribute is to be considered volatile. + +@item -ml +@opindex ml +Causes variables to be assigned to the @code{.far} section by default. + +@item -mleadz +@opindex mleadz +Enables the @code{leadz} (leading zero) instruction. + +@item -mm +@opindex mm +Causes variables to be assigned to the @code{.near} section by default. + +@item -mminmax +@opindex mminmax +Enables the @code{min} and @code{max} instructions. + +@item -mmult +@opindex mmult +Enables the multiplication and multiply-accumulate instructions. + +@item -mno-opts +@opindex mno-opts +Disables all the optional instructions enabled by @code{-mall-opts}. + +@item -mrepeat +@opindex mrepeat +Enables the @code{repeat} and @code{erepeat} instructions, used for +low-overhead looping. + +@item -ms +@opindex ms +Causes all variables to default to the @code{.tiny} section. Note +that there is a 65536 byte limit to this section. Accesses to these +variables use the @code{%gp} base register. + +@item -msatur +@opindex msatur +Enables the saturation instructions. Note that the compiler does not +currently generate these itself, but this option is included for +compatibility with other tools, like @code{as}. + +@item -msdram +@opindex msdram +Link the SDRAM-based runtime instead of the default ROM-based runtime. + +@item -msim +@opindex msim +Link the simulator runtime libraries. + +@item -msimnovec +@opindex msimnovec +Link the simulator runtime libraries, excluding built-in support +for reset and exception vectors and tables. + +@item -mtf +@opindex mtf +Causes all functions to default to the @code{.far} section. Without +this option, functions default to the @code{.near} section. + +@item -mtiny=@var{n} +@opindex mtiny= +Variables that are @var{n} bytes or smaller will be allocated to the +@code{.tiny} section. These variables use the @code{$gp} base +register. The default for this option is 4, but note that there's a +65536 byte limit to the @code{.tiny} section. + +@end table + + @node MIPS Options @subsection MIPS Options @cindex MIPS options diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 5c6790009ec..f4ca2b032ff 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -2520,6 +2520,109 @@ Memory addressed using the small base register ($sb). $r1h @end table +@item MeP---@file{config/mep/constraints.md} +@table @code + +@item a +The $sp register. + +@item b +The $tp register. + +@item c +Any control register. + +@item d +Either the $hi or the $lo register. + +@item em +Coprocessor registers that can be directly loaded ($c0-$c15). + +@item ex +Coprocessor registers that can be moved to each other. + +@item er +Coprocessor registers that can be moved to core registers. + +@item h +The $hi register. + +@item j +The $rpc register. + +@item l +The $lo register. + +@item t +Registers which can be used in $tp-relative addressing. + +@item v +The $gp register. + +@item x +The coprocessor registers. + +@item y +The coprocessor control registers. + +@item z +The $0 register. + +@item A +User-defined register set A. + +@item B +User-defined register set B. + +@item C +User-defined register set C. + +@item D +User-defined register set D. + +@item I +Offsets for $gp-rel addressing. + +@item J +Constants that can be used directly with boolean insns. + +@item K +Constants that can be moved directly to registers. + +@item L +Small constants that can be added to registers. + +@item M +Long shift counts. + +@item N +Small constants that can be compared to registers. + +@item O +Constants that can be loaded into the top half of registers. + +@item S +Signed 8-bit immediates. + +@item T +Symbols encoded for $tp-rel or $gp-rel addressing. + +@item U +Non-constant addresses for loading/saving coprocessor registers. + +@item W +The top half of a symbol's value. + +@item Y +A register indirect address without offset. + +@item Z +Symbolic references to the control bus. + + + +@end table + @item MIPS---@file{config/mips/constraints.md} @table @code @item d diff --git a/gcc/doc/plugins.texi b/gcc/doc/plugins.texi index c5efc81c6d5..4dfb159c883 100644 --- a/gcc/doc/plugins.texi +++ b/gcc/doc/plugins.texi @@ -134,6 +134,7 @@ enum plugin_event PLUGIN_GGC_END, /* Called at end of GGC. */ PLUGIN_REGISTER_GGC_ROOTS, /* Register an extra GGC root table. */ PLUGIN_ATTRIBUTES, /* Called during attribute registration */ + PLUGIN_START_UNIT, /* Called before processing a translation unit. */ PLUGIN_EVENT_LAST /* Dummy event used for indexing callback array. */ @}; diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index a2c756261b2..e328210385c 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -3737,12 +3737,12 @@ return @code{@var{regno}}. @c prevent bad page break with this line This is about eliminating the frame pointer and arg pointer. -@defmac FRAME_POINTER_REQUIRED -A C expression which is @code{true} if a function must have and use a frame -pointer. This expression is evaluated in the reload pass. If its value is -@code{true} the function will have a frame pointer. +@deftypefn {Target Hook} bool TARGET_FRAME_POINTER_REQUIRED (void) +This target hook should return @code{true} if a function must have and use +a frame pointer. This target hook is called in the reload pass. If its return +value is @code{true} the function will have a frame pointer. -The expression can in principle examine the current function and decide +This target hook can in principle examine the current function and decide according to the facts, but on most machines the constant @code{false} or the constant @code{true} suffices. Use @code{false} when the machine allows code to be generated with no frame pointer, and doing so saves some time or space. @@ -3752,15 +3752,15 @@ pointer. In certain cases, the compiler does not know how to produce valid code without a frame pointer. The compiler recognizes those cases and automatically gives the function a frame pointer regardless of what -@code{FRAME_POINTER_REQUIRED} says. You don't need to worry about +@code{TARGET_FRAME_POINTER_REQUIRED} returns. You don't need to worry about them. In a function that does not require a frame pointer, the frame pointer register can be allocated for ordinary usage, unless you mark it as a fixed register. See @code{FIXED_REGISTERS} for more information. -Default value is @code{false}. -@end defmac +Default return value is @code{false}. +@end deftypefn @findex get_frame_size @defmac INITIAL_FRAME_POINTER_OFFSET (@var{depth-var}) @@ -3772,7 +3772,7 @@ registers @code{regs_ever_live} and @code{call_used_regs}. If @code{ELIMINABLE_REGS} is defined, this macro will be not be used and need not be defined. Otherwise, it must be defined even if -@code{FRAME_POINTER_REQUIRED} is defined to always be true; in that +@code{TARGET_FRAME_POINTER_REQUIRED} is always return true; in that case, you may set @var{depth-var} to anything. @end defmac diff --git a/gcc/dwarf2.h b/gcc/dwarf2.h deleted file mode 100644 index d106b670ea5..00000000000 --- a/gcc/dwarf2.h +++ /dev/null @@ -1,859 +0,0 @@ -/* Declarations and definitions of codes relating to the DWARF2 and - DWARF3 symbolic debugging information formats. - Copyright (C) 1992, 1993, 1995, 1996, 1997, 1999, 2000, 2001, 2002, - 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. - - Written by Gary Funck (gary@intrepid.com) The Ada Joint Program - Office (AJPO), Florida State University and Silicon Graphics Inc. - provided support for this effort -- June 21, 1995. - - Derived from the DWARF 1 implementation written by Ron Guilmette - (rfg@netcom.com), November 1990. - - This file is part of GCC. - - GCC is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License as published by the Free - Software Foundation; either version 3, or (at your option) any later - version. - - GCC is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY - or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public - License for more details. - - Under Section 7 of GPL version 3, you are granted additional - permissions described in the GCC Runtime Library Exception, version - 3.1, as published by the Free Software Foundation. - - You should have received a copy of the GNU General Public License and - a copy of the GCC Runtime Library Exception along with this program; - see the files COPYING3 and COPYING.RUNTIME respectively. If not, see - <http://www.gnu.org/licenses/>. */ - -/* This file is derived from the DWARF specification (a public document) - Revision 2.0.0 (July 27, 1993) developed by the UNIX International - Programming Languages Special Interest Group (UI/PLSIG) and distributed - by UNIX International. Copies of this specification are available from - UNIX International, 20 Waterview Boulevard, Parsippany, NJ, 07054. - - This file also now contains definitions from the DWARF 3 specification. */ - -/* This file is shared between GCC and GDB, and should not contain - prototypes. */ - -#ifndef GCC_DWARF2_H -#define GCC_DWARF2_H - -/* Structure found in the .debug_line section. */ -typedef struct -{ - unsigned char li_length [4]; - unsigned char li_version [2]; - unsigned char li_prologue_length [4]; - unsigned char li_min_insn_length [1]; - unsigned char li_default_is_stmt [1]; - unsigned char li_line_base [1]; - unsigned char li_line_range [1]; - unsigned char li_opcode_base [1]; -} -DWARF2_External_LineInfo; - -typedef struct -{ - unsigned long li_length; - unsigned short li_version; - unsigned int li_prologue_length; - unsigned char li_min_insn_length; - unsigned char li_default_is_stmt; - int li_line_base; - unsigned char li_line_range; - unsigned char li_opcode_base; -} -DWARF2_Internal_LineInfo; - -/* Structure found in .debug_pubnames section. */ -typedef struct -{ - unsigned char pn_length [4]; - unsigned char pn_version [2]; - unsigned char pn_offset [4]; - unsigned char pn_size [4]; -} -DWARF2_External_PubNames; - -typedef struct -{ - unsigned long pn_length; - unsigned short pn_version; - unsigned long pn_offset; - unsigned long pn_size; -} -DWARF2_Internal_PubNames; - -/* Structure found in .debug_info section. */ -typedef struct -{ - unsigned char cu_length [4]; - unsigned char cu_version [2]; - unsigned char cu_abbrev_offset [4]; - unsigned char cu_pointer_size [1]; -} -DWARF2_External_CompUnit; - -typedef struct -{ - unsigned long cu_length; - unsigned short cu_version; - unsigned long cu_abbrev_offset; - unsigned char cu_pointer_size; -} -DWARF2_Internal_CompUnit; - -typedef struct -{ - unsigned char ar_length [4]; - unsigned char ar_version [2]; - unsigned char ar_info_offset [4]; - unsigned char ar_pointer_size [1]; - unsigned char ar_segment_size [1]; -} -DWARF2_External_ARange; - -typedef struct -{ - unsigned long ar_length; - unsigned short ar_version; - unsigned long ar_info_offset; - unsigned char ar_pointer_size; - unsigned char ar_segment_size; -} -DWARF2_Internal_ARange; - - -/* Tag names and codes. */ -enum dwarf_tag - { - DW_TAG_padding = 0x00, - DW_TAG_array_type = 0x01, - DW_TAG_class_type = 0x02, - DW_TAG_entry_point = 0x03, - DW_TAG_enumeration_type = 0x04, - DW_TAG_formal_parameter = 0x05, - DW_TAG_imported_declaration = 0x08, - DW_TAG_label = 0x0a, - DW_TAG_lexical_block = 0x0b, - DW_TAG_member = 0x0d, - DW_TAG_pointer_type = 0x0f, - DW_TAG_reference_type = 0x10, - DW_TAG_compile_unit = 0x11, - DW_TAG_string_type = 0x12, - DW_TAG_structure_type = 0x13, - DW_TAG_subroutine_type = 0x15, - DW_TAG_typedef = 0x16, - DW_TAG_union_type = 0x17, - DW_TAG_unspecified_parameters = 0x18, - DW_TAG_variant = 0x19, - DW_TAG_common_block = 0x1a, - DW_TAG_common_inclusion = 0x1b, - DW_TAG_inheritance = 0x1c, - DW_TAG_inlined_subroutine = 0x1d, - DW_TAG_module = 0x1e, - DW_TAG_ptr_to_member_type = 0x1f, - DW_TAG_set_type = 0x20, - DW_TAG_subrange_type = 0x21, - DW_TAG_with_stmt = 0x22, - DW_TAG_access_declaration = 0x23, - DW_TAG_base_type = 0x24, - DW_TAG_catch_block = 0x25, - DW_TAG_const_type = 0x26, - DW_TAG_constant = 0x27, - DW_TAG_enumerator = 0x28, - DW_TAG_file_type = 0x29, - DW_TAG_friend = 0x2a, - DW_TAG_namelist = 0x2b, - DW_TAG_namelist_item = 0x2c, - DW_TAG_packed_type = 0x2d, - DW_TAG_subprogram = 0x2e, - DW_TAG_template_type_param = 0x2f, - DW_TAG_template_value_param = 0x30, - DW_TAG_thrown_type = 0x31, - DW_TAG_try_block = 0x32, - DW_TAG_variant_part = 0x33, - DW_TAG_variable = 0x34, - DW_TAG_volatile_type = 0x35, - /* DWARF 3. */ - DW_TAG_dwarf_procedure = 0x36, - DW_TAG_restrict_type = 0x37, - DW_TAG_interface_type = 0x38, - DW_TAG_namespace = 0x39, - DW_TAG_imported_module = 0x3a, - DW_TAG_unspecified_type = 0x3b, - DW_TAG_partial_unit = 0x3c, - DW_TAG_imported_unit = 0x3d, - DW_TAG_condition = 0x3f, - DW_TAG_shared_type = 0x40, - - DW_TAG_lo_user = 0x4080, - DW_TAG_hi_user = 0xffff, - - /* SGI/MIPS Extensions. */ - DW_TAG_MIPS_loop = 0x4081, - /* HP extensions. See: ftp://ftp.hp.com/pub/lang/tools/WDB/wdb-4.0.tar.gz . */ - DW_TAG_HP_array_descriptor = 0x4090, - /* GNU extensions. */ - DW_TAG_format_label = 0x4101, /* For FORTRAN 77 and Fortran 90. */ - DW_TAG_function_template = 0x4102, /* For C++. */ - DW_TAG_class_template = 0x4103, /* For C++. */ - DW_TAG_GNU_BINCL = 0x4104, - DW_TAG_GNU_EINCL = 0x4105, - /* Extensions for UPC. See: http://upc.gwu.edu/~upc. */ - DW_TAG_upc_shared_type = 0x8765, - DW_TAG_upc_strict_type = 0x8766, - DW_TAG_upc_relaxed_type = 0x8767, - /* PGI (STMicroelectronics) extensions. No documentation available. */ - DW_TAG_PGI_kanji_type = 0xA000, - DW_TAG_PGI_interface_block = 0xA020 - }; - -/* Flag that tells whether entry has a child or not. */ -#define DW_children_no 0 -#define DW_children_yes 1 - -/* Form names and codes. */ -enum dwarf_form - { - DW_FORM_addr = 0x01, - DW_FORM_block2 = 0x03, - DW_FORM_block4 = 0x04, - DW_FORM_data2 = 0x05, - DW_FORM_data4 = 0x06, - DW_FORM_data8 = 0x07, - DW_FORM_string = 0x08, - DW_FORM_block = 0x09, - DW_FORM_block1 = 0x0a, - DW_FORM_data1 = 0x0b, - DW_FORM_flag = 0x0c, - DW_FORM_sdata = 0x0d, - DW_FORM_strp = 0x0e, - DW_FORM_udata = 0x0f, - DW_FORM_ref_addr = 0x10, - DW_FORM_ref1 = 0x11, - DW_FORM_ref2 = 0x12, - DW_FORM_ref4 = 0x13, - DW_FORM_ref8 = 0x14, - DW_FORM_ref_udata = 0x15, - DW_FORM_indirect = 0x16 - }; - -/* Attribute names and codes. */ -enum dwarf_attribute - { - DW_AT_sibling = 0x01, - DW_AT_location = 0x02, - DW_AT_name = 0x03, - DW_AT_ordering = 0x09, - DW_AT_subscr_data = 0x0a, - DW_AT_byte_size = 0x0b, - DW_AT_bit_offset = 0x0c, - DW_AT_bit_size = 0x0d, - DW_AT_element_list = 0x0f, - DW_AT_stmt_list = 0x10, - DW_AT_low_pc = 0x11, - DW_AT_high_pc = 0x12, - DW_AT_language = 0x13, - DW_AT_member = 0x14, - DW_AT_discr = 0x15, - DW_AT_discr_value = 0x16, - DW_AT_visibility = 0x17, - DW_AT_import = 0x18, - DW_AT_string_length = 0x19, - DW_AT_common_reference = 0x1a, - DW_AT_comp_dir = 0x1b, - DW_AT_const_value = 0x1c, - DW_AT_containing_type = 0x1d, - DW_AT_default_value = 0x1e, - DW_AT_inline = 0x20, - DW_AT_is_optional = 0x21, - DW_AT_lower_bound = 0x22, - DW_AT_producer = 0x25, - DW_AT_prototyped = 0x27, - DW_AT_return_addr = 0x2a, - DW_AT_start_scope = 0x2c, - DW_AT_bit_stride = 0x2e, - DW_AT_stride_size = DW_AT_bit_stride, - DW_AT_upper_bound = 0x2f, - DW_AT_abstract_origin = 0x31, - DW_AT_accessibility = 0x32, - DW_AT_address_class = 0x33, - DW_AT_artificial = 0x34, - DW_AT_base_types = 0x35, - DW_AT_calling_convention = 0x36, - DW_AT_count = 0x37, - DW_AT_data_member_location = 0x38, - DW_AT_decl_column = 0x39, - DW_AT_decl_file = 0x3a, - DW_AT_decl_line = 0x3b, - DW_AT_declaration = 0x3c, - DW_AT_discr_list = 0x3d, - DW_AT_encoding = 0x3e, - DW_AT_external = 0x3f, - DW_AT_frame_base = 0x40, - DW_AT_friend = 0x41, - DW_AT_identifier_case = 0x42, - DW_AT_macro_info = 0x43, - DW_AT_namelist_items = 0x44, - DW_AT_priority = 0x45, - DW_AT_segment = 0x46, - DW_AT_specification = 0x47, - DW_AT_static_link = 0x48, - DW_AT_type = 0x49, - DW_AT_use_location = 0x4a, - DW_AT_variable_parameter = 0x4b, - DW_AT_virtuality = 0x4c, - DW_AT_vtable_elem_location = 0x4d, - /* DWARF 3 values. */ - DW_AT_allocated = 0x4e, - DW_AT_associated = 0x4f, - DW_AT_data_location = 0x50, - DW_AT_byte_stride = 0x51, - DW_AT_stride = DW_AT_byte_stride, - DW_AT_entry_pc = 0x52, - DW_AT_use_UTF8 = 0x53, - DW_AT_extension = 0x54, - DW_AT_ranges = 0x55, - DW_AT_trampoline = 0x56, - DW_AT_call_column = 0x57, - DW_AT_call_file = 0x58, - DW_AT_call_line = 0x59, - DW_AT_description = 0x5a, - DW_AT_binary_scale = 0x5b, - DW_AT_decimal_scale = 0x5c, - DW_AT_small = 0x5d, - DW_AT_decimal_sign = 0x5e, - DW_AT_digit_count = 0x5f, - DW_AT_picture_string = 0x60, - DW_AT_mutable = 0x61, - DW_AT_threads_scaled = 0x62, - DW_AT_explicit = 0x63, - DW_AT_object_pointer = 0x64, - DW_AT_endianity = 0x65, - DW_AT_elemental = 0x66, - DW_AT_pure = 0x67, - DW_AT_recursive = 0x68, - - DW_AT_lo_user = 0x2000, /* Implementation-defined range start. */ - DW_AT_hi_user = 0x3ff0, /* Implementation-defined range end. */ - - /* SGI/MIPS extensions. */ - DW_AT_MIPS_fde = 0x2001, - DW_AT_MIPS_loop_begin = 0x2002, - DW_AT_MIPS_tail_loop_begin = 0x2003, - DW_AT_MIPS_epilog_begin = 0x2004, - DW_AT_MIPS_loop_unroll_factor = 0x2005, - DW_AT_MIPS_software_pipeline_depth = 0x2006, - DW_AT_MIPS_linkage_name = 0x2007, - DW_AT_MIPS_stride = 0x2008, - DW_AT_MIPS_abstract_name = 0x2009, - DW_AT_MIPS_clone_origin = 0x200a, - DW_AT_MIPS_has_inlines = 0x200b, - /* HP extensions. */ - DW_AT_HP_block_index = 0x2000, - DW_AT_HP_unmodifiable = 0x2001, /* Same as DW_AT_MIPS_fde. */ - DW_AT_HP_actuals_stmt_list = 0x2010, - DW_AT_HP_proc_per_section = 0x2011, - DW_AT_HP_raw_data_ptr = 0x2012, - DW_AT_HP_pass_by_reference = 0x2013, - DW_AT_HP_opt_level = 0x2014, - DW_AT_HP_prof_version_id = 0x2015, - DW_AT_HP_opt_flags = 0x2016, - DW_AT_HP_cold_region_low_pc = 0x2017, - DW_AT_HP_cold_region_high_pc = 0x2018, - DW_AT_HP_all_variables_modifiable = 0x2019, - DW_AT_HP_linkage_name = 0x201a, - DW_AT_HP_prof_flags = 0x201b, /* In comp unit of procs_info for -g. */ - /* GNU extensions. */ - DW_AT_sf_names = 0x2101, - DW_AT_src_info = 0x2102, - DW_AT_mac_info = 0x2103, - DW_AT_src_coords = 0x2104, - DW_AT_body_begin = 0x2105, - DW_AT_body_end = 0x2106, - DW_AT_GNU_vector = 0x2107, - /* VMS extensions. */ - DW_AT_VMS_rtnbeg_pd_address = 0x2201, - /* UPC extension. */ - DW_AT_upc_threads_scaled = 0x3210, - /* PGI (STMicroelectronics) extensions. */ - DW_AT_PGI_lbase = 0x3a00, - DW_AT_PGI_soffset = 0x3a01, - DW_AT_PGI_lstride = 0x3a02 - }; - -/* Location atom names and codes. */ -enum dwarf_location_atom - { - DW_OP_addr = 0x03, - DW_OP_deref = 0x06, - DW_OP_const1u = 0x08, - DW_OP_const1s = 0x09, - DW_OP_const2u = 0x0a, - DW_OP_const2s = 0x0b, - DW_OP_const4u = 0x0c, - DW_OP_const4s = 0x0d, - DW_OP_const8u = 0x0e, - DW_OP_const8s = 0x0f, - DW_OP_constu = 0x10, - DW_OP_consts = 0x11, - DW_OP_dup = 0x12, - DW_OP_drop = 0x13, - DW_OP_over = 0x14, - DW_OP_pick = 0x15, - DW_OP_swap = 0x16, - DW_OP_rot = 0x17, - DW_OP_xderef = 0x18, - DW_OP_abs = 0x19, - DW_OP_and = 0x1a, - DW_OP_div = 0x1b, - DW_OP_minus = 0x1c, - DW_OP_mod = 0x1d, - DW_OP_mul = 0x1e, - DW_OP_neg = 0x1f, - DW_OP_not = 0x20, - DW_OP_or = 0x21, - DW_OP_plus = 0x22, - DW_OP_plus_uconst = 0x23, - DW_OP_shl = 0x24, - DW_OP_shr = 0x25, - DW_OP_shra = 0x26, - DW_OP_xor = 0x27, - DW_OP_bra = 0x28, - DW_OP_eq = 0x29, - DW_OP_ge = 0x2a, - DW_OP_gt = 0x2b, - DW_OP_le = 0x2c, - DW_OP_lt = 0x2d, - DW_OP_ne = 0x2e, - DW_OP_skip = 0x2f, - DW_OP_lit0 = 0x30, - DW_OP_lit1 = 0x31, - DW_OP_lit2 = 0x32, - DW_OP_lit3 = 0x33, - DW_OP_lit4 = 0x34, - DW_OP_lit5 = 0x35, - DW_OP_lit6 = 0x36, - DW_OP_lit7 = 0x37, - DW_OP_lit8 = 0x38, - DW_OP_lit9 = 0x39, - DW_OP_lit10 = 0x3a, - DW_OP_lit11 = 0x3b, - DW_OP_lit12 = 0x3c, - DW_OP_lit13 = 0x3d, - DW_OP_lit14 = 0x3e, - DW_OP_lit15 = 0x3f, - DW_OP_lit16 = 0x40, - DW_OP_lit17 = 0x41, - DW_OP_lit18 = 0x42, - DW_OP_lit19 = 0x43, - DW_OP_lit20 = 0x44, - DW_OP_lit21 = 0x45, - DW_OP_lit22 = 0x46, - DW_OP_lit23 = 0x47, - DW_OP_lit24 = 0x48, - DW_OP_lit25 = 0x49, - DW_OP_lit26 = 0x4a, - DW_OP_lit27 = 0x4b, - DW_OP_lit28 = 0x4c, - DW_OP_lit29 = 0x4d, - DW_OP_lit30 = 0x4e, - DW_OP_lit31 = 0x4f, - DW_OP_reg0 = 0x50, - DW_OP_reg1 = 0x51, - DW_OP_reg2 = 0x52, - DW_OP_reg3 = 0x53, - DW_OP_reg4 = 0x54, - DW_OP_reg5 = 0x55, - DW_OP_reg6 = 0x56, - DW_OP_reg7 = 0x57, - DW_OP_reg8 = 0x58, - DW_OP_reg9 = 0x59, - DW_OP_reg10 = 0x5a, - DW_OP_reg11 = 0x5b, - DW_OP_reg12 = 0x5c, - DW_OP_reg13 = 0x5d, - DW_OP_reg14 = 0x5e, - DW_OP_reg15 = 0x5f, - DW_OP_reg16 = 0x60, - DW_OP_reg17 = 0x61, - DW_OP_reg18 = 0x62, - DW_OP_reg19 = 0x63, - DW_OP_reg20 = 0x64, - DW_OP_reg21 = 0x65, - DW_OP_reg22 = 0x66, - DW_OP_reg23 = 0x67, - DW_OP_reg24 = 0x68, - DW_OP_reg25 = 0x69, - DW_OP_reg26 = 0x6a, - DW_OP_reg27 = 0x6b, - DW_OP_reg28 = 0x6c, - DW_OP_reg29 = 0x6d, - DW_OP_reg30 = 0x6e, - DW_OP_reg31 = 0x6f, - DW_OP_breg0 = 0x70, - DW_OP_breg1 = 0x71, - DW_OP_breg2 = 0x72, - DW_OP_breg3 = 0x73, - DW_OP_breg4 = 0x74, - DW_OP_breg5 = 0x75, - DW_OP_breg6 = 0x76, - DW_OP_breg7 = 0x77, - DW_OP_breg8 = 0x78, - DW_OP_breg9 = 0x79, - DW_OP_breg10 = 0x7a, - DW_OP_breg11 = 0x7b, - DW_OP_breg12 = 0x7c, - DW_OP_breg13 = 0x7d, - DW_OP_breg14 = 0x7e, - DW_OP_breg15 = 0x7f, - DW_OP_breg16 = 0x80, - DW_OP_breg17 = 0x81, - DW_OP_breg18 = 0x82, - DW_OP_breg19 = 0x83, - DW_OP_breg20 = 0x84, - DW_OP_breg21 = 0x85, - DW_OP_breg22 = 0x86, - DW_OP_breg23 = 0x87, - DW_OP_breg24 = 0x88, - DW_OP_breg25 = 0x89, - DW_OP_breg26 = 0x8a, - DW_OP_breg27 = 0x8b, - DW_OP_breg28 = 0x8c, - DW_OP_breg29 = 0x8d, - DW_OP_breg30 = 0x8e, - DW_OP_breg31 = 0x8f, - DW_OP_regx = 0x90, - DW_OP_fbreg = 0x91, - DW_OP_bregx = 0x92, - DW_OP_piece = 0x93, - DW_OP_deref_size = 0x94, - DW_OP_xderef_size = 0x95, - DW_OP_nop = 0x96, - /* DWARF 3 extensions. */ - DW_OP_push_object_address = 0x97, - DW_OP_call2 = 0x98, - DW_OP_call4 = 0x99, - DW_OP_call_ref = 0x9a, - DW_OP_form_tls_address = 0x9b, - DW_OP_call_frame_cfa = 0x9c, - DW_OP_bit_piece = 0x9d, - - DW_OP_lo_user = 0xe0, /* Implementation-defined range start. */ - DW_OP_hi_user = 0xff, /* Implementation-defined range end. */ - - /* GNU extensions. */ - DW_OP_GNU_push_tls_address = 0xe0, - /* The following is for marking variables that are uninitialized. */ - DW_OP_GNU_uninit = 0xf0, - DW_OP_GNU_encoded_addr = 0xf1, - /* HP extensions. */ - DW_OP_HP_unknown = 0xe0, /* Ouch, the same as GNU_push_tls_address. */ - DW_OP_HP_is_value = 0xe1, - DW_OP_HP_fltconst4 = 0xe2, - DW_OP_HP_fltconst8 = 0xe3, - DW_OP_HP_mod_range = 0xe4, - DW_OP_HP_unmod_range = 0xe5, - DW_OP_HP_tls = 0xe6, - - /* Used internally in dwarf2out.c to distinguish DW_OP_addr with a - direct symbol relocation from DW_OP_addr with a dtp-relative - symbol relocation. */ - INTERNAL_DW_OP_tls_addr = 0x103 - - }; - -/* Type encodings. */ -enum dwarf_type - { - DW_ATE_void = 0x0, - DW_ATE_address = 0x1, - DW_ATE_boolean = 0x2, - DW_ATE_complex_float = 0x3, - DW_ATE_float = 0x4, - DW_ATE_signed = 0x5, - DW_ATE_signed_char = 0x6, - DW_ATE_unsigned = 0x7, - DW_ATE_unsigned_char = 0x8, - /* DWARF 3. */ - DW_ATE_imaginary_float = 0x9, - DW_ATE_packed_decimal = 0xa, - DW_ATE_numeric_string = 0xb, - DW_ATE_edited = 0xc, - DW_ATE_signed_fixed = 0xd, - DW_ATE_unsigned_fixed = 0xe, - DW_ATE_decimal_float = 0xf, - - DW_ATE_lo_user = 0x80, - DW_ATE_hi_user = 0xff, - - /* HP extensions. */ - DW_ATE_HP_float80 = 0x80, /* Floating-point (80 bit). */ - DW_ATE_HP_complex_float80 = 0x81, /* Complex floating-point (80 bit). */ - DW_ATE_HP_float128 = 0x82, /* Floating-point (128 bit). */ - DW_ATE_HP_complex_float128 = 0x83, /* Complex floating-point (128 bit). */ - DW_ATE_HP_floathpintel = 0x84, /* Floating-point (82 bit IA64). */ - DW_ATE_HP_imaginary_float80 = 0x85, - DW_ATE_HP_imaginary_float128 = 0x86 - }; - -/* Decimal sign encodings. */ -enum dwarf_decimal_sign_encoding - { - /* DWARF 3. */ - DW_DS_unsigned = 0x01, - DW_DS_leading_overpunch = 0x02, - DW_DS_trailing_overpunch = 0x03, - DW_DS_leading_separate = 0x04, - DW_DS_trailing_separate = 0x05 - }; - -/* Endianity encodings. */ -enum dwarf_endianity_encoding - { - /* DWARF 3. */ - DW_END_default = 0x00, - DW_END_big = 0x01, - DW_END_little = 0x02, - - DW_END_lo_user = 0x40, - DW_END_hi_user = 0xff - }; - -/* Array ordering names and codes. */ -enum dwarf_array_dim_ordering - { - DW_ORD_row_major = 0, - DW_ORD_col_major = 1 - }; - -/* Access attribute. */ -enum dwarf_access_attribute - { - DW_ACCESS_public = 1, - DW_ACCESS_protected = 2, - DW_ACCESS_private = 3 - }; - -/* Visibility. */ -enum dwarf_visibility_attribute - { - DW_VIS_local = 1, - DW_VIS_exported = 2, - DW_VIS_qualified = 3 - }; - -/* Virtuality. */ -enum dwarf_virtuality_attribute - { - DW_VIRTUALITY_none = 0, - DW_VIRTUALITY_virtual = 1, - DW_VIRTUALITY_pure_virtual = 2 - }; - -/* Case sensitivity. */ -enum dwarf_id_case - { - DW_ID_case_sensitive = 0, - DW_ID_up_case = 1, - DW_ID_down_case = 2, - DW_ID_case_insensitive = 3 - }; - -/* Calling convention. */ -enum dwarf_calling_convention - { - DW_CC_normal = 0x1, - DW_CC_program = 0x2, - DW_CC_nocall = 0x3, - - DW_CC_lo_user = 0x40, - DW_CC_hi_user = 0xff, - - DW_CC_GNU_renesas_sh = 0x40 - }; - -/* Inline attribute. */ -enum dwarf_inline_attribute - { - DW_INL_not_inlined = 0, - DW_INL_inlined = 1, - DW_INL_declared_not_inlined = 2, - DW_INL_declared_inlined = 3 - }; - -/* Discriminant lists. */ -enum dwarf_discrim_list - { - DW_DSC_label = 0, - DW_DSC_range = 1 - }; - -/* Line number opcodes. */ -enum dwarf_line_number_ops - { - DW_LNS_extended_op = 0, - DW_LNS_copy = 1, - DW_LNS_advance_pc = 2, - DW_LNS_advance_line = 3, - DW_LNS_set_file = 4, - DW_LNS_set_column = 5, - DW_LNS_negate_stmt = 6, - DW_LNS_set_basic_block = 7, - DW_LNS_const_add_pc = 8, - DW_LNS_fixed_advance_pc = 9, - /* DWARF 3. */ - DW_LNS_set_prologue_end = 10, - DW_LNS_set_epilogue_begin = 11, - DW_LNS_set_isa = 12 - }; - -/* Line number extended opcodes. */ -enum dwarf_line_number_x_ops - { - DW_LNE_end_sequence = 1, - DW_LNE_set_address = 2, - DW_LNE_define_file = 3, - /* HP extensions. */ - DW_LNE_HP_negate_is_UV_update = 0x11, - DW_LNE_HP_push_context = 0x12, - DW_LNE_HP_pop_context = 0x13, - DW_LNE_HP_set_file_line_column = 0x14, - DW_LNE_HP_set_routine_name = 0x15, - DW_LNE_HP_set_sequence = 0x16, - DW_LNE_HP_negate_post_semantics = 0x17, - DW_LNE_HP_negate_function_exit = 0x18, - DW_LNE_HP_negate_front_end_logical = 0x19, - DW_LNE_HP_define_proc = 0x20, - - DW_LNE_lo_user = 0x80, - DW_LNE_hi_user = 0xff - }; - -/* Call frame information. */ -enum dwarf_call_frame_info - { - DW_CFA_advance_loc = 0x40, - DW_CFA_offset = 0x80, - DW_CFA_restore = 0xc0, - DW_CFA_nop = 0x00, - DW_CFA_set_loc = 0x01, - DW_CFA_advance_loc1 = 0x02, - DW_CFA_advance_loc2 = 0x03, - DW_CFA_advance_loc4 = 0x04, - DW_CFA_offset_extended = 0x05, - DW_CFA_restore_extended = 0x06, - DW_CFA_undefined = 0x07, - DW_CFA_same_value = 0x08, - DW_CFA_register = 0x09, - DW_CFA_remember_state = 0x0a, - DW_CFA_restore_state = 0x0b, - DW_CFA_def_cfa = 0x0c, - DW_CFA_def_cfa_register = 0x0d, - DW_CFA_def_cfa_offset = 0x0e, - /* DWARF 3. */ - DW_CFA_def_cfa_expression = 0x0f, - DW_CFA_expression = 0x10, - DW_CFA_offset_extended_sf = 0x11, - DW_CFA_def_cfa_sf = 0x12, - DW_CFA_def_cfa_offset_sf = 0x13, - DW_CFA_val_offset = 0x14, - DW_CFA_val_offset_sf = 0x15, - DW_CFA_val_expression = 0x16, - - DW_CFA_lo_user = 0x1c, - DW_CFA_hi_user = 0x3f, - - /* SGI/MIPS specific. */ - DW_CFA_MIPS_advance_loc8 = 0x1d, - /* GNU extensions. */ - DW_CFA_GNU_window_save = 0x2d, - DW_CFA_GNU_args_size = 0x2e, - DW_CFA_GNU_negative_offset_extended = 0x2f - }; - -#define DW_CIE_ID 0xffffffff -#define DW64_CIE_ID 0xffffffffffffffffULL - -#define DW_CFA_extended 0 - -#define DW_CHILDREN_no 0x00 -#define DW_CHILDREN_yes 0x01 - -#define DW_ADDR_none 0 - -/* Source language names and codes. */ -enum dwarf_source_language - { - DW_LANG_C89 = 0x0001, - DW_LANG_C = 0x0002, - DW_LANG_Ada83 = 0x0003, - DW_LANG_C_plus_plus = 0x0004, - DW_LANG_Cobol74 = 0x0005, - DW_LANG_Cobol85 = 0x0006, - DW_LANG_Fortran77 = 0x0007, - DW_LANG_Fortran90 = 0x0008, - DW_LANG_Pascal83 = 0x0009, - DW_LANG_Modula2 = 0x000a, - /* DWARF 3. */ - DW_LANG_Java = 0x000b, - DW_LANG_C99 = 0x000c, - DW_LANG_Ada95 = 0x000d, - DW_LANG_Fortran95 = 0x000e, - DW_LANG_PLI = 0x000f, - DW_LANG_ObjC = 0x0010, - DW_LANG_ObjC_plus_plus = 0x0011, - DW_LANG_UPC = 0x0012, - DW_LANG_D = 0x0013, - - DW_LANG_lo_user = 0x8000, /* Implementation-defined range start. */ - DW_LANG_hi_user = 0xffff, /* Implementation-defined range start. */ - - /* MIPS. */ - DW_LANG_Mips_Assembler = 0x8001, - /* UPC. */ - DW_LANG_Upc = 0x8765 - }; - -/* Names and codes for macro information. */ -enum dwarf_macinfo_record_type - { - DW_MACINFO_define = 1, - DW_MACINFO_undef = 2, - DW_MACINFO_start_file = 3, - DW_MACINFO_end_file = 4, - DW_MACINFO_vendor_ext = 255 - }; - -/* @@@ For use with GNU frame unwind information. */ - -#define DW_EH_PE_absptr 0x00 -#define DW_EH_PE_omit 0xff - -#define DW_EH_PE_uleb128 0x01 -#define DW_EH_PE_udata2 0x02 -#define DW_EH_PE_udata4 0x03 -#define DW_EH_PE_udata8 0x04 -#define DW_EH_PE_sleb128 0x09 -#define DW_EH_PE_sdata2 0x0A -#define DW_EH_PE_sdata4 0x0B -#define DW_EH_PE_sdata8 0x0C -#define DW_EH_PE_signed 0x08 - -#define DW_EH_PE_pcrel 0x10 -#define DW_EH_PE_textrel 0x20 -#define DW_EH_PE_datarel 0x30 -#define DW_EH_PE_funcrel 0x40 -#define DW_EH_PE_aligned 0x50 - -#define DW_EH_PE_indirect 0x80 - -#endif /* dwarf2.h */ diff --git a/gcc/dwarf2asm.c b/gcc/dwarf2asm.c index 6f21ff67d52..4e2c9980feb 100644 --- a/gcc/dwarf2asm.c +++ b/gcc/dwarf2asm.c @@ -29,7 +29,7 @@ along with GCC; see the file COPYING3. If not see #include "output.h" #include "target.h" #include "dwarf2asm.h" -#include "dwarf2.h" +#include "elf/dwarf2.h" #include "splay-tree.h" #include "ggc.h" #include "tm_p.h" diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c index c57b753e358..01b534c1694 100644 --- a/gcc/dwarf2out.c +++ b/gcc/dwarf2out.c @@ -74,7 +74,7 @@ along with GCC; see the file COPYING3. If not see #include "expr.h" #include "libfuncs.h" #include "except.h" -#include "dwarf2.h" +#include "elf/dwarf2.h" #include "dwarf2out.h" #include "dwarf2asm.h" #include "toplev.h" @@ -994,7 +994,7 @@ def_cfa_1 (const char *label, dw_cfa_location *loc_p) the CFA register did not change but the offset did. The data factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or in the assembler via the .cfi_def_cfa_offset directive. */ - if (need_data_align_sf_opcode (loc.offset)) + if (loc.offset < 0) cfi->dw_cfi_opc = DW_CFA_def_cfa_offset_sf; else cfi->dw_cfi_opc = DW_CFA_def_cfa_offset; @@ -1021,7 +1021,7 @@ def_cfa_1 (const char *label, dw_cfa_location *loc_p) the specified offset. The data factoring for DW_CFA_def_cfa_sf happens in output_cfi, or in the assembler via the .cfi_def_cfa directive. */ - if (need_data_align_sf_opcode (loc.offset)) + if (loc.offset < 0) cfi->dw_cfi_opc = DW_CFA_def_cfa_sf; else cfi->dw_cfi_opc = DW_CFA_def_cfa; @@ -2759,6 +2759,22 @@ dwarf2out_begin_epilogue (rtx insn) if (CALL_P (i) && SIBLING_CALL_P (i)) break; + if (GET_CODE (PATTERN (i)) == SEQUENCE) + { + int idx; + rtx seq = PATTERN (i); + + if (returnjump_p (XVECEXP (seq, 0, 0))) + break; + if (CALL_P (XVECEXP (seq, 0, 0)) + && SIBLING_CALL_P (XVECEXP (seq, 0, 0))) + break; + + for (idx = 0; idx < XVECLEN (seq, 0); idx++) + if (RTX_FRAME_RELATED_P (XVECEXP (seq, 0, idx))) + saw_frp = true; + } + if (RTX_FRAME_RELATED_P (i)) saw_frp = true; } @@ -3886,7 +3902,10 @@ dw_val_node; typedef struct GTY(()) dw_loc_descr_struct { dw_loc_descr_ref dw_loc_next; - enum dwarf_location_atom dw_loc_opc; + ENUM_BITFIELD (dwarf_location_atom) dw_loc_opc : 8; + /* Used to distinguish DW_OP_addr with a direct symbol relocation + from DW_OP_addr with a dtp-relative symbol relocation. */ + unsigned int dtprel : 1; int dw_loc_addr; dw_val_node dw_loc_oprnd1; dw_val_node dw_loc_oprnd2; @@ -3918,7 +3937,6 @@ dwarf_stack_op_name (unsigned int op) switch (op) { case DW_OP_addr: - case INTERNAL_DW_OP_tls_addr: return "DW_OP_addr"; case DW_OP_deref: return "DW_OP_deref"; @@ -4333,7 +4351,6 @@ size_of_loc_descr (dw_loc_descr_ref loc) switch (loc->dw_loc_opc) { case DW_OP_addr: - case INTERNAL_DW_OP_tls_addr: size += DWARF2_ADDR_SIZE; break; case DW_OP_const1u: @@ -4474,9 +4491,6 @@ output_loc_operands (dw_loc_descr_ref loc) switch (loc->dw_loc_opc) { #ifdef DWARF2_DEBUGGING_INFO - case DW_OP_addr: - dw2_asm_output_addr_rtx (DWARF2_ADDR_SIZE, val1->v.val_addr, NULL); - break; case DW_OP_const2u: case DW_OP_const2s: dw2_asm_output_data (2, val1->v.val_int, NULL); @@ -4502,7 +4516,6 @@ output_loc_operands (dw_loc_descr_ref loc) } break; #else - case DW_OP_addr: case DW_OP_const2u: case DW_OP_const2s: case DW_OP_const4u: @@ -4585,16 +4598,27 @@ output_loc_operands (dw_loc_descr_ref loc) dw2_asm_output_data (1, val1->v.val_int, NULL); break; - case INTERNAL_DW_OP_tls_addr: - if (targetm.asm_out.output_dwarf_dtprel) + case DW_OP_addr: + if (loc->dtprel) { - targetm.asm_out.output_dwarf_dtprel (asm_out_file, - DWARF2_ADDR_SIZE, - val1->v.val_addr); - fputc ('\n', asm_out_file); + if (targetm.asm_out.output_dwarf_dtprel) + { + targetm.asm_out.output_dwarf_dtprel (asm_out_file, + DWARF2_ADDR_SIZE, + val1->v.val_addr); + fputc ('\n', asm_out_file); + } + else + gcc_unreachable (); } else - gcc_unreachable (); + { +#ifdef DWARF2_DEBUGGING_INFO + dw2_asm_output_addr_rtx (DWARF2_ADDR_SIZE, val1->v.val_addr, NULL); +#else + gcc_unreachable (); +#endif + } break; default: @@ -4728,9 +4752,6 @@ output_loc_operands_raw (dw_loc_descr_ref loc) dw2_asm_output_data_sleb128_raw (val2->v.val_int); break; - case INTERNAL_DW_OP_tls_addr: - gcc_unreachable (); - default: /* Other codes have no operands. */ break; @@ -7280,7 +7301,10 @@ pop_compile_unit (dw_die_ref old_unit) static inline void loc_checksum (dw_loc_descr_ref loc, struct md5_ctx *ctx) { - CHECKSUM (loc->dw_loc_opc); + int tem; + + tem = (loc->dtprel << 8) | ((unsigned int) loc->dw_loc_opc); + CHECKSUM (tem); CHECKSUM (loc->dw_loc_oprnd1); CHECKSUM (loc->dw_loc_oprnd2); } @@ -10232,11 +10256,10 @@ based_loc_descr (rtx reg, HOST_WIDE_INT offset, is aligned without drap, use stack pointer + offset to access stack variables. */ if (crtl->stack_realign_tried - && cfa.reg == HARD_FRAME_POINTER_REGNUM && reg == frame_pointer_rtx) { int base_reg - = DWARF_FRAME_REGNUM (cfa.indirect + = DWARF_FRAME_REGNUM ((fde && fde->drap_reg != INVALID_REGNUM) ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM); return new_reg_loc_descr (base_reg, offset); @@ -10772,6 +10795,7 @@ loc_descriptor_from_tree_1 (tree loc, int want_address) rtx rtl; enum dwarf_location_atom first_op; enum dwarf_location_atom second_op; + bool dtprel = false; if (targetm.have_tls) { @@ -10785,7 +10809,8 @@ loc_descriptor_from_tree_1 (tree loc, int want_address) module. */ if (DECL_EXTERNAL (loc) && !targetm.binds_local_p (loc)) return 0; - first_op = (enum dwarf_location_atom) INTERNAL_DW_OP_tls_addr; + first_op = DW_OP_addr; + dtprel = true; second_op = DW_OP_GNU_push_tls_address; } else @@ -10810,6 +10835,7 @@ loc_descriptor_from_tree_1 (tree loc, int want_address) ret = new_loc_descr (first_op, 0, 0); ret->dw_loc_oprnd1.val_class = dw_val_class_addr; ret->dw_loc_oprnd1.v.val_addr = rtl; + ret->dtprel = dtprel; ret1 = new_loc_descr (second_op, 0, 0); add_loc_descr (&ret, ret1); @@ -13706,7 +13732,7 @@ gen_formal_parameter_die (tree node, tree origin, dw_die_ref context_die) add_AT_flag (parm_die, DW_AT_artificial, 1); } - if (node) + if (node && node != origin) equate_decl_number_to_die (node, parm_die); if (! DECL_ABSTRACT (node_or_origin)) add_location_or_const_value_attribute (parm_die, node_or_origin, diff --git a/gcc/except.c b/gcc/except.c index 95163cc356b..4a02fe305b4 100644 --- a/gcc/except.c +++ b/gcc/except.c @@ -65,7 +65,7 @@ along with GCC; see the file COPYING3. If not see #include "output.h" #include "dwarf2asm.h" #include "dwarf2out.h" -#include "dwarf2.h" +#include "elf/dwarf2.h" #include "toplev.h" #include "hashtab.h" #include "intl.h" diff --git a/gcc/expmed.c b/gcc/expmed.c index 841f94b4c92..aa8d02d0e83 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -685,6 +685,7 @@ store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, rtx xop0 = op0; rtx last = get_last_insn (); rtx pat; + bool copy_back = false; /* Add OFFSET into OP0's address. */ if (MEM_P (xop0)) @@ -699,6 +700,23 @@ store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, if (REG_P (xop0) && GET_MODE (xop0) != op_mode) xop0 = gen_rtx_SUBREG (op_mode, xop0, 0); + /* If the destination is a paradoxical subreg such that we need a + truncate to the inner mode, perform the insertion on a temporary and + truncate the result to the original destination. Note that we can't + just truncate the paradoxical subreg as (truncate:N (subreg:W (reg:N + X) 0)) is (reg:N X). */ + if (GET_CODE (xop0) == SUBREG + && REG_P (SUBREG_REG (xop0)) + && (!TRULY_NOOP_TRUNCATION + (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (xop0))), + GET_MODE_BITSIZE (op_mode)))) + { + rtx tem = gen_reg_rtx (op_mode); + emit_move_insn (tem, xop0); + xop0 = tem; + copy_back = true; + } + /* On big-endian machines, we count bits from the most significant. If the bit field insn does not, we must invert. */ @@ -758,15 +776,8 @@ store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, { emit_insn (pat); - /* If the mode of the insertion is wider than the mode of the - target register we created a paradoxical subreg for the - target. Truncate the paradoxical subreg of the target to - itself properly. */ - if (!TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (op0)), - GET_MODE_BITSIZE (op_mode)) - && (REG_P (xop0) - || GET_CODE (xop0) == SUBREG)) - convert_move (op0, xop0, true); + if (copy_back) + convert_move (op0, xop0, true); return true; } delete_insns_since (last); @@ -5115,12 +5126,12 @@ expand_and (enum machine_mode mode, rtx op0, rtx op1, rtx target) /* Helper function for emit_store_flag. */ static rtx -emit_store_flag_1 (rtx target, enum insn_code icode, enum rtx_code code, - enum machine_mode mode, enum machine_mode compare_mode, - int unsignedp, rtx x, rtx y, int normalizep) +emit_cstore (rtx target, enum insn_code icode, enum rtx_code code, + enum machine_mode mode, enum machine_mode compare_mode, + int unsignedp, rtx x, rtx y, int normalizep, + enum machine_mode target_mode) { rtx op0, last, comparison, subtarget, pattern; - enum machine_mode target_mode; enum machine_mode result_mode = insn_data[(int) icode].operand[0].mode; last = get_last_insn (); @@ -5138,8 +5149,12 @@ emit_store_flag_1 (rtx target, enum insn_code icode, enum rtx_code code, return NULL_RTX; } - if (!target - || optimize + if (target_mode == VOIDmode) + target_mode = result_mode; + if (!target) + target = gen_reg_rtx (target_mode); + + if (optimize || !(insn_data[(int) icode].operand[0].predicate (target, result_mode))) subtarget = gen_reg_rtx (result_mode); else @@ -5150,10 +5165,6 @@ emit_store_flag_1 (rtx target, enum insn_code icode, enum rtx_code code, return NULL_RTX; emit_insn (pattern); - if (!target) - target = gen_reg_rtx (GET_MODE (subtarget)); - target_mode = GET_MODE (target); - /* If we are converting to a wider mode, first convert to TARGET_MODE, then normalize. This produces better combining opportunities on machines that have a SIGN_EXTRACT when we are @@ -5217,34 +5228,22 @@ emit_store_flag_1 (rtx target, enum insn_code icode, enum rtx_code code, return op0; } -/* Emit a store-flags instruction for comparison CODE on OP0 and OP1 - and storing in TARGET. Normally return TARGET. - Return 0 if that cannot be done. - - MODE is the mode to use for OP0 and OP1 should they be CONST_INTs. If - it is VOIDmode, they cannot both be CONST_INT. - UNSIGNEDP is for the case where we have to widen the operands - to perform the operation. It says to use zero-extension. +/* A subroutine of emit_store_flag only including "tricks" that do not + need a recursive call. These are kept separate to avoid infinite + loops. */ - NORMALIZEP is 1 if we should convert the result to be either zero - or one. Normalize is -1 if we should convert the result to be - either zero or -1. If NORMALIZEP is zero, the result will be left - "raw" out of the scc insn. */ - -rtx -emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, - enum machine_mode mode, int unsignedp, int normalizep) +static rtx +emit_store_flag_1 (rtx target, enum rtx_code code, rtx op0, rtx op1, + enum machine_mode mode, int unsignedp, int normalizep, + enum machine_mode target_mode) { rtx subtarget; enum insn_code icode; enum machine_mode compare_mode; - enum machine_mode target_mode = target ? GET_MODE (target) : VOIDmode; enum mode_class mclass; - enum rtx_code rcode; enum rtx_code scode; - rtx tem, trueval; - rtx last; + rtx tem; if (unsignedp) code = unsigned_condition (code); @@ -5307,20 +5306,20 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, if ((code == EQ || code == NE) && (op1 == const0_rtx || op1 == constm1_rtx)) { - rtx op00, op01, op0both; + rtx op00, op01; /* Do a logical OR or AND of the two words and compare the result. */ op00 = simplify_gen_subreg (word_mode, op0, mode, 0); op01 = simplify_gen_subreg (word_mode, op0, mode, UNITS_PER_WORD); - op0both = expand_binop (word_mode, - op1 == const0_rtx ? ior_optab : and_optab, - op00, op01, NULL_RTX, unsignedp, - OPTAB_DIRECT); - - if (op0both != 0) - return emit_store_flag (target, code, op0both, op1, word_mode, - unsignedp, normalizep); + tem = expand_binop (word_mode, + op1 == const0_rtx ? ior_optab : and_optab, + op00, op01, NULL_RTX, unsignedp, + OPTAB_DIRECT); + + if (tem != 0) + tem = emit_store_flag (NULL_RTX, code, tem, op1, word_mode, + unsignedp, normalizep); } else if ((code == LT || code == GE) && op1 == const0_rtx) { @@ -5330,8 +5329,24 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, op0h = simplify_gen_subreg (word_mode, op0, mode, subreg_highpart_offset (word_mode, mode)); - return emit_store_flag (target, code, op0h, op1, word_mode, - unsignedp, normalizep); + tem = emit_store_flag (NULL_RTX, code, op0h, op1, word_mode, + unsignedp, normalizep); + } + else + tem = NULL_RTX; + + if (tem) + { + if (target_mode == VOIDmode || GET_MODE (tem) == target_mode) + return tem; + if (!target) + target = gen_reg_rtx (target_mode); + + convert_move (target, tem, + 0 == (STORE_FLAG_VALUE + & ((HOST_WIDE_INT) 1 + << (GET_MODE_BITSIZE (word_mode) -1)))); + return target; } } @@ -5390,15 +5405,15 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, if (icode != CODE_FOR_nothing) { do_pending_stack_adjust (); - tem = emit_store_flag_1 (target, icode, code, mode, compare_mode, - unsignedp, op0, op1, normalizep); + tem = emit_cstore (target, icode, code, mode, compare_mode, + unsignedp, op0, op1, normalizep, target_mode); if (tem) return tem; if (GET_MODE_CLASS (mode) == MODE_FLOAT) { - tem = emit_store_flag_1 (target, icode, scode, mode, compare_mode, - unsignedp, op1, op0, normalizep); + tem = emit_cstore (target, icode, scode, mode, compare_mode, + unsignedp, op1, op0, normalizep, target_mode); if (tem) return tem; } @@ -5406,7 +5421,37 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, } } - last = get_last_insn (); + return 0; +} + +/* Emit a store-flags instruction for comparison CODE on OP0 and OP1 + and storing in TARGET. Normally return TARGET. + Return 0 if that cannot be done. + + MODE is the mode to use for OP0 and OP1 should they be CONST_INTs. If + it is VOIDmode, they cannot both be CONST_INT. + + UNSIGNEDP is for the case where we have to widen the operands + to perform the operation. It says to use zero-extension. + + NORMALIZEP is 1 if we should convert the result to be either zero + or one. Normalize is -1 if we should convert the result to be + either zero or -1. If NORMALIZEP is zero, the result will be left + "raw" out of the scc insn. */ + +rtx +emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, + enum machine_mode mode, int unsignedp, int normalizep) +{ + enum machine_mode target_mode = target ? GET_MODE (target) : VOIDmode; + enum rtx_code rcode; + rtx subtarget; + rtx tem, last, trueval; + + tem = emit_store_flag_1 (target, code, op0, op1, mode, unsignedp, normalizep, + target_mode); + if (tem) + return tem; /* If we reached here, we can't do this with a scc insn, however there are some comparisons that can be done in other ways. Don't do any @@ -5430,6 +5475,8 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, return 0; } + last = get_last_insn (); + /* If optimizing, use different pseudo registers for each insn, instead of reusing the same pseudo. This leads to better CSE, but slows down the compiler, since there are more pseudos */ @@ -5454,8 +5501,8 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, if ((STORE_FLAG_VALUE == 1 && normalizep == -1) || (STORE_FLAG_VALUE == -1 && normalizep == 1)) { - tem = emit_store_flag (subtarget, rcode, op0, op1, mode, 0, - STORE_FLAG_VALUE); + tem = emit_store_flag_1 (subtarget, rcode, op0, op1, mode, 0, + STORE_FLAG_VALUE, target_mode); if (tem) return expand_binop (target_mode, add_optab, tem, GEN_INT (normalizep), @@ -5463,8 +5510,8 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, } else { - tem = emit_store_flag (subtarget, rcode, op0, op1, mode, 0, - normalizep); + tem = emit_store_flag_1 (subtarget, rcode, op0, op1, mode, 0, + normalizep, target_mode); if (tem) return expand_binop (target_mode, xor_optab, tem, trueval, target, INTVAL (trueval) >= 0, OPTAB_WIDEN); @@ -5484,13 +5531,15 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, if (!HONOR_NANS (mode)) { gcc_assert (first_code == (and_them ? ORDERED : UNORDERED)); - return emit_store_flag (target, code, op0, op1, mode, 0, normalizep); + return emit_store_flag_1 (target, code, op0, op1, mode, 0, normalizep, + target_mode); } #ifdef HAVE_conditional_move /* Try using a setcc instruction for ORDERED/UNORDERED, followed by a conditional move. */ - tem = emit_store_flag (subtarget, first_code, op0, op1, mode, 0, normalizep); + tem = emit_store_flag_1 (subtarget, first_code, op0, op1, mode, 0, + normalizep, target_mode); if (tem == 0) return 0; @@ -5528,8 +5577,8 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, tem = expand_binop (mode, sub_optab, op0, op1, subtarget, 1, OPTAB_WIDEN); if (tem != 0) - tem = emit_store_flag (target, code, tem, const0_rtx, - mode, unsignedp, normalizep); + tem = emit_store_flag_1 (target, code, tem, const0_rtx, + mode, unsignedp, normalizep, target_mode); if (tem != 0) return tem; @@ -5550,16 +5599,16 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, if ((STORE_FLAG_VALUE == 1 && normalizep == -1) || (STORE_FLAG_VALUE == -1 && normalizep == 1)) { - tem = emit_store_flag (subtarget, rcode, op0, op1, mode, 0, - STORE_FLAG_VALUE); + tem = emit_store_flag_1 (subtarget, rcode, op0, op1, mode, 0, + STORE_FLAG_VALUE, target_mode); if (tem != 0) tem = expand_binop (target_mode, add_optab, tem, GEN_INT (normalizep), target, 0, OPTAB_WIDEN); } else { - tem = emit_store_flag (subtarget, rcode, op0, op1, mode, 0, - normalizep); + tem = emit_store_flag_1 (subtarget, rcode, op0, op1, mode, 0, + normalizep, target_mode); if (tem != 0) tem = expand_binop (target_mode, xor_optab, tem, trueval, target, INTVAL (trueval) >= 0, OPTAB_WIDEN); diff --git a/gcc/expr.c b/gcc/expr.c index d390b0a2cd0..b3cd2b14f73 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -9109,8 +9109,11 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, temp = do_store_flag (exp, modifier != EXPAND_STACK_PARM ? target : NULL_RTX, tmode != VOIDmode ? tmode : mode); - gcc_assert (temp); - return temp; + if (temp) + return temp; + + /* Use a compare and a jump for BLKmode comparisons, or for function + type comparisons is HAVE_canonicalize_funcptr_for_compare. */ /* Although TRUTH_{AND,OR}IF_EXPR aren't present in GIMPLE, they are occassionally created by folding during expansion. */ diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 3357fde6790..6b66cbd89be 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,54 @@ +2009-07-04 Jakub Jelinek <jakub@redhat.com> + + * trans-intrinsic.c (gfc_conv_intrinsic_minmaxloc): For integer + maxloc initialize limit to -huge-1 rather than just -huge. + +2009-07-04 Janus Weil <janus@gcc.gnu.org> + + PR fortran/40593 + * interface.c (compare_actual_formal): Take care of proc-pointer-valued + functions as actual arguments. + * trans-expr.c (gfc_conv_procedure_call): Ditto. + * resolve.c (resolve_specific_f0): Use the correct ts. + +2009-07-02 Michael Matz <matz@suse.de> + + PR fortran/32131 + * trans-array.c (gfc_conv_descriptor_stride_get): Return + constant one for strides in the first dimension of ALLOCATABLE + arrays. + +2009-06-30 Janus Weil <janus@gcc.gnu.org> + + PR fortran/40594 + * trans-types.c (gfc_get_derived_type): Bugfix, reverting one hunk from + r147206. + +2009-06-29 Tobias Burnus <burnus@net-b.de> + + PR fortran/40580 + * trans-expr.c (gfc_conv_procedure_call): Add -fcheck=pointer check. + * libgfortran.h: Add GFC_RTCHECK_POINTER. + * invoke.texi (-fcheck): Document new pointer option. + * options.c (gfc_handle_runtime_check_option): Handle pointer option. + + * gfortran.texi (C Binding): Improve wording. + * iso-c-binding.def: Remove obsolete comment. + +2009-06-29 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/40551 + * dependency.h : Add second bool* argument to prototype of + gfc_full_array_ref_p. + * dependency.c (gfc_full_array_ref_p): If second argument is + present, return true if last dimension of reference is an + element or has unity stride. + * trans-array.c : Add NULL second argument to references to + gfc_full_array_ref_p. + * trans-expr.c : The same, except for; + (gfc_trans_arrayfunc_assign): Return fail if lhs reference + is not a full array or a contiguous section. + 2009-06-28 Tobias Burnus <burnus@net-b.de> Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> diff --git a/gcc/fortran/dependency.c b/gcc/fortran/dependency.c index 5f74c34ac5c..f597e6ece63 100644 --- a/gcc/fortran/dependency.c +++ b/gcc/fortran/dependency.c @@ -1186,17 +1186,28 @@ gfc_check_element_vs_element (gfc_ref *lref, gfc_ref *rref, int n) /* Determine if an array ref, usually an array section specifies the - entire array. */ + entire array. In addition, if the second, pointer argument is + provided, the function will return true if the reference is + contiguous; eg. (:, 1) gives true but (1,:) gives false. */ bool -gfc_full_array_ref_p (gfc_ref *ref) +gfc_full_array_ref_p (gfc_ref *ref, bool *contiguous) { int i; + bool lbound_OK = true; + bool ubound_OK = true; + + if (contiguous) + *contiguous = false; if (ref->type != REF_ARRAY) return false; if (ref->u.ar.type == AR_FULL) - return true; + { + if (contiguous) + *contiguous = true; + return true; + } if (ref->u.ar.type != AR_SECTION) return false; if (ref->next) @@ -1209,6 +1220,10 @@ gfc_full_array_ref_p (gfc_ref *ref) the correct element. */ if (ref->u.ar.dimen_type[i] == DIMEN_ELEMENT) { + /* This is a contiguous reference. */ + if (contiguous) + *contiguous = (i + 1 == ref->u.ar.dimen); + if (!ref->u.ar.as || !ref->u.ar.as->lower[i] || !ref->u.ar.as->upper[i] @@ -1228,17 +1243,24 @@ gfc_full_array_ref_p (gfc_ref *ref) || !ref->u.ar.as->lower[i] || gfc_dep_compare_expr (ref->u.ar.start[i], ref->u.ar.as->lower[i]))) - return false; + lbound_OK = false; /* Check the upper bound. */ if (ref->u.ar.end[i] && (!ref->u.ar.as || !ref->u.ar.as->upper[i] || gfc_dep_compare_expr (ref->u.ar.end[i], ref->u.ar.as->upper[i]))) - return false; + ubound_OK = false; /* Check the stride. */ if (ref->u.ar.stride[i] && !gfc_expr_is_one (ref->u.ar.stride[i], 0)) return false; + + /* This is a contiguous reference. */ + if (contiguous) + *contiguous = (i + 1 == ref->u.ar.dimen); + + if (!lbound_OK || !ubound_OK) + return false; } return true; } @@ -1356,11 +1378,11 @@ gfc_dep_resolver (gfc_ref *lref, gfc_ref *rref) if (lref->u.ar.dimen != rref->u.ar.dimen) { if (lref->u.ar.type == AR_FULL) - fin_dep = gfc_full_array_ref_p (rref) ? GFC_DEP_EQUAL - : GFC_DEP_OVERLAP; + fin_dep = gfc_full_array_ref_p (rref, NULL) ? GFC_DEP_EQUAL + : GFC_DEP_OVERLAP; else if (rref->u.ar.type == AR_FULL) - fin_dep = gfc_full_array_ref_p (lref) ? GFC_DEP_EQUAL - : GFC_DEP_OVERLAP; + fin_dep = gfc_full_array_ref_p (lref, NULL) ? GFC_DEP_EQUAL + : GFC_DEP_OVERLAP; else return 1; break; diff --git a/gcc/fortran/dependency.h b/gcc/fortran/dependency.h index 1920c558c98..6fa0416e2a7 100644 --- a/gcc/fortran/dependency.h +++ b/gcc/fortran/dependency.h @@ -33,7 +33,7 @@ gfc_dep_check; /*********************** Functions prototypes **************************/ bool gfc_ref_needs_temporary_p (gfc_ref *); -bool gfc_full_array_ref_p (gfc_ref *); +bool gfc_full_array_ref_p (gfc_ref *, bool *); gfc_expr *gfc_get_noncopying_intrinsic_argument (gfc_expr *); int gfc_check_fncall_dependency (gfc_expr *, sym_intent, gfc_symbol *, gfc_actual_arglist *, gfc_dep_check); diff --git a/gcc/fortran/gfortran.h b/gcc/fortran/gfortran.h index 67127419b00..260d718b13c 100644 --- a/gcc/fortran/gfortran.h +++ b/gcc/fortran/gfortran.h @@ -1678,8 +1678,9 @@ typedef struct gfc_expr struct { gfc_actual_arglist* actual; - gfc_typebound_proc* tbp; const char* name; + void* padding; /* Overlap gfc_typebound_proc with esym. */ + gfc_typebound_proc* tbp; } compcall; diff --git a/gcc/fortran/gfortran.texi b/gcc/fortran/gfortran.texi index f0b1c675922..f9e49325b8e 100644 --- a/gcc/fortran/gfortran.texi +++ b/gcc/fortran/gfortran.texi @@ -1965,10 +1965,10 @@ a macro. Use the @code{IERRNO} intrinsic (GNU extension) instead. Subroutines and functions have to have the @code{BIND(C)} attribute to be compatible with C. The dummy argument declaration is relatively straightforward. However, one needs to be careful because C uses -call-by-value by default while GNU Fortran uses call-by-reference. -Furthermore, strings and pointers are handled differently. Note that -only explicit size and assumed-size arrays are supported but not -assumed-shape or allocatable arrays. +call-by-value by default while Fortran behaves usually similar to +call-by-reference. Furthermore, strings and pointers are handled +differently. Note that only explicit size and assumed-size arrays are +supported but not assumed-shape or allocatable arrays. To pass a variable by value, use the @code{VALUE} attribute. Thus the following C prototype @@ -2277,7 +2277,7 @@ initialization using @code{_gfortran_set_args}. Default: enabled. @item @var{option}[6] @tab Enables run-time checking. Possible values are (bitwise or-ed): GFC_RTCHECK_BOUNDS (1), GFC_RTCHECK_ARRAY_TEMPS (2), -GFC_RTCHECK_RECURSION (4), GFC_RTCHECK_DO (16). +GFC_RTCHECK_RECURSION (4), GFC_RTCHECK_DO (16), GFC_RTCHECK_POINTER (32). Default: disabled. @item @var{option}[7] @tab If non zero, range checking is enabled. Default: enabled. See -frange-check (@pxref{Code Gen Options}). diff --git a/gcc/fortran/interface.c b/gcc/fortran/interface.c index c03c06e364c..ca500f582d9 100644 --- a/gcc/fortran/interface.c +++ b/gcc/fortran/interface.c @@ -1911,7 +1911,10 @@ compare_actual_formal (gfc_actual_arglist **ap, gfc_formal_arglist *formal, /* Satisfy 12.4.1.3 by ensuring that a procedure pointer actual argument is provided for a procedure pointer formal argument. */ if (f->sym->attr.proc_pointer - && !(a->expr->symtree->n.sym->attr.proc_pointer + && !((a->expr->expr_type == EXPR_VARIABLE + && a->expr->symtree->n.sym->attr.proc_pointer) + || (a->expr->expr_type == EXPR_FUNCTION + && a->expr->symtree->n.sym->result->attr.proc_pointer) || is_proc_ptr_comp (a->expr, NULL))) { if (where) diff --git a/gcc/fortran/invoke.texi b/gcc/fortran/invoke.texi index c471521bd1c..5d0448f3cbe 100644 --- a/gcc/fortran/invoke.texi +++ b/gcc/fortran/invoke.texi @@ -166,7 +166,7 @@ and warnings}. @gccoptlist{-fno-automatic -ff2c -fno-underscoring @gol -fwhole-file -fsecond-underscore @gol -fbounds-check -fcheck-array-temporaries -fmax-array-constructor =@var{n} @gol --fcheck=@var{<all|array-temps|bounds|do|recursion>} +-fcheck=@var{<all|array-temps|bounds|do|pointer|recursion>} -fmax-stack-var-size=@var{n} @gol -fpack-derived -frepack-arrays -fshort-enums -fexternal-blas @gol -fblas-matmul-limit=@var{n} -frecursive -finit-local-zero @gol @@ -1203,6 +1203,7 @@ by use of the @option{-ff2c} option. @opindex @code{fcheck} @cindex array, bounds checking @cindex bounds checking +@cindex pointer checking @cindex range checking @cindex subscript checking @cindex checking subscripts @@ -1241,6 +1242,9 @@ checking substring references. Enable generation of run-time checks for invalid modification of loop iteration variables. +@item @samp{pointer} +Enable generation of run-time checks for pointers and allocatables. + @item @samp{recursion} Enable generation of run-time checks for recursively called subroutines and functions which are not marked as recursive. See also @option{-frecursive}. diff --git a/gcc/fortran/iso-c-binding.def b/gcc/fortran/iso-c-binding.def index aeeb41de298..a529368765c 100644 --- a/gcc/fortran/iso-c-binding.def +++ b/gcc/fortran/iso-c-binding.def @@ -160,8 +160,6 @@ PROCEDURE (ISOCBINDING_F_POINTER, "c_f_pointer") PROCEDURE (ISOCBINDING_ASSOCIATED, "c_associated") PROCEDURE (ISOCBINDING_LOC, "c_loc") PROCEDURE (ISOCBINDING_FUNLOC, "c_funloc") - -/* Insert c_f_procpointer, though unsupported for now. */ PROCEDURE (ISOCBINDING_F_PROCPOINTER, "c_f_procpointer") #undef NAMED_INTCST diff --git a/gcc/fortran/libgfortran.h b/gcc/fortran/libgfortran.h index 839279e413e..a18fdce2e88 100644 --- a/gcc/fortran/libgfortran.h +++ b/gcc/fortran/libgfortran.h @@ -47,8 +47,10 @@ along with GCC; see the file COPYING3. If not see #define GFC_RTCHECK_ARRAY_TEMPS (1<<1) #define GFC_RTCHECK_RECURSION (1<<2) #define GFC_RTCHECK_DO (1<<3) +#define GFC_RTCHECK_POINTER (1<<4) #define GFC_RTCHECK_ALL (GFC_RTCHECK_BOUNDS | GFC_RTCHECK_ARRAY_TEMPS \ - | GFC_RTCHECK_RECURSION | GFC_RTCHECK_DO) + | GFC_RTCHECK_RECURSION | GFC_RTCHECK_DO \ + | GFC_RTCHECK_POINTER) /* Possible values for the CONVERT I/O specifier. */ diff --git a/gcc/fortran/options.c b/gcc/fortran/options.c index 3654e9261a1..ff0a80983da 100644 --- a/gcc/fortran/options.c +++ b/gcc/fortran/options.c @@ -471,10 +471,11 @@ gfc_handle_runtime_check_option (const char *arg) { int result, pos = 0, n; static const char * const optname[] = { "all", "bounds", "array-temps", - "recursion", "do", NULL }; + "recursion", "do", "pointer", NULL }; static const int optmask[] = { GFC_RTCHECK_ALL, GFC_RTCHECK_BOUNDS, GFC_RTCHECK_ARRAY_TEMPS, GFC_RTCHECK_RECURSION, GFC_RTCHECK_DO, + GFC_RTCHECK_POINTER, 0 }; while (*arg) diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c index 697c1ab5070..41ac03796bf 100644 --- a/gcc/fortran/resolve.c +++ b/gcc/fortran/resolve.c @@ -1828,7 +1828,10 @@ resolve_specific_f0 (gfc_symbol *sym, gfc_expr *expr) found: gfc_procedure_use (sym, &expr->value.function.actual, &expr->where); - expr->ts = sym->ts; + if (sym->result) + expr->ts = sym->result->ts; + else + expr->ts = sym->ts; expr->value.function.name = sym->name; expr->value.function.esym = sym; if (sym->as != NULL) @@ -4815,8 +4818,8 @@ resolve_compcall (gfc_expr* e) e->value.function.actual = newactual; e->value.function.name = e->value.compcall.name; + e->value.function.esym = target->n.sym; e->value.function.isym = NULL; - e->value.function.esym = NULL; e->symtree = target; e->ts = target->n.sym->ts; e->expr_type = EXPR_FUNCTION; diff --git a/gcc/fortran/trans-array.c b/gcc/fortran/trans-array.c index cf38fc371be..4b832cf8832 100644 --- a/gcc/fortran/trans-array.c +++ b/gcc/fortran/trans-array.c @@ -284,6 +284,12 @@ gfc_conv_descriptor_stride (tree desc, tree dim) tree gfc_conv_descriptor_stride_get (tree desc, tree dim) { + tree type = TREE_TYPE (desc); + gcc_assert (GFC_DESCRIPTOR_TYPE_P (type)); + if (integer_zerop (dim) + && GFC_TYPE_ARRAY_AKIND (type) == GFC_ARRAY_ALLOCATABLE) + return gfc_index_one_node; + return gfc_conv_descriptor_stride (desc, dim); } @@ -5008,7 +5014,7 @@ gfc_conv_expr_descriptor (gfc_se * se, gfc_expr * expr, gfc_ss * ss) else if (se->direct_byref) full = 0; else - full = gfc_full_array_ref_p (info->ref); + full = gfc_full_array_ref_p (info->ref, NULL); if (full) { diff --git a/gcc/fortran/trans-expr.c b/gcc/fortran/trans-expr.c index f79ad4b3cc7..d4ee169d08e 100644 --- a/gcc/fortran/trans-expr.c +++ b/gcc/fortran/trans-expr.c @@ -2640,6 +2640,15 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, gfc_conv_expr (&parmse, e); parmse.expr = gfc_build_addr_expr (NULL_TREE, parmse.expr); } + else if (e->expr_type == EXPR_FUNCTION + && e->symtree->n.sym->result + && e->symtree->n.sym->result->attr.proc_pointer) + { + /* Functions returning procedure pointers. */ + gfc_conv_expr (&parmse, e); + if (fsym && fsym->attr.proc_pointer) + parmse.expr = gfc_build_addr_expr (NULL_TREE, parmse.expr); + } else { gfc_conv_expr_reference (&parmse, e); @@ -2772,6 +2781,48 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, gfc_add_expr_to_block (&se->post, tmp); } + /* Add argument checking of passing an unallocated/NULL actual to + a nonallocatable/nonpointer dummy. */ + + if (gfc_option.rtcheck & GFC_RTCHECK_POINTER) + { + gfc_symbol *sym; + char *msg; + tree cond; + + if (e->expr_type == EXPR_VARIABLE) + sym = e->symtree->n.sym; + else if (e->expr_type == EXPR_FUNCTION) + sym = e->symtree->n.sym->result; + else + goto end_pointer_check; + + if (sym->attr.allocatable + && (fsym == NULL || !fsym->attr.allocatable)) + asprintf (&msg, "Allocatable actual argument '%s' is not " + "allocated", sym->name); + else if (sym->attr.pointer + && (fsym == NULL || !fsym->attr.pointer)) + asprintf (&msg, "Pointer actual argument '%s' is not " + "associated", sym->name); + else if (sym->attr.proc_pointer + && (fsym == NULL || !fsym->attr.proc_pointer)) + asprintf (&msg, "Proc-pointer actual argument '%s' is not " + "associated", sym->name); + else + goto end_pointer_check; + + cond = fold_build2 (EQ_EXPR, boolean_type_node, parmse.expr, + fold_convert (TREE_TYPE (parmse.expr), + null_pointer_node)); + + gfc_trans_runtime_check (true, false, cond, &se->pre, &e->where, + msg); + gfc_free (msg); + } + end_pointer_check: + + /* Character strings are passed as two parameters, a length and a pointer - except for Bind(c) which only passes the pointer. */ if (parmse.string_length != NULL_TREE && !sym->attr.is_bind_c) @@ -4300,6 +4351,7 @@ gfc_trans_arrayfunc_assign (gfc_expr * expr1, gfc_expr * expr2) gfc_ss *ss; gfc_ref * ref; bool seen_array_ref; + bool c = false; gfc_component *comp = NULL; /* The caller has already checked rank>0 and expr_type == EXPR_FUNCTION. */ @@ -4311,6 +4363,10 @@ gfc_trans_arrayfunc_assign (gfc_expr * expr1, gfc_expr * expr2) && expr2->value.function.esym->attr.elemental) return NULL; + /* Fail if rhs is not FULL or a contiguous section. */ + if (expr1->ref && !(gfc_full_array_ref_p (expr1->ref, &c) || c)) + return NULL; + /* Fail if EXPR1 can't be expressed as a descriptor. */ if (gfc_ref_needs_temporary_p (expr1->ref)) return NULL; @@ -4360,11 +4416,11 @@ gfc_trans_arrayfunc_assign (gfc_expr * expr1, gfc_expr * expr2) /* The frontend doesn't seem to bother filling in expr->symtree for intrinsic functions. */ - is_proc_ptr_comp(expr2, &comp); gcc_assert (expr2->value.function.isym - || (comp && comp->attr.dimension) + || (is_proc_ptr_comp (expr2, &comp) + && comp && comp->attr.dimension) || (!comp && gfc_return_by_reference (expr2->value.function.esym) - && expr2->value.function.esym->result->attr.dimension)); + && expr2->value.function.esym->result->attr.dimension)); ss = gfc_walk_expr (expr1); gcc_assert (ss != gfc_ss_terminator); @@ -4785,7 +4841,7 @@ copyable_array_p (gfc_expr * expr) if (expr->rank < 1 || !expr->ref || expr->ref->next) return false; - if (!gfc_full_array_ref_p (expr->ref)) + if (!gfc_full_array_ref_p (expr->ref, NULL)) return false; /* Next check that it's of a simple enough type. */ diff --git a/gcc/fortran/trans-intrinsic.c b/gcc/fortran/trans-intrinsic.c index 21694e41b36..dd3b3cdff7b 100644 --- a/gcc/fortran/trans-intrinsic.c +++ b/gcc/fortran/trans-intrinsic.c @@ -2190,12 +2190,12 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr * expr, enum tree_code op) possible value is HUGE in both cases. */ if (op == GT_EXPR) tmp = fold_build1 (NEGATE_EXPR, TREE_TYPE (tmp), tmp); - gfc_add_modify (&se->pre, limit, tmp); - if (op == GT_EXPR && expr->ts.type == BT_INTEGER) tmp = fold_build2 (MINUS_EXPR, TREE_TYPE (tmp), tmp, build_int_cst (type, 1)); + gfc_add_modify (&se->pre, limit, tmp); + /* Initialize the scalarizer. */ gfc_init_loopinfo (&loop); gfc_add_ss_to_loop (&loop, arrayss); diff --git a/gcc/fortran/trans-types.c b/gcc/fortran/trans-types.c index 1785908f811..e85ab7c4a0a 100644 --- a/gcc/fortran/trans-types.c +++ b/gcc/fortran/trans-types.c @@ -1946,7 +1946,13 @@ gfc_get_derived_type (gfc_symbol * derived) /* derived->backend_decl != 0 means we saw it before, but its components' backend_decl may have not been built. */ if (derived->backend_decl) - return derived->backend_decl; + { + /* Its components' backend_decl have been built. */ + if (TYPE_FIELDS (derived->backend_decl)) + return derived->backend_decl; + else + typenode = derived->backend_decl; + } else { /* We see this derived type first time, so build the type node. */ diff --git a/gcc/function.c b/gcc/function.c index a0c45de2a1b..63fe8353089 100644 --- a/gcc/function.c +++ b/gcc/function.c @@ -5283,15 +5283,12 @@ reposition_prologue_and_epilogue_notes (void) { #if defined (HAVE_prologue) || defined (HAVE_epilogue) \ || defined (HAVE_sibcall_epilogue) - rtx insn, last, note; - basic_block bb; - /* Since the hash table is created on demand, the fact that it is non-null is a signal that it is non-empty. */ if (prologue_insn_hash != NULL) { size_t len = htab_elements (prologue_insn_hash); - last = 0, note = 0; + rtx insn, last = NULL, note = NULL; /* Scan from the beginning until we reach the last prologue insn. */ /* ??? While we do have the CFG intact, there are two problems: @@ -5342,12 +5339,10 @@ reposition_prologue_and_epilogue_notes (void) FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR->preds) { - last = 0, note = 0; - bb = e->src; + rtx insn, first = NULL, note = NULL; + basic_block bb = e->src; - /* Scan from the beginning until we reach the first epilogue insn. - Take the cue for whether this is a plain or sibcall epilogue - from the kind of note we find first. */ + /* Scan from the beginning until we reach the first epilogue insn. */ FOR_BB_INSNS (bb, insn) { if (NOTE_P (insn)) @@ -5355,20 +5350,33 @@ reposition_prologue_and_epilogue_notes (void) if (NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG) { note = insn; - if (last) + if (first != NULL) break; } } - else if (contains (insn, epilogue_insn_hash)) + else if (first == NULL && contains (insn, epilogue_insn_hash)) { - last = insn; + first = insn; if (note != NULL) break; } } - - if (last && note && PREV_INSN (last) != note) - reorder_insns (note, note, PREV_INSN (last)); + + if (note) + { + /* If the function has a single basic block, and no real + epilogue insns (e.g. sibcall with no cleanup), the + epilogue note can get scheduled before the prologue + note. If we have frame related prologue insns, having + them scanned during the epilogue will result in a crash. + In this case re-order the epilogue note to just before + the last insn in the block. */ + if (first == NULL) + first = BB_END (bb); + + if (PREV_INSN (first) != note) + reorder_insns (note, note, PREV_INSN (first)); + } } } #endif /* HAVE_prologue or HAVE_epilogue */ diff --git a/gcc/gcc-plugin.h b/gcc/gcc-plugin.h index 1588bca372c..9fbdc91af25 100644 --- a/gcc/gcc-plugin.h +++ b/gcc/gcc-plugin.h @@ -41,6 +41,7 @@ enum plugin_event PLUGIN_GGC_END, /* Called at end of GGC. */ PLUGIN_REGISTER_GGC_ROOTS, /* Register an extra GGC root table. */ PLUGIN_ATTRIBUTES, /* Called during attribute registration. */ + PLUGIN_START_UNIT, /* Called before processing a translation unit. */ PLUGIN_EVENT_LAST /* Dummy event used for indexing callback array. */ }; diff --git a/gcc/ipa-inline.c b/gcc/ipa-inline.c index 28f0ec9862d..040096fa0d1 100644 --- a/gcc/ipa-inline.c +++ b/gcc/ipa-inline.c @@ -1504,7 +1504,8 @@ cgraph_decide_inlining_incrementally (struct cgraph_node *node, continue; } - if (cgraph_maybe_hot_edge_p (e) && leaf_node_p (e->callee)) + if (cgraph_maybe_hot_edge_p (e) && leaf_node_p (e->callee) + && optimize_function_for_speed_p (cfun)) allowed_growth = PARAM_VALUE (PARAM_EARLY_INLINING_INSNS); /* When the function body would grow and inlining the function won't diff --git a/gcc/ipa-pure-const.c b/gcc/ipa-pure-const.c index 35d27a33696..4e62eb187a4 100644 --- a/gcc/ipa-pure-const.c +++ b/gcc/ipa-pure-const.c @@ -51,6 +51,8 @@ along with GCC; see the file COPYING3. If not see #include "diagnostic.h" #include "langhooks.h" #include "target.h" +#include "cfgloop.h" +#include "tree-scalar-evolution.h" static struct pointer_set_t *visited_nodes; @@ -211,13 +213,23 @@ check_decl (funct_state local, static inline void check_op (funct_state local, tree t, bool checking_write) { - if (TREE_THIS_VOLATILE (t)) + t = get_base_address (t); + if (t && TREE_THIS_VOLATILE (t)) { local->pure_const_state = IPA_NEITHER; if (dump_file) fprintf (dump_file, " Volatile indirect ref is not const/pure\n"); return; } + else if (t + && INDIRECT_REF_P (t) + && TREE_CODE (TREE_OPERAND (t, 0)) == SSA_NAME + && !ptr_deref_may_alias_global_p (TREE_OPERAND (t, 0))) + { + if (dump_file) + fprintf (dump_file, " Indirect ref to local memory is OK\n"); + return; + } else if (checking_write) { local->pure_const_state = IPA_NEITHER; @@ -522,8 +534,37 @@ end: indication of possible infinite loop side effect. */ if (mark_dfs_back_edges ()) - l->looping = true; - + { + /* Preheaders are needed for SCEV to work. + Simple lateches and recorded exits improve chances that loop will + proved to be finite in testcases such as in loop-15.c and loop-24.c */ + loop_optimizer_init (LOOPS_NORMAL + | LOOPS_HAVE_RECORDED_EXITS); + if (dump_file && (dump_flags & TDF_DETAILS)) + flow_loops_dump (dump_file, NULL, 0); + if (mark_irreducible_loops ()) + { + if (dump_file) + fprintf (dump_file, " has irreducible loops\n"); + l->looping = true; + } + else + { + loop_iterator li; + struct loop *loop; + scev_initialize (); + FOR_EACH_LOOP (li, loop, 0) + if (!finite_loop_p (loop)) + { + if (dump_file) + fprintf (dump_file, " can not prove finiteness of loop %i\n", loop->num); + l->looping =true; + break; + } + scev_finalize (); + } + loop_optimizer_finalize (); + } } if (TREE_READONLY (decl)) diff --git a/gcc/ira.c b/gcc/ira.c index a63351441c5..7a2efe9dc86 100644 --- a/gcc/ira.c +++ b/gcc/ira.c @@ -1411,7 +1411,7 @@ setup_eliminable_regset (void) || (cfun->calls_alloca && EXIT_IGNORE_STACK) || crtl->accesses_prior_frames || crtl->stack_realign_needed - || FRAME_POINTER_REQUIRED); + || targetm.frame_pointer_required ()); frame_pointer_needed = need_fp; @@ -2797,14 +2797,14 @@ build_insn_chain (void) CLEAR_REG_SET (live_relevant_regs); memset (live_subregs_used, 0, max_regno * sizeof (int)); - EXECUTE_IF_SET_IN_BITMAP (df_get_live_out (bb), 0, i, bi) + EXECUTE_IF_SET_IN_BITMAP (DF_LR_OUT (bb), 0, i, bi) { if (i >= FIRST_PSEUDO_REGISTER) break; bitmap_set_bit (live_relevant_regs, i); } - EXECUTE_IF_SET_IN_BITMAP (df_get_live_out (bb), + EXECUTE_IF_SET_IN_BITMAP (DF_LR_OUT (bb), FIRST_PSEUDO_REGISTER, i, bi) { if (pseudo_for_reload_consideration_p (i)) diff --git a/gcc/jump.c b/gcc/jump.c index 533f11cab5a..28a9b0f43ea 100644 --- a/gcc/jump.c +++ b/gcc/jump.c @@ -893,13 +893,8 @@ returnjump_p_1 (rtx *loc, void *data ATTRIBUTE_UNUSED) int returnjump_p (rtx insn) { - /* Handle delayed branches. */ - if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) - insn = XVECEXP (PATTERN (insn), 0, 0); - if (!JUMP_P (insn)) return 0; - return for_each_rtx (&PATTERN (insn), returnjump_p_1, NULL); } diff --git a/gcc/params.def b/gcc/params.def index 716d2e480aa..0d8b6a57ea1 100644 --- a/gcc/params.def +++ b/gcc/params.def @@ -70,7 +70,7 @@ DEFPARAM (PARAM_PREDICTABLE_BRANCH_OUTCOME, DEFPARAM (PARAM_MAX_INLINE_INSNS_SINGLE, "max-inline-insns-single", "The maximum number of instructions in a single function eligible for inlining", - 400, 0, 0) + 150, 0, 0) /* The single function inlining limit for functions that are inlined by virtue of -finline-functions (-O3). @@ -82,17 +82,17 @@ DEFPARAM (PARAM_MAX_INLINE_INSNS_SINGLE, DEFPARAM (PARAM_MAX_INLINE_INSNS_AUTO, "max-inline-insns-auto", "The maximum number of instructions when automatically inlining", - 60, 0, 0) + 40, 0, 0) DEFPARAM (PARAM_MAX_INLINE_INSNS_RECURSIVE, "max-inline-insns-recursive", "The maximum number of instructions inline function can grow to via recursive inlining", - 450, 0, 0) + 300, 0, 0) DEFPARAM (PARAM_MAX_INLINE_INSNS_RECURSIVE_AUTO, "max-inline-insns-recursive-auto", "The maximum number of instructions non-inline function can grow to via recursive inlining", - 450, 0, 0) + 200, 0, 0) DEFPARAM (PARAM_MAX_INLINE_RECURSIVE_DEPTH, "max-inline-recursive-depth", @@ -185,7 +185,7 @@ DEFPARAM(PARAM_IPCP_UNIT_GROWTH, DEFPARAM(PARAM_EARLY_INLINING_INSNS, "early-inlining-insns", "maximal estimated growth of function body caused by early inlining of single call", - 12, 0, 0) + 8, 0, 0) DEFPARAM(PARAM_LARGE_STACK_FRAME, "large-stack-frame", "The size of stack frame to be considered large", diff --git a/gcc/passes.c b/gcc/passes.c index 36ffd222135..ca69beefd32 100644 --- a/gcc/passes.c +++ b/gcc/passes.c @@ -651,7 +651,6 @@ init_optimization_passes (void) NEXT_PASS (pass_lim); NEXT_PASS (pass_tree_unswitch); NEXT_PASS (pass_scev_cprop); - NEXT_PASS (pass_empty_loop); NEXT_PASS (pass_record_bounds); NEXT_PASS (pass_check_data_deps); NEXT_PASS (pass_loop_distribution); diff --git a/gcc/plugin.c b/gcc/plugin.c index 396850a3a97..f6578505b88 100644 --- a/gcc/plugin.c +++ b/gcc/plugin.c @@ -57,6 +57,7 @@ const char *plugin_event_name[] = "PLUGIN_GGC_MARKING", "PLUGIN_GGC_END", "PLUGIN_REGISTER_GGC_ROOTS", + "PLUGIN_START_UNIT", "PLUGIN_EVENT_LAST" }; @@ -499,6 +500,7 @@ register_callback (const char *plugin_name, ggc_register_root_tab ((const struct ggc_root_tab*) user_data); break; case PLUGIN_FINISH_TYPE: + case PLUGIN_START_UNIT: case PLUGIN_FINISH_UNIT: case PLUGIN_CXX_CP_PRE_GENERICIZE: case PLUGIN_GGC_START: @@ -544,6 +546,7 @@ invoke_plugin_callbacks (enum plugin_event event, void *gcc_data) switch (event) { case PLUGIN_FINISH_TYPE: + case PLUGIN_START_UNIT: case PLUGIN_FINISH_UNIT: case PLUGIN_CXX_CP_PRE_GENERICIZE: case PLUGIN_ATTRIBUTES: diff --git a/gcc/postreload.c b/gcc/postreload.c index 01e1f17ce04..cf165ec5f0f 100644 --- a/gcc/postreload.c +++ b/gcc/postreload.c @@ -815,22 +815,19 @@ reload_combine (void) rtx prev = prev_nonnote_insn (insn); rtx prev_set = prev ? single_set (prev) : NULL_RTX; unsigned int regno = REGNO (reg); - rtx const_reg = NULL_RTX; + rtx index_reg = NULL_RTX; rtx reg_sum = NULL_RTX; - /* Now, we need an index register. - We'll set index_reg to this index register, const_reg to the - register that is to be loaded with the constant - (denoted as REGZ in the substitution illustration above), - and reg_sum to the register-register that we want to use to - substitute uses of REG (typically in MEMs) with. - First check REG and BASE for being index registers; - we can use them even if they are not dead. */ + /* Now we need to set INDEX_REG to an index register (denoted as + REGZ in the illustration above) and REG_SUM to the expression + register+register that we want to use to substitute uses of REG + (typically in MEMs) with. First check REG and BASE for being + index registers; we can use them even if they are not dead. */ if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], regno) || TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], REGNO (base))) { - const_reg = reg; + index_reg = reg; reg_sum = plus; } else @@ -847,9 +844,7 @@ reload_combine (void) && reg_state[i].store_ruid <= reg_state[regno].use_ruid && hard_regno_nregs[i][GET_MODE (reg)] == 1) { - rtx index_reg = gen_rtx_REG (GET_MODE (reg), i); - - const_reg = index_reg; + index_reg = gen_rtx_REG (GET_MODE (reg), i); reg_sum = gen_rtx_PLUS (GET_MODE (reg), index_reg, base); break; } @@ -859,19 +854,19 @@ reload_combine (void) /* Check that PREV_SET is indeed (set (REGX) (CONST_INT)) and that (REGY), i.e. BASE, is not clobbered before the last use we'll create. */ - if (prev_set != 0 + if (reg_sum + && prev_set && CONST_INT_P (SET_SRC (prev_set)) && rtx_equal_p (SET_DEST (prev_set), reg) && reg_state[regno].use_index >= 0 && (reg_state[REGNO (base)].store_ruid - <= reg_state[regno].use_ruid) - && reg_sum != 0) + <= reg_state[regno].use_ruid)) { int i; - /* Change destination register and, if necessary, the - constant value in PREV, the constant loading instruction. */ - validate_change (prev, &SET_DEST (prev_set), const_reg, 1); + /* Change destination register and, if necessary, the constant + value in PREV, the constant loading instruction. */ + validate_change (prev, &SET_DEST (prev_set), index_reg, 1); if (reg_state[regno].offset != const0_rtx) validate_change (prev, &SET_SRC (prev_set), @@ -900,7 +895,7 @@ reload_combine (void) remove_reg_equal_equiv_notes (prev); reg_state[regno].use_index = RELOAD_COMBINE_MAX_USES; - reg_state[REGNO (const_reg)].store_ruid + reg_state[REGNO (index_reg)].store_ruid = reload_combine_ruid; continue; } diff --git a/gcc/reload1.c b/gcc/reload1.c index 064166fd13f..6b6da1bea2a 100644 --- a/gcc/reload1.c +++ b/gcc/reload1.c @@ -3702,7 +3702,8 @@ update_eliminables (HARD_REG_SET *pset) struct elim_table *ep; for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) - if ((ep->from == HARD_FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED) + if ((ep->from == HARD_FRAME_POINTER_REGNUM + && targetm.frame_pointer_required ()) #ifdef ELIMINABLE_REGS || ! CAN_ELIMINATE (ep->from, ep->to) #endif diff --git a/gcc/stor-layout.c b/gcc/stor-layout.c index d65452bc710..84f65e1d246 100644 --- a/gcc/stor-layout.c +++ b/gcc/stor-layout.c @@ -37,6 +37,10 @@ along with GCC; see the file COPYING3. If not see #include "langhooks.h" #include "regs.h" #include "params.h" +#include "cgraph.h" +#include "tree-inline.h" +#include "tree-dump.h" +#include "gimple.h" /* Data type for the expressions representing sizes of data types. It is the first integer type laid out. */ @@ -53,6 +57,7 @@ unsigned int initial_max_fld_align = TARGET_DEFAULT_PACK_STRUCT; called only by a front end. */ static int reference_types_internal = 0; +static tree self_referential_size (tree); static void finalize_record_size (record_layout_info); static void finalize_type_size (tree); static void place_union_field (record_layout_info, tree); @@ -117,13 +122,19 @@ variable_size (tree size) { tree save; + /* Obviously. */ + if (TREE_CONSTANT (size)) + return size; + + /* If the size is self-referential, we can't make a SAVE_EXPR (see + save_expr for the rationale). But we can do something else. */ + if (CONTAINS_PLACEHOLDER_P (size)) + return self_referential_size (size); + /* If the language-processor is to take responsibility for variable-sized items (e.g., languages which have elaboration procedures like Ada), - just return SIZE unchanged. Likewise for self-referential sizes and - constant sizes. */ - if (TREE_CONSTANT (size) - || lang_hooks.decls.global_bindings_p () < 0 - || CONTAINS_PLACEHOLDER_P (size)) + just return SIZE unchanged. */ + if (lang_hooks.decls.global_bindings_p () < 0) return size; size = save_expr (size); @@ -157,6 +168,206 @@ variable_size (tree size) return size; } + +/* An array of functions used for self-referential size computation. */ +static GTY(()) VEC (tree, gc) *size_functions; + +/* Similar to copy_tree_r but do not copy component references involving + PLACEHOLDER_EXPRs. These nodes are spotted in find_placeholder_in_expr + and substituted in substitute_in_expr. */ + +static tree +copy_self_referential_tree_r (tree *tp, int *walk_subtrees, void *data) +{ + enum tree_code code = TREE_CODE (*tp); + + /* Stop at types, decls, constants like copy_tree_r. */ + if (TREE_CODE_CLASS (code) == tcc_type + || TREE_CODE_CLASS (code) == tcc_declaration + || TREE_CODE_CLASS (code) == tcc_constant) + { + *walk_subtrees = 0; + return NULL_TREE; + } + + /* This is the pattern built in ada/make_aligning_type. */ + else if (code == ADDR_EXPR + && TREE_CODE (TREE_OPERAND (*tp, 0)) == PLACEHOLDER_EXPR) + { + *walk_subtrees = 0; + return NULL_TREE; + } + + /* Default case: the component reference. */ + else if (code == COMPONENT_REF) + { + tree inner; + for (inner = TREE_OPERAND (*tp, 0); + REFERENCE_CLASS_P (inner); + inner = TREE_OPERAND (inner, 0)) + ; + + if (TREE_CODE (inner) == PLACEHOLDER_EXPR) + { + *walk_subtrees = 0; + return NULL_TREE; + } + } + + /* We're not supposed to have them in self-referential size trees + because we wouldn't properly control when they are evaluated. + However, not creating superfluous SAVE_EXPRs requires accurate + tracking of readonly-ness all the way down to here, which we + cannot always guarantee in practice. So punt in this case. */ + else if (code == SAVE_EXPR) + return error_mark_node; + + return copy_tree_r (tp, walk_subtrees, data); +} + +/* Given a SIZE expression that is self-referential, return an equivalent + expression to serve as the actual size expression for a type. */ + +static tree +self_referential_size (tree size) +{ + static unsigned HOST_WIDE_INT fnno = 0; + VEC (tree, heap) *self_refs = NULL; + tree param_type_list = NULL, param_decl_list = NULL, arg_list = NULL; + tree t, ref, return_type, fntype, fnname, fndecl; + unsigned int i; + char buf[128]; + + /* Do not factor out simple operations. */ + t = skip_simple_arithmetic (size); + if (TREE_CODE (t) == CALL_EXPR) + return size; + + /* Collect the list of self-references in the expression. */ + find_placeholder_in_expr (size, &self_refs); + gcc_assert (VEC_length (tree, self_refs) > 0); + + /* Obtain a private copy of the expression. */ + t = size; + if (walk_tree (&t, copy_self_referential_tree_r, NULL, NULL) != NULL_TREE) + return size; + size = t; + + /* Build the parameter and argument lists in parallel; also + substitute the former for the latter in the expression. */ + for (i = 0; VEC_iterate (tree, self_refs, i, ref); i++) + { + tree subst, param_name, param_type, param_decl; + + if (DECL_P (ref)) + { + /* We shouldn't have true variables here. */ + gcc_assert (TREE_READONLY (ref)); + subst = ref; + } + /* This is the pattern built in ada/make_aligning_type. */ + else if (TREE_CODE (ref) == ADDR_EXPR) + subst = ref; + /* Default case: the component reference. */ + else + subst = TREE_OPERAND (ref, 1); + + sprintf (buf, "p%d", i); + param_name = get_identifier (buf); + param_type = TREE_TYPE (ref); + param_decl + = build_decl (input_location, PARM_DECL, param_name, param_type); + if (targetm.calls.promote_prototypes (NULL_TREE) + && INTEGRAL_TYPE_P (param_type) + && TYPE_PRECISION (param_type) < TYPE_PRECISION (integer_type_node)) + DECL_ARG_TYPE (param_decl) = integer_type_node; + else + DECL_ARG_TYPE (param_decl) = param_type; + DECL_ARTIFICIAL (param_decl) = 1; + TREE_READONLY (param_decl) = 1; + + size = substitute_in_expr (size, subst, param_decl); + + param_type_list = tree_cons (NULL_TREE, param_type, param_type_list); + param_decl_list = chainon (param_decl, param_decl_list); + arg_list = tree_cons (NULL_TREE, ref, arg_list); + } + + VEC_free (tree, heap, self_refs); + + /* Append 'void' to indicate that the number of parameters is fixed. */ + param_type_list = tree_cons (NULL_TREE, void_type_node, param_type_list); + + /* The 3 lists have been created in reverse order. */ + param_type_list = nreverse (param_type_list); + param_decl_list = nreverse (param_decl_list); + arg_list = nreverse (arg_list); + + /* Build the function type. */ + return_type = TREE_TYPE (size); + fntype = build_function_type (return_type, param_type_list); + + /* Build the function declaration. */ + sprintf (buf, "SZ"HOST_WIDE_INT_PRINT_UNSIGNED, fnno++); + fnname = get_file_function_name (buf); + fndecl = build_decl (input_location, FUNCTION_DECL, fnname, fntype); + for (t = param_decl_list; t; t = TREE_CHAIN (t)) + DECL_CONTEXT (t) = fndecl; + DECL_ARGUMENTS (fndecl) = param_decl_list; + DECL_RESULT (fndecl) + = build_decl (input_location, RESULT_DECL, 0, return_type); + DECL_CONTEXT (DECL_RESULT (fndecl)) = fndecl; + + /* The function has been created by the compiler and we don't + want to emit debug info for it. */ + DECL_ARTIFICIAL (fndecl) = 1; + DECL_IGNORED_P (fndecl) = 1; + + /* It is supposed to be "const" and never throw. */ + TREE_READONLY (fndecl) = 1; + TREE_NOTHROW (fndecl) = 1; + + /* We want it to be inlined when this is deemed profitable, as + well as discarded if every call has been integrated. */ + DECL_DECLARED_INLINE_P (fndecl) = 1; + + /* It is made up of a unique return statement. */ + DECL_INITIAL (fndecl) = make_node (BLOCK); + BLOCK_SUPERCONTEXT (DECL_INITIAL (fndecl)) = fndecl; + t = build2 (MODIFY_EXPR, return_type, DECL_RESULT (fndecl), size); + DECL_SAVED_TREE (fndecl) = build1 (RETURN_EXPR, void_type_node, t); + TREE_STATIC (fndecl) = 1; + + /* Put it onto the list of size functions. */ + VEC_safe_push (tree, gc, size_functions, fndecl); + + /* Replace the original expression with a call to the size function. */ + return build_function_call_expr (fndecl, arg_list); +} + +/* Take, queue and compile all the size functions. It is essential that + the size functions be gimplified at the very end of the compilation + in order to guarantee transparent handling of self-referential sizes. + Otherwise the GENERIC inliner would not be able to inline them back + at each of their call sites, thus creating artificial non-constant + size expressions which would trigger nasty problems later on. */ + +void +finalize_size_functions (void) +{ + unsigned int i; + tree fndecl; + + for (i = 0; VEC_iterate(tree, size_functions, i, fndecl); i++) + { + dump_function (TDI_original, fndecl); + gimplify_function_tree (fndecl); + dump_function (TDI_generic, fndecl); + cgraph_finalize_function (fndecl, false); + } + + VEC_free (tree, gc, size_functions); +} #ifndef MAX_FIXED_MODE_SIZE #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (DImode) diff --git a/gcc/system.h b/gcc/system.h index 51d9c995c3c..780fda410ce 100644 --- a/gcc/system.h +++ b/gcc/system.h @@ -682,7 +682,7 @@ extern void fancy_abort (const char *, int, const char *) ATTRIBUTE_NORETURN; MUST_PASS_IN_STACK FUNCTION_ARG_PASS_BY_REFERENCE \ VECTOR_MODE_SUPPORTED_P TARGET_SUPPORTS_HIDDEN \ FUNCTION_ARG_PARTIAL_NREGS ASM_OUTPUT_DWARF_DTPREL \ - ALLOCATE_INITIAL_VALUE LEGITIMIZE_ADDRESS + ALLOCATE_INITIAL_VALUE LEGITIMIZE_ADDRESS FRAME_POINTER_REQUIRED /* Other obsolete target macros, or macros that used to be in target headers and were not used, and may be obsolete or may never have diff --git a/gcc/target-def.h b/gcc/target-def.h index 8aeebeb80f1..ddf3e0adc4f 100644 --- a/gcc/target-def.h +++ b/gcc/target-def.h @@ -666,6 +666,10 @@ #define TARGET_CASE_VALUES_THRESHOLD default_case_values_threshold #endif +#ifndef TARGET_FRAME_POINTER_REQUIRED +#define TARGET_FRAME_POINTER_REQUIRED hook_bool_void_false +#endif + /* C specific. */ #ifndef TARGET_C_MODE_FOR_SUFFIX #define TARGET_C_MODE_FOR_SUFFIX default_mode_for_suffix @@ -938,6 +942,7 @@ TARGET_INSTANTIATE_DECLS, \ TARGET_HARD_REGNO_SCRATCH_OK, \ TARGET_CASE_VALUES_THRESHOLD, \ + TARGET_FRAME_POINTER_REQUIRED, \ TARGET_C, \ TARGET_CXX, \ TARGET_EMUTLS, \ diff --git a/gcc/target.h b/gcc/target.h index bbc6cd87699..bd107179498 100644 --- a/gcc/target.h +++ b/gcc/target.h @@ -960,6 +960,9 @@ struct gcc_target /* Return the smallest number of different values for which it is best to use a jump-table instead of a tree of conditional branches. */ unsigned int (* case_values_threshold) (void); + + /* Retutn true if a function must have and use a frame pointer. */ + bool (* frame_pointer_required) (void); /* Functions specific to the C family of frontends. */ struct c { diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d325d4ab0a6..da27711cf66 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,206 @@ +2009-07-04 Jason Merrill <jason@redhat.com> + + * g++.dg/template/using15.C: New. + +2009-07-04 Jakub Jelinek <jakub@redhat.com> + + * gfortran.dg/maxloc_1.f90: New test. + +2009-07-04 Janus Weil <janus@gcc.gnu.org> + + PR fortran/40593 + * gfortran.dg/proc_ptr_result_6.f90: New. + +2009-07-04 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> + + * gcc.dg/framework-2.c: Adjust testcase to pass. + +2009-07-04 Jason Merrill <jason@redhat.com> + + PR c++/40619 + * g++.dg/cpp0x/auto16.C: New. + +2009-07-03 Vladimir Makarov <vmakarov@redhat.com> + + PR target/40587 + * gfortran.dg/pr40587.f: New test. + +2009-07-03 Jerry DeLisle <jvdelisle@gcc.gnu.org> + + PR fortran/40638 + * gfortran.dg/unit_1.f90: New test. + +2009-07-03 Jason Merrill <jason@redhat.com> + + * g++.dg/template/pure1.C: Expect another error. + +2009-07-03 Richard Guenther <rguenther@suse.de> + + PR tree-optimization/40640 + * gcc.c-torture/compile/pr40640.c: New testcase. + +2009-07-03 Richard Guenther <rguenther@suse.de> + + PR middle-end/34163 + * gfortran.dg/pr34163.f90: New testcase. + +2009-07-03 Jan Hubicka <jh@suse.cz> + + * gcc.dg/tree-ssa/loop-24.c: Update dump file matching; enable -O2. + * gcc.dg/tree-ssa/loop-25.c: Likewise. + * gcc.dg/tree-ssa/loop-26.c: Likewise. + * gcc.dg/tree-ssa/pr32044.c: Likewise. + * gcc.dg/tree-ssa/loop-29.c: Likewise. + * gcc.dg/tree-ssa/loop-10.c: Likewise. + * gnat.dg/loop_optimization6.adb: Enable -O2. + +2009-07-02 Mark Mitchell <mark@codesourcery.com> + + * g++.dg/warn/null4.C: Extend. + +2009-07-02 Jason Merrill <jason@redhat.com> + + * g++.dg/template/spec8.C: Fix. + +2009-07-02 Michael Matz <matz@suse.de> + + PR fortran/32131 + * gfortran.dg/pr32921.f: Adjust. + +2009-07-02 Jan Hubicka <jh@suse.cz> + + * gcc.dg/tree-ssa/local-pure-const.c: New testcase. + +2009-07-01 Adam Nemet <anemet@caviumnetworks.com> + + * gcc.target/mips/truncate-4.c: New testcase. + +2009-07-01 Richard Guenther <rguenther@suse.de> + + PR tree-optimization/19831 + * gcc.dg/tree-ssa/20041122-1.c: Enable TBAA, scan FRE dump, + make allocated memory escape. Un-XFAIL. + * gcc.dg/vect/pr21591.c: Make allocated memory escape. + * gcc.dg/vect/pr31699.c: Likewise. + * gcc.dg/tree-ssa/ssa-dce-7.c: New testcase. + +2009-06-30 Jakub Jelinek <jakub@redhat.com> + + PR c++/40566 + * g++.dg/parse/cond5.C: New test. + +2009-06-30 Nathan Froyd <froydnj@codesourcery.com> + + * gcc.dg/tree-ssa/gen-vect-25.c (n): New variable. + (main): Pass n to main_1 instead. + * gcc.dg/tree-ssa/gen-vect-28.c (off): New variable. + (main_1): New function, split off from... + (main): ...here. Pass `off' to main_1 instead. + +2009-06-30 Jason Merrill <jason@redhat.com> + + PR c++/40595 + * g++.dg/cpp0x/variadic94.C: New. + +2009-06-30 Richard Sandiford <r.sandiford@uk.ibm.com> + + * lib/gcc-defs.exp (gcc-set-multilib-library-path): Delete. + * lib/target-libpath.exp (ld_library_path_vars): New variable. + (init_ld_library_path_env_vars): New function, replacing the + orig_*_saved assignments. Call it after defining it. + (set_ld_library_path_env_vars): Rewrite to use ld_library_path_vars. + (restore_ld_library_path_env_vars): Likewise. + (add_path, find_libgcc_s): New functions. + * lib/objc.exp (objc_init): Use find_libgcc_s instead of + gcc-set-multilib-library-path. + (objc_target_compile): Don't add "." to ld_library_path. + Use add_path. + * lib/gfortran.exp (gfortran_link_flags): Don't add "." to + ld_library_path. Use add_path. Use find_libgcc_s instead of + gcc-set-multilib-library-path. + * lib/g++.exp (g++_link_flags): Likewise. + * lib/obj-c++.exp (obj-c++_link_flags): Likewise. + * lib/c-torture.exp: Do not manipulate ld_library_path at the + top level; do it... + (c-torture-execute): ...here instead. Use $ld_library_path_multilib + to tell when this needs to happen. Use find_libgcc_s instead of + gcc-set-multilib-library-path. + * lib/gcc-dg.exp: Likewise. + * lib/gnat.exp (gnat_target_compile): Don't add "." to ld_library_path. + * g++.dg/compat/compat.exp (alt_ld_library_path): Don't add "." + unless it is in $ALT_LD_LIBRARY_PATH. + * g++.dg/compat/struct-layout-1.exp (alt_ld_library_path): Likewise. + +2009-06-30 Eric Botcazou <ebotcazou@adacore.com> + + * gnat.dg/discr12.adb: New test. + * gnat.dg/discr12_pkg.ads: New helper. + * gnat.dg/discr13.adb: New test. + * gnat.dg/discr14.ad[sb]: Likewise. + * gnat.dg/discr15.adb: Likewise. + * gnat.dg/discr15_pkg.ads: New helper. + * gnat.dg/discr16.adb: New test. + * gnat.dg/discr16_g.ads: New helper. + * gnat.dg/discr16_pkg.ads: Likewise. + * gnat.dg/discr16_cont.ads: Likewise. + * gnat.dg/discr17.adb: New test. + * gnat.dg/discr18.adb: Likewise. + * gnat.dg/discr18_pkg.ads: New helper. + * gnat.dg/discr19.adb: New test. + +2009-06-30 Thomas Koenig <tkoenig@gcc.gnu.org> + + PR fortran/40576 + * gfortran.dg/internal_write_1.f90: New testcase. + +2009-06-30 Janus Weil <janus@gcc.gnu.org> + + PR fortran/40594 + * gfortran.dg/derived_pointer_recursion_2.f90: New. + +2009-06-30 Richard Guenther <rguenther@suse.de> + + * gcc.dg/tree-ssa/ssa-dce-6.c: New testcase. + +2009-06-30 Wei Guozhi <carrot@google.com> + + * gcc.dg/tree-ssa/ssa-sink-5.c: Change the compiler option "-O2 -Os" + to "-Os". + +2009-06-30 Ira Rosen <irar@il.ibm.com> + + PR tree-optimization/40542 + * gcc.dg/vect/pr40542.c: New test. + +2009-06-30 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/40582 + * gcc.c-torture/compile/pr40582.c: New test. + +2009-06-30 Wei Guozhi <carrot@google.com> + + PR/40416 + * gcc.dg/tree-ssa/ssa-sink-5.c: New testcase. + +2009-06-29 Jason Merrill <jason@redhat.com> + + PR c++/40274 + * g++.dg/template/debug1.C: New. + +2009-06-29 Tobias Burnus <burnus@net-b.de> + + PR fortran/40580 + * pointer_check_1.f90: New test. + * pointer_check_2.f90: New test. + * pointer_check_3.f90: New test. + * pointer_check_4.f90: New test. + * pointer_check_5.f90: New test. + +2009-06-29 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/40551 + * gfortran.dg/func_assign_2.f90 : New test. + 2009-06-29 Richard Guenther <rguenther@suse.de> PR middle-end/14187 @@ -100,7 +303,7 @@ 2009-06-25 Martin Jambor <mjambor@suse.cz> PR tree-optimization/40493 - * testsuite/gcc.c-torture/execute/pr40493.c: New test. + * gcc.c-torture/execute/pr40493.c: New test. 2009-06-24 Jason Merrill <jason@redhat.com> @@ -195,7 +398,7 @@ * gcc.c-torture/unsorted/dump-noaddr.x (dump_compare): Use -dumpbase to put dump files in a subdirectory. - * gcc/testsuite/lib/gcc-dg.exp (cleanup-saved-temps): Also remove + * lib/gcc-dg.exp (cleanup-saved-temps): Also remove ".o" temporary files. 2009-06-21 Janus Weil <janus@gcc.gnu.org> @@ -272,8 +475,8 @@ 2009-06-19 Uros Bizjak <ubizjak@gmail.com> PR testsuite/40491 - * testsuite/gcc.dg/20080522-1.c: Remove testcase for real. - * testsuite/gcc.dg/20080528-1.c: Ditto. + * gcc.dg/20080522-1.c: Remove testcase for real. + * gcc.dg/20080528-1.c: Ditto. 2009-06-19 Janus Weil <janus@gcc.gnu.org> @@ -432,11 +635,11 @@ 2009-06-16 Martin Jambor <mjambor@suse.cz> - * testsuite/gcc.c-torture/compile/pr40432.c: New file. + * gcc.c-torture/compile/pr40432.c: New file. 2009-06-16 Martin Jambor <mjambor@suse.cz> - * testsuite/gfortran.fortran-torture/compile/pr40413.f90: New file. + * gfortran.fortran-torture/compile/pr40413.f90: New file. 2009-06-16 Janus Weil <janus@gcc.gnu.org> @@ -643,7 +846,7 @@ 2009-06-10 Anthony Green <green@moxielogic.com> - * testsuite/lib/target-supports.exp (check_profiling_available): + * lib/target-supports.exp (check_profiling_available): Profiling is not available for testing purposes on moxie. 2009-06-09 Ian Lance Taylor <iant@google.com> @@ -661,7 +864,7 @@ 2009-06-09 Martin Jambor <mjambor@suse.cz> - * testsuite/gcc.c-torture/compile/pr40351.c: New file. + * gcc.c-torture/compile/pr40351.c: New file. 2009-06-09 Olivier Hainque <hainque@adacore.com> @@ -1115,10 +1318,10 @@ 2009-05-26 Basile Starynkevitch <basile@starynkevitch.net> - * testsuite/gcc.dg/plugin/plugin.exp: Added ggcplug.c test plugin + * gcc.dg/plugin/plugin.exp: Added ggcplug.c test plugin with ggcplug-test-1.c for testing PLUGIN_GGC_MARKING etc... - * testsuite/gcc.dg/plugin/ggcplug-test-1.c: Added new file. - * testsuite/gcc.dg/plugin/ggcplug.c: Added new file. + * gcc.dg/plugin/ggcplug-test-1.c: Added new file. + * gcc.dg/plugin/ggcplug.c: Added new file. 2009-05-26 Tobias Burnus <burnus@net-b.de> @@ -1414,9 +1617,9 @@ 2009-05-16 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> PR fortran/31243 - * gcc/testsuite/gfortran.dg/string_1.f90: New test. - * gcc/testsuite/gfortran.dg/string_2.f90: New test. - * gcc/testsuite/gfortran.dg/string_3.f90: New test. + * gfortran.dg/string_1.f90: New test. + * gfortran.dg/string_2.f90: New test. + * gfortran.dg/string_3.f90: New test. 2009-05-16 David Billinghurst <billingd@gcc.gnu.org> @@ -1441,7 +1644,7 @@ 2009-05-15 Jan Hubicka <jh@suse.cz> - * testsuite/gcc.dg/tree-ssa/inline-3.c: New testcase + * gcc.dg/tree-ssa/inline-3.c: New testcase 2009-05-15 Jan Hubicka <jh@suse.cz> @@ -2207,7 +2410,7 @@ 2009-04-28 Steve Ellcey <sje@cup.hp.com> - * testsuite/gcc.target/ia64/sync-1.c: Check for cmpxchg8 only if + * gcc.target/ia64/sync-1.c: Check for cmpxchg8 only if lp64 is true. 2009-04-28 Richard Guenther <rguenther@suse.de> @@ -4168,7 +4371,7 @@ 2009-03-13 Jack Howarth <howarth@bromo.med.uc.edu> PR target/39137 - * testsuite/gcc.target/i386/stackalign/longlong-2.c: Skip on darwin. + * gcc.target/i386/stackalign/longlong-2.c: Skip on darwin. 2009-03-13 H.J. Lu <hongjiu.lu@intel.com> @@ -4363,8 +4566,8 @@ 2009-03-02 Sebastian Pop <sebastian.pop@amd.com> PR middle-end/39335 - * testsuite/gcc.dg/graphite/pr39335_1.c: New. - * testsuite/gcc.dg/graphite/pr39335.c: New. + * gcc.dg/graphite/pr39335_1.c: New. + * gcc.dg/graphite/pr39335.c: New. 2009-03-02 H.J. Lu <hongjiu.lu@intel.com> @@ -5744,7 +5947,7 @@ Jan Sjodin <jan.sjodin@amd.com> PR tree-optimization/38559 - * testsuite/gcc.dg/graphite/pr38559.c: New. + * gcc.dg/graphite/pr38559.c: New. 2009-01-08 Ira Rosen <irar@il.ibm.com> @@ -5806,15 +6009,14 @@ PR tree-optimization/38492 PR tree-optimization/38498 - * testsuite/gcc.dg/graphite/pr38500.c: Fixed warning as committed + * gcc.dg/graphite/pr38500.c: Fixed warning as committed in trunk. - * testsuite/gcc.dg/graphite/block-0.c: Update test. - * testsuite/gcc.dg/graphite/block-1.c: Same. - * testsuite/gcc.dg/graphite/block-2.c: Remove xfail and test - for blocking. - * testsuite/gcc.dg/graphite/block-4.c: Remove test for strip mine. - * testsuite/gcc.dg/graphite/block-3.c: New. - * testsuite/gcc.dg/graphite/pr38498.c: New. + * gcc.dg/graphite/block-0.c: Update test. + * gcc.dg/graphite/block-1.c: Same. + * gcc.dg/graphite/block-2.c: Remove xfail and test for blocking. + * gcc.dg/graphite/block-4.c: Remove test for strip mine. + * gcc.dg/graphite/block-3.c: New. + * gcc.dg/graphite/pr38498.c: New. 2009-01-07 H.J. Lu <hongjiu.lu@intel.com> diff --git a/gcc/testsuite/g++.dg/compat/compat.exp b/gcc/testsuite/g++.dg/compat/compat.exp index 7fb16fed959..0ca91bfb059 100644 --- a/gcc/testsuite/g++.dg/compat/compat.exp +++ b/gcc/testsuite/g++.dg/compat/compat.exp @@ -103,14 +103,14 @@ set sid "cp_compat" # are different. set use_alt 0 set same_alt 0 -set alt_ld_library_path "." +set alt_ld_library_path "" if [info exists ALT_CXX_UNDER_TEST] then { set use_alt 1 if [string match "same" $ALT_CXX_UNDER_TEST] then { set same_alt 1 } else { if [info exists ALT_LD_LIBRARY_PATH] then { - append alt_ld_library_path ":${ALT_LD_LIBRARY_PATH}" + set alt_ld_library_path $ALT_LD_LIBRARY_PATH } } } diff --git a/gcc/testsuite/g++.dg/compat/struct-layout-1.exp b/gcc/testsuite/g++.dg/compat/struct-layout-1.exp index 7fa89470e16..f8c26512710 100644 --- a/gcc/testsuite/g++.dg/compat/struct-layout-1.exp +++ b/gcc/testsuite/g++.dg/compat/struct-layout-1.exp @@ -109,14 +109,14 @@ set sid "cp_compat" # are different. set use_alt 0 set same_alt 0 -set alt_ld_library_path "." +set alt_ld_library_path "" if [info exists ALT_CXX_UNDER_TEST] then { set use_alt 1 if [string match "same" $ALT_CXX_UNDER_TEST] then { set same_alt 1 } else { if [info exists ALT_LD_LIBRARY_PATH] then { - append alt_ld_library_path ":${ALT_LD_LIBRARY_PATH}" + set alt_ld_library_path $ALT_LD_LIBRARY_PATH } } } diff --git a/gcc/testsuite/g++.dg/cpp0x/auto16.C b/gcc/testsuite/g++.dg/cpp0x/auto16.C new file mode 100644 index 00000000000..1b4ae8f82b2 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/auto16.C @@ -0,0 +1,7 @@ +// PR c++/40619 +// { dg-options "-std=c++0x" } + +template<typename U> struct X {}; + +template<typename T> auto f(T t) -> X<decltype(t+1)> {} +template<typename T> auto g(T t) -> X<decltype(t+1)> {} diff --git a/gcc/testsuite/g++.dg/cpp0x/variadic94.C b/gcc/testsuite/g++.dg/cpp0x/variadic94.C new file mode 100644 index 00000000000..8420f73a6a6 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/variadic94.C @@ -0,0 +1,33 @@ +// PR c++/40595 +// { dg-options "-std=c++0x" } + +template<int N> +struct S +{ + typedef int type; +}; + +template<typename T> +struct Get +{ + static T get(); +}; + +template<typename F> +struct B +{ + template<typename ... Args> + typename S<sizeof( Get<F>::get() (Get<Args>::get() ...) )>::type + f(Args&& ... a); +}; + +struct X +{ + bool operator()(int) const; +}; + +int main() +{ + B<X> b; + b.f(1); +} diff --git a/gcc/testsuite/g++.dg/parse/cond5.C b/gcc/testsuite/g++.dg/parse/cond5.C new file mode 100644 index 00000000000..7ed9fbe892e --- /dev/null +++ b/gcc/testsuite/g++.dg/parse/cond5.C @@ -0,0 +1,10 @@ +// PR c++/40566 + +void +f (int x, int y) +{ + int c = x ? 23 : throw "bla"; + short d = y ? throw "bla" : 23; + char e = x ? 23 : throw "bla"; + long f = x ? 23 : throw "bla"; +} diff --git a/gcc/testsuite/g++.dg/template/debug1.C b/gcc/testsuite/g++.dg/template/debug1.C new file mode 100644 index 00000000000..a2c1577029b --- /dev/null +++ b/gcc/testsuite/g++.dg/template/debug1.C @@ -0,0 +1,18 @@ +// PR c++/40274 +// { dg-options "-g" } + +template <class T> struct valuelist_types +{ + struct null { }; + template <T V, class next=null> struct list { }; +}; + +template <unsigned D> void foo() +{ + typename valuelist_types<unsigned>::template list<D> v; +} + +void bar() +{ + valuelist_types<unsigned>::list<2> v; +} diff --git a/gcc/testsuite/g++.dg/template/pure1.C b/gcc/testsuite/g++.dg/template/pure1.C index ca9b94e00b7..68dbe6bf0f5 100644 --- a/gcc/testsuite/g++.dg/template/pure1.C +++ b/gcc/testsuite/g++.dg/template/pure1.C @@ -2,5 +2,5 @@ struct A { - template<int> void foo() = 1; // { dg-error "pure" } + template<int> void foo() = 1; // { dg-error "pure|non-virtual" } }; diff --git a/gcc/testsuite/g++.dg/template/spec8.C b/gcc/testsuite/g++.dg/template/spec8.C index 26d207b8131..ccbf17c2f76 100644 --- a/gcc/testsuite/g++.dg/template/spec8.C +++ b/gcc/testsuite/g++.dg/template/spec8.C @@ -5,7 +5,12 @@ template<class T1> struct A { template<class T2> struct B {}; + template<class T2> struct C {}; }; -template <> template <> struct A<int>::B<int> {}; -template <> template <class U> struct A<int>::B {}; // { dg-error "specialization" } +template <> template <> struct A<int>::B<int>; +template <> template <class U> struct A<int>::B {}; +A<int>::B<int> ab; // { dg-error "incomplete" } + +A<int>::C<char> ac; +template <> template <class U> struct A<int>::C {}; // { dg-error "specialization" } diff --git a/gcc/testsuite/g++.dg/template/using15.C b/gcc/testsuite/g++.dg/template/using15.C new file mode 100644 index 00000000000..b158ac09cf6 --- /dev/null +++ b/gcc/testsuite/g++.dg/template/using15.C @@ -0,0 +1,25 @@ +// Reduced from the testcase for c++/29433 + +template <class T> +struct A: T +{ + void f(typename T::type); + using T::f; + void g() { f(1); } +}; + +template <class T> +struct B: T +{ typedef int type; }; + +struct C +{ + typedef double type; + void f(); +}; + +int main() +{ + A<B<A<C> > > a; + a.g(); +} diff --git a/gcc/testsuite/g++.dg/warn/null4.C b/gcc/testsuite/g++.dg/warn/null4.C index 785f2790488..6aa4a097fad 100644 --- a/gcc/testsuite/g++.dg/warn/null4.C +++ b/gcc/testsuite/g++.dg/warn/null4.C @@ -11,9 +11,22 @@ int foo (void) if (NULL < NULL) return -1; // { dg-warning "NULL used in arithmetic" } if (NULL >= 0) return -1; // { dg-warning "NULL used in arithmetic" } if (NULL <= 0) return -1; // { dg-warning "NULL used in arithmetic" } + // Adding to the NULL pointer, which has no specific type, should + // result in a warning; the type of the resulting expression is + // actually "int", not a pointer type. + if (NULL + 1) return -1; // { dg-warning "NULL used in arithmetic" } + if (1 + NULL) return -1; // { dg-warning "NULL used in arithmetic" } return 0; } +int *ip; + +struct S {}; +typedef int S::*SPD; +typedef void (S::*SPF)(void); +SPD spd; +SPF spf; + int bar (void) { if (NULL) return -1; @@ -25,5 +38,18 @@ int bar (void) if (NULL != NULL) return -1; if (NULL == 0) return -1; if (NULL != 0) return -1; + // Subtraction of pointers is vaild, so using NULL is OK. + if (ip - NULL) return -1; + if (NULL - NULL) return -1; + // Comparing NULL with a pointer-to-member is OK. + if (NULL == spd) return -1; + if (spd == NULL) return -1; + if (NULL != spd) return -1; + if (spd != NULL) return -1; + if (NULL == spf) return -1; + if (spf == NULL) return -1; + if (NULL != spf) return -1; + if (spf != NULL) return -1; + return 0; } diff --git a/gcc/testsuite/gcc.c-torture/compile/pr40582.c b/gcc/testsuite/gcc.c-torture/compile/pr40582.c new file mode 100644 index 00000000000..51234da40f2 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr40582.c @@ -0,0 +1,18 @@ +struct A +{ + void* q; + short i; +}; + +union U +{ + char* p; + struct A a; +}; + +struct A foo(union U u) +{ + struct A a = { 0, 0 }; + a = u.a; + return a; +} diff --git a/gcc/testsuite/gcc.c-torture/compile/pr40640.c b/gcc/testsuite/gcc.c-torture/compile/pr40640.c new file mode 100644 index 00000000000..7dae7ca8190 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr40640.c @@ -0,0 +1,15 @@ +void decode_opic_address(int *); +void sim_io_printf_filtered2 (int, unsigned); +void +hw_opic_io_read_buffer(int index) +{ + unsigned reg = 0; + decode_opic_address(&index); + switch (index) + { + case 0: + reg = 1; + } + sim_io_printf_filtered2 (index, reg); +} + diff --git a/gcc/testsuite/gcc.dg/framework-2.c b/gcc/testsuite/gcc.dg/framework-2.c index 0bc0b294e20..2d866992872 100644 --- a/gcc/testsuite/gcc.dg/framework-2.c +++ b/gcc/testsuite/gcc.dg/framework-2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target *-*-darwin* } } */ /* { dg-options "-F$srcdir/gcc.dg" } */ -#include <Foundation/Foundation.h> /* { dg-error "Foundation/Foundation.h" } */ +#include <Foundation/Foundation.h> /* { dg-message "terminated" "" { target *-*-* } 0 } */ - +/* { dg-message "Foundation/Foundation.h" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.dg/plugin/plugin.exp b/gcc/testsuite/gcc.dg/plugin/plugin.exp index be6d7ab1243..3122fa8dc3e 100644 --- a/gcc/testsuite/gcc.dg/plugin/plugin.exp +++ b/gcc/testsuite/gcc.dg/plugin/plugin.exp @@ -50,6 +50,7 @@ set plugin_test_list [list \ { selfassign.c self-assign-test-1.c self-assign-test-2.c } \ { ggcplug.c ggcplug-test-1.c } \ { one_time_plugin.c one_time-test-1.c } \ + { start_unit_plugin.c start_unit-test-1.c } \ ] foreach plugin_test $plugin_test_list { diff --git a/gcc/testsuite/gcc.dg/plugin/start_unit-test-1.c b/gcc/testsuite/gcc.dg/plugin/start_unit-test-1.c new file mode 100644 index 00000000000..4cd8a40f441 --- /dev/null +++ b/gcc/testsuite/gcc.dg/plugin/start_unit-test-1.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O" } */ + +int main (int argc, char **argv) +{ + return 0; +} diff --git a/gcc/testsuite/gcc.dg/plugin/start_unit_plugin.c b/gcc/testsuite/gcc.dg/plugin/start_unit_plugin.c new file mode 100644 index 00000000000..5b16e84a432 --- /dev/null +++ b/gcc/testsuite/gcc.dg/plugin/start_unit_plugin.c @@ -0,0 +1,66 @@ +/* This plugin tests the correct operation of a PLUGIN_START_UNIT callback. + * By the time a PLUGIN_START_UNIT callback is invoked, the frontend + * initialization should have completed. At least the different *_type_nodes + * should have been created. This plugin creates an artifical global + * interger variable. + * +*/ +#include "gcc-plugin.h" +#include "config.h" +#include "system.h" +#include "coretypes.h" +#include "tm.h" +#include "toplev.h" +#include "basic-block.h" +#include "gimple.h" +#include "tree.h" +#include "tree-pass.h" +#include "intl.h" + +int plugin_is_GPL_compatible; +static tree fake_var = NULL; + +static bool +gate_start_unit (void) +{ + return true; +} + +static void start_unit_callback (void *gcc_data, void *user_data) +{ + if (integer_type_node) { + fake_var = build_decl (UNKNOWN_LOCATION, VAR_DECL, + get_identifier ("_fake_var_"), + integer_type_node); + TREE_PUBLIC (fake_var) = 1; + DECL_ARTIFICIAL (fake_var) = 1; + } +} + +static void finish_unit_callback (void *gcc_data, void *user_data) +{ + if (fake_var == NULL) { + printf ("fake_var not created \n"); + return; + } + if (TREE_CODE (fake_var) != VAR_DECL) { + printf ("fake_var not a VAR_DECL \n"); + return; + } + if (TREE_CODE (TREE_TYPE (fake_var)) != INTEGER_TYPE) { + printf ("fake_var not INTEGER_TYPE \n"); + return; + } + if (DECL_ARTIFICIAL (fake_var) == 0) { + printf ("fake_var not ARTIFICIAL \n"); + return; + } +} + +int plugin_init (struct plugin_name_args *plugin_info, + struct plugin_gcc_version *version) +{ + register_callback ("start_unit", PLUGIN_START_UNIT, &start_unit_callback, NULL); + register_callback ("finish_unit", PLUGIN_FINISH_UNIT, &finish_unit_callback, NULL); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/20041122-1.c b/gcc/testsuite/gcc.dg/tree-ssa/20041122-1.c index d72d133e154..6007949546e 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/20041122-1.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/20041122-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -fdump-tree-dom2" } */ - +/* { dg-options "-O1 -fstrict-aliasing -fdump-tree-fre" } */ __extension__ typedef __SIZE_TYPE__ size_t; extern void *xmalloc (size_t) __attribute__ ((__malloc__)); @@ -17,10 +16,10 @@ struct basic_block_def typedef struct basic_block_def *basic_block; extern int n_basic_blocks; extern edge frob (); -void -find_unreachable_blocks (int frobit) +basic_block * +find_unreachable_blocks (void) { - basic_block *tos, *worklist, bb; + basic_block *tos, *worklist; tos = worklist = xmalloc (sizeof (basic_block) * n_basic_blocks); edge e = frob(); if (!(e->dest->flags & 4)) @@ -28,11 +27,12 @@ find_unreachable_blocks (int frobit) e->dest->flags |= 4; *tos++ = e->dest; } + return worklist; } /* If the aliasing code does its job properly, then we should be able to determine that modifying e->dest->flags does not - modify e or e->dest. The net result is that we only need one - load of e->dest. */ -/* { dg-final { scan-tree-dump-times "->dest" 1 "dom2" { xfail *-*-* } } } */ -/* { dg-final { cleanup-tree-dump "dom2" } } */ + modify e or e->dest if we can assert strict-aliasing rules. + The net result is that we only need one load of e->dest. */ +/* { dg-final { scan-tree-dump-times "->dest" 1 "fre" } } */ +/* { dg-final { cleanup-tree-dump "fre" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c index e7cb925e832..ee7cf02c649 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c @@ -47,9 +47,11 @@ int main_1 (int n, int *p) return 0; } -int main (int n) +static volatile int n = 1; + +int main (void) { - return main_1 (n + 2, &n); + return main_1 (n + 2, (int *) &n); } /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c index 77623919ef1..33814da2a7e 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c @@ -9,7 +9,7 @@ /* unaligned store. */ -int main (int off) +int main_1 (int off) { int i; char ia[N+OFF]; @@ -29,6 +29,13 @@ int main (int off) return 0; } +static volatile int off = 1; + +int main (void) +{ + return main_1 (off); +} + /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/local-pure-const.c b/gcc/testsuite/gcc.dg/tree-ssa/local-pure-const.c new file mode 100644 index 00000000000..2c7353dbdbc --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/local-pure-const.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O1 -fdump-tree-local-pure-const1" } */ +t(int a, int b, int c) +{ + int *p; + if (a) + p = &a; + else + p = &c; + return *p; +} +/* { dg-final { scan-tree-dump-times "local memory is OK" 1 "local-pure-const1"} } */ +/* { dg-final { scan-tree-dump-times "found to be const" 1 "local-pure-const1"} } */ +/* { dg-final { cleanup-tree-dump "local-pure-const1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-10.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-10.c index 03c2ddd515d..c8d118e3771 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-10.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -fdump-tree-optimized" } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ /* { dg-require-effective-target int32plus } */ int bar (void); diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-24.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-24.c index dfad30dcd3d..5632b067990 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-24.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-24.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O -fstrict-overflow -fdump-tree-empty" } */ +/* { dg-options "-O2 -fstrict-overflow -fdump-tree-optimized" } */ void foo(int a, int b) { for(;a!=b;a+=4); } @@ -13,5 +13,5 @@ void foo3(int*a, int* b) void foo4(int*a, int*b) { for(;a!=b;a++); } -/* { dg-final { scan-tree-dump-times "Removing empty loop" 4 "empty" } } */ -/* { dg-final { cleanup-tree-dump "empty" } } */ +/* { dg-final { scan-tree-dump-not "if" "optimized" } } */ +/* { dg-final { cleanup-tree-dump "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-25.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-25.c index 75580c1f725..479ed81d970 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-25.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-25.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fdump-tree-profile" } */ +/* { dg-options "-O1 -fdump-tree-profile" } */ int foo(void); void bla(void); diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-26.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-26.c index 5ebb3b1e1f7..f8bc8e010ae 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-26.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-26.c @@ -2,7 +2,7 @@ determine number of iterations of the following loops unconditionally. */ /* { dg-do compile } */ -/* { dg-options "-O -fstrict-overflow -fdump-tree-empty" } */ +/* { dg-options "-O2 -fstrict-overflow -fdump-tree-optimized-blocks" } */ unsigned foo(unsigned int n) { @@ -25,5 +25,5 @@ int foo0(int i0, int i1) return j; } -/* { dg-final { scan-tree-dump-times "Removing empty loop" 2 "empty" } } */ -/* { dg-final { cleanup-tree-dump "empty" } } */ +/* { dg-final { scan-tree-dump-times "if" 2 "optimized" } } */ +/* { dg-final { cleanup-tree-dump "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-29.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-29.c index 13699aafd62..c900dbf9bfb 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-29.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-29.c @@ -1,7 +1,7 @@ /* PR 31885 */ /* { dg-do compile } */ -/* { dg-options "-O1 -fdump-tree-empty" } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ struct s { int *blah; @@ -17,5 +17,5 @@ foo (struct s *p) p++; } -/* { dg-final { scan-tree-dump-times "Removing empty loop" 1 "empty" } } */ -/* { dg-final { cleanup-tree-dump "empty" } } */ +/* { dg-final { scan-tree-dump-not "if" "optimized" } } */ +/* { dg-final { cleanup-tree-dump "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr32044.c b/gcc/testsuite/gcc.dg/tree-ssa/pr32044.c index 940a0362943..58a62662b4f 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr32044.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr32044.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fdump-tree-empty -fdump-tree-optimized" } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ int foo (int n) { @@ -43,13 +43,12 @@ int baz (int n) return i; } -/* The loops computing division/modulo by 64 should be eliminated. */ -/* { dg-final { scan-tree-dump-times "Removing empty loop" 2 "empty" } } */ +/* The loops computing division/modulo by 64 should be eliminated */ +/* { dg-final { scan-tree-dump-times "if" 6 "optimized" } } */ /* There should be no division/modulo in the final dump (division and modulo by 64 are done using bit operations). */ /* { dg-final { scan-tree-dump-times "/" 0 "optimized" } } */ /* { dg-final { scan-tree-dump-times "%" 0 "optimized" } } */ -/* { dg-final { cleanup-tree-dump "empty" } } */ /* { dg-final { cleanup-tree-dump "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-6.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-6.c new file mode 100644 index 00000000000..30a06a10256 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-6.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O -fdump-tree-cddce1" } */ + +struct object { int field; }; +void o(struct object *); +int globl; +void t(int x) +{ + struct object a, b; + struct object *p; + o(&a); + if (x) + p = &a; + else + p = &b; + p->field = 1; + globl = 0; + return; +} + +/* The global store should not prevent deleting the store to p->field. */ + +/* { dg-final { scan-tree-dump-not "p_.->field" "cddce1" } } */ +/* { dg-final { cleanup-tree-dump "cddce1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-7.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-7.c new file mode 100644 index 00000000000..792dfb028af --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-7.c @@ -0,0 +1,33 @@ +/* { dg-do link } */ +/* { dg-options "-O -fdump-tree-optimized" } */ + +extern void link_error (void); +void foo(int n) +{ + int * f = (int*) __builtin_malloc (n * sizeof (int)); + int * ff = (int*) __builtin_malloc (n * sizeof (int)); + int i; + + for (i = 0; i < n; ++i) + { + f[i] = 1; + ff[i] = 2; + if (f[i] != 1) + link_error (); + if (ff[i] != 2) + link_error (); + } + + __builtin_free (f); + __builtin_free (ff); +} +int main() +{ + return 0; +} + +/* We should have removed the calls to link_error () and all stores + to the allocated memory. */ + +/* { dg-final { scan-tree-dump-times "\\\*D" 0 "optimized" } } */ +/* { dg-final { cleanup-tree-dump "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-5.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-5.c new file mode 100644 index 00000000000..f51d485d418 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-5.c @@ -0,0 +1,48 @@ +/* { dg-do compile } */ +/* { dg-options "-Os -fdump-tree-sink-stats" } */ + +typedef short int16_t; +typedef unsigned char uint8_t; + +void foo(int16_t runs[], uint8_t alpha[], int x, int count) +{ + int16_t* next_runs = runs + x; + uint8_t* next_alpha = alpha + x; + + while (x > 0) + { + int n = runs[0]; + + if (x < n) + { + alpha[x] = alpha[0]; + runs[0] = (int16_t)(x); + runs[x] = (int16_t)(n - x); + break; + } + runs += n; + alpha += n; + x -= n; + } + + runs = next_runs; + alpha = next_alpha; + x = count; + + for (;;) + { + int n = runs[0]; + + if (x < n) + { + alpha[x] = alpha[0]; + break; + } + x -= n; + runs += n; + } +} + +/* We should not sink the next_runs = runs + x calculation after the loop. */ +/* { dg-final { scan-tree-dump-times "Sunk statements:" 0 "sink" } } */ +/* { dg-final { cleanup-tree-dump "sink" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr21591.c b/gcc/testsuite/gcc.dg/vect/pr21591.c index 8c3bef42a55..425777738c2 100644 --- a/gcc/testsuite/gcc.dg/vect/pr21591.c +++ b/gcc/testsuite/gcc.dg/vect/pr21591.c @@ -10,6 +10,8 @@ struct a struct a *malloc1(__SIZE_TYPE__) __attribute__((malloc)); void free(void*); +struct a *p, *q, *r; + void f(void) { struct a *a = malloc1(sizeof(struct a)); @@ -26,9 +28,9 @@ void f(void) { a->a1[i] = b->a1[i] + c->a1[i]; } - free(a); - free(b); - free(c); + p = a; + q = b; + r = c; } /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr31699.c b/gcc/testsuite/gcc.dg/vect/pr31699.c index 4f9cf581b58..6015d5cd4e5 100644 --- a/gcc/testsuite/gcc.dg/vect/pr31699.c +++ b/gcc/testsuite/gcc.dg/vect/pr31699.c @@ -7,13 +7,15 @@ float x[256]; __attribute__ ((noinline)) -void foo(void) +double *foo(void) { double *z = malloc (sizeof(double) * 256); int i; for (i=0; i<256; ++i) z[i] = x[i] + 1.0f; + + return z; } diff --git a/gcc/testsuite/gcc.dg/vect/pr40542.c b/gcc/testsuite/gcc.dg/vect/pr40542.c new file mode 100644 index 00000000000..0a827724dc8 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr40542.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ + +void +volarr_cpy(char *d, volatile char *s) +{ + int i; + + for (i = 0; i < 16; i++) + d[i] = s[i]; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ + diff --git a/gcc/testsuite/gcc.target/mips/truncate-4.c b/gcc/testsuite/gcc.target/mips/truncate-4.c new file mode 100644 index 00000000000..2958be8de1e --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/truncate-4.c @@ -0,0 +1,10 @@ +/* The and is performed in DI mode so there is no need for truncation. */ +/* { dg-options "-O -mgp64" } */ +/* { dg-final { scan-assembler-not "\tsll\t" } } */ + +unsigned long long +f (unsigned long long s) +{ + unsigned u = s & 0xfff; + return u; +} diff --git a/gcc/testsuite/gfortran.dg/derived_pointer_recursion_2.f90 b/gcc/testsuite/gfortran.dg/derived_pointer_recursion_2.f90 new file mode 100644 index 00000000000..f6bda4d0531 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/derived_pointer_recursion_2.f90 @@ -0,0 +1,48 @@ +! { dg-do run } +! +! PR 40594: [4.5 Regression] wrong-code +! +! Original test case by Daniel Franke <dfranke@gcc.gnu.org> +! Modified by Janus Weil <janus@gcc.gnu.org> + +MODULE atom_types + +TYPE :: atom_list + TYPE(atom_private), DIMENSION(:), pointer :: table +END TYPE + +TYPE :: atom_private + TYPE(atom_list) :: neighbours + LOGICAL :: initialized = .true. +END TYPE + +TYPE :: atom_model + TYPE(atom_list) :: atoms + integer :: dummy +END TYPE + +contains + + SUBROUTINE init(this) + TYPE(atom_private) :: this + this%initialized = .FALSE. + END SUBROUTINE + +END MODULE + + +program pr40594 + + USE atom_types + TYPE(atom_model) :: am + type(atom_private) :: ap + + am%dummy = 0 + + call init(ap) + if (ap%initialized .neqv. .false.) call abort() + +END + +! { dg-final { cleanup-modules "atom_types" } } + diff --git a/gcc/testsuite/gfortran.dg/func_assign_2.f90 b/gcc/testsuite/gfortran.dg/func_assign_2.f90 new file mode 100644 index 00000000000..e308375ef9d --- /dev/null +++ b/gcc/testsuite/gfortran.dg/func_assign_2.f90 @@ -0,0 +1,33 @@ +! { dg-do run } +! Test the fix for PR40551 in which the assignment +! was not dealing correctly with non-contiguous lhs +! references; eg. a(1,:) +! +! Reported by by Maciej Zwierzycki +! at http://gcc.gnu.org/ml/fortran/2009-06/msg00254.html +! and by Tobias Burnus <burnus@gcc.gnu.org> on Bugzilla +! +integer :: a(2,2) +a = -42 +a(1,:) = func() +if (any (reshape (a, [4]) /= [1, -42, 2, -42])) call abort +a = -42 +a(2,:) = func() +if (any (reshape (a, [4]) /= [-42, 1, -42, 2])) call abort +a = -42 +a(:,1) = func() +if (any (reshape (a, [4]) /= [1, 2, -42, -42])) call abort +a = -42 +a(:,2) = func() +if (any (reshape (a, [4]) /= [-42, -42, 1, 2])) call abort +contains + function func() + integer :: func(2) + call sub(func) + end function func + subroutine sub(a) + integer :: a(2) + a = [1,2] + end subroutine +end + diff --git a/gcc/testsuite/gfortran.dg/func_assign_3.f90 b/gcc/testsuite/gfortran.dg/func_assign_3.f90 new file mode 100644 index 00000000000..174cbc57a79 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/func_assign_3.f90 @@ -0,0 +1,32 @@ +! { dg-do run } +! Tests the fix for PR40646 in which the assignment would cause an ICE. +! +! Contributed by Charlie Sharpsteen <chuck@sharpsteen.net> +! http://gcc.gnu.org/ml/fortran/2009-07/msg00010.html +! and reported by Tobias Burnus <burnus@gcc,gnu.org> +! +module bugTestMod + implicit none + type:: boundTest + contains + procedure, nopass:: test => returnMat + end type boundTest +contains + function returnMat( a, b ) result( mat ) + integer:: a, b, i + double precision, dimension(a,b):: mat + mat = dble (reshape ([(i, i = 1, a * b)],[a,b])) + return + end function returnMat +end module bugTestMod + +program bugTest + use bugTestMod + implicit none + integer i + double precision, dimension(2,2):: testCatch + type( boundTest ):: testObj + testCatch = testObj%test(2,2) ! This would cause an ICE + if (any (testCatch .ne. dble (reshape ([(i, i = 1, 4)],[2,2])))) call abort +end program bugTest +! { dg-final { cleanup-modules "bugTestMod" } } diff --git a/gcc/testsuite/gfortran.dg/internal_write_1.f90 b/gcc/testsuite/gfortran.dg/internal_write_1.f90 new file mode 100644 index 00000000000..3dfcaad2677 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/internal_write_1.f90 @@ -0,0 +1,9 @@ +! { dg-do run } +! { dg-shouldfail "End of file" } +program main + character(len=20) :: line + integer, dimension(4) :: n + n = 1 + write(line,'(2I2)') n +end program main +! { dg-output "Fortran runtime error: End of file" } diff --git a/gcc/testsuite/gfortran.dg/maxloc_1.f90 b/gcc/testsuite/gfortran.dg/maxloc_1.f90 new file mode 100644 index 00000000000..41115eda981 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/maxloc_1.f90 @@ -0,0 +1,14 @@ +! { dg-do run } + integer :: a(3), n + a(1) = -huge(n) + a(2) = -huge(n) + a(3) = -huge(n) + a(1) = a(1) - 1 + a(2) = a(2) - 1 + a(3) = a(3) - 1 + n = maxloc (a, dim = 1) + if (n .ne. 1) call abort + a(2) = -huge(n) + n = maxloc (a, dim = 1) + if (n .ne. 2) call abort +end diff --git a/gcc/testsuite/gfortran.dg/pointer_check_1.f90 b/gcc/testsuite/gfortran.dg/pointer_check_1.f90 new file mode 100644 index 00000000000..6d43bf3029f --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pointer_check_1.f90 @@ -0,0 +1,86 @@ +! { dg-do run } +! { dg-options "-fcheck=pointer" } +! { dg-shouldfail "Unassociated/unallocated actual argument" } +! +! { dg-output ".*At line 53 .*Allocatable actual argument 'alloc2' is not allocated" } +! +! PR fortran/40580 +! +! Run-time check of passing deallocated/nonassociated actuals +! to nonallocatable/nonpointer dummies. +! +! Check for variable actuals +! + +subroutine test1(a) + integer :: a + a = 4444 +end subroutine test1 + +subroutine test2(a) + integer :: a(2) + a = 4444 +end subroutine test2 + +subroutine ppTest(f) + implicit none + external f + call f() +end subroutine ppTest + +Program RunTimeCheck + implicit none + external :: test1, test2, ppTest + integer, pointer :: ptr1, ptr2(:) + integer, allocatable :: alloc2(:) + procedure(), pointer :: pptr + + allocate(ptr1,ptr2(2),alloc2(2)) + pptr => sub + ! OK + call test1(ptr1) + call test3(ptr1) + + call test2(ptr2) + call test2(alloc2) + call test4(ptr2) + call test4(alloc2) + call ppTest(pptr) + call ppTest2(pptr) + + ! Invalid 1: + deallocate(alloc2) + call test2(alloc2) +! call test4(alloc2) + + ! Invalid 2: + deallocate(ptr1,ptr2) + nullify(ptr1,ptr2) +! call test1(ptr1) +! call test3(ptr1) +! call test2(ptr2) +! call test4(ptr2) + + ! Invalid 3: + nullify(pptr) +! call ppTest(pptr) + call ppTest2(pptr) + +contains + subroutine test3(b) + integer :: b + b = 333 + end subroutine test3 + subroutine test4(b) + integer :: b(2) + b = 333 + end subroutine test4 + subroutine sub() + print *, 'Hello World' + end subroutine sub + subroutine ppTest2(f) + implicit none + procedure(sub) :: f + call f() + end subroutine ppTest2 +end Program RunTimeCheck diff --git a/gcc/testsuite/gfortran.dg/pointer_check_2.f90 b/gcc/testsuite/gfortran.dg/pointer_check_2.f90 new file mode 100644 index 00000000000..2359b4ae8d2 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pointer_check_2.f90 @@ -0,0 +1,86 @@ +! { dg-do run } +! { dg-options "-fcheck=pointer" } +! { dg-shouldfail "Unassociated/unallocated actual argument" } +! +! { dg-output ".*At line 60.*Pointer actual argument 'ptr1' is not associated" } +! +! PR fortran/40580 +! +! Run-time check of passing deallocated/nonassociated actuals +! to nonallocatable/nonpointer dummies. +! +! Check for variable actuals +! + +subroutine test1(a) + integer :: a + a = 4444 +end subroutine test1 + +subroutine test2(a) + integer :: a(2) + a = 4444 +end subroutine test2 + +subroutine ppTest(f) + implicit none + external f + call f() +end subroutine ppTest + +Program RunTimeCheck + implicit none + external :: test1, test2, ppTest + integer, pointer :: ptr1, ptr2(:) + integer, allocatable :: alloc2(:) + procedure(), pointer :: pptr + + allocate(ptr1,ptr2(2),alloc2(2)) + pptr => sub + ! OK + call test1(ptr1) + call test3(ptr1) + + call test2(ptr2) + call test2(alloc2) + call test4(ptr2) + call test4(alloc2) + call ppTest(pptr) + call ppTest2(pptr) + + ! Invalid 1: + deallocate(alloc2) +! call test2(alloc2) +! call test4(alloc2) + + ! Invalid 2: + deallocate(ptr1,ptr2) + nullify(ptr1,ptr2) +! call test1(ptr1) + call test3(ptr1) +! call test2(ptr2) +! call test4(ptr2) + + ! Invalid 3: + nullify(pptr) +! call ppTest(pptr) + call ppTest2(pptr) + +contains + subroutine test3(b) + integer :: b + b = 333 + end subroutine test3 + subroutine test4(b) + integer :: b(2) + b = 333 + end subroutine test4 + subroutine sub() + print *, 'Hello World' + end subroutine sub + subroutine ppTest2(f) + implicit none + procedure(sub) :: f + call f() + end subroutine ppTest2 +end Program RunTimeCheck diff --git a/gcc/testsuite/gfortran.dg/pointer_check_3.f90 b/gcc/testsuite/gfortran.dg/pointer_check_3.f90 new file mode 100644 index 00000000000..23596e44e4b --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pointer_check_3.f90 @@ -0,0 +1,86 @@ +! { dg-do run } +! { dg-options "-fcheck=pointer" } +! { dg-shouldfail "Unassociated/unallocated actual argument" } +! +! { dg-output ".*At line 61.*Pointer actual argument 'ptr2' is not associated" } +! +! PR fortran/40580 +! +! Run-time check of passing deallocated/nonassociated actuals +! to nonallocatable/nonpointer dummies. +! +! Check for variable actuals +! + +subroutine test1(a) + integer :: a + a = 4444 +end subroutine test1 + +subroutine test2(a) + integer :: a(2) + a = 4444 +end subroutine test2 + +subroutine ppTest(f) + implicit none + external f + call f() +end subroutine ppTest + +Program RunTimeCheck + implicit none + external :: test1, test2, ppTest + integer, pointer :: ptr1, ptr2(:) + integer, allocatable :: alloc2(:) + procedure(), pointer :: pptr + + allocate(ptr1,ptr2(2),alloc2(2)) + pptr => sub + ! OK + call test1(ptr1) + call test3(ptr1) + + call test2(ptr2) + call test2(alloc2) + call test4(ptr2) + call test4(alloc2) + call ppTest(pptr) + call ppTest2(pptr) + + ! Invalid 1: + deallocate(alloc2) +! call test2(alloc2) +! call test4(alloc2) + + ! Invalid 2: + deallocate(ptr1,ptr2) + nullify(ptr1,ptr2) +! call test1(ptr1) +! call test3(ptr1) + call test2(ptr2) +! call test4(ptr2) + + ! Invalid 3: + nullify(pptr) +! call ppTest(pptr) + call ppTest2(pptr) + +contains + subroutine test3(b) + integer :: b + b = 333 + end subroutine test3 + subroutine test4(b) + integer :: b(2) + b = 333 + end subroutine test4 + subroutine sub() + print *, 'Hello World' + end subroutine sub + subroutine ppTest2(f) + implicit none + procedure(sub) :: f + call f() + end subroutine ppTest2 +end Program RunTimeCheck diff --git a/gcc/testsuite/gfortran.dg/pointer_check_4.f90 b/gcc/testsuite/gfortran.dg/pointer_check_4.f90 new file mode 100644 index 00000000000..97eb6fad51e --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pointer_check_4.f90 @@ -0,0 +1,86 @@ +! { dg-do run } +! { dg-options "-fcheck=pointer" } +! { dg-shouldfail "Unassociated/unallocated actual argument" } +! +! { dg-output ".*At line 66.*Proc-pointer actual argument 'pptr' is not associated" } +! +! PR fortran/40580 +! +! Run-time check of passing deallocated/nonassociated actuals +! to nonallocatable/nonpointer dummies. +! +! Check for variable actuals +! + +subroutine test1(a) + integer :: a + a = 4444 +end subroutine test1 + +subroutine test2(a) + integer :: a(2) + a = 4444 +end subroutine test2 + +subroutine ppTest(f) + implicit none + external f + call f() +end subroutine ppTest + +Program RunTimeCheck + implicit none + external :: test1, test2, ppTest + integer, pointer :: ptr1, ptr2(:) + integer, allocatable :: alloc2(:) + procedure(), pointer :: pptr + + allocate(ptr1,ptr2(2),alloc2(2)) + pptr => sub + ! OK + call test1(ptr1) + call test3(ptr1) + + call test2(ptr2) + call test2(alloc2) + call test4(ptr2) + call test4(alloc2) + call ppTest(pptr) + call ppTest2(pptr) + + ! Invalid 1: + deallocate(alloc2) +! call test2(alloc2) +! call test4(alloc2) + + ! Invalid 2: + deallocate(ptr1,ptr2) + nullify(ptr1,ptr2) +! call test1(ptr1) +! call test3(ptr1) +! call test2(ptr2) +! call test4(ptr2) + + ! Invalid 3: + nullify(pptr) + call ppTest(pptr) +! call ppTest2(pptr) + +contains + subroutine test3(b) + integer :: b + b = 333 + end subroutine test3 + subroutine test4(b) + integer :: b(2) + b = 333 + end subroutine test4 + subroutine sub() + print *, 'Hello World' + end subroutine sub + subroutine ppTest2(f) + implicit none + procedure(sub) :: f + call f() + end subroutine ppTest2 +end Program RunTimeCheck diff --git a/gcc/testsuite/gfortran.dg/pointer_check_5.f90 b/gcc/testsuite/gfortran.dg/pointer_check_5.f90 new file mode 100644 index 00000000000..440d9a879ac --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pointer_check_5.f90 @@ -0,0 +1,100 @@ +! { dg-do run } +! { dg-options "-fcheck=pointer" } +! { dg-shouldfail "Unassociated/unallocated actual argument" } +! +! { dg-output ".*At line 46 .*Pointer actual argument 'getptr' is not associated" } +! +! PR fortran/40580 +! +! Run-time check of passing deallocated/nonassociated actuals +! to nonallocatable/nonpointer dummies. +! +! Check for function actuals +! + +subroutine test1(a) + integer :: a + print *, a +end subroutine test1 + +subroutine test2(a) + integer :: a(2) + print *, a +end subroutine test2 + +subroutine ppTest(f) + implicit none + external f + call f() +end subroutine ppTest + +Program RunTimeCheck + implicit none + external :: test1, test2, ppTest + procedure(), pointer :: pptr + + ! OK + call test1(getPtr(.true.)) + call test2(getPtrArray(.true.)) + call test2(getAlloc(.true.)) + + ! OK but fails due to PR 40593 +! call ppTest(getProcPtr(.true.)) +! call ppTest2(getProcPtr(.true.)) + + ! Invalid: + call test1(getPtr(.false.)) +! call test2(getAlloc(.false.)) - fails because the check is inserted after +! _gfortran_internal_pack, which fails with out of memory +! call ppTest(getProcPtr(.false.)) - fails due to PR 40593 +! call ppTest2(getProcPtr(.false.)) - fails due to PR 40593 + +contains + function getPtr(alloc) + integer, pointer :: getPtr + logical, intent(in) :: alloc + if (alloc) then + allocate (getPtr) + getPtr = 1 + else + nullify (getPtr) + end if + end function getPtr + function getPtrArray(alloc) + integer, pointer :: getPtrArray(:) + logical, intent(in) :: alloc + if (alloc) then + allocate (getPtrArray(2)) + getPtrArray = 1 + else + nullify (getPtrArray) + end if + end function getPtrArray + function getAlloc(alloc) + integer, allocatable :: getAlloc(:) + logical, intent(in) :: alloc + if (alloc) then + allocate (getAlloc(2)) + getAlloc = 2 + else if (allocated(getAlloc)) then + deallocate(getAlloc) + end if + end function getAlloc + subroutine sub() + print *, 'Hello World' + end subroutine sub + function getProcPtr(alloc) + procedure(sub), pointer :: getProcPtr + logical, intent(in) :: alloc + if (alloc) then + getProcPtr => sub + else + nullify (getProcPtr) + end if + end function getProcPtr + subroutine ppTest2(f) + implicit none + procedure(sub) :: f + call f() + end subroutine ppTest2 +end Program RunTimeCheck diff --git a/gcc/testsuite/gfortran.dg/pr32921.f b/gcc/testsuite/gfortran.dg/pr32921.f index d11030125bf..c166dd76360 100644 --- a/gcc/testsuite/gfortran.dg/pr32921.f +++ b/gcc/testsuite/gfortran.dg/pr32921.f @@ -45,5 +45,5 @@ RETURN END -! { dg-final { scan-tree-dump-times "stride" 6 "lim" } } +! { dg-final { scan-tree-dump-times "stride" 4 "lim" } } ! { dg-final { cleanup-tree-dump "lim" } } diff --git a/gcc/testsuite/gfortran.dg/pr34163.f90 b/gcc/testsuite/gfortran.dg/pr34163.f90 new file mode 100644 index 00000000000..642617736b9 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pr34163.f90 @@ -0,0 +1,16 @@ +! { dg-do compile } +! { dg-options "-O2 -fpredictive-commoning -fdump-tree-pcom-details" } +subroutine trisolve2(x,i1,i2,nxyz) +integer :: nxyz +real,dimension(nxyz):: au1 +real,allocatable,dimension(:) :: gi +integer :: i1 , i2 +real,dimension(i2)::x +integer :: i +allocate(gi(nxyz)) +do i = i1+1 , i2 + x(i) = gi(i)*(x(i)-au1(i-1)*x(i-1)) +enddo +end subroutine trisolve2 +! { dg-final { scan-tree-dump "Executing predictive commoning" "pcom" } } +! { dg-final { cleanup-tree-dump "pcom" } } diff --git a/gcc/testsuite/gfortran.dg/pr40587.f b/gcc/testsuite/gfortran.dg/pr40587.f new file mode 100644 index 00000000000..0761d9d7e90 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pr40587.f @@ -0,0 +1,17 @@ +C PR traget/40587 +C { dg-do compile } +C { dg-options "-O2" } + subroutine TEST(i, r, result) + implicit none + integer i + REAL*8 r + REAL*8 result + REAL*8 r2 + if(i.eq.0) then + r2 = r + else + call ERROR() + endif + result = r2 + return + end diff --git a/gcc/testsuite/gfortran.dg/proc_ptr_result_6.f90 b/gcc/testsuite/gfortran.dg/proc_ptr_result_6.f90 new file mode 100644 index 00000000000..c9e1a8b067a --- /dev/null +++ b/gcc/testsuite/gfortran.dg/proc_ptr_result_6.f90 @@ -0,0 +1,51 @@ +! { dg-do run } +! +! PR 40593: Proc-pointer returning function as actual argument +! +! Original test case by Tobias Burnus <burnus@gcc.gnu.org> +! Modified by Janus Weil + +module m +contains + subroutine sub(a) + integer :: a + a = 42 + end subroutine + integer function func() + func = 42 + end function +end module m + +program test + use m + implicit none + call caller1(getPtr1()) + call caller2(getPtr2()) + call caller3(getPtr2()) +contains + subroutine caller1(s) + procedure(sub) :: s + integer :: b + call s(b) + if (b /= 42) call abort() + end subroutine + subroutine caller2(f) + procedure(integer) :: f + if (f() /= 42) call abort() + end subroutine + subroutine caller3(f) + procedure(func),pointer :: f + if (f() /= 42) call abort() + end subroutine + function getPtr1() + procedure(sub), pointer :: getPtr1 + getPtr1 => sub + end function + function getPtr2() + procedure(func), pointer :: getPtr2 + getPtr2 => func + end function +end program test + +! { dg-final { cleanup-modules "m" } } + diff --git a/gcc/testsuite/gfortran.dg/unit_1.f90 b/gcc/testsuite/gfortran.dg/unit_1.f90 new file mode 100644 index 00000000000..5233bc87019 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/unit_1.f90 @@ -0,0 +1,24 @@ +! { dg-do run } +! PR40638 Run Time Error: Unit number in I/O statement too large + program main + integer(kind=2) :: lun, anum + integer(kind=1) :: looney, bin + lun = 12 + anum = 5 + looney = 42 + bin = 23 + open (lun, status='scratch') + write(lun,*) anum + anum = 0 + rewind(lun) + read (lun, *) anum + if (anum.ne.5) call abort + open (looney, status='scratch') + write(looney,*)bin + bin = 0 + rewind (looney) + read (looney,*)bin + if (bin.ne.23) call abort + close (lun) + close (looney) + end diff --git a/gcc/testsuite/gnat.dg/discr12.adb b/gcc/testsuite/gnat.dg/discr12.adb new file mode 100644 index 00000000000..ae72850dd73 --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr12.adb @@ -0,0 +1,35 @@ +-- { dg-do compile } + +with Discr12_Pkg; use Discr12_Pkg; + +procedure Discr12 is + + subtype Small_Int is Integer range 1..10; + + package P is + + type PT_W_Disc (D : Small_Int) is private; + + type Rec_W_Private (D1 : Integer) is + record + C : PT_W_Disc (D1); + end record; + + type Rec_01 (D3 : Integer) is + record + C1 : Rec_W_Private (D3); + end record; + + type Arr is array (1 .. 5) of Rec_01(Dummy(0)); + + private + type PT_W_Disc (D : Small_Int) is + record + Str : String (1 .. D); + end record; + + end P; + +begin + Null; +end; diff --git a/gcc/testsuite/gnat.dg/discr12_pkg.ads b/gcc/testsuite/gnat.dg/discr12_pkg.ads new file mode 100644 index 00000000000..785146310bd --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr12_pkg.ads @@ -0,0 +1,5 @@ +package Discr12_Pkg is + + function Dummy (I : Integer) return Integer; + +end Discr12_Pkg; diff --git a/gcc/testsuite/gnat.dg/discr13.adb b/gcc/testsuite/gnat.dg/discr13.adb new file mode 100644 index 00000000000..3dcf2150c80 --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr13.adb @@ -0,0 +1,30 @@ +-- { dg-do compile } + +with Discr12_Pkg; use Discr12_Pkg; + +procedure Discr13 is + + function F1 return Integer is + begin + return Dummy (1); + end F1; + + protected type Poe (D3 : Integer := F1) is + entry E (D3 .. F1); -- F1 evaluated + function Is_Ok (D3 : Integer; E_First : Integer; E_Last : Integer) return Boolean; + end Poe; + + protected body Poe is + entry E (for I in D3 .. F1) when True is + begin + null; + end E; + function Is_Ok (D3 : Integer; E_First : Integer; E_Last : Integer) return Boolean is + begin + return False; + end Is_Ok; + end Poe; + +begin + null; +end; diff --git a/gcc/testsuite/gnat.dg/discr14.adb b/gcc/testsuite/gnat.dg/discr14.adb new file mode 100644 index 00000000000..490ec435829 --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr14.adb @@ -0,0 +1,11 @@ +-- { dg-do compile } + +package body Discr14 is + + procedure ASSIGN( TARGET : in out SW_TYPE_INFO ; + SOURCE : in SW_TYPE_INFO ) is + begin + TARGET := new T_SW_TYPE_DESCRIPTOR( SOURCE.SW_TYPE, SOURCE.DIMENSION ); + end ASSIGN; + +end Discr14; diff --git a/gcc/testsuite/gnat.dg/discr14.ads b/gcc/testsuite/gnat.dg/discr14.ads new file mode 100644 index 00000000000..a6b5a0a87c2 --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr14.ads @@ -0,0 +1,42 @@ +package Discr14 is + + type COMPLETION_CODE is (SUCCESS, FAILURE, NONE); + + type T_SW_TYPE is (NONE, COMPLETION_CODE_TYPE); + + type T_COMPLETION_CODE_RANGE (CONSTRAINED: BOOLEAN := FALSE) is + record + case CONSTRAINED is + when TRUE => + FIRST : COMPLETION_CODE := SUCCESS; + LAST : COMPLETION_CODE := FAILURE; + when FALSE => + null; + end case; + end record; + + type T_SW_DIMENSIONS is range 0 .. 3; + + type T_SW_INDEX_LIST is array (T_SW_DIMENSIONS range <>) of POSITIVE; + + type T_SW_TYPE_DESCRIPTOR (SW_TYPE : T_SW_TYPE := NONE; + DIMENSION : T_SW_DIMENSIONS := 0) is + record + BOUNDS : T_SW_INDEX_LIST (1 .. DIMENSION); + + case SW_TYPE is + + when COMPLETION_CODE_TYPE => + COMPLETION_CODE_RANGE : T_COMPLETION_CODE_RANGE; + + when OTHERS => + null; + + end case; + end record; + + type SW_TYPE_INFO is access T_SW_TYPE_DESCRIPTOR; + + procedure ASSIGN(TARGET : in out SW_TYPE_INFO; SOURCE : in SW_TYPE_INFO) ; + +end Discr14; diff --git a/gcc/testsuite/gnat.dg/discr15.adb b/gcc/testsuite/gnat.dg/discr15.adb new file mode 100644 index 00000000000..0030ac7d906 --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr15.adb @@ -0,0 +1,14 @@ +-- { dg-do compile } +-- { dg-options "-gnatws" } + +with Discr15_Pkg; use Discr15_Pkg; + +procedure Discr15 (History : in Rec_Multi_Moment_History) is + + Sub: constant Rec_Multi_Moment_History := Sub_History_Of (History); + subtype Vec is String(0..Sub.Last); + Mmts : array(1..Sub.Size) of Vec; + +begin + null; +end; diff --git a/gcc/testsuite/gnat.dg/discr15_pkg.ads b/gcc/testsuite/gnat.dg/discr15_pkg.ads new file mode 100644 index 00000000000..1f3bf286ba1 --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr15_pkg.ads @@ -0,0 +1,16 @@ +package Discr15_Pkg is + + type Moment is new Positive; + + type Multi_Moment_History is array (Natural range <>, Moment range <>) of Float; + + type Rec_Multi_Moment_History (Len : Natural; Size : Moment) is + record + Moments : Multi_Moment_History(0..Len, 1..Size); + Last : Natural; + end record; + + function Sub_History_Of (History : Rec_Multi_Moment_History) + return Rec_Multi_Moment_History; + +end Discr15_Pkg; diff --git a/gcc/testsuite/gnat.dg/discr16.adb b/gcc/testsuite/gnat.dg/discr16.adb new file mode 100644 index 00000000000..c4c24fd4d9c --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr16.adb @@ -0,0 +1,23 @@ +-- { dg-do compile } + +with Discr16_G; +with Discr16_Cont; use Discr16_Cont; + +procedure Discr16 is + + generic + type T is (<>); + function MAX_ADD_G(X : T; I : INTEGER) return T; + + function MAX_ADD_G(X : T; I : INTEGER) return T is + begin + return T'val(T'pos(X) + LONG_INTEGER(I)); + end; + + function MAX_ADD is new MAX_ADD_G(ES6A); + + package P is new Discr16_G(ES6A, MAX_ADD); + +begin + null; +end; diff --git a/gcc/testsuite/gnat.dg/discr16_cont.ads b/gcc/testsuite/gnat.dg/discr16_cont.ads new file mode 100644 index 00000000000..ea041cadfef --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr16_cont.ads @@ -0,0 +1,7 @@ +with Discr16_Pkg; use Discr16_Pkg; + +package Discr16_Cont is + + type ES6a is new ET3a range E2..E4; + +end; diff --git a/gcc/testsuite/gnat.dg/discr16_g.ads b/gcc/testsuite/gnat.dg/discr16_g.ads new file mode 100644 index 00000000000..f163f75d920 --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr16_g.ads @@ -0,0 +1,18 @@ +generic + + type T is (<>); + with function MAX_ADD(X : T; I : INTEGER) return T; + +package Discr16_G is + + LO : T := T'val(T'pos(T'first)); + HI : T := T'val(T'pos(MAX_ADD(LO, 15))); + + type A2 is array(T range <>) of T; + + type R2(D : T) is + record + C : A2(LO..D); + end record; + +end; diff --git a/gcc/testsuite/gnat.dg/discr16_pkg.ads b/gcc/testsuite/gnat.dg/discr16_pkg.ads new file mode 100644 index 00000000000..985785f660d --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr16_pkg.ads @@ -0,0 +1,7 @@ +package Discr16_Pkg is + + type ET3a is (E1, E2, E3, E4, E5); + for ET3a use (E1=> 32_001, E2=> 32_002, E3=> 32_003, + E4=> 32_004, E5=> 32_005); + +end; diff --git a/gcc/testsuite/gnat.dg/discr17.adb b/gcc/testsuite/gnat.dg/discr17.adb new file mode 100644 index 00000000000..d7b480c07d9 --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr17.adb @@ -0,0 +1,66 @@ +-- { dg-do compile } +-- { dg-options "-gnatws" } + +procedure Discr17 is + + F1_Poe : Integer := 18; + + function F1 return Integer is + begin + F1_Poe := F1_Poe - 1; + return F1_Poe; + end F1; + + generic + type T is limited private; + with function Is_Ok (X : T) return Boolean; + procedure Check; + + procedure Check is + begin + + declare + type Poe is new T; + X : Poe; + Y : Poe; + begin + null; + end; + + declare + type Poe is new T; + type Arr is array (1 .. 2) of Poe; + X : Arr; + B : Boolean := Is_Ok (T (X (1))); + begin + null; + end; + + end; + + protected type Poe (D3 : Integer := F1) is + entry E (D3 .. F1); -- F1 evaluated + function Is_Ok return Boolean; + end Poe; + + protected body Poe is + entry E (for I in D3 .. F1) when True is + begin + null; + end E; + function Is_Ok return Boolean is + begin + return False; + end Is_Ok; + end Poe; + + function Is_Ok (C : Poe) return Boolean is + begin + return C.Is_Ok; + end Is_Ok; + + procedure Chk is new Check (Poe, Is_Ok); + +begin + Chk; +end; diff --git a/gcc/testsuite/gnat.dg/discr18.adb b/gcc/testsuite/gnat.dg/discr18.adb new file mode 100644 index 00000000000..bd3fd794459 --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr18.adb @@ -0,0 +1,19 @@ +-- { dg-do compile } + +with Discr18_Pkg; use Discr18_Pkg; + +procedure Discr18 is + + String_10 : String (1..10) := "1234567890"; + + MD : Multiple_Discriminants (A => 10, B => 10) := + Multiple_Discriminants'(A => 10, + B => 10, + S1 => String_10, + S2 => String_10); + MDE : Multiple_Discriminant_Extension (C => 10) := + (MD with C => 10, S3 => String_10); + +begin + Do_Something(MDE); +end; diff --git a/gcc/testsuite/gnat.dg/discr18_pkg.ads b/gcc/testsuite/gnat.dg/discr18_pkg.ads new file mode 100644 index 00000000000..72f7fec9529 --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr18_pkg.ads @@ -0,0 +1,19 @@ +package Discr18_Pkg is + + subtype Length is Natural range 0..256; + + type Multiple_Discriminants (A, B : Length) is tagged + record + S1 : String (1..A); + S2 : String (1..B); + end record; + + procedure Do_Something (Rec : in out Multiple_Discriminants); + + type Multiple_Discriminant_Extension (C : Length) is + new Multiple_Discriminants (A => C, B => C) + with record + S3 : String (1..C); + end record; + +end Discr18_Pkg; diff --git a/gcc/testsuite/gnat.dg/discr19.adb b/gcc/testsuite/gnat.dg/discr19.adb new file mode 100644 index 00000000000..8f5c56b3fb5 --- /dev/null +++ b/gcc/testsuite/gnat.dg/discr19.adb @@ -0,0 +1,16 @@ +-- { dg-do compile } + +procedure Discr19 is + + type Arr_Int_T is array (Integer range <>) of Integer; + + type Abs_Tag_Rec_T (N : Integer; M : Integer) is abstract tagged record + Arr_Int : Arr_Int_T (1..M); + end record; + + type Tag_Rec_T (M : Integer) + is new Abs_Tag_Rec_T (N => 1, M => M) with null record; + +begin + null; +end; diff --git a/gcc/testsuite/gnat.dg/loop_optimization6.adb b/gcc/testsuite/gnat.dg/loop_optimization6.adb index 42f1717f1ad..7a0f6d38803 100644 --- a/gcc/testsuite/gnat.dg/loop_optimization6.adb +++ b/gcc/testsuite/gnat.dg/loop_optimization6.adb @@ -1,5 +1,5 @@ -- { dg-do compile } --- { dg-options "-O -gnatp -fdump-tree-optimized" } +-- { dg-options "-O2 -gnatp -fdump-tree-optimized" } package body Loop_Optimization6 is procedure Foo is diff --git a/gcc/testsuite/lib/c-torture.exp b/gcc/testsuite/lib/c-torture.exp index 769ec97d3ec..bc14845b2fe 100644 --- a/gcc/testsuite/lib/c-torture.exp +++ b/gcc/testsuite/lib/c-torture.exp @@ -54,15 +54,6 @@ if ![info exists GCC_UNDER_TEST] { set GCC_UNDER_TEST "[find_gcc]" } -global orig_environment_saved - -# This file may be sourced, so don't override environment settings -# that have been previously setup. -if { $orig_environment_saved == 0 } { - append ld_library_path [gcc-set-multilib-library-path $GCC_UNDER_TEST] - set_ld_library_path_env_vars -} - # # c-torture-compile -- runs the Tege C-torture test # @@ -108,6 +99,13 @@ proc c-torture-compile { src option } { # proc c-torture-execute { sources args } { global tmpdir tool srcdir output compiler_conditional_xfail_data + global ld_library_path ld_library_path_multilib GCC_UNDER_TEST + + if { "$ld_library_path_multilib" + != "[board_info target multilib_flags]" } { + set ld_library_path [find_libgcc_s $GCC_UNDER_TEST] + set_ld_library_path_env_vars + } # Use the first source filename given as the filename under test. set src [lindex $sources 0] diff --git a/gcc/testsuite/lib/g++.exp b/gcc/testsuite/lib/g++.exp index a5f26800c1c..f31bbec588a 100644 --- a/gcc/testsuite/lib/g++.exp +++ b/gcc/testsuite/lib/g++.exp @@ -106,52 +106,51 @@ proc g++_link_flags { paths } { set gccpath ${paths} set libio_dir "" set flags "" - set ld_library_path "." + set ld_library_path "" set shlib_ext [get_shlib_extension] verbose "shared lib extension: $shlib_ext" if { $gccpath != "" } { if [file exists "${gccpath}/lib/libstdc++.a"] { - append ld_library_path ":${gccpath}/lib" + add_path ld_library_path "${gccpath}/lib" } if [file exists "${gccpath}/libg++/libg++.a"] { append flags "-L${gccpath}/libg++ " - append ld_library_path ":${gccpath}/libg++" + add_path ld_library_path "${gccpath}/libg++" } if [file exists "${gccpath}/libstdc++/libstdc++.a"] { append flags "-L${gccpath}/libstdc++ " - append ld_library_path ":${gccpath}/libstdc++" + add_path ld_library_path "${gccpath}/libstdc++" } if [file exists "${gccpath}/libstdc++-v3/src/.libs/libstdc++.a"] { append flags " -L${gccpath}/libstdc++-v3/src/.libs " - append ld_library_path ":${gccpath}/libstdc++-v3/src/.libs" + add_path ld_library_path "${gccpath}/libstdc++-v3/src/.libs" } # Look for libstdc++.${shlib_ext}. if [file exists "${gccpath}/libstdc++-v3/src/.libs/libstdc++.${shlib_ext}"] { append flags " -L${gccpath}/libstdc++-v3/src/.libs " - append ld_library_path ":${gccpath}/libstdc++-v3/src/.libs" + add_path ld_library_path "${gccpath}/libstdc++-v3/src/.libs" } - if [file exists "${gccpath}/libiberty/libiberty.a"] { append flags "-L${gccpath}/libiberty " } if [file exists "${gccpath}/librx/librx.a"] { append flags "-L${gccpath}/librx " } - append ld_library_path [gcc-set-multilib-library-path $GXX_UNDER_TEST] + add_path ld_library_path [find_libgcc_s $GXX_UNDER_TEST] } else { global tool_root_dir set libgpp [lookfor_file ${tool_root_dir} libg++] if { $libgpp != "" } { append flags "-L${libgpp} " - append ld_library_path ":${libgpp}" + add_path ld_library_path ${libgpp} } set libstdcpp [lookfor_file ${tool_root_dir} libstdc++] if { $libstdcpp != "" } { append flags "-L${libstdcpp} " - append ld_library_path ":${libstdcpp}" + add_path ld_library_path ${libstdcpp} } set libiberty [lookfor_file ${tool_root_dir} libiberty] if { $libiberty != "" } { diff --git a/gcc/testsuite/lib/gcc-defs.exp b/gcc/testsuite/lib/gcc-defs.exp index 53926a69a23..0a5d6a38d0d 100644 --- a/gcc/testsuite/lib/gcc-defs.exp +++ b/gcc/testsuite/lib/gcc-defs.exp @@ -233,35 +233,3 @@ proc dg-additional-files-options { options source } { return $options } - -# Return a colon-separate list of directories to search for libraries -# for COMPILER, including multilib directories. - -proc gcc-set-multilib-library-path { compiler } { - global rootme - - # ??? rootme will not be set when testing an installed compiler. - # In that case, we should perhaps use some other method to find - # libraries. - if {![info exists rootme]} { - return "" - } - - set libpath ":${rootme}" - set compiler [lindex $compiler 0] - if { [is_remote host] == 0 && [which $compiler] != 0 } { - foreach i "[exec $compiler --print-multi-lib]" { - set mldir "" - regexp -- "\[a-z0-9=_/\.-\]*;" $i mldir - set mldir [string trimright $mldir "\;@"] - if { "$mldir" == "." } { - continue - } - if { [llength [glob -nocomplain ${rootme}/${mldir}/libgcc_s*.so.*]] >= 1 } { - append libpath ":${rootme}/${mldir}" - } - } - } - - return $libpath -} diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp index 7e684171be9..09b0cf4b49a 100644 --- a/gcc/testsuite/lib/gcc-dg.exp +++ b/gcc/testsuite/lib/gcc-dg.exp @@ -65,15 +65,6 @@ if ![info exists GCC_UNDER_TEST] { set GCC_UNDER_TEST "[find_gcc]" } -global orig_environment_saved - -# This file may be sourced, so don't override environment settings -# that have been previously setup. -if { $orig_environment_saved == 0 } { - append ld_library_path [gcc-set-multilib-library-path $GCC_UNDER_TEST] - set_ld_library_path_env_vars -} - # Define gcc callbacks for dg.exp. proc gcc-dg-test-1 { target_compile prog do_what extra_tool_flags } { @@ -117,6 +108,14 @@ proc gcc-dg-test-1 { target_compile prog do_what extra_tool_flags } { set output_file "[file rootname [file tail $prog]].o" } "run" { + global ld_library_path ld_library_path_multilib GCC_UNDER_TEST + + if { "$ld_library_path_multilib" + != "[board_info target multilib_flags]" } { + set ld_library_path [find_libgcc_s $GCC_UNDER_TEST] + set_ld_library_path_env_vars + } + set compile_type "executable" # FIXME: "./" is to cope with "." not being in $PATH. # Should this be handled elsewhere? diff --git a/gcc/testsuite/lib/gfortran.exp b/gcc/testsuite/lib/gfortran.exp index a4d6e2b5d38..5c35e031d2b 100644 --- a/gcc/testsuite/lib/gfortran.exp +++ b/gcc/testsuite/lib/gfortran.exp @@ -84,7 +84,7 @@ proc gfortran_link_flags { paths } { set gccpath ${paths} set libio_dir "" set flags "" - set ld_library_path "." + set ld_library_path "" set shlib_ext [get_shlib_extension] verbose "shared lib extension: $shlib_ext" @@ -94,11 +94,11 @@ proc gfortran_link_flags { paths } { # for uninstalled testing. append flags "-B${gccpath}/libgfortran/.libs " append flags "-L${gccpath}/libgfortran/.libs " - append ld_library_path ":${gccpath}/libgfortran/.libs" + add_path ld_library_path "${gccpath}/libgfortran/.libs" } if [file exists "${gccpath}/libgfortran/.libs/libgfortran.${shlib_ext}"] { append flags "-L${gccpath}/libgfortran/.libs " - append ld_library_path ":${gccpath}/libgfortran/.libs" + add_path ld_library_path "${gccpath}/libgfortran/.libs" } if [file exists "${gccpath}/libgfortran/libgforbegin.a"] { append flags "-L${gccpath}/libgfortran " @@ -106,8 +106,7 @@ proc gfortran_link_flags { paths } { if [file exists "${gccpath}/libiberty/libiberty.a"] { append flags "-L${gccpath}/libiberty " } - append ld_library_path \ - [gcc-set-multilib-library-path $GFORTRAN_UNDER_TEST] + add_path ld_library_path [find_libgcc_s $GFORTRAN_UNDER_TEST] } set_ld_library_path_env_vars diff --git a/gcc/testsuite/lib/gnat.exp b/gcc/testsuite/lib/gnat.exp index 35e18da93d2..bb95487e8bd 100644 --- a/gcc/testsuite/lib/gnat.exp +++ b/gcc/testsuite/lib/gnat.exp @@ -147,7 +147,7 @@ proc gnat_target_compile { source dest type options } { set GNAT_UNDER_TEST "$GNAT_UNDER_TEST_ORIG $gnat_rts_opt" } - set ld_library_path ".:${gnat_libgcc_s_path}" + set ld_library_path ${gnat_libgcc_s_path} lappend options "compiler=$GNAT_UNDER_TEST -q -f" lappend options "timeout=[timeout_value]" diff --git a/gcc/testsuite/lib/obj-c++.exp b/gcc/testsuite/lib/obj-c++.exp index b61dc556437..4feb8c178c8 100644 --- a/gcc/testsuite/lib/obj-c++.exp +++ b/gcc/testsuite/lib/obj-c++.exp @@ -106,30 +106,30 @@ proc obj-c++_link_flags { paths } { set gccpath ${paths} set libio_dir "" set flags "" - set ld_library_path "." + set ld_library_path "" set shlib_ext [get_shlib_extension] verbose "shared lib extension: $shlib_ext" if { $gccpath != "" } { if [file exists "${gccpath}/lib/libstdc++.a"] { - append ld_library_path ":${gccpath}/lib" + add_path ld_library_path "${gccpath}/lib" } if [file exists "${gccpath}/libg++/libg++.a"] { append flags "-L${gccpath}/libg++ " - append ld_library_path ":${gccpath}/libg++" + add_path ld_library_path "${gccpath}/libg++" } if [file exists "${gccpath}/libstdc++/libstdc++.a"] { append flags "-L${gccpath}/libstdc++ " - append ld_library_path ":${gccpath}/libstdc++" + add_path ld_library_path "${gccpath}/libstdc++" } if [file exists "${gccpath}/libstdc++-v3/src/.libs/libstdc++.a"] { append flags " -L${gccpath}/libstdc++-v3/src/.libs " - append ld_library_path ":${gccpath}/libstdc++-v3/src/.libs" + add_path ld_library_path "${gccpath}/libstdc++-v3/src/.libs" } # Look for libstdc++.${shlib_ext}. if [file exists "${gccpath}/libstdc++-v3/src/.libs/libstdc++.${shlib_ext}"] { append flags " -L${gccpath}/libstdc++-v3/src/.libs " - append ld_library_path ":${gccpath}/libstdc++-v3/src/.libs" + add_path ld_library_path "${gccpath}/libstdc++-v3/src/.libs" } if [file exists "${gccpath}/libiberty/libiberty.a"] { append flags "-L${gccpath}/libiberty " @@ -158,23 +158,21 @@ proc obj-c++_link_flags { paths } { if { $libobjc_dir != "" } { set libobjc_dir [file dirname ${libobjc_dir}] append flags "-L${libobjc_dir}" - append ld_library_path ":${libobjc_dir}" + add_path ld_library_path ${libobjc_dir} } - append ld_library_path \ - [gcc-set-multilib-library-path $OBJCXX_UNDER_TEST] - + add_path ld_library_path [find_libgcc_s $OBJCXX_UNDER_TEST] } else { global tool_root_dir; set libgpp [lookfor_file ${tool_root_dir} libg++]; if { $libgpp != "" } { append flags "-L${libgpp} "; - append ld_library_path ":${libgpp}" + add_path ld_library_path ${libgpp} } set libstdcpp [lookfor_file ${tool_root_dir} libstdc++]; if { $libstdcpp != "" } { append flags "-L${libstdcpp} "; - append ld_library_path ":${libstdcpp}" + add_path ld_library_path ${libstdcpp} } set libiberty [lookfor_file ${tool_root_dir} libiberty]; if { $libiberty != "" } { diff --git a/gcc/testsuite/lib/objc.exp b/gcc/testsuite/lib/objc.exp index 934f31dabdc..c0eeb02bd93 100644 --- a/gcc/testsuite/lib/objc.exp +++ b/gcc/testsuite/lib/objc.exp @@ -121,7 +121,7 @@ proc objc_init { args } { objc_maybe_build_wrapper "${tmpdir}/objc-testglue.o" - set objc_libgcc_s_path [gcc-set-multilib-library-path $OBJC_UNDER_TEST] + set objc_libgcc_s_path [find_libgcc_s $OBJC_UNDER_TEST] } proc objc_target_compile { source dest type options } { @@ -135,7 +135,7 @@ proc objc_target_compile { source dest type options } { global objc_libgcc_s_path global shlib_ext - set ld_library_path ".:${objc_libgcc_s_path}" + set ld_library_path ${objc_libgcc_s_path} lappend options "libs=-lobjc" set shlib_ext [get_shlib_extension] verbose "shared lib extension: $shlib_ext" @@ -191,7 +191,7 @@ proc objc_target_compile { source dest type options } { set libobjc_dir [file dirname ${libobjc_dir}] set objc_link_flags "-L${libobjc_dir}" lappend options "additional_flags=${objc_link_flags}" - append ld_library_path ":${libobjc_dir}" + add_path ld_library_path ${libobjc_dir} } if { $type == "precompiled_header" } { # If we generating a precompiled header, we have say this is an diff --git a/gcc/testsuite/lib/target-libpath.exp b/gcc/testsuite/lib/target-libpath.exp index 6a01d9498e7..49accd09687 100644 --- a/gcc/testsuite/lib/target-libpath.exp +++ b/gcc/testsuite/lib/target-libpath.exp @@ -16,175 +16,106 @@ # This file was contributed by John David Anglin (dave.anglin@nrc-cnrc.gc.ca) +# A list of ld library path environment variables that might need to be +# defined. +# +# Some variables represent ABI-specific paths, and if these variables +# aren't defined, the dynamic loader might fall back on a more general +# variable. We must do the same when trying to read the current setting +# of such a path. Each element of this list is therefore itself a list: +# the first element of each sublist specifies the name of the variable, +# and the other elements specify fallback alternatives. We use FOO as a +# shorthand for { FOO }. +set ld_library_path_vars { + LD_LIBRARY_PATH + LD_RUN_PATH + SHLIB_PATH + { LD_LIBRARYN32_PATH LD_LIBRARY_PATH } + { LD_LIBRARY64_PATH LD_LIBRARY_PATH } + { LD_LIBRARY_PATH_32 LD_LIBRARY_PATH } + { LD_LIBRARY_PATH_64 LD_LIBRARY_PATH } + DYLD_LIBRARY_PATH +} + +# Set up the global orig_FOO_saved variables. We define this as a function +# to avoid polluting the global namespace with local variables. +proc init_ld_library_path_env_vars { } { + global ld_library_path_vars + + foreach spec $ld_library_path_vars { + set var orig_[string tolower [lindex $spec 0]]_saved + global $var + set $var 0 + } +} +init_ld_library_path_env_vars set orig_environment_saved 0 -set orig_ld_library_path_saved 0 -set orig_ld_run_path_saved 0 -set orig_shlib_path_saved 0 -set orig_ld_libraryn32_path_saved 0 -set orig_ld_library64_path_saved 0 -set orig_ld_library_path_32_saved 0 -set orig_ld_library_path_64_saved 0 -set orig_dyld_library_path_saved 0 set orig_gcc_exec_prefix_saved 0 set orig_gcc_exec_prefix_checked 0 - +set ld_library_path_multilib unset ####################################### # proc set_ld_library_path_env_vars { } ####################################### proc set_ld_library_path_env_vars { } { - global ld_library_path - global orig_environment_saved - global orig_ld_library_path_saved - global orig_ld_run_path_saved - global orig_shlib_path_saved - global orig_ld_libraryn32_path_saved - global orig_ld_library64_path_saved - global orig_ld_library_path_32_saved - global orig_ld_library_path_64_saved - global orig_dyld_library_path_saved - global orig_gcc_exec_prefix_saved - global orig_gcc_exec_prefix_checked - global orig_ld_library_path - global orig_ld_run_path - global orig_shlib_path - global orig_ld_libraryn32_path - global orig_ld_library64_path - global orig_ld_library_path_32 - global orig_ld_library_path_64 - global orig_dyld_library_path - global orig_gcc_exec_prefix - global TEST_GCC_EXEC_PREFIX - global env - - # Save the original GCC_EXEC_PREFIX. - if { $orig_gcc_exec_prefix_checked == 0 } { - if [info exists env(GCC_EXEC_PREFIX)] { - set orig_gcc_exec_prefix "$env(GCC_EXEC_PREFIX)" - set orig_gcc_exec_prefix_saved 1 + global ld_library_path + global orig_environment_saved + global ld_library_path_vars + global orig_gcc_exec_prefix_saved + global orig_gcc_exec_prefix_checked + global orig_gcc_exec_prefix + global TEST_GCC_EXEC_PREFIX + global ld_library_path_multilib + global env + + # Save the original GCC_EXEC_PREFIX. + if { $orig_gcc_exec_prefix_checked == 0 } { + if [info exists env(GCC_EXEC_PREFIX)] { + set orig_gcc_exec_prefix "$env(GCC_EXEC_PREFIX)" + set orig_gcc_exec_prefix_saved 1 + } + set orig_gcc_exec_prefix_checked 1 } - set orig_gcc_exec_prefix_checked 1 - } - - # Set GCC_EXEC_PREFIX for the compiler under test to pick up files not in - # the build tree from a specified location (normally the install tree). - if [info exists TEST_GCC_EXEC_PREFIX] { - setenv GCC_EXEC_PREFIX "$TEST_GCC_EXEC_PREFIX" - } - # Setting the ld library path causes trouble when testing cross-compilers. - if { [is_remote target] } { - return - } - - if { $orig_environment_saved == 0 } { - set orig_environment_saved 1 - - # Save the original environment. - if [info exists env(LD_LIBRARY_PATH)] { - set orig_ld_library_path "$env(LD_LIBRARY_PATH)" - set orig_ld_library_path_saved 1 - } - if [info exists env(LD_RUN_PATH)] { - set orig_ld_run_path "$env(LD_RUN_PATH)" - set orig_ld_run_path_saved 1 - } - if [info exists env(SHLIB_PATH)] { - set orig_shlib_path "$env(SHLIB_PATH)" - set orig_shlib_path_saved 1 - } - if [info exists env(LD_LIBRARYN32_PATH)] { - set orig_ld_libraryn32_path "$env(LD_LIBRARYN32_PATH)" - set orig_ld_libraryn32_path_saved 1 - } - if [info exists env(LD_LIBRARY64_PATH)] { - set orig_ld_library64_path "$env(LD_LIBRARY64_PATH)" - set orig_ld_library64_path_saved 1 - } - if [info exists env(LD_LIBRARY_PATH_32)] { - set orig_ld_library_path_32 "$env(LD_LIBRARY_PATH_32)" - set orig_ld_library_path_32_saved 1 - } - if [info exists env(LD_LIBRARY_PATH_64)] { - set orig_ld_library_path_64 "$env(LD_LIBRARY_PATH_64)" - set orig_ld_library_path_64_saved 1 + # Set GCC_EXEC_PREFIX for the compiler under test to pick up files not in + # the build tree from a specified location (normally the install tree). + if [info exists TEST_GCC_EXEC_PREFIX] { + setenv GCC_EXEC_PREFIX "$TEST_GCC_EXEC_PREFIX" } - if [info exists env(DYLD_LIBRARY_PATH)] { - set orig_dyld_library_path "$env(DYLD_LIBRARY_PATH)" - set orig_dyld_library_path_saved 1 - } - } - # We need to set ld library path in the environment. Currently, - # unix.exp doesn't set the environment correctly for all systems. - # It only sets SHLIB_PATH and LD_LIBRARY_PATH when it executes a - # program. We also need the environment set for compilations, etc. - # - # On IRIX 6, we have to set variables akin to LD_LIBRARY_PATH, but - # called LD_LIBRARYN32_PATH (for the N32 ABI) and LD_LIBRARY64_PATH - # (for the 64-bit ABI). The same applies to Darwin (DYLD_LIBRARY_PATH), - # Solaris 32 bit (LD_LIBRARY_PATH_32), Solaris 64 bit (LD_LIBRARY_PATH_64), - # and HP-UX (SHLIB_PATH). In some cases, the variables are independent - # of LD_LIBRARY_PATH, and in other cases LD_LIBRARY_PATH is used if the - # variable is not defined. - # - # Doing this is somewhat of a hack as ld_library_path gets repeated in - # SHLIB_PATH and LD_LIBRARY_PATH when unix_load sets these variables. - if { $orig_ld_library_path_saved } { - setenv LD_LIBRARY_PATH "$ld_library_path:$orig_ld_library_path" - } else { - setenv LD_LIBRARY_PATH "$ld_library_path" - } - if { $orig_ld_run_path_saved } { - setenv LD_RUN_PATH "$ld_library_path:$orig_ld_run_path" - } else { - setenv LD_RUN_PATH "$ld_library_path" - } - # The default shared library dynamic path search for 64-bit - # HP-UX executables searches LD_LIBRARY_PATH before SHLIB_PATH. - # LD_LIBRARY_PATH isn't used for 32-bit executables. Thus, we - # set LD_LIBRARY_PATH and SHLIB_PATH as if they were independent. - if { $orig_shlib_path_saved } { - setenv SHLIB_PATH "$ld_library_path:$orig_shlib_path" - } else { - setenv SHLIB_PATH "$ld_library_path" - } - if { $orig_ld_libraryn32_path_saved } { - setenv LD_LIBRARYN32_PATH "$ld_library_path:$orig_ld_libraryn32_path" - } elseif { $orig_ld_library_path_saved } { - setenv LD_LIBRARYN32_PATH "$ld_library_path:$orig_ld_library_path" - } else { - setenv LD_LIBRARYN32_PATH "$ld_library_path" - } - if { $orig_ld_library64_path_saved } { - setenv LD_LIBRARY64_PATH "$ld_library_path:$orig_ld_library64_path" - } elseif { $orig_ld_library_path_saved } { - setenv LD_LIBRARY64_PATH "$ld_library_path:$orig_ld_library_path" - } else { - setenv LD_LIBRARY64_PATH "$ld_library_path" - } - if { $orig_ld_library_path_32_saved } { - setenv LD_LIBRARY_PATH_32 "$ld_library_path:$orig_ld_library_path_32" - } elseif { $orig_ld_library_path_saved } { - setenv LD_LIBRARY_PATH_32 "$ld_library_path:$orig_ld_library_path" - } else { - setenv LD_LIBRARY_PATH_32 "$ld_library_path" - } - if { $orig_ld_library_path_64_saved } { - setenv LD_LIBRARY_PATH_64 "$ld_library_path:$orig_ld_library_path_64" - } elseif { $orig_ld_library_path_saved } { - setenv LD_LIBRARY_PATH_64 "$ld_library_path:$orig_ld_library_path" - } else { - setenv LD_LIBRARY_PATH_64 "$ld_library_path" - } - if { $orig_dyld_library_path_saved } { - setenv DYLD_LIBRARY_PATH "$ld_library_path:$orig_dyld_library_path" - } else { - setenv DYLD_LIBRARY_PATH "$ld_library_path" - } + # Setting the ld library path causes trouble when testing cross-compilers. + if { [is_remote target] } { + return + } - verbose -log "set_ld_library_path_env_vars: ld_library_path=$ld_library_path" + set ld_library_path_multilib [board_info target multilib_flags] + + foreach spec $ld_library_path_vars { + set var [lindex $spec 0] + set lvar [string tolower $var] + + global orig_$lvar + global orig_${lvar}_saved + + if { $orig_environment_saved == 0 } { + if [info exists env($var)] { + set orig_$lvar [set env($var)] + set orig_${lvar}_saved 1 + } + } + set value $ld_library_path + foreach extra $spec { + set lextra [string tolower $extra] + if [set orig_${lextra}_saved] { + add_path value [set orig_$lextra] + break + } + } + setenv $var $value + } + set orig_environment_saved 1 + verbose -log "set_ld_library_path_env_vars: ld_library_path=$ld_library_path" } ####################################### @@ -192,77 +123,35 @@ proc set_ld_library_path_env_vars { } { ####################################### proc restore_ld_library_path_env_vars { } { - global orig_environment_saved - global orig_ld_library_path_saved - global orig_ld_run_path_saved - global orig_shlib_path_saved - global orig_ld_libraryn32_path_saved - global orig_ld_library64_path_saved - global orig_ld_library_path_32_saved - global orig_ld_library_path_64_saved - global orig_dyld_library_path_saved - global orig_gcc_exec_prefix_saved - global orig_ld_library_path - global orig_ld_run_path - global orig_shlib_path - global orig_ld_libraryn32_path - global orig_ld_library64_path - global orig_ld_library_path_32 - global orig_ld_library_path_64 - global orig_dyld_library_path - global orig_gcc_exec_prefix - global env + global orig_environment_saved + global ld_library_path_vars + global orig_gcc_exec_prefix_saved + global orig_gcc_exec_prefix + global env + + if { $orig_gcc_exec_prefix_saved } { + setenv GCC_EXEC_PREFIX "$orig_gcc_exec_prefix" + } elseif [info exists env(GCC_EXEC_PREFIX)] { + unsetenv GCC_EXEC_PREFIX + } - if { $orig_gcc_exec_prefix_saved } { - setenv GCC_EXEC_PREFIX "$orig_gcc_exec_prefix" - } elseif [info exists env(GCC_EXEC_PREFIX)] { - unsetenv GCC_EXEC_PREFIX - } + if { $orig_environment_saved == 0 } { + return + } + + foreach spec $ld_library_path_vars { + set var [lindex $spec 0] + set lvar [string tolower $var] - if { $orig_environment_saved == 0 } { - return - } + global orig_$lvar + global orig_${lvar}_saved - if { $orig_ld_library_path_saved } { - setenv LD_LIBRARY_PATH "$orig_ld_library_path" - } elseif [info exists env(LD_LIBRARY_PATH)] { - unsetenv LD_LIBRARY_PATH - } - if { $orig_ld_run_path_saved } { - setenv LD_RUN_PATH "$orig_ld_run_path" - } elseif [info exists env(LD_RUN_PATH)] { - unsetenv LD_RUN_PATH - } - if { $orig_shlib_path_saved } { - setenv SHLIB_PATH "$orig_shlib_path" - } elseif [info exists env(SHLIB_PATH)] { - unsetenv SHLIB_PATH - } - if { $orig_ld_libraryn32_path_saved } { - setenv LD_LIBRARYN32_PATH "$orig_ld_libraryn32_path" - } elseif [info exists env(LD_LIBRARYN32_PATH)] { - unsetenv LD_LIBRARYN32_PATH - } - if { $orig_ld_library64_path_saved } { - setenv LD_LIBRARY64_PATH "$orig_ld_library64_path" - } elseif [info exists env(LD_LIBRARY64_PATH)] { - unsetenv LD_LIBRARY64_PATH - } - if { $orig_ld_library_path_32_saved } { - setenv LD_LIBRARY_PATH_32 "$orig_ld_library_path_32" - } elseif [info exists env(LD_LIBRARY_PATH_32)] { - unsetenv LD_LIBRARY_PATH_32 - } - if { $orig_ld_library_path_64_saved } { - setenv LD_LIBRARY_PATH_64 "$orig_ld_library_path_64" - } elseif [info exists env(LD_LIBRARY_PATH_64)] { - unsetenv LD_LIBRARY_PATH_64 - } - if { $orig_dyld_library_path_saved } { - setenv DYLD_LIBRARY_PATH "$orig_dyld_library_path" - } elseif [info exists env(DYLD_LIBRARY_PATH)] { - unsetenv DYLD_LIBRARY_PATH - } + if [set orig_${lvar}_saved] { + setenv $var [set orig_$lvar] + } elseif [info exists env($var)] { + unsetenv $var + } + } } ####################################### @@ -284,3 +173,46 @@ proc get_shlib_extension { } { return $shlib_ext } +# If DIR is not an empty string, add it to the end of variable UPPATH, +# which represents a colon-separated path. +proc add_path { uppath dir } { + upvar $uppath path + + if { $dir != "" } { + if { [info exists path] && $path != "" } { + append path ":" + } + append path $dir + } +} + +# Return the directory that contains the shared libgcc for this multilib, +# or "" if we don't know. +proc find_libgcc_s { compiler } { + # Remote host testing requires an installed compiler (get_multilibs + # imposes the same restriction). It is up to the board file or + # tester to make sure that the installed compiler's libraries + # can be found in the library path. + if { [is_remote host] } { + return "" + } + # The same goes if we can't find the compiler. + set compiler_path [which [lindex $compiler 0]] + if { $compiler_path == "" } { + return "" + } + # Run the compiler with the current multilib flags to get the + # relative multilib directory. + set subdir [eval exec $compiler [board_info target multilib_flags] \ + --print-multi-directory] + # We are only interested in cases where libgcc_s is in the same + # directory as the compiler itself. + set dir [file dirname $compiler_path] + if { $subdir != "." } { + set dir [file join $dir $subdir] + } + if { ![file exists $dir] } { + return "" + } + return $dir +} diff --git a/gcc/toplev.c b/gcc/toplev.c index e83eaa169df..02dbe51263f 100644 --- a/gcc/toplev.c +++ b/gcc/toplev.c @@ -1029,6 +1029,7 @@ compile_file (void) init_final (main_input_filename); coverage_init (aux_base_name); statistics_init (); + invoke_plugin_callbacks (PLUGIN_START_UNIT, NULL); timevar_push (TV_PARSE); diff --git a/gcc/tree-chrec.c b/gcc/tree-chrec.c index 997ce893593..74935043918 100644 --- a/gcc/tree-chrec.c +++ b/gcc/tree-chrec.c @@ -37,6 +37,7 @@ along with GCC; see the file COPYING3. If not see #include "tree-chrec.h" #include "tree-pass.h" #include "params.h" +#include "flags.h" #include "tree-scalar-evolution.h" @@ -1286,7 +1287,19 @@ chrec_convert_1 (tree type, tree chrec, gimple at_stmt, /* If we cannot propagate the cast inside the chrec, just keep the cast. */ keep_cast: - res = fold_convert (type, chrec); + /* Fold will not canonicalize (long)(i - 1) to (long)i - 1 because that + may be more expensive. We do want to perform this optimization here + though for canonicalization reasons. */ + if (use_overflow_semantics + && (TREE_CODE (chrec) == PLUS_EXPR + || TREE_CODE (chrec) == MINUS_EXPR) + && TYPE_PRECISION (type) > TYPE_PRECISION (ct) + && TYPE_OVERFLOW_UNDEFINED (ct)) + res = fold_build2 (TREE_CODE (chrec), type, + fold_convert (type, TREE_OPERAND (chrec, 0)), + fold_convert (type, TREE_OPERAND (chrec, 1))); + else + res = fold_convert (type, chrec); /* Don't propagate overflows. */ if (CONSTANT_CLASS_P (res)) diff --git a/gcc/tree-flow.h b/gcc/tree-flow.h index 1b654a088fd..8d9b393e56e 100644 --- a/gcc/tree-flow.h +++ b/gcc/tree-flow.h @@ -745,7 +745,6 @@ unsigned int tree_ssa_unswitch_loops (void); unsigned int canonicalize_induction_variables (void); unsigned int tree_unroll_loops_completely (bool, bool); unsigned int tree_ssa_prefetch_arrays (void); -unsigned int remove_empty_loops (void); void tree_ssa_iv_optimize (void); unsigned tree_predictive_commoning (void); tree canonicalize_loop_ivs (struct loop *, htab_t, tree *); diff --git a/gcc/tree-inline.c b/gcc/tree-inline.c index b97b9b2b772..648e30b47b3 100644 --- a/gcc/tree-inline.c +++ b/gcc/tree-inline.c @@ -287,7 +287,10 @@ remap_decl (tree decl, copy_body_data *id) return t; } - return unshare_expr (*n); + if (id->do_not_unshare) + return *n; + else + return unshare_expr (*n); } static tree @@ -997,7 +1000,10 @@ copy_tree_body_r (tree *tp, int *walk_subtrees, void *data) but we absolutely rely on that. As fold_indirect_ref does other useful transformations, try that first, though. */ tree type = TREE_TYPE (TREE_TYPE (*n)); - new_tree = unshare_expr (*n); + if (id->do_not_unshare) + new_tree = *n; + else + new_tree = unshare_expr (*n); old = *tp; *tp = gimple_fold_indirect_ref (new_tree); if (! *tp) @@ -1993,6 +1999,20 @@ copy_cfg_body (copy_body_data * id, gcov_type count, int frequency, return new_fndecl; } +/* Make a copy of the body of SRC_FN so that it can be inserted inline in + another function. */ + +static tree +copy_tree_body (copy_body_data *id) +{ + tree fndecl = id->src_fn; + tree body = DECL_SAVED_TREE (fndecl); + + walk_tree (&body, copy_tree_body_r, id, NULL); + + return body; +} + static tree copy_body (copy_body_data *id, gcov_type count, int frequency, basic_block entry_block_map, basic_block exit_block_map) @@ -4605,6 +4625,60 @@ tree_function_versioning (tree old_decl, tree new_decl, return; } +/* EXP is CALL_EXPR present in a GENERIC expression tree. Try to integrate + the callee and return the inlined body on success. */ + +tree +maybe_inline_call_in_expr (tree exp) +{ + tree fn = get_callee_fndecl (exp); + + /* We can only try to inline "const" functions. */ + if (fn && TREE_READONLY (fn) && DECL_SAVED_TREE (fn)) + { + struct pointer_map_t *decl_map = pointer_map_create (); + call_expr_arg_iterator iter; + copy_body_data id; + tree param, arg, t; + + /* Remap the parameters. */ + for (param = DECL_ARGUMENTS (fn), arg = first_call_expr_arg (exp, &iter); + param; + param = TREE_CHAIN (param), arg = next_call_expr_arg (&iter)) + *pointer_map_insert (decl_map, param) = arg; + + memset (&id, 0, sizeof (id)); + id.src_fn = fn; + id.dst_fn = current_function_decl; + id.src_cfun = DECL_STRUCT_FUNCTION (fn); + id.decl_map = decl_map; + + id.copy_decl = copy_decl_no_change; + id.transform_call_graph_edges = CB_CGE_DUPLICATE; + id.transform_new_cfg = false; + id.transform_return_to_modify = true; + id.transform_lang_insert_block = false; + + /* Make sure not to unshare trees behind the front-end's back + since front-end specific mechanisms may rely on sharing. */ + id.regimplify = false; + id.do_not_unshare = true; + + /* We're not inside any EH region. */ + id.eh_region = -1; + + t = copy_tree_body (&id); + pointer_map_destroy (decl_map); + + /* We can only return something suitable for use in a GENERIC + expression tree. */ + if (TREE_CODE (t) == MODIFY_EXPR) + return TREE_OPERAND (t, 1); + } + + return NULL_TREE; +} + /* Duplicate a type, fields and all. */ tree diff --git a/gcc/tree-inline.h b/gcc/tree-inline.h index 37e60bfd360..542eb729727 100644 --- a/gcc/tree-inline.h +++ b/gcc/tree-inline.h @@ -102,6 +102,9 @@ typedef struct copy_body_data /* True if this statement will need to be regimplified. */ bool regimplify; + /* True if trees should not be unshared. */ + bool do_not_unshare; + /* > 0 if we are remapping a type currently. */ int remapping_type_depth; @@ -157,6 +160,7 @@ extern tree copy_tree_body_r (tree *, int *, void *); extern void insert_decl_map (copy_body_data *, tree, tree); unsigned int optimize_inline_calls (tree); +tree maybe_inline_call_in_expr (tree); bool tree_inlinable_function_p (tree); tree copy_tree_r (tree *, int *, void *); tree copy_decl_no_change (tree decl, copy_body_data *id); diff --git a/gcc/tree-sra.c b/gcc/tree-sra.c index d26e03b5095..2381ac34d1e 100644 --- a/gcc/tree-sra.c +++ b/gcc/tree-sra.c @@ -1036,7 +1036,7 @@ build_ref_for_offset_1 (tree *res, tree type, HOST_WIDE_INT offset, HOST_WIDE_INT el_size; if (offset == 0 && exp_type - && useless_type_conversion_p (exp_type, type)) + && types_compatible_p (exp_type, type)) return true; switch (TREE_CODE (type)) @@ -1760,7 +1760,6 @@ generate_subtree_copies (struct access *access, tree agg, insert_after ? GSI_NEW_STMT : GSI_SAME_STMT); stmt = gimple_build_assign (expr, repl); - sra_stats.subtree_copies++; } if (insert_after) @@ -1768,6 +1767,7 @@ generate_subtree_copies (struct access *access, tree agg, else gsi_insert_before (gsi, stmt, GSI_SAME_STMT); update_stmt (stmt); + sra_stats.subtree_copies++; } if (access->first_child) @@ -1908,7 +1908,8 @@ sra_modify_expr (tree *expr, gimple_stmt_iterator *gsi, bool write, && host_integerp (TREE_OPERAND (bfr, 2), 1)) { chunk_size = tree_low_cst (TREE_OPERAND (bfr, 1), 1); - start_offset = tree_low_cst (TREE_OPERAND (bfr, 2), 1); + start_offset = access->offset + + tree_low_cst (TREE_OPERAND (bfr, 2), 1); } else start_offset = chunk_size = 0; diff --git a/gcc/tree-ssa-alias.c b/gcc/tree-ssa-alias.c index e8bca84ba35..4d721877d02 100644 --- a/gcc/tree-ssa-alias.c +++ b/gcc/tree-ssa-alias.c @@ -1427,8 +1427,8 @@ walk_non_aliased_vuses (ao_ref *ref, tree vuse, The function returns the number of statements walked. */ static unsigned int -walk_aliased_vdefs_1 (tree ref, tree vdef, - bool (*walker)(tree, tree, void *), void *data, +walk_aliased_vdefs_1 (ao_ref *ref, tree vdef, + bool (*walker)(ao_ref *, tree, void *), void *data, bitmap *visited, unsigned int cnt) { do @@ -1455,7 +1455,7 @@ walk_aliased_vdefs_1 (tree ref, tree vdef, /* ??? Do we want to account this to TV_ALIAS_STMT_WALK? */ cnt++; if ((!ref - || stmt_may_clobber_ref_p (def_stmt, ref)) + || stmt_may_clobber_ref_p_1 (def_stmt, ref)) && (*walker) (ref, vdef, data)) return cnt; @@ -1465,8 +1465,8 @@ walk_aliased_vdefs_1 (tree ref, tree vdef, } unsigned int -walk_aliased_vdefs (tree ref, tree vdef, - bool (*walker)(tree, tree, void *), void *data, +walk_aliased_vdefs (ao_ref *ref, tree vdef, + bool (*walker)(ao_ref *, tree, void *), void *data, bitmap *visited) { bitmap local_visited = NULL; diff --git a/gcc/tree-ssa-alias.h b/gcc/tree-ssa-alias.h index b071e4b1b81..2be903f31c5 100644 --- a/gcc/tree-ssa-alias.h +++ b/gcc/tree-ssa-alias.h @@ -100,9 +100,9 @@ extern bool stmt_may_clobber_ref_p_1 (gimple, ao_ref *); extern void *walk_non_aliased_vuses (ao_ref *, tree, void *(*)(ao_ref *, tree, void *), void *(*)(ao_ref *, tree, void *), void *); -extern unsigned int walk_aliased_vdefs (tree, tree, - bool (*)(tree, tree, void *), void *, - bitmap *); +extern unsigned int walk_aliased_vdefs (ao_ref *, tree, + bool (*)(ao_ref *, tree, void *), + void *, bitmap *); extern struct ptr_info_def *get_ptr_info (tree); extern void dump_alias_info (FILE *); extern void debug_alias_info (void); diff --git a/gcc/tree-ssa-dce.c b/gcc/tree-ssa-dce.c index b252ece37f4..fdfdda5e95f 100644 --- a/gcc/tree-ssa-dce.c +++ b/gcc/tree-ssa-dce.c @@ -87,6 +87,9 @@ static sbitmap processed; marked as necessary. */ static sbitmap last_stmt_necessary; +/* Vector indicating that BB contains statements that are live. */ +static sbitmap bb_contains_live_stmts; + /* Before we can determine whether a control branch is dead, we need to compute which blocks are control dependent on which edges. @@ -218,6 +221,8 @@ mark_stmt_necessary (gimple stmt, bool add_to_worklist) gimple_set_plf (stmt, STMT_NECESSARY, true); if (add_to_worklist) VEC_safe_push (gimple, heap, worklist, stmt); + if (bb_contains_live_stmts) + SET_BIT (bb_contains_live_stmts, gimple_bb (stmt)->index); } @@ -256,6 +261,8 @@ mark_operand_necessary (tree op) } gimple_set_plf (stmt, STMT_NECESSARY, true); + if (bb_contains_live_stmts) + SET_BIT (bb_contains_live_stmts, gimple_bb (stmt)->index); VEC_safe_push (gimple, heap, worklist, stmt); } @@ -385,6 +392,7 @@ mark_control_dependent_edges_necessary (basic_block bb, struct edge_list *el) if (TEST_BIT (last_stmt_necessary, cd_bb->index)) continue; SET_BIT (last_stmt_necessary, cd_bb->index); + SET_BIT (bb_contains_live_stmts, cd_bb->index); stmt = last_stmt (cd_bb); if (stmt && is_ctrl_stmt (stmt)) @@ -426,17 +434,42 @@ find_obviously_necessary_stmts (struct edge_list *el) } } + /* Pure and const functions are finite and thus have no infinite loops in + them. */ + if ((TREE_READONLY (current_function_decl) + || DECL_PURE_P (current_function_decl)) + && !DECL_LOOPING_CONST_OR_PURE_P (current_function_decl)) + return; + + /* Prevent the empty possibly infinite loops from being removed. */ if (el) { - /* Prevent the loops from being removed. We must keep the infinite loops, - and we currently do not have a means to recognize the finite ones. */ - FOR_EACH_BB (bb) - { - edge_iterator ei; - FOR_EACH_EDGE (e, ei, bb->succs) - if (e->flags & EDGE_DFS_BACK) - mark_control_dependent_edges_necessary (e->dest, el); - } + loop_iterator li; + struct loop *loop; + scev_initialize (); + if (mark_irreducible_loops ()) + FOR_EACH_BB (bb) + { + edge_iterator ei; + FOR_EACH_EDGE (e, ei, bb->succs) + if ((e->flags & EDGE_DFS_BACK) + && (e->flags & EDGE_IRREDUCIBLE_LOOP)) + { + if (dump_file) + fprintf (dump_file, "Marking back edge of irreducible loop %i->%i\n", + e->src->index, e->dest->index); + mark_control_dependent_edges_necessary (e->dest, el); + } + } + + FOR_EACH_LOOP (li, loop, 0) + if (!finite_loop_p (loop)) + { + if (dump_file) + fprintf (dump_file, "can not prove finiteness of loop %i\n", loop->num); + mark_control_dependent_edges_necessary (loop->latch, el); + } + scev_finalize (); } } @@ -452,13 +485,6 @@ ref_may_be_aliased (tree ref) && !may_be_aliased (ref)); } -struct ref_data { - tree base; - HOST_WIDE_INT size; - HOST_WIDE_INT offset; - HOST_WIDE_INT max_size; -}; - static bitmap visited = NULL; static unsigned int longest_chain = 0; static unsigned int total_chain = 0; @@ -471,10 +497,10 @@ static bool chain_ovfl = false; anymore. DATA points to cached get_ref_base_and_extent data for REF. */ static bool -mark_aliased_reaching_defs_necessary_1 (tree ref, tree vdef, void *data) +mark_aliased_reaching_defs_necessary_1 (ao_ref *ref, tree vdef, + void *data ATTRIBUTE_UNUSED) { gimple def_stmt = SSA_NAME_DEF_STMT (vdef); - struct ref_data *refd = (struct ref_data *)data; /* All stmts we visit are necessary. */ mark_operand_necessary (vdef); @@ -485,22 +511,24 @@ mark_aliased_reaching_defs_necessary_1 (tree ref, tree vdef, void *data) { tree base, lhs = gimple_get_lhs (def_stmt); HOST_WIDE_INT size, offset, max_size; + ao_ref_base (ref); base = get_ref_base_and_extent (lhs, &offset, &size, &max_size); /* We can get MEM[symbol: sZ, index: D.8862_1] here, so base == refd->base does not always hold. */ - if (base == refd->base) + if (base == ref->base) { /* For a must-alias check we need to be able to constrain the accesses properly. */ if (size != -1 && size == max_size - && refd->max_size != -1) + && ref->max_size != -1) { - if (offset <= refd->offset - && offset + size >= refd->offset + refd->max_size) + if (offset <= ref->offset + && offset + size >= ref->offset + ref->max_size) return true; } /* Or they need to be exactly the same. */ - else if (operand_equal_p (ref, lhs, 0)) + else if (ref->ref + && operand_equal_p (ref->ref, lhs, 0)) return true; } } @@ -512,14 +540,13 @@ mark_aliased_reaching_defs_necessary_1 (tree ref, tree vdef, void *data) static void mark_aliased_reaching_defs_necessary (gimple stmt, tree ref) { - struct ref_data refd; unsigned int chain; + ao_ref refd; gcc_assert (!chain_ovfl); - refd.base = get_ref_base_and_extent (ref, &refd.offset, &refd.size, - &refd.max_size); - chain = walk_aliased_vdefs (ref, gimple_vuse (stmt), + ao_ref_init (&refd, ref); + chain = walk_aliased_vdefs (&refd, gimple_vuse (stmt), mark_aliased_reaching_defs_necessary_1, - &refd, NULL); + NULL, NULL); if (chain > longest_chain) longest_chain = chain; total_chain += chain; @@ -532,8 +559,8 @@ mark_aliased_reaching_defs_necessary (gimple stmt, tree ref) a non-aliased decl. */ static bool -mark_all_reaching_defs_necessary_1 (tree ref ATTRIBUTE_UNUSED, - tree vdef, void *data ATTRIBUTE_UNUSED) +mark_all_reaching_defs_necessary_1 (ao_ref *ref ATTRIBUTE_UNUSED, + tree vdef, void *data ATTRIBUTE_UNUSED) { gimple def_stmt = SSA_NAME_DEF_STMT (vdef); @@ -556,9 +583,9 @@ mark_all_reaching_defs_necessary_1 (tree ref ATTRIBUTE_UNUSED, return false; } - /* But can stop after the first necessary statement. */ mark_operand_necessary (vdef); - return true; + + return false; } static void @@ -568,6 +595,19 @@ mark_all_reaching_defs_necessary (gimple stmt) mark_all_reaching_defs_necessary_1, NULL, &visited); } +/* Return true for PHI nodes with one or identical arguments + can be removed. */ +static bool +degenerate_phi_p (gimple phi) +{ + unsigned int i; + tree op = gimple_phi_arg_def (phi, 0); + for (i = 1; i < gimple_phi_num_args (phi); i++) + if (gimple_phi_arg_def (phi, i) != op) + return false; + return true; +} + /* Propagate necessity using the operands of necessary statements. Process the uses on each statement in the worklist, and add all feeding statements which contribute to the calculation of this @@ -630,7 +670,7 @@ propagate_necessity (struct edge_list *el) mark_operand_necessary (arg); } - if (aggressive) + if (aggressive && !degenerate_phi_p (stmt)) { for (k = 0; k < gimple_phi_num_args (stmt); k++) { @@ -677,18 +717,26 @@ propagate_necessity (struct edge_list *el) For 1) we mark all reaching may-defs as necessary, stopping at dominating kills. For 2) we want to mark all dominating references necessary, but non-aliased ones which we handle - in 1). Instead of doing so for each load we rely on the - worklist to eventually reach all dominating references and - instead just mark the immediately dominating references - as necessary (but skipping non-aliased ones). */ + in 1). By keeping a global visited bitmap for references + we walk for 2) we avoid quadratic behavior for those. */ if (is_gimple_call (stmt)) { + tree callee = gimple_call_fndecl (stmt); unsigned i; + /* Calls to functions that are merely acting as barriers + or that only store to memory do not make any previous + stores necessary. */ + if (callee != NULL_TREE + && DECL_BUILT_IN_CLASS (callee) == BUILT_IN_NORMAL + && (DECL_FUNCTION_CODE (callee) == BUILT_IN_MEMSET + || DECL_FUNCTION_CODE (callee) == BUILT_IN_MALLOC + || DECL_FUNCTION_CODE (callee) == BUILT_IN_FREE)) + continue; + /* Calls implicitly load from memory, their arguments - in addition may explicitly perform memory loads. - This also ensures propagation for case 2 for stores. */ + in addition may explicitly perform memory loads. */ mark_all_reaching_defs_necessary (stmt); for (i = 0; i < gimple_call_num_args (stmt); ++i) { @@ -702,7 +750,7 @@ propagate_necessity (struct edge_list *el) } else if (gimple_assign_single_p (stmt)) { - tree lhs, rhs; + tree rhs; bool rhs_aliased = false; /* If this is a load mark things necessary. */ rhs = gimple_assign_rhs1 (stmt); @@ -714,12 +762,7 @@ propagate_necessity (struct edge_list *el) else rhs_aliased = true; } - /* If this is an aliased store, mark things necessary. - This is where we make sure to propagate for case 2. */ - lhs = gimple_assign_lhs (stmt); - if (rhs_aliased - || (TREE_CODE (lhs) != SSA_NAME - && ref_may_be_aliased (lhs))) + if (rhs_aliased) mark_all_reaching_defs_necessary (stmt); } else if (gimple_code (stmt) == GIMPLE_RETURN) @@ -767,6 +810,35 @@ propagate_necessity (struct edge_list *el) } } +/* Replace all uses of result of PHI by underlying variable and mark it + for renaming. */ + +static void +mark_virtual_phi_result_for_renaming (gimple phi) +{ + bool used = false; + imm_use_iterator iter; + use_operand_p use_p; + gimple stmt; + if (dump_file && (dump_flags & TDF_DETAILS)) + { + fprintf (dump_file, "Marking result for renaming : "); + print_gimple_stmt (dump_file, phi, 0, TDF_SLIM); + fprintf (dump_file, "\n"); + } + FOR_EACH_IMM_USE_STMT (stmt, iter, gimple_phi_result (phi)) + { + if (gimple_code (stmt) != GIMPLE_PHI + && !gimple_plf (stmt, STMT_NECESSARY)) + continue; + FOR_EACH_IMM_USE_ON_STMT (use_p, iter) + SET_USE (use_p, SSA_NAME_VAR (gimple_phi_result (phi))); + update_stmt (stmt); + used = true; + } + if (used) + mark_sym_for_renaming (SSA_NAME_VAR (PHI_RESULT (phi))); +} /* Remove dead PHI nodes from block BB. */ @@ -788,23 +860,13 @@ remove_dead_phis (basic_block bb) very simple dead PHI removal here. */ if (!is_gimple_reg (gimple_phi_result (phi))) { - unsigned i; - tree vuse; - /* Virtual PHI nodes with one or identical arguments can be removed. */ - vuse = gimple_phi_arg_def (phi, 0); - for (i = 1; i < gimple_phi_num_args (phi); ++i) - { - if (gimple_phi_arg_def (phi, i) != vuse) - { - vuse = NULL_TREE; - break; - } - } - if (vuse != NULL_TREE) + if (degenerate_phi_p (phi)) { tree vdef = gimple_phi_result (phi); + tree vuse = gimple_phi_arg_def (phi, 0); + use_operand_p use_p; imm_use_iterator iter; gimple use_stmt; @@ -838,6 +900,93 @@ remove_dead_phis (basic_block bb) return something_changed; } +/* Find first live post dominator of BB. */ + +static basic_block +get_live_post_dom (basic_block bb) +{ + basic_block post_dom_bb; + + + /* The post dominance info has to be up-to-date. */ + gcc_assert (dom_info_state (CDI_POST_DOMINATORS) == DOM_OK); + + /* Get the immediate post dominator of bb. */ + post_dom_bb = get_immediate_dominator (CDI_POST_DOMINATORS, bb); + /* And look for first live one. */ + while (post_dom_bb != EXIT_BLOCK_PTR + && !TEST_BIT (bb_contains_live_stmts, post_dom_bb->index)) + post_dom_bb = get_immediate_dominator (CDI_POST_DOMINATORS, post_dom_bb); + + return post_dom_bb; +} + +/* Forward edge E to respective POST_DOM_BB and update PHIs. */ + +static edge +forward_edge_to_pdom (edge e, basic_block post_dom_bb) +{ + gimple_stmt_iterator gsi; + edge e2 = NULL; + edge_iterator ei; + + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, "Redirecting edge %i->%i to %i\n", e->src->index, + e->dest->index, post_dom_bb->index); + + e2 = redirect_edge_and_branch (e, post_dom_bb); + cfg_altered = true; + + /* If edge was already around, no updating is neccesary. */ + if (e2 != e) + return e2; + + if (phi_nodes (post_dom_bb)) + { + /* We are sure that for every live PHI we are seeing control dependent BB. + This means that we can look up the end of control dependent path leading + to the PHI itself. */ + FOR_EACH_EDGE (e2, ei, post_dom_bb->preds) + if (e2 != e && dominated_by_p (CDI_POST_DOMINATORS, e->src, e2->src)) + break; + for (gsi = gsi_start_phis (post_dom_bb); !gsi_end_p (gsi);) + { + gimple phi = gsi_stmt (gsi); + tree op; + + /* Dead PHI do not imply control dependency. */ + if (!gimple_plf (phi, STMT_NECESSARY) + && is_gimple_reg (gimple_phi_result (phi))) + { + gsi_next (&gsi); + continue; + } + if (gimple_phi_arg_def (phi, e->dest_idx)) + { + gsi_next (&gsi); + continue; + } + + /* We didn't find edge to update. This can happen for PHIs on virtuals + since there is no control dependency relation on them. We are lost + here and must force renaming of the symbol. */ + if (!is_gimple_reg (gimple_phi_result (phi))) + { + mark_virtual_phi_result_for_renaming (phi); + remove_phi_node (&gsi, true); + continue; + } + if (!e2) + op = gimple_phi_arg_def (phi, e->dest_idx == 0 ? 1 : 0); + else + op = gimple_phi_arg_def (phi, e2->dest_idx); + add_phi_arg (phi, op, e); + gcc_assert (e2 || degenerate_phi_p (phi)); + gsi_next (&gsi); + } + } + return e; +} /* Remove dead statement pointed to by iterator I. Receives the basic block BB containing I so that we don't have to look it up. */ @@ -865,63 +1014,43 @@ remove_dead_stmt (gimple_stmt_iterator *i, basic_block bb) if (is_ctrl_stmt (stmt)) { basic_block post_dom_bb; + edge e, e2; + edge_iterator ei; - /* The post dominance info has to be up-to-date. */ - gcc_assert (dom_info_state (CDI_POST_DOMINATORS) == DOM_OK); - /* Get the immediate post dominator of bb. */ - post_dom_bb = get_immediate_dominator (CDI_POST_DOMINATORS, bb); - - /* There are three particularly problematical cases. + post_dom_bb = get_live_post_dom (bb); - 1. Blocks that do not have an immediate post dominator. This - can happen with infinite loops. + e = find_edge (bb, post_dom_bb); - 2. Blocks that are only post dominated by the exit block. These - can also happen for infinite loops as we create fake edges - in the dominator tree. - - 3. If the post dominator has PHI nodes we may be able to compute - the right PHI args for them. - - In each of these cases we must remove the control statement - as it may reference SSA_NAMEs which are going to be removed and - we remove all but one outgoing edge from the block. */ - if (! post_dom_bb - || post_dom_bb == EXIT_BLOCK_PTR - || phi_nodes (post_dom_bb)) - ; + /* If edge is already there, try to use it. This avoids need to update + PHI nodes. Also watch for cases where post dominator does not exists + or is exit block. These can happen for infinite loops as we create + fake edges in the dominator tree. */ + if (e) + ; + else if (! post_dom_bb || post_dom_bb == EXIT_BLOCK_PTR) + e = EDGE_SUCC (bb, 0); else - { - /* Redirect the first edge out of BB to reach POST_DOM_BB. */ - redirect_edge_and_branch (EDGE_SUCC (bb, 0), post_dom_bb); - PENDING_STMT (EDGE_SUCC (bb, 0)) = NULL; - - /* It is not sufficient to set cfg_altered below during edge - removal, in case BB has two successors and one of them - is POST_DOM_BB. */ - cfg_altered = true; - } - EDGE_SUCC (bb, 0)->probability = REG_BR_PROB_BASE; - EDGE_SUCC (bb, 0)->count = bb->count; + e = forward_edge_to_pdom (EDGE_SUCC (bb, 0), post_dom_bb); + gcc_assert (e); + e->probability = REG_BR_PROB_BASE; + e->count = bb->count; /* The edge is no longer associated with a conditional, so it does not have TRUE/FALSE flags. */ - EDGE_SUCC (bb, 0)->flags &= ~(EDGE_TRUE_VALUE | EDGE_FALSE_VALUE); + e->flags &= ~(EDGE_TRUE_VALUE | EDGE_FALSE_VALUE); /* The lone outgoing edge from BB will be a fallthru edge. */ - EDGE_SUCC (bb, 0)->flags |= EDGE_FALLTHRU; - - /* Remove the remaining the outgoing edges. */ - while (!single_succ_p (bb)) - { - /* FIXME. When we remove the edge, we modify the CFG, which - in turn modifies the dominator and post-dominator tree. - Is it safe to postpone recomputing the dominator and - post-dominator tree until the end of this pass given that - the post-dominators are used above? */ - cfg_altered = true; - remove_edge (EDGE_SUCC (bb, 1)); - } + e->flags |= EDGE_FALLTHRU; + + /* Remove the remaining outgoing edges. */ + for (ei = ei_start (bb->succs); (e2 = ei_safe_edge (ei)); ) + if (e != e2) + { + cfg_altered = true; + remove_edge (e2); + } + else + ei_next (&ei); } unlink_stmt_vdef (stmt); @@ -998,7 +1127,42 @@ eliminate_unnecessary_stmts (void) } } } - + /* Since we don't track liveness of virtual PHI nodes, it is possible that we + rendered some PHI nodes unreachable while they are still in use. + Mark them for renaming. */ + if (cfg_altered) + { + basic_block next_bb; + find_unreachable_blocks (); + for (bb = ENTRY_BLOCK_PTR->next_bb; bb != EXIT_BLOCK_PTR; bb = next_bb) + { + next_bb = bb->next_bb; + if (!(bb->flags & BB_REACHABLE)) + { + for (gsi = gsi_start_phis (bb); !gsi_end_p (gsi); gsi_next (&gsi)) + if (!is_gimple_reg (gimple_phi_result (gsi_stmt (gsi)))) + { + bool found = false; + imm_use_iterator iter; + + FOR_EACH_IMM_USE_STMT (stmt, iter, gimple_phi_result (gsi_stmt (gsi))) + { + if (!(gimple_bb (stmt)->flags & BB_REACHABLE)) + continue; + if (gimple_code (stmt) == GIMPLE_PHI + || gimple_plf (stmt, STMT_NECESSARY)) + { + found = true; + BREAK_FROM_IMM_USE_STMT (iter); + } + } + if (found) + mark_virtual_phi_result_for_renaming (gsi_stmt (gsi)); + } + delete_basic_block (bb); + } + } + } FOR_EACH_BB (bb) { /* Remove dead PHI nodes. */ @@ -1046,6 +1210,8 @@ tree_dce_init (bool aggressive) last_stmt_necessary = sbitmap_alloc (last_basic_block); sbitmap_zero (last_stmt_necessary); + bb_contains_live_stmts = sbitmap_alloc (last_basic_block); + sbitmap_zero (bb_contains_live_stmts); } processed = sbitmap_alloc (num_ssa_names + 1); @@ -1070,6 +1236,8 @@ tree_dce_done (bool aggressive) sbitmap_free (visited_control_parents); sbitmap_free (last_stmt_necessary); + sbitmap_free (bb_contains_live_stmts); + bb_contains_live_stmts = NULL; } sbitmap_free (processed); @@ -1097,6 +1265,13 @@ perform_tree_ssa_dce (bool aggressive) struct edge_list *el = NULL; bool something_changed = 0; + /* Preheaders are needed for SCEV to work. + Simple lateches and recorded exits improve chances that loop will + proved to be finite in testcases such as in loop-15.c and loop-24.c */ + if (aggressive) + loop_optimizer_init (LOOPS_NORMAL + | LOOPS_HAVE_RECORDED_EXITS); + tree_dce_init (aggressive); if (aggressive) @@ -1116,6 +1291,9 @@ perform_tree_ssa_dce (bool aggressive) find_obviously_necessary_stmts (el); + if (aggressive) + loop_optimizer_finalize (); + longest_chain = 0; total_chain = 0; chain_ovfl = false; diff --git a/gcc/tree-ssa-live.c b/gcc/tree-ssa-live.c index a710c65d3b4..d4166944e97 100644 --- a/gcc/tree-ssa-live.c +++ b/gcc/tree-ssa-live.c @@ -795,6 +795,7 @@ remove_unused_locals (void) && TREE_CODE (t) != PARM_DECL && TREE_CODE (t) != RESULT_DECL && !(ann = var_ann (t))->used + && !ann->is_heapvar && !TREE_ADDRESSABLE (t)) remove_referenced_var (t); remove_unused_scope_block_p (DECL_INITIAL (current_function_decl)); diff --git a/gcc/tree-ssa-loop-ivcanon.c b/gcc/tree-ssa-loop-ivcanon.c index 8e45bbb97e6..a04466a4027 100644 --- a/gcc/tree-ssa-loop-ivcanon.c +++ b/gcc/tree-ssa-loop-ivcanon.c @@ -558,187 +558,3 @@ tree_unroll_loops_completely (bool may_increase_size, bool unroll_outer) return 0; } - -/* Checks whether LOOP is empty. */ - -static bool -empty_loop_p (struct loop *loop) -{ - edge exit; - basic_block *body; - gimple_stmt_iterator gsi; - unsigned i; - - /* If the loop has multiple exits, it is too hard for us to handle. - Similarly, if the exit is not dominating, we cannot determine - whether the loop is not infinite. */ - exit = single_dom_exit (loop); - if (!exit) - return false; - - /* The loop must be finite. */ - if (!finite_loop_p (loop)) - return false; - - /* Values of all loop exit phi nodes must be invariants. */ - for (gsi = gsi_start(phi_nodes (exit->dest)); !gsi_end_p (gsi); gsi_next (&gsi)) - { - gimple phi = gsi_stmt (gsi); - tree def; - - if (!is_gimple_reg (PHI_RESULT (phi))) - continue; - - def = PHI_ARG_DEF_FROM_EDGE (phi, exit); - - if (!expr_invariant_in_loop_p (loop, def)) - return false; - } - - /* And there should be no memory modifying or from other reasons - unremovable statements. */ - body = get_loop_body (loop); - for (i = 0; i < loop->num_nodes; i++) - { - /* Irreducible region might be infinite. */ - if (body[i]->flags & BB_IRREDUCIBLE_LOOP) - { - free (body); - return false; - } - - for (gsi = gsi_start_bb (body[i]); !gsi_end_p (gsi); gsi_next (&gsi)) - { - gimple stmt = gsi_stmt (gsi); - - if (gimple_vdef (stmt) - || gimple_has_volatile_ops (stmt)) - { - free (body); - return false; - } - - /* Also, asm statements and calls may have side effects and we - cannot change the number of times they are executed. */ - switch (gimple_code (stmt)) - { - case GIMPLE_CALL: - if (gimple_has_side_effects (stmt)) - { - free (body); - return false; - } - break; - - case GIMPLE_ASM: - /* We cannot remove volatile assembler. */ - if (gimple_asm_volatile_p (stmt)) - { - free (body); - return false; - } - break; - - default: - break; - } - } - } - free (body); - - return true; -} - -/* Remove LOOP by making it exit in the first iteration. */ - -static void -remove_empty_loop (struct loop *loop) -{ - edge exit = single_dom_exit (loop), non_exit; - gimple cond_stmt = last_stmt (exit->src); - basic_block *body; - unsigned n_before, freq_in, freq_h; - gcov_type exit_count = exit->count; - - if (dump_file) - fprintf (dump_file, "Removing empty loop %d\n", loop->num); - - non_exit = EDGE_SUCC (exit->src, 0); - if (non_exit == exit) - non_exit = EDGE_SUCC (exit->src, 1); - - if (exit->flags & EDGE_TRUE_VALUE) - gimple_cond_make_true (cond_stmt); - else - gimple_cond_make_false (cond_stmt); - update_stmt (cond_stmt); - - /* Let us set the probabilities of the edges coming from the exit block. */ - exit->probability = REG_BR_PROB_BASE; - non_exit->probability = 0; - non_exit->count = 0; - - /* Update frequencies and counts. Everything before - the exit needs to be scaled FREQ_IN/FREQ_H times, - where FREQ_IN is the frequency of the entry edge - and FREQ_H is the frequency of the loop header. - Everything after the exit has zero frequency. */ - freq_h = loop->header->frequency; - freq_in = EDGE_FREQUENCY (loop_preheader_edge (loop)); - if (freq_h != 0) - { - body = get_loop_body_in_dom_order (loop); - for (n_before = 1; n_before <= loop->num_nodes; n_before++) - if (body[n_before - 1] == exit->src) - break; - scale_bbs_frequencies_int (body, n_before, freq_in, freq_h); - scale_bbs_frequencies_int (body + n_before, loop->num_nodes - n_before, - 0, 1); - free (body); - } - - /* Number of executions of exit is not changed, thus we need to restore - the original value. */ - exit->count = exit_count; -} - -/* Removes LOOP if it is empty. Returns true if LOOP is removed. CHANGED - is set to true if LOOP or any of its subloops is removed. */ - -static bool -try_remove_empty_loop (struct loop *loop, bool *changed) -{ - bool nonempty_subloop = false; - struct loop *sub; - - /* First, all subloops must be removed. */ - for (sub = loop->inner; sub; sub = sub->next) - nonempty_subloop |= !try_remove_empty_loop (sub, changed); - - if (nonempty_subloop || !empty_loop_p (loop)) - return false; - - remove_empty_loop (loop); - *changed = true; - return true; -} - -/* Remove the empty loops. */ - -unsigned int -remove_empty_loops (void) -{ - bool changed = false; - struct loop *loop; - - for (loop = current_loops->tree_root->inner; loop; loop = loop->next) - try_remove_empty_loop (loop, &changed); - - if (changed) - { - scev_reset (); - return TODO_cleanup_cfg; - } - return 0; -} - diff --git a/gcc/tree-ssa-loop.c b/gcc/tree-ssa-loop.c index 33cb130e4ca..4dcdc02d2d6 100644 --- a/gcc/tree-ssa-loop.c +++ b/gcc/tree-ssa-loop.c @@ -433,37 +433,6 @@ struct gimple_opt_pass pass_scev_cprop = } }; -/* Remove empty loops. */ - -static unsigned int -tree_ssa_empty_loop (void) -{ - if (number_of_loops () <= 1) - return 0; - - return remove_empty_loops (); -} - -struct gimple_opt_pass pass_empty_loop = -{ - { - GIMPLE_PASS, - "empty", /* name */ - NULL, /* gate */ - tree_ssa_empty_loop, /* execute */ - NULL, /* sub */ - NULL, /* next */ - 0, /* static_pass_number */ - TV_COMPLETE_UNROLL, /* tv_id */ - PROP_cfg | PROP_ssa, /* properties_required */ - 0, /* properties_provided */ - 0, /* properties_destroyed */ - 0, /* todo_flags_start */ - TODO_dump_func | TODO_verify_loops - | TODO_ggc_collect /* todo_flags_finish */ - } -}; - /* Record bounds on numbers of iterations of loops. */ static unsigned int diff --git a/gcc/tree-ssa-sink.c b/gcc/tree-ssa-sink.c index 227ad11253c..4f16addb323 100644 --- a/gcc/tree-ssa-sink.c +++ b/gcc/tree-ssa-sink.c @@ -384,6 +384,11 @@ statement_sink_location (gimple stmt, basic_block frombb, || sinkbb->loop_father != frombb->loop_father) return false; + /* Move the expression to a post dominator can't reduce the number of + executions. */ + if (dominated_by_p (CDI_POST_DOMINATORS, frombb, sinkbb)) + return false; + *togsi = gsi_for_stmt (use); return true; } @@ -411,6 +416,11 @@ statement_sink_location (gimple stmt, basic_block frombb, || sinkbb->loop_father != frombb->loop_father) return false; + /* Move the expression to a post dominator can't reduce the number of + executions. */ + if (dominated_by_p (CDI_POST_DOMINATORS, frombb, sinkbb)) + return false; + *togsi = gsi_after_labels (sinkbb); return true; diff --git a/gcc/tree-ssa-structalias.c b/gcc/tree-ssa-structalias.c index ad5482aa4ae..303bd1f6e42 100644 --- a/gcc/tree-ssa-structalias.c +++ b/gcc/tree-ssa-structalias.c @@ -337,10 +337,11 @@ new_var_info (tree t, const char *name) ret->decl = t; /* Vars without decl are artificial and do not have sub-variables. */ ret->is_artificial_var = (t == NULL_TREE); - ret->is_full_var = (t == NULL_TREE); - ret->is_heap_var = false; ret->is_special_var = false; ret->is_unknown_size_var = false; + ret->is_full_var = (t == NULL_TREE); + ret->is_heap_var = false; + ret->is_restrict_var = false; ret->may_have_pointers = true; ret->is_global_var = (t == NULL_TREE); if (t && DECL_P (t)) @@ -3473,7 +3474,10 @@ handle_lhs_call (tree lhs, int flags, VEC(ce_s, heap) *rhsc) { varinfo_t vi; vi = make_constraint_from_heapvar (get_vi_for_tree (lhs), "HEAP"); - make_copy_constraint (vi, nonlocal_id); + /* We delay marking allocated storage global until we know if + it escapes. */ + DECL_EXTERNAL (vi->decl) = 0; + vi->is_global_var = 0; } else if (VEC_length (ce_s, rhsc) > 0) { @@ -3910,6 +3914,13 @@ find_func_aliases (gimple origt) { make_escape_constraint (gimple_assign_rhs1 (t)); } + /* Handle escapes through return. */ + else if (gimple_code (t) == GIMPLE_RETURN + && gimple_return_retval (t) != NULL_TREE + && could_have_pointers (gimple_return_retval (t))) + { + make_escape_constraint (gimple_return_retval (t)); + } /* Handle asms conservatively by adding escape constraints to everything. */ else if (gimple_code (t) == GIMPLE_ASM) { @@ -4776,8 +4787,10 @@ find_what_var_points_to (varinfo_t vi, struct pt_solution *pt) else if (vi->is_heap_var) /* We represent heapvars in the points-to set properly. */ ; + else if (vi->id == readonly_id) + /* Nobody cares. */ + ; else if (vi->id == anything_id - || vi->id == readonly_id || vi->id == integer_id) pt->anything = 1; } @@ -5350,6 +5363,7 @@ compute_points_to_sets (void) struct scc_info *si; basic_block bb; unsigned i; + varinfo_t vi; timevar_push (TV_TREE_PTA); @@ -5447,6 +5461,14 @@ compute_points_to_sets (void) points-to solution queries. */ cfun->gimple_df->escaped.escaped = 0; + /* Mark escaped HEAP variables as global. */ + for (i = 0; VEC_iterate (varinfo_t, varmap, i, vi); ++i) + if (vi->is_heap_var + && !vi->is_restrict_var + && !vi->is_global_var) + DECL_EXTERNAL (vi->decl) = vi->is_global_var + = pt_solution_includes (&cfun->gimple_df->escaped, vi->decl); + /* Compute the points-to sets for pointer SSA_NAMEs. */ for (i = 0; i < num_ssa_names; ++i) { diff --git a/gcc/tree-switch-conversion.c b/gcc/tree-switch-conversion.c index 292c49cd126..2e6808b7a4d 100644 --- a/gcc/tree-switch-conversion.c +++ b/gcc/tree-switch-conversion.c @@ -556,13 +556,13 @@ build_arrays (gimple swtch) gsi = gsi_for_stmt (swtch); arr_index_type = build_index_type (info.range_size); - tmp = create_tmp_var (arr_index_type, "csti"); + tmp = create_tmp_var (TREE_TYPE (info.index_expr), "csti"); add_referenced_var (tmp); tidx = make_ssa_name (tmp, NULL); sub = fold_build2 (MINUS_EXPR, TREE_TYPE (info.index_expr), info.index_expr, fold_convert (TREE_TYPE (info.index_expr), info.range_min)); - sub = force_gimple_operand_gsi (&gsi, fold_convert (arr_index_type, sub), + sub = force_gimple_operand_gsi (&gsi, sub, false, NULL, true, GSI_SAME_STMT); stmt = gimple_build_assign (tidx, sub); SSA_NAME_DEF_STMT (tidx) = stmt; diff --git a/gcc/tree-vect-stmts.c b/gcc/tree-vect-stmts.c index 586e906b1de..1c9415b7031 100644 --- a/gcc/tree-vect-stmts.c +++ b/gcc/tree-vect-stmts.c @@ -3910,6 +3910,14 @@ vect_analyze_stmt (gimple stmt, bool *need_to_vectorize, slp_tree node) print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); } + if (gimple_has_volatile_ops (stmt)) + { + if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) + fprintf (vect_dump, "not vectorized: stmt has volatile operands"); + + return false; + } + /* Skip stmts that do not need to be vectorized. In loops this is expected to include: - the COND_EXPR which is the loop exit condition diff --git a/gcc/tree.c b/gcc/tree.c index c4ed82bc878..ad81827052a 100644 --- a/gcc/tree.c +++ b/gcc/tree.c @@ -45,6 +45,7 @@ along with GCC; see the file COPYING3. If not see #include "output.h" #include "target.h" #include "langhooks.h" +#include "tree-inline.h" #include "tree-iterator.h" #include "basic-block.h" #include "tree-flow.h" @@ -2678,11 +2679,102 @@ type_contains_placeholder_p (tree type) return result; } +/* Push tree EXP onto vector QUEUE if it is not already present. */ + +static void +push_without_duplicates (tree exp, VEC (tree, heap) **queue) +{ + unsigned int i; + tree iter; + + for (i = 0; VEC_iterate (tree, *queue, i, iter); i++) + if (simple_cst_equal (iter, exp) == 1) + break; + + if (!iter) + VEC_safe_push (tree, heap, *queue, exp); +} + +/* Given a tree EXP, find all occurences of references to fields + in a PLACEHOLDER_EXPR and place them in vector REFS without + duplicates. Also record VAR_DECLs and CONST_DECLs. Note that + we assume here that EXP contains only arithmetic expressions + or CALL_EXPRs with PLACEHOLDER_EXPRs occurring only in their + argument list. */ + +void +find_placeholder_in_expr (tree exp, VEC (tree, heap) **refs) +{ + enum tree_code code = TREE_CODE (exp); + tree inner; + int i; + + /* We handle TREE_LIST and COMPONENT_REF separately. */ + if (code == TREE_LIST) + { + FIND_PLACEHOLDER_IN_EXPR (TREE_CHAIN (exp), refs); + FIND_PLACEHOLDER_IN_EXPR (TREE_VALUE (exp), refs); + } + else if (code == COMPONENT_REF) + { + for (inner = TREE_OPERAND (exp, 0); + REFERENCE_CLASS_P (inner); + inner = TREE_OPERAND (inner, 0)) + ; + + if (TREE_CODE (inner) == PLACEHOLDER_EXPR) + push_without_duplicates (exp, refs); + else + FIND_PLACEHOLDER_IN_EXPR (TREE_OPERAND (exp, 0), refs); + } + else + switch (TREE_CODE_CLASS (code)) + { + case tcc_constant: + break; + + case tcc_declaration: + /* Variables allocated to static storage can stay. */ + if (!TREE_STATIC (exp)) + push_without_duplicates (exp, refs); + break; + + case tcc_expression: + /* This is the pattern built in ada/make_aligning_type. */ + if (code == ADDR_EXPR + && TREE_CODE (TREE_OPERAND (exp, 0)) == PLACEHOLDER_EXPR) + { + push_without_duplicates (exp, refs); + break; + } + + /* Fall through... */ + + case tcc_exceptional: + case tcc_unary: + case tcc_binary: + case tcc_comparison: + case tcc_reference: + for (i = 0; i < TREE_CODE_LENGTH (code); i++) + FIND_PLACEHOLDER_IN_EXPR (TREE_OPERAND (exp, i), refs); + break; + + case tcc_vl_exp: + for (i = 1; i < TREE_OPERAND_LENGTH (exp); i++) + FIND_PLACEHOLDER_IN_EXPR (TREE_OPERAND (exp, i), refs); + break; + + default: + gcc_unreachable (); + } +} + /* Given a tree EXP, a FIELD_DECL F, and a replacement value R, return a tree with all occurrences of references to F in a - PLACEHOLDER_EXPR replaced by R. Note that we assume here that EXP - contains only arithmetic expressions or a CALL_EXPR with a - PLACEHOLDER_EXPR occurring only in its arglist. */ + PLACEHOLDER_EXPR replaced by R. Also handle VAR_DECLs and + CONST_DECLs. Note that we assume here that EXP contains only + arithmetic expressions or CALL_EXPRs with PLACEHOLDER_EXPRs + occurring only in their argument list. */ tree substitute_in_expr (tree exp, tree f, tree r) @@ -2733,14 +2825,24 @@ substitute_in_expr (tree exp, tree f, tree r) switch (TREE_CODE_CLASS (code)) { case tcc_constant: - case tcc_declaration: return exp; + case tcc_declaration: + if (exp == f) + return r; + else + return exp; + + case tcc_expression: + if (exp == f) + return r; + + /* Fall through... */ + case tcc_exceptional: case tcc_unary: case tcc_binary: case tcc_comparison: - case tcc_expression: case tcc_reference: switch (TREE_CODE_LENGTH (code)) { @@ -2803,6 +2905,17 @@ substitute_in_expr (tree exp, tree f, tree r) new_tree = NULL_TREE; + /* If we are trying to replace F with a constant, inline back + functions which do nothing else than computing a value from + the arguments they are passed. This makes it possible to + fold partially or entirely the replacement expression. */ + if (CONSTANT_CLASS_P (r) && code == CALL_EXPR) + { + tree t = maybe_inline_call_in_expr (exp); + if (t) + return SUBSTITUTE_IN_EXPR (t, f, r); + } + for (i = 1; i < TREE_OPERAND_LENGTH (exp); i++) { tree op = TREE_OPERAND (exp, i); diff --git a/gcc/tree.h b/gcc/tree.h index 3a748a7fefa..e2eb76e8021 100644 --- a/gcc/tree.h +++ b/gcc/tree.h @@ -4216,6 +4216,7 @@ extern tree round_down (tree, int); extern tree get_pending_sizes (void); extern void put_pending_size (tree); extern void put_pending_sizes (tree); +extern void finalize_size_functions (void); /* Type for sizes of data-type. */ @@ -4361,10 +4362,30 @@ extern bool contains_placeholder_p (const_tree); extern bool type_contains_placeholder_p (tree); +/* Given a tree EXP, find all occurences of references to fields + in a PLACEHOLDER_EXPR and place them in vector REFS without + duplicates. Also record VAR_DECLs and CONST_DECLs. Note that + we assume here that EXP contains only arithmetic expressions + or CALL_EXPRs with PLACEHOLDER_EXPRs occurring only in their + argument list. */ + +extern void find_placeholder_in_expr (tree, VEC (tree, heap) **); + +/* This macro calls the above function but short-circuits the common + case of a constant to save time and also checks for NULL. */ + +#define FIND_PLACEHOLDER_IN_EXPR(EXP, V) \ +do { \ + if((EXP) && !TREE_CONSTANT (EXP)) \ + find_placeholder_in_expr (EXP, V); \ +} while (0) + /* Given a tree EXP, a FIELD_DECL F, and a replacement value R, return a tree with all occurrences of references to F in a - PLACEHOLDER_EXPR replaced by R. Note that we assume here that EXP - contains only arithmetic expressions. */ + PLACEHOLDER_EXPR replaced by R. Also handle VAR_DECLs and + CONST_DECLs. Note that we assume here that EXP contains only + arithmetic expressions or CALL_EXPRs with PLACEHOLDER_EXPRs + occurring only in their argument list. */ extern tree substitute_in_expr (tree, tree, tree); diff --git a/gcc/unwind-dw2-fde-darwin.c b/gcc/unwind-dw2-fde-darwin.c index cd00ea22f4c..c033bbe0cb5 100644 --- a/gcc/unwind-dw2-fde-darwin.c +++ b/gcc/unwind-dw2-fde-darwin.c @@ -27,7 +27,7 @@ #include "tsystem.h" #include <string.h> #include <stdlib.h> -#include "dwarf2.h" +#include "elf/dwarf2.h" #include "unwind.h" #define NO_BASE_OF_ENCODED_VALUE #define DWARF2_OBJECT_END_PTR_EXTENSION diff --git a/gcc/unwind-dw2-fde-glibc.c b/gcc/unwind-dw2-fde-glibc.c index d246ae12497..8f6473dbaab 100644 --- a/gcc/unwind-dw2-fde-glibc.c +++ b/gcc/unwind-dw2-fde-glibc.c @@ -37,7 +37,7 @@ #endif #include "coretypes.h" #include "tm.h" -#include "dwarf2.h" +#include "elf/dwarf2.h" #include "unwind.h" #define NO_BASE_OF_ENCODED_VALUE #include "unwind-pe.h" @@ -135,7 +135,8 @@ _Unwind_IteratePhdrCallback (struct dl_phdr_info *info, size_t size, void *ptr) const struct unw_eh_frame_hdr *hdr; _Unwind_Ptr eh_frame; struct object ob; - + _Unwind_Ptr pc_low = 0, pc_high = 0; + struct ext_dl_phdr_info { ElfW(Addr) dlpi_addr; @@ -226,8 +227,6 @@ _Unwind_IteratePhdrCallback (struct dl_phdr_info *info, size_t size, void *ptr) + sizeof (info->dlpi_phnum)) return -1; - _Unwind_Ptr pc_low = 0, pc_high = 0; - /* See if PC falls into one of the loaded segments. Find the eh_frame segment at the same time. */ for (n = info->dlpi_phnum; --n >= 0; phdr++) diff --git a/gcc/unwind-dw2-fde.c b/gcc/unwind-dw2-fde.c index 4aa9d82af8d..6780700e6af 100644 --- a/gcc/unwind-dw2-fde.c +++ b/gcc/unwind-dw2-fde.c @@ -29,7 +29,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #include "tsystem.h" #include "coretypes.h" #include "tm.h" -#include "dwarf2.h" +#include "elf/dwarf2.h" #include "unwind.h" #define NO_BASE_OF_ENCODED_VALUE #include "unwind-pe.h" diff --git a/gcc/unwind-dw2.c b/gcc/unwind-dw2.c index 68a1a282b34..0ceda12a44b 100644 --- a/gcc/unwind-dw2.c +++ b/gcc/unwind-dw2.c @@ -27,7 +27,7 @@ #include "tsystem.h" #include "coretypes.h" #include "tm.h" -#include "dwarf2.h" +#include "elf/dwarf2.h" #include "unwind.h" #ifdef __USING_SJLJ_EXCEPTIONS__ # define NO_SIZE_OF_ENCODED_VALUE |