diff options
| author | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2009-10-12 17:47:23 +0000 |
|---|---|---|
| committer | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2009-10-12 17:47:23 +0000 |
| commit | fb754572ac5c1a0231033e64ed2836c570f79a5a (patch) | |
| tree | da0bb5304769685c4a8ebc749d05dcdc5035a828 /gcc | |
| parent | 27e0321aadb8c2c656af795612836cf896f0557d (diff) | |
| download | gcc-fb754572ac5c1a0231033e64ed2836c570f79a5a.tar.gz | |
2009-10-12 Basile Starynkevitch <basile@starynkevitch.net>
MELT branch merged with trunk rev 152672
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/melt-branch@152678 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
112 files changed, 2864 insertions, 499 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c2635dcb0e3..0714158ea99 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,262 @@ +2009-10-12 Stefan Dösinger <stefan@codeweavers.com> + + * config/i386/i386.md (vswapmov): New. + * config/i386/i386.c (ix86_handle_fndecl_attribute): New. + (ix86_function_ms_hook_prologue): New. + (ix86_expand_prologue): Handle ms_hook_prologue attribute. + * configure.ac: Test for swap suffix support in as. + * configure: Rebuild. + +2009-10-12 Jakub Jelinek <jakub@redhat.com> + + PR target/41680 + * config/i386/i386.md (split after *testqi_ext_3_rex64): Only narrow + paradoxical subregs to prevent partial register stalls if the inner + mode is integer mode. + +2009-10-12 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*setcc_<mode>_2): Do not use ix86_expand_clear + to zero operand 0. + +2009-10-12 Dodji Seketeli <dodji@redhat.com> + + PR c++/41570 + * gcc/dwarf2out.c (template_parameter_pack_die, + gen_formal_parameter_pack_die): Use add_name_and_src_coords_attributes. + +2009-10-12 Alexandre Oliva <aoliva@redhat.com> + + PR debug/41616 + * tree-into-ssa.c (insert_phi_nodes_for): Build debug bind stmts + on updates too. + (maybe_register_def): Likewise. Take stmt iterator. + (rewrite_update_stmt): Take stmt iterator and pass it on. + (rewrite_update_enter_block): Pass stmt iterator. + +2009-10-11 Andrew Pinski <andrew_pinski@playstation.sony.com> + + * config/spu/spu.c (TARGET_BUILTIN_DECL): Define. + (spu_builtin_decl): New function. + +2009-10-12 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (SWIM): New mode iterator. + (mov<mode>cc): Macroize expander from mov{qi,hi,si,di}cc patterns + using SWIM mode iterator. + (x86_mov<mode>cc_0_m1): Macroize insn from x86_mov{si,di}cc_0_m1 + patterns using SWI48 mode iterator. + (*x86_mov<mode>cc_0_m1_se): Macroize insn from + *x86_mov{si,di}cc_0_m1_se patterns using SWI48 mode iterator. + (*x86_mov<mode>cc_0_m1_neg): New insn pattern. + (*mov<mode>cc_noc): Macroize insn from *mov{hi,si,di}cc_noc + patterns using SWI248 mode iterator. + * config/i386/i386.c (ix86_expand_int_movcc): Update the call to + gen_x86_movdicc_0_m1_rex64 for renamed function + +2009-10-11 Jose Ruiz <ruiz@adacore.com> + Eric Botcazou <ebotcazou@adacore.com> + + PR target/33743 + * config/sparc/sol2.h (MD_UNWIND_SUPPORT): Define. + * config/sparc/sol2-unwind.h: New file. + +2009-10-11 Olivier Hainque <hainque@adacore.com> + Eric Botcazou <ebotcazou@adacore.com> + + PR target/33743 + * config/i386/sol2.h (MD_UNWIND_SUPPORT): Define. + * config/i386/sol2-unwind.h: New file. + +2009-10-11 H.J. Lu <hongjiu.lu@intel.com> + + PR target/41665 + * config/i386/i386.md (addsi_1_zext): Get the proper second + operand for lea. + +2009-10-11 Richard Sandiford <rdsandiford@googlemail.com> + + * simplify-rtx.c (simplify_replace_rtx): Use rtx_equal_p for + all OLD_RTXes, not just REGs. Use copy_rtx to create the + replacement value. + +2009-10-11 Richard Guenther <rguenther@suse.de> + + * gimple.c (iterative_hash_type_name): Do not handle special + anonymous names. + +2009-10-11 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*setcc_di_1): New insn_and_split pattern. + (*setcc_si_1_and): Ditto. + (*setcc_si_1_movzbl): Ditto. + (*setcc_<mode>_2): Ditto. + (*setcc_qi): Rename from *setcc_1. + (*setcc_qi_slp): Rename from *setcc_2. + + (*zero_extendqihi2_movzbw_and splitter): Use ix86_expand_clear. + (*zero_extendqisi2_movzbw_and splitter): Ditto. + + * config/i386/i386.c (ix86_expand_clear): Remove reload_completed from + "if" condition, there is already assert with reload_completed present. + +2009-10-11 Gerald Pfeifer <gerald@pfeifer.com> + + * plugin.c (try_init_one_plugin): Improve constness of variable err. + +2009-10-10 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/install.texi (Final install): Refer to + http://gcc.gnu.org/bugs/ for bug reporting. + +2009-10-10 Peter Bergner <bergner@vnet.ibm.com> + + * configure.ac: Add test for dci instruction. + * configure: Regenerate. + * config.in: Likewise. + * config.gcc: Handle --with-cpu=476 and --with-cpu=476fp. + * doc/invoke.texi: Add cpu_type 476 and 476fp. + (-mmulhw): Add 476 to description. + (-mdlmzb): Likewise. + * config/rs6000/t-fprules (MULTILIB_MATCHES_FLOAT): Include -mcpu=476. + * config/rs6000/rs6000.c (processor_costs): Add ppc476_cost. + (processor_target_table): Add 476 and 476fp entries. + (rs6000_override_options): Use ppc476_cost for PROCESSOR_PPC476. + (rs6000_issue_rate): Add CPU_PPC476. + * config/rs6000/rs6000.h (ASM_CPU_476_SPEC): Define. + (ASM_CPU_SPEC): Pass %(asm_cpu_476) for -mcpu=476 and -mcpu=476fp. + (processor_type): Add PROCESSOR_PPC476. + (EXTRA_SPECS): Add asm_cpu_476 string. + * config/rs6000/rs6000.md: (define_attr "type"): Add isel attribute. + (define_attr "cpu"): Add ppc476. + Include 476.md. + Update comments for 476. + (isel_signed, isel_unsigned): Change to use "isel" type attribute. + * config/rs6000/vxworks.h (CPP_SPEC): Handle 464 and 476. + Update copyright year. + * config/rs6000/476.md: New file. + * config/rs6000/40x.md: Add description for "isel" attribute. + Update copyright year. + * config/rs6000/440.md: Likewise. + * config/rs6000/603.md: Likewise. + * config/rs6000/6xx.md: Likewise. + * config/rs6000/7450.md: Likewise. + * config/rs6000/7xx.md: Likewise. + * config/rs6000/8540.md: Likewise. + * config/rs6000/cell.md: Likewise. + * config/rs6000/e300c2c3.md: Likewise. + * config/rs6000/e500mc.md: Likewise. + * config/rs6000/mpc.md: Likewise. + * config/rs6000/power4.md: Likewise. + * config/rs6000/power5.md: Likewise. + * config/rs6000/power6.md: Likewise. + * config/rs6000/power7.md: Likewise. + * config/rs6000/rios1.md: Likewise. + * config/rs6000/rios2.md: Likewise. + * config/rs6000/rs64.md: Likewise. + +2009-10-10 Richard Guenther <rguenther@suse.de> + + PR tree-optimization/41654 + * tree-ssa-ifcombine.c (ifcombine_ifandif): Properly canonicalize + a cond expr before calling gimple_cond_set_condition_from_tree. + (ifcombine_iforif): Likewise. + +2009-10-09 Ian Lance Taylor <iant@google.com> + + * configure.ac: Use AC_SEARCH_LIBS to find dlopen. + * configure: Rebuild. + +2009-10-09 Neil Vachharajani <nvachhar@google.com> + + * doc/cpp.texi (Other Directives): Do not list #ident and #sccs as + deprecated. + +2009-10-09 Richard Guenther <rguenther@suse.de> + + PR lto/41638 + * target-def.h (TARGET_BUILTIN_DECL): Define. + (TARGET_INITIALIZER): Add TARGET_BUILTIN_DECL. + * target.h (struct gcc_target): Add builtin_decl target hook. + * doc/tm.texi (TARGET_BUILTIN_DECL): Document. + * lto-streamer-in.c (lto_get_builtin_tree): Fix handling of + target builtins. + * lto-streamer-out.c (lto_output_tree_pointers): Use sorry, + not gcc_unreachable. + (lto_output_builtin_tree): Sorry if the target does not support + streaming target builtins. + * config/rs6000/rs6000.c (TARGET_BUILTIN_DECL): Define. + (rs6000_builtin_decl): New function. + * config/i386/i386.c (TARGET_BUILTIN_DECL): Define. + (ix86_builtin_decl): New function. + +2009-10-09 Jakub Jelinek <jakub@redhat.com> + + PR preprocessor/41445 + * c-ppoutput.c (do_line_change): New function. + (cb_line_change): Use it. + (scan_translation_unit): Call do_line_change if + avoid_paste or PREV_WHITE and token location is on a different line + than print.src_line. + + PR debug/40521 + * dwarf2out.c (dwarf2out_init): Test whether + HAVE_GAS_CFI_SECTIONS_DIRECTIVE is non-zero instead of checking + it is defined. + + PR rtl-optimization/41646 + * calls.c (expand_call): For BLKmode types returned in registers + avoid likely spilled hard regs in copy_blkmode_from_reg generated + insns. + +2009-10-09 Richard Guenther <rguenther@suse.de> + + PR tree-optimization/41634 + * tree-ssa-dom.c (remove_local_expressions_from_table): Assert + we remove the correct elements. + (optimize_stmt): Make sure to update stmt operands before + optimizing redundancies. + +2009-10-09 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.md ("prefetch"): Remove stcmh for prefetching. + +2009-10-09 Richard Guenther <rguenther@suse.de> + + PR driver/41637 + * lto-wrapper.c (ltrans_output_file, flto_out, args_name): New + globals. + (lto_wrapper_exit): New function. + (fatal): Use it. + (fatal_perror): Likewise. + (fork_execute): Use global args_name, do not free it. + (run_gcc): Use global ltrans_output_file, flto_out, do not free them. + * lto-streamer.h: Remove duplicate prototypes. + +2009-10-09 Richard Guenther <rguenther@suse.de> + + * cgraph.c (cgraph_create_edge): Check for NULL call_stmt + before calling stmt_can_throw_external. + +2009-10-09 Eric Botcazou <ebotcazou@adacore.com> + + PR tree-optimization/40071 + * tree-vect-data-refs.c (vect_create_data_ref_ptr): Build a ref-all + pointer if the original data reference doesn't conflict with the + created vector data reference. Fix long line. + +2009-10-09 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (any_div): New code iterator. + (u): Handle div and udiv. + (sgnprefix): Ditto. + (<u>divqi3): Macroize insn from {,u}divqi3 using any_div + code iterator. + (lfloor<MODEF:mode><SWI48:mode>2): Macroize insn from + lfloor<mode>{si,di}2 patterns using SWI48 mode iterator. + (lceil<MODEF:mode><SWI48:mode>2): Macroize insn from + lceil<mode>{si,di}2 patterns using SWI48 mode iterator. + 2009-10-08 Joseph Myers <joseph@codesourcery.com> * gcc.c (main): Remove trailing "." from diagnostics. @@ -36,6 +295,7 @@ * debug.c (do_nothing_debug_hooks): Add dummy entries for new hooks. (debug_nothing_uid): New function. * dbxout.c (dbx_debug_hooks): Add dummy entries for new hooks. + (xcoff_debug_hooks): Likewise. * sdbout.c (sdb_debug_hooks): Likewise. * vmsdbgout.c (vmsdbg_debug_hooks): Likewise. * doc/invoke.texi (-fenable-icf-debug): New option. @@ -226,8 +486,8 @@ 2009-10-07 Jan Hubicka <jh@suse.cz> - * lto-symtab.c (lto_cgraph_replace_node): Assert that inline clones has - no address taken. + * lto-symtab.c (lto_cgraph_replace_node): Assert that inline clones + has no address taken. * cgraph.c (cgraph_mark_needed_node): Assert that inline clones are never needed. (cgraph_clone_node): Clear externally_visible flag for clones. @@ -365,7 +625,7 @@ patterns using plusminus code iterator. (<plusminus_insn><mode>3): Macroize expander from add<mode>3 and sub<mode>3 patterns using plusminus code iterator. - * config/i386/i386.c (override_options): Update call to + * config/i386/i386.c (override_options): Update the call to gen_subdi_carry_rex64 for renamed function. (ix86_expand_int_addcc): Update calls to gen_subdi3_carry_rex64 and gen_adddi3_carry_rex64 for renamed functions. Use indirect @@ -393,8 +653,7 @@ 2009-10-06 Jerry Quinn <jlquinn@optonline.net> - * gimple.c (gimple_type_hash): Use CONST_CAST_TREE to fix - compilation. + * gimple.c (gimple_type_hash): Use CONST_CAST_TREE to fix compilation. 2009-10-05 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> @@ -634,34 +893,29 @@ Kenneth Zadeck <zadeck@naturalbridge.com> * Makefile.in (enable_lto): New. - (site.exp): If @enable_lto@ is set to 'yes' define - ENABLE_LTO. + (site.exp): If @enable_lto@ is set to 'yes' define ENABLE_LTO. (LINKER_PLUGIN_API_H): Define. (LTO_SYMTAB_H): Define. (LTO_STREAMER_H): Define. (TREE_VECTORIZER_H): Define. (INCLUDES): Add LIBELFINC. (OBJS-common): Add lto-cgraph.o, lto-streamer-in.o, - lto-streamer-out.o, lto-section-in.o, lto-section-out.o, - lto-symtab.o, lto-opts.o, lto-streamer.o, lto-wpa-fixup.o, - lto-compress.o. + lto-streamer-out.o, lto-section-in.o, lto-section-out.o, lto-symtab.o, + lto-opts.o, lto-streamer.o, lto-wpa-fixup.o, lto-compress.o. (MOSTLYCLEANFILES): Add lto-wrapper$(exeext) (native): Add lto-wrapper$(exeext) (lto-compress.o, lto-cgraph.o, lto-streamer-in.o, lto-streamer-out.o, lto-section-in.o, lto-section-out.o, - lto-symtab.o, lto-opts.o, lto-streamer.o, - lto-wpa-fixup.o): New rules. - (gimple.o): Add dependency on LTO_HEADER_H and - LTO_SECTION_OUT_H. + lto-symtab.o, lto-opts.o, lto-streamer.o, lto-wpa-fixup.o): New rules. + (gimple.o): Add dependency on LTO_HEADER_H and LTO_SECTION_OUT_H. (varasm.o): Add dependency on tree-iterator.h. (cgraph.o): Add dependency on cif-code.def. (ipa-reference.o): Add dependency on LTO_STREAMER_H. (ipa-pure-const.o): Likewise. (GTFILES): Add lto-symtab.c. (install-lto-wrapper): New. - * configure.ac: If 'lto' is in enable_languages, define - ENABLE_LTO and enable_lto. - If LIBELFLIBS is set, define HAVE_libelf. + * configure.ac: If 'lto' is in enable_languages, define ENABLE_LTO + and enable_lto. If LIBELFLIBS is set, define HAVE_libelf. * config.in: Regenerate. 2009-10-03 Rafael Espindola <espindola@google.com> @@ -782,8 +1036,7 @@ of pass_all_early_optimizations. Document reason. (pass_ipa_lto_gimple_out, pass_ipa_lto_wpa_fixup, pass_ipa_lto_finish_out): New pass. - (pass_ipa_summary_passes): Start and stop timers if the pass - has them. + (pass_ipa_summary_passes): Start and stop timers if the pass has them. (execute_all_ipa_transforms): New. (execute_one_pass): Don't call execute_one_ipa_transform_pass. (dump_properties, debug_properties): New. @@ -807,8 +1060,7 @@ 2009-10-03 Doug Kwan <dougkwan@google.com> Ollie Wild <aaw@google.com> - * ipa-prop.c (ipa_propagate_indirect_call_infos): Do - nothing in WPA. + * ipa-prop.c (ipa_propagate_indirect_call_infos): Do nothing in WPA. * collect2.c (LTO_MODE_NONE, LTO_MODE_LTO, LTO_MODE_WPA): New enums. (lto_mode): New variable. @@ -826,7 +1078,7 @@ * opts.c: Include lto-opts.h. (handle_option): Call lto_register_user_option for each valid option handled. - * (decode_options): Clear registered options before the options + (decode_options): Clear registered options before the options handling loop. 2009-10-03 Cary Coutant <ccoutant@google.com> @@ -839,8 +1091,7 @@ * gcc.c (LINK_COMMAND_SPEC): Use the -pass-through option to pass libgcc to the linker. - * ipa-cp.c (cgraph_gate_cp): Return false if LTRANS is - running. + * ipa-cp.c (cgraph_gate_cp): Return false if LTRANS is running. * collect2.c (maybe_run_lto_and_relink): Execute lto-wrapper. (collect_execute): Add flags argument. Pass flags to pex_run. Update @@ -874,8 +1125,7 @@ (lookup_type_pair): Increase initial hashtable size. (gimple_force_type_merge): Rely on type-pair symmetry. (visit): Remove excessive checking code. - (iterative_hash_type_name): Do not hash TYPE_NAME of - anonymous unions. + (iterative_hash_type_name): Do not hash TYPE_NAME of anonymous unions. (gimple_register_type): Remove getenv calls, shrink initial hashtable size. @@ -892,15 +1142,12 @@ edge->call_stmt_cannot_inline_p instead of calling gimple_call_cannot_inline_p. (cgraph_decide_inlining): Do nothing in WPA and LTRANS. - (cgraph_gate_ipa_early_inlining): Return false if - in_lto_p is set. + (cgraph_gate_ipa_early_inlining): Return false if in_lto_p is set. (inline_generate_summary): Do nothing in LTRANS. - * cgraph.c (initialize_inline_failed): Make sure - e->call_stmt exists before calling - gimple_call_cannot_inline_p. + * cgraph.c (initialize_inline_failed): Make sure e->call_stmt + exists before calling gimple_call_cannot_inline_p. (cgraph_create_edge): Set edge->call_stmt_cannot_inline_p. - (cgraph_clone_edge): Add argument STMT_UID. Modify all - callers. + (cgraph_clone_edge): Add argument STMT_UID. Modify all callers. Update new_edge->lto_stmt_uid. * cgraphbuild.c (reset_inline_failed): New. @@ -921,9 +1168,8 @@ (static_specs): Add cc1_non_lto_options, lto1_options and link_lto_options. (static_spec_function): Replace lto-single with lto-option. - (process_command): Handle -flto, -fwpa and -fltran - by setting current_lto_option and not passing it to subprocess - unconditionally. + (process_command): Handle -flto, -fwpa and -fltran by setting + current_lto_option and not passing it to subprocess unconditionally. 2009-10-03 Bill Maddox <maddox@google.com> @@ -948,13 +1194,10 @@ * c.opt: Add LTO to warn_abi and warn_psabi. - * tree.c (fld_worklist_push): Rename from PUSH. - Convert to static inline function. - Ignore language-specific nodes. - Update all users. + * tree.c (fld_worklist_push): Rename from PUSH. Convert to static + inline function. Ignore language-specific nodes. Update all users. (find_decls_types_r): Do not traverse the subtrees of - language-specific nodes. - Do not traverse DECL_INITIAL for TYPE_DECLs. + language-specific nodes. Do not traverse DECL_INITIAL for TYPE_DECLs. * tree.h (is_lang_specific): New. * langhooks.h (struct lang_hooks_for_decls): Remove may_need_assembler_name_p. Update all users. @@ -967,8 +1210,7 @@ lookup_type_for_runtime if TYPE is not a runtime type. * passes.c (register_pass): Call position_pass on - all_small_ipa_passes, all_regular_ipa_passes and - all_lto_gen_passes. + all_small_ipa_passes, all_regular_ipa_passes and all_lto_gen_passes. * timevar.def (TV_IPA_LTO_GIMPLE_IO): Define. (TV_IPA_LTO_DECL_IO): Define. (TV_IPA_LTO_CGRAPH_IO): Define. @@ -985,24 +1227,18 @@ * tree.c (free_lang_data_in_binf): Factor out of ... (free_lang_data_in_type): ... here. Call RECORD_OR_UNION_TYPE_P. - (need_assembler_name_p): Ignore DECL if it does not have - TREE_PUBLIC set. - Call lang_hooks.decls.may_need_assembler_name_p if set. - (free_lang_data_in_decl): Do not clear DECL_CONTEXT for - CONST_DECLs. - (free_lang_data): Set debug_info_level to - DINFO_LEVEL_NONE. - Set write_symbols to NO_DEBUG. - Set debug_hooks to do_nothing_debug_hooks. - (gate_free_lang_data): Return true if flag_generate_lto - is set. + (need_assembler_name_p): Ignore DECL if it does not have TREE_PUBLIC + set. Call lang_hooks.decls.may_need_assembler_name_p if set. + (free_lang_data_in_decl): Do not clear DECL_CONTEXT for CONST_DECLs. + (free_lang_data): Set debug_info_level to DINFO_LEVEL_NONE. Set + write_symbols to NO_DEBUG. Set debug_hooks to do_nothing_debug_hooks. + (gate_free_lang_data): Return true if flag_generate_lto is set. (walk_tree_1): Call RECORD_OR_UNION_TYPE_P. * c-common.h (set_builtin_user_assembler_name): Move ... * tree.h (set_builtin_user_assembler_name): ... here. * common.opt (flto-report): New flag. - * opts.c (complain_wrong_lang): Do not complain if - running lto1. + * opts.c (complain_wrong_lang): Do not complain if running lto1. * collect2.c (scan_prog_file): Send the error output of 'nm' to HOST_BIT_BUCKET. @@ -1041,17 +1277,16 @@ Ollie Wild <aaw@google.com> * doc/install.texi: Add documentation for libelf and --enable-lto. - * doc/invoke.texi: Document -fwpa, -flto, -fwhopr, - -fltrans, -flto-report, -flto-compression-level and - -use-linker-plugin. - * doc/sourcebuild.texi: Document use of zlib. - Document lto-plugin. + * doc/invoke.texi: Document -fwpa, -flto, -fwhopr, -fltrans, + -flto-report, -flto-compression-level and -use-linker-plugin. + * doc/sourcebuild.texi: Document use of zlib. Document lto-plugin. Add section for LTO Testing. 2009-10-02 Cary Coutant <ccoutant@google.com> - Add support for comdat type sections for DWARF v4. Merge from dwarf4 - branch. + Add support for comdat type sections for DWARF v4. + Merge from dwarf4 branch. + * dwarf2out.c (DWARF_TYPE_SIGNATURE_SIZE): New constant. (dw_die_ref): Define vector type. (enum dw_val_class): Add dw_val_class_data8. @@ -1071,8 +1306,7 @@ (print_signature): New function. (print_die): Print signature information; add dw_val_class_data8. (attr_checksum): Support dw_val_class_data8. - (CHECKSUM_STRING): Redefine for DWARF-4 to include - trailing NULL byte. + (CHECKSUM_STRING): Redefine for DWARF-4 to include trailing NULL byte. (CHECKSUM_SLEB128, CHECKSUM_ULEB128): New macros. (checksum_sleb128, checksum_uleb128): New functions. (checksum_die_context): New function. @@ -1104,7 +1338,7 @@ (copy_decls_for_unworthy_types): New function. (build_abbrev_table): Don't assert on missing die_symbol when doing comdat type sections. - (size_of_die): Use DW_FORM_sig8 for external references; Add + (size_of_die): Use DW_FORM_sig8 for external references. Add dw_val_class_data8. (unmark_dies): Don't assert for unmarked dies when doing comdat type sections. @@ -1135,7 +1369,7 @@ 2009-10-02 Neil Vachharajani <nvachhar@google.com> - * gcov-io.c (gcov_open): Open files read-only when MODE < 0 + * gcov-io.c (gcov_open): Open files read-only when MODE < 0. 2009-10-02 Uros Bizjak <ubizjak@gmail.com> @@ -1178,8 +1412,8 @@ PR debug/41404 PR debug/41353 * cfgexpand.c (expand_debug_expr) <case STRING_CST>: Don't create - CONST_STRING if STRING_CST contains embedded '\0's or doesn't end with - '\0'. + CONST_STRING if STRING_CST contains embedded '\0's or doesn't end + with '\0'. (expand_debug_expr) <case VAR_DECL>: For TREE_STATIC !DECL_EXTERNAL vars use DECL_RTL with resetting it back to NULL afterwards. * dwarf2out.c (same_dw_val_p): For dw_val_class_addr compare with @@ -1445,7 +1679,7 @@ pressure. 2009-09-29 Basile Starynkevitch <basile@starynkevitch.net> - Rafael Avila de Espindola <espindola@google.com> + Rafael Avila de Espindola <espindola@google.com> * gengtype.c (plugin_output): New. (get_output_file_with_visibility): Return plugin_output for plugins. @@ -1599,8 +1833,7 @@ 2009-09-28 Nick Clifton <nickc@redhat.com> - * config/m32r/m32r.c (m32r_is_insn): Return false for debugging - insns. + * config/m32r/m32r.c (m32r_is_insn): Return false for debugging insns. 2009-09-28 Duncan Sands <baldrick@free.fr> @@ -1669,7 +1902,7 @@ 2009-09-27 Peter O'Gorman <pogma@thewrittenword.com> - collect2.c (main): Look for -brtl before adding libraries. + * collect2.c (main): Look for -brtl before adding libraries. 2009-09-27 Jonathan Gray <jsg@openbsd.org> @@ -1749,9 +1982,10 @@ * dwarf2out.c (dwarf_tag_name, gen_generic_params_dies, generic_parameter_die, template_parameter_pack_die, - gen_formal_parameter_die, gen_subprogram_die): Adjust after renaming - DW_TAG_formal_parameter_pack and DW_TAG_template_parameter_pack into - DW_TAG_GNU_formal_parameter_pack and DW_TAG_GNU_template_parameter_pack. + gen_formal_parameter_die, gen_subprogram_die): Adjust after + renaming DW_TAG_formal_parameter_pack and + DW_TAG_template_parameter_pack into DW_TAG_GNU_formal_parameter_pack + and DW_TAG_GNU_template_parameter_pack. 2009-09-25 Anatoly Sokolov <aesok@post.ru> @@ -1799,9 +2033,7 @@ (reg_class): Likewise. (REG_CLASS_NAMES): Likewise. * config/m32c/m32c.c (m32c_reg_class_from_constraint): Likewise. - - * config/m32c/m32c.c (m32c_override_options): Disable -fivopts for - M32C. + (m32c_override_options): Disable -fivopts for M32C. 2009-09-24 Michael Meissner <meissner@linux.vnet.ibm.com> @@ -1922,7 +2154,8 @@ * config/xtensa/xtensa.c (TARGET_STATIC_CHAIN): New. (xtensa_static_chain): New. - * config/xtensa/xtensa.h (STATIC_CHAIN, STATIC_CHAIN_INCOMING): Remove. + * config/xtensa/xtensa.h (STATIC_CHAIN): Remove. + (STATIC_CHAIN_INCOMING): Remove. 2009-09-23 Anatoly Sokolov <aesok@post.ru> diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 88474a18476..ea0930452d6 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20091009 +20091012 diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index d5e34e916ad..13df4f3a704 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,3 +1,7 @@ +2009-10-10 Samuel Tardieu <sam@rfc1149.net> + + * sem_eval.adb: Give a more precise error message. + 2009-10-06 Samuel Tardieu <sam@rfc1149.net> PR ada/41383 diff --git a/gcc/ada/sem_eval.adb b/gcc/ada/sem_eval.adb index 18853d72729..6e06e8353ae 100644 --- a/gcc/ada/sem_eval.adb +++ b/gcc/ada/sem_eval.adb @@ -5018,7 +5018,7 @@ package body Sem_Eval is if Attribute_Name (N) = Name_Size then Error_Msg_N - ("size attribute is only static for scalar type " & + ("size attribute is only static for static scalar type " & "(RM 4.9(7,8))", N); -- Flag array cases diff --git a/gcc/c-ppoutput.c b/gcc/c-ppoutput.c index ff3e6b6c843..bd9af2aa0f6 100644 --- a/gcc/c-ppoutput.c +++ b/gcc/c-ppoutput.c @@ -61,6 +61,8 @@ static void dump_queued_macros (cpp_reader *); static void print_line (source_location, const char *); static void maybe_print_line (source_location); +static void do_line_change (cpp_reader *, const cpp_token *, + source_location, int); /* Callback routines for the parser. Most of these are active only in specific modes. */ @@ -160,11 +162,16 @@ static void scan_translation_unit (cpp_reader *pfile) { bool avoid_paste = false; + bool do_line_adjustments + = cpp_get_options (parse_in)->lang != CLK_ASM + && !flag_no_line_commands; + bool in_pragma = false; print.source = NULL; for (;;) { - const cpp_token *token = cpp_get_token (pfile); + source_location loc; + const cpp_token *token = cpp_get_token_with_location (pfile, &loc); if (token->type == CPP_PADDING) { @@ -182,16 +189,38 @@ scan_translation_unit (cpp_reader *pfile) /* Subtle logic to output a space if and only if necessary. */ if (avoid_paste) { + const struct line_map *map + = linemap_lookup (line_table, loc); + int src_line = SOURCE_LINE (map, loc); + if (print.source == NULL) print.source = token; - if (print.source->flags & PREV_WHITE - || (print.prev - && cpp_avoid_paste (pfile, print.prev, token)) - || (print.prev == NULL && token->type == CPP_HASH)) + + if (src_line != print.src_line + && do_line_adjustments + && !in_pragma) + { + do_line_change (pfile, token, loc, false); + putc (' ', print.outf); + } + else if (print.source->flags & PREV_WHITE + || (print.prev + && cpp_avoid_paste (pfile, print.prev, token)) + || (print.prev == NULL && token->type == CPP_HASH)) putc (' ', print.outf); } else if (token->flags & PREV_WHITE) - putc (' ', print.outf); + { + const struct line_map *map + = linemap_lookup (line_table, loc); + int src_line = SOURCE_LINE (map, loc); + + if (src_line != print.src_line + && do_line_adjustments + && !in_pragma) + do_line_change (pfile, token, loc, false); + putc (' ', print.outf); + } avoid_paste = false; print.source = NULL; @@ -209,9 +238,13 @@ scan_translation_unit (cpp_reader *pfile) else fprintf (print.outf, "%s", name); print.printed = 1; + in_pragma = true; } else if (token->type == CPP_PRAGMA_EOL) - maybe_print_line (token->src_loc); + { + maybe_print_line (token->src_loc); + in_pragma = false; + } else cpp_output_token (token, print.outf); @@ -331,14 +364,11 @@ print_line (source_location src_loc, const char *special_flags) } } -/* Called when a line of output is started. TOKEN is the first token - of the line, and at end of file will be CPP_EOF. */ +/* Helper function for cb_line_change and scan_translation_unit. */ static void -cb_line_change (cpp_reader *pfile, const cpp_token *token, - int parsing_args) +do_line_change (cpp_reader *pfile, const cpp_token *token, + source_location src_loc, int parsing_args) { - source_location src_loc = token->src_loc; - if (define_queue || undef_queue) dump_queued_macros (pfile); @@ -365,6 +395,15 @@ cb_line_change (cpp_reader *pfile, const cpp_token *token, } } +/* Called when a line of output is started. TOKEN is the first token + of the line, and at end of file will be CPP_EOF. */ +static void +cb_line_change (cpp_reader *pfile, const cpp_token *token, + int parsing_args) +{ + do_line_change (pfile, token, token->src_loc, parsing_args); +} + static void cb_ident (cpp_reader *pfile ATTRIBUTE_UNUSED, source_location line, const cpp_string *str) diff --git a/gcc/calls.c b/gcc/calls.c index 49e576e94c5..13167a620a4 100644 --- a/gcc/calls.c +++ b/gcc/calls.c @@ -3020,7 +3020,10 @@ expand_call (tree exp, rtx target, int ignore) } else if (TYPE_MODE (rettype) == BLKmode) { - target = copy_blkmode_from_reg (target, valreg, rettype); + rtx val = valreg; + if (GET_MODE (val) != BLKmode) + val = avoid_likely_spilled_reg (val); + target = copy_blkmode_from_reg (target, val, rettype); /* We can not support sibling calls for this case. */ sibcall_failure = 1; diff --git a/gcc/cgraph.c b/gcc/cgraph.c index 01fbb9a85d7..167e8a8e7b4 100644 --- a/gcc/cgraph.c +++ b/gcc/cgraph.c @@ -822,9 +822,9 @@ cgraph_create_edge (struct cgraph_node *caller, struct cgraph_node *callee, if (call_stmt) { #ifdef ENABLE_CHECKING - /* This is rather pricely check possibly trigerring construction of call stmt - hashtable. */ - gcc_assert (!cgraph_edge (caller, call_stmt)); + /* This is rather pricely check possibly trigerring construction of + call stmt hashtable. */ + gcc_assert (!cgraph_edge (caller, call_stmt)); #endif gcc_assert (is_gimple_call (call_stmt)); @@ -847,7 +847,8 @@ cgraph_create_edge (struct cgraph_node *caller, struct cgraph_node *callee, edge->callee = callee; edge->call_stmt = call_stmt; push_cfun (DECL_STRUCT_FUNCTION (caller->decl)); - edge->can_throw_external = stmt_can_throw_external (call_stmt); + edge->can_throw_external + = call_stmt ? stmt_can_throw_external (call_stmt) : false; pop_cfun (); edge->prev_caller = NULL; edge->next_caller = callee->callers; diff --git a/gcc/config.gcc b/gcc/config.gcc index 8f794d4ef9e..e83382c1059 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -3066,8 +3066,8 @@ case "${target}" in | power | power[234567] | power6x | powerpc | powerpc64 \ | rios | rios1 | rios2 | rsc | rsc1 | rs64a \ | 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \ - | 505 | 601 | 602 | 603 | 603e | ec603e | 604 \ - | 604e | 620 | 630 | 740 | 750 | 7400 | 7450 \ + | 476 | 476fp | 505 | 601 | 602 | 603 | 603e | ec603e \ + | 604 | 604e | 620 | 630 | 740 | 750 | 7400 | 7450 \ | a2 | e300c[23] | 854[08] | e500mc \ | 801 | 821 | 823 | 860 | 970 | G3 | G4 | G5 | cell) # OK diff --git a/gcc/config.in b/gcc/config.in index 220ff9f2ae2..a3e9069e129 100644 --- a/gcc/config.in +++ b/gcc/config.in @@ -211,6 +211,12 @@ #endif +/* Define if your assembler supports the DCI/ICI instructions. */ +#ifndef USED_FOR_TARGET +#undef HAVE_AS_DCI +#endif + + /* Define if your assembler supports the --debug-prefix-map option. */ #ifndef USED_FOR_TARGET #undef HAVE_AS_DEBUG_PREFIX_MAP @@ -309,6 +315,12 @@ #endif +/* Define if your assembler supports the swap suffix. */ +#ifndef USED_FOR_TARGET +#undef HAVE_AS_IX86_SWAP +#endif + + /* Define if your assembler supports the lituse_jsrdirect relocation. */ #ifndef USED_FOR_TARGET #undef HAVE_AS_JSRDIRECT_RELOCS diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 9da427faaa7..73913b8376d 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -4774,6 +4774,25 @@ ix86_function_type_abi (const_tree fntype) return ix86_abi; } +static bool +ix86_function_ms_hook_prologue (const_tree fntype) +{ + if (!TARGET_64BIT) + { + if (lookup_attribute ("ms_hook_prologue", DECL_ATTRIBUTES (fntype))) + { + if (decl_function_context (fntype) != NULL_TREE) + { + error_at (DECL_SOURCE_LOCATION (fntype), + "ms_hook_prologue is not compatible with nested function"); + } + + return true; + } + } + return false; +} + static enum calling_abi ix86_function_abi (const_tree fndecl) { @@ -8295,6 +8314,7 @@ ix86_expand_prologue (void) bool pic_reg_used; struct ix86_frame frame; HOST_WIDE_INT allocate; + int gen_frame_pointer = frame_pointer_needed; ix86_finalize_stack_realign_flags (); @@ -8307,6 +8327,46 @@ ix86_expand_prologue (void) ix86_compute_frame_layout (&frame); + if (ix86_function_ms_hook_prologue (current_function_decl)) + { + rtx push, mov; + + /* Make sure the function starts with + 8b ff movl.s %edi,%edi + 55 push %ebp + 8b ec movl.s %esp,%ebp + + This matches the hookable function prologue in Win32 API functions in Microsoft Windows + XP Service Pack 2 and newer. Wine uses this to enable Windows apps to hook the Win32 API + functions provided by Wine */ + insn = emit_insn (gen_vswapmov (gen_rtx_REG (SImode, DI_REG), gen_rtx_REG (SImode, DI_REG))); + push = emit_insn (gen_push (hard_frame_pointer_rtx)); + mov = emit_insn (gen_vswapmov (hard_frame_pointer_rtx, stack_pointer_rtx)); + + if (frame_pointer_needed && !(crtl->drap_reg && crtl->stack_realign_needed)) + { + /* The push %ebp and movl.s %esp, %ebp already set up the frame pointer. No need to do + this again. */ + gen_frame_pointer = 0; + RTX_FRAME_RELATED_P (push) = 1; + RTX_FRAME_RELATED_P (mov) = 1; + if (ix86_cfa_state->reg == stack_pointer_rtx) + { + ix86_cfa_state->reg = hard_frame_pointer_rtx; + } + } + else + { + /* If the frame pointer is not needed, pop %ebp again. This could be optimized for cases where + ebp needs to be backed up for some other reason. + + If stack realignment is needed, pop the base pointer again, align the stack, and later + regenerate the frame pointer setup. The frame pointer generated by the hook prologue + is not aligned, so it can't be used */ + insn = emit_insn ((*ix86_gen_pop1) (hard_frame_pointer_rtx)); + } + } + /* The first insn of a function that accepts its static chain on the stack is to push the register that would be filled in by a direct call. This insn will be skipped by the trampoline. */ @@ -8378,7 +8438,7 @@ ix86_expand_prologue (void) /* Note: AT&T enter does NOT have reversed args. Enter is probably slower on all targets. Also sdb doesn't like it. */ - if (frame_pointer_needed) + if (gen_frame_pointer) { insn = emit_insn (gen_push (hard_frame_pointer_rtx)); RTX_FRAME_RELATED_P (insn) = 1; @@ -12637,7 +12697,7 @@ ix86_expand_clear (rtx dest) tmp = gen_rtx_SET (VOIDmode, dest, const0_rtx); /* This predicate should match that for movsi_xor and movdi_xor_rex64. */ - if (reload_completed && (!TARGET_USE_MOV0 || optimize_insn_for_speed_p ())) + if (!TARGET_USE_MOV0 || optimize_insn_for_speed_p ()) { rtx clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG)); tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, tmp, clob)); @@ -15247,9 +15307,10 @@ ix86_expand_int_movcc (rtx operands[]) tmp = gen_reg_rtx (mode); if (mode == DImode) - emit_insn (gen_x86_movdicc_0_m1_rex64 (tmp, compare_op)); + emit_insn (gen_x86_movdicc_0_m1 (tmp, compare_op)); else - emit_insn (gen_x86_movsicc_0_m1 (gen_lowpart (SImode, tmp), compare_op)); + emit_insn (gen_x86_movsicc_0_m1 (gen_lowpart (SImode, tmp), + compare_op)); } else { @@ -23443,6 +23504,17 @@ ix86_init_builtins (void) ix86_init_builtins_va_builtins_abi (); } +/* Return the ix86 builtin for CODE. */ + +static tree +ix86_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED) +{ + if (code >= IX86_BUILTIN_MAX) + return error_mark_node; + + return ix86_builtins[code]; +} + /* Errors in the source file can cause expand_expr to return const0_rtx where we expect a vector. To avoid crashing, use one of the vector clear instructions. */ @@ -26458,6 +26530,35 @@ ix86_handle_struct_attribute (tree *node, tree name, return NULL_TREE; } +#include <signal.h> + +static tree +ix86_handle_fndecl_attribute (tree *node, tree name, + tree args ATTRIBUTE_UNUSED, + int flags ATTRIBUTE_UNUSED, bool *no_add_attrs) +{ + if (TREE_CODE (*node) != FUNCTION_DECL) + { + warning (OPT_Wattributes, "%qE attribute only applies to functions", + name); + *no_add_attrs = true; + return NULL_TREE; + } + + if (TARGET_64BIT) + { + warning (OPT_Wattributes, "%qE attribute only available for 32-bit", + name); + return NULL_TREE; + } + +#ifndef HAVE_AS_IX86_SWAP + sorry ("ms_hook_prologue attribute needs assembler swap suffix support"); +#endif + + return NULL_TREE; +} + static bool ix86_ms_bitfield_layout_p (const_tree record_type) { @@ -29500,6 +29601,7 @@ static const struct attribute_spec ix86_attribute_table[] = /* ms_abi and sysv_abi calling convention function attributes. */ { "ms_abi", 0, 0, false, true, true, ix86_handle_abi_attribute }, { "sysv_abi", 0, 0, false, true, true, ix86_handle_abi_attribute }, + { "ms_hook_prologue", 0, 0, true, false, false, ix86_handle_fndecl_attribute }, /* End element. */ { NULL, 0, 0, false, false, false, NULL } }; @@ -29666,6 +29768,8 @@ ix86_enum_va_list (int idx, const char **pname, tree *ptree) #undef TARGET_INIT_BUILTINS #define TARGET_INIT_BUILTINS ix86_init_builtins +#undef TARGET_BUILTIN_DECL +#define TARGET_BUILTIN_DECL ix86_builtin_decl #undef TARGET_EXPAND_BUILTIN #define TARGET_EXPAND_BUILTIN ix86_expand_builtin diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 6b68c54847d..3fa938ea3bb 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -241,6 +241,7 @@ (UNSPECV_RDTSC 18) (UNSPECV_RDTSCP 19) (UNSPECV_RDPMC 20) + (UNSPECV_VSWAPMOV 21) ]) ;; Constants to represent pcomtrue/pcomfalse variants @@ -705,12 +706,17 @@ ;; Used in signed and unsigned widening multiplications. (define_code_iterator any_extend [sign_extend zero_extend]) -;; Various insn prefixes for widening operations. -(define_code_attr u [(sign_extend "") (zero_extend "u")]) +;; Used in signed and unsigned divisions. +(define_code_iterator any_div [div udiv]) + +;; Various insn prefixes for signed and unsigned operations. +(define_code_attr u [(sign_extend "") (zero_extend "u") + (div "") (udiv "u")]) (define_code_attr s [(sign_extend "s") (zero_extend "u")]) -;; Instruction prefix for widening operations. -(define_code_attr sgnprefix [(sign_extend "i") (zero_extend "")]) +;; Instruction prefix for signed and unsigned operations. +(define_code_attr sgnprefix [(sign_extend "i") (zero_extend "") + (div "i") (udiv "")]) ;; All single word integer modes. (define_mode_iterator SWI [QI HI SI (DI "TARGET_64BIT")]) @@ -726,6 +732,11 @@ (HI "TARGET_HIMODE_MATH") SI DI (TI "TARGET_64BIT")]) +;; Math-dependant single word integer modes. +(define_mode_iterator SWIM [(QI "TARGET_QIMODE_MATH") + (HI "TARGET_HIMODE_MATH") + SI (DI "TARGET_64BIT")]) + ;; Math-dependant single word integer modes without QImode. (define_mode_iterator SWIM248 [(HI "TARGET_HIMODE_MATH") SI (DI "TARGET_64BIT")]) @@ -4075,9 +4086,11 @@ && (TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)) && !reg_overlap_mentioned_p (operands[0], operands[1])" - [(set (match_dup 0) (const_int 0)) - (set (strict_low_part (match_dup 2)) (match_dup 1))] - "operands[2] = gen_lowpart (QImode, operands[0]);") + [(set (strict_low_part (match_dup 2)) (match_dup 1))] +{ + operands[2] = gen_lowpart (QImode, operands[0]); + ix86_expand_clear (operands[0]); +}) ;; Rest is handled by single and. (define_split @@ -4107,7 +4120,7 @@ [(set_attr "type" "alu1") (set_attr "mode" "SI")]) -(define_insn "*zero_extendqisi2_movzbw_and" +(define_insn "*zero_extendqisi2_movzbl_and" [(set (match_operand:SI 0 "register_operand" "=r,r") (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "qm,0"))) (clobber (reg:CC FLAGS_REG))] @@ -4116,7 +4129,7 @@ [(set_attr "type" "imovx,alu1") (set_attr "mode" "SI")]) -(define_insn "*zero_extendqisi2_movzbw" +(define_insn "*zero_extendqisi2_movzbl" [(set (match_operand:SI 0 "register_operand" "=r") (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "qm")))] "(!TARGET_ZERO_EXTEND_WITH_AND || optimize_function_for_size_p (cfun)) @@ -4147,9 +4160,11 @@ && (ANY_QI_REG_P (operands[1]) || MEM_P (operands[1])) && (TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)) && !reg_overlap_mentioned_p (operands[0], operands[1])" - [(set (match_dup 0) (const_int 0)) - (set (strict_low_part (match_dup 2)) (match_dup 1))] - "operands[2] = gen_lowpart (QImode, operands[0]);") + [(set (strict_low_part (match_dup 2)) (match_dup 1))] +{ + operands[2] = gen_lowpart (QImode, operands[0]); + ix86_expand_clear (operands[0]); +}) ;; Rest is handled by single and. (define_split @@ -6296,7 +6311,7 @@ switch (get_attr_type (insn)) { case TYPE_LEA: - operands[2] = SET_SRC (XVECEXP (PATTERN (insn), 0, 0)); + operands[2] = XEXP (SET_SRC (XVECEXP (PATTERN (insn), 0, 0)), 0); return "lea{l}\t{%a2, %k0|%k0, %a2}"; case TYPE_INCDEC: @@ -8127,23 +8142,14 @@ ;; Divide instructions -(define_insn "divqi3" - [(set (match_operand:QI 0 "register_operand" "=a") - (div:QI (match_operand:HI 1 "register_operand" "0") - (match_operand:QI 2 "nonimmediate_operand" "qm"))) - (clobber (reg:CC FLAGS_REG))] - "TARGET_QIMODE_MATH" - "idiv{b}\t%2" - [(set_attr "type" "idiv") - (set_attr "mode" "QI")]) - -(define_insn "udivqi3" +(define_insn "<u>divqi3" [(set (match_operand:QI 0 "register_operand" "=a") - (udiv:QI (match_operand:HI 1 "register_operand" "0") - (match_operand:QI 2 "nonimmediate_operand" "qm"))) + (any_div:QI + (match_operand:HI 1 "register_operand" "0") + (match_operand:QI 2 "nonimmediate_operand" "qm"))) (clobber (reg:CC FLAGS_REG))] "TARGET_QIMODE_MATH" - "div{b}\t%2" + "<sgnprefix>div{b}\t%2" [(set_attr "type" "idiv") (set_attr "mode" "QI")]) @@ -8566,7 +8572,8 @@ else if (GET_CODE (val) == SUBREG && (submode = GET_MODE (SUBREG_REG (val)), GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (submode)) - && pos + len <= GET_MODE_BITSIZE (submode)) + && pos + len <= GET_MODE_BITSIZE (submode) + && GET_MODE_CLASS (submode) == MODE_INT) { /* Narrow a paradoxical subreg to prevent partial register stalls. */ mode = submode; @@ -13770,11 +13777,67 @@ ;; For all sCOND expanders, also expand the compare or test insn that ;; generates cc0. Generate an equality comparison if `seq' or `sne'. -;; %%% Do the expansion to SImode. If PII, do things the xor+setcc way -;; to avoid partial register stalls. Otherwise do things the setcc+movzx -;; way, which can later delete the movzx if only QImode is needed. +(define_insn_and_split "*setcc_di_1" + [(set (match_operand:DI 0 "register_operand" "=q") + (match_operator:DI 1 "ix86_comparison_operator" + [(reg FLAGS_REG) (const_int 0)]))] + "TARGET_64BIT && !TARGET_PARTIAL_REG_STALL" + "#" + "&& reload_completed" + [(set (match_dup 2) (match_dup 1)) + (set (match_dup 0) (zero_extend:DI (match_dup 2)))] +{ + PUT_MODE (operands[1], QImode); + operands[2] = gen_lowpart (QImode, operands[0]); +}) + +(define_insn_and_split "*setcc_si_1_and" + [(set (match_operand:SI 0 "register_operand" "=q") + (match_operator:SI 1 "ix86_comparison_operator" + [(reg FLAGS_REG) (const_int 0)])) + (clobber (reg:CC FLAGS_REG))] + "!TARGET_PARTIAL_REG_STALL + && TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)" + "#" + "&& reload_completed" + [(set (match_dup 2) (match_dup 1)) + (parallel [(set (match_dup 0) (zero_extend:SI (match_dup 2))) + (clobber (reg:CC FLAGS_REG))])] +{ + PUT_MODE (operands[1], QImode); + operands[2] = gen_lowpart (QImode, operands[0]); +}) + +(define_insn_and_split "*setcc_si_1_movzbl" + [(set (match_operand:SI 0 "register_operand" "=q") + (match_operator:SI 1 "ix86_comparison_operator" + [(reg FLAGS_REG) (const_int 0)]))] + "!TARGET_PARTIAL_REG_STALL + && (!TARGET_ZERO_EXTEND_WITH_AND || optimize_function_for_size_p (cfun))" + "#" + "&& reload_completed" + [(set (match_dup 2) (match_dup 1)) + (set (match_dup 0) (zero_extend:SI (match_dup 2)))] +{ + PUT_MODE (operands[1], QImode); + operands[2] = gen_lowpart (QImode, operands[0]); +}) + +(define_insn_and_split "*setcc_<mode>_2" + [(set (match_operand:SWI48 0 "register_operand" "=q") + (match_operator:SWI48 1 "ix86_comparison_operator" + [(reg FLAGS_REG) (const_int 0)]))] + "TARGET_PARTIAL_REG_STALL" + "#" + "&& reload_completed" + [(set (match_dup 0) (const_int 0)) + (set (strict_low_part (match_dup 2)) (match_dup 1))] +{ + PUT_MODE (operands[1], QImode); + operands[2] = gen_lowpart (QImode, operands[0]); +}) -(define_insn "*setcc_1" +(define_insn "*setcc_qi" [(set (match_operand:QI 0 "nonimmediate_operand" "=qm") (match_operator:QI 1 "ix86_comparison_operator" [(reg FLAGS_REG) (const_int 0)]))] @@ -13783,7 +13846,7 @@ [(set_attr "type" "setcc") (set_attr "mode" "QI")]) -(define_insn "*setcc_2" +(define_insn "*setcc_qi_slp" [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm")) (match_operator:QI 1 "ix86_comparison_operator" [(reg FLAGS_REG) (const_int 0)]))] @@ -14831,6 +14894,16 @@ (set_attr "length_immediate" "0") (set_attr "modrm" "0")]) +(define_insn "vswapmov" + [(set (match_operand:SI 0 "register_operand" "=r") + (match_operand:SI 1 "register_operand" "r")) + (unspec_volatile [(const_int 0)] UNSPECV_VSWAPMOV)] + "" + "movl.s\t{%1, %0|%0, %1}" + [(set_attr "length" "2") + (set_attr "length_immediate" "0") + (set_attr "modrm" "0")]) + ;; Pad to 16-byte boundary, max skip in op0. Used to avoid ;; branch prediction penalty for the third jump in a 16-byte ;; block on K8. @@ -17999,25 +18072,13 @@ && flag_unsafe_math_optimizations" "") -(define_expand "lfloor<mode>di2" - [(match_operand:DI 0 "nonimmediate_operand" "") - (match_operand:MODEF 1 "register_operand" "")] - "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH && TARGET_64BIT - && !flag_trapping_math" -{ - if (optimize_insn_for_size_p ()) - FAIL; - ix86_expand_lfloorceil (operand0, operand1, true); - DONE; -}) - -(define_expand "lfloor<mode>si2" - [(match_operand:SI 0 "nonimmediate_operand" "") +(define_expand "lfloor<MODEF:mode><SWI48:mode>2" + [(match_operand:SWI48 0 "nonimmediate_operand" "") (match_operand:MODEF 1 "register_operand" "")] - "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH + "SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH && !flag_trapping_math" { - if (optimize_insn_for_size_p () && TARGET_64BIT) + if (TARGET_64BIT && optimize_insn_for_size_p ()) FAIL; ix86_expand_lfloorceil (operand0, operand1, true); DONE; @@ -18273,20 +18334,10 @@ && flag_unsafe_math_optimizations" "") -(define_expand "lceil<mode>di2" - [(match_operand:DI 0 "nonimmediate_operand" "") - (match_operand:MODEF 1 "register_operand" "")] - "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH && TARGET_64BIT - && !flag_trapping_math" -{ - ix86_expand_lfloorceil (operand0, operand1, false); - DONE; -}) - -(define_expand "lceil<mode>si2" - [(match_operand:SI 0 "nonimmediate_operand" "") +(define_expand "lceil<MODEF:mode><SWI48:mode>2" + [(match_operand:SWI48 0 "nonimmediate_operand" "") (match_operand:MODEF 1 "register_operand" "")] - "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH + "SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH && !flag_trapping_math" { ix86_expand_lfloorceil (operand0, operand1, false); @@ -19433,22 +19484,26 @@ ;; Conditional move instructions. -(define_expand "movdicc" - [(set (match_operand:DI 0 "register_operand" "") - (if_then_else:DI (match_operand 1 "comparison_operator" "") - (match_operand:DI 2 "general_operand" "") - (match_operand:DI 3 "general_operand" "")))] - "TARGET_64BIT" +(define_expand "mov<mode>cc" + [(set (match_operand:SWIM 0 "register_operand" "") + (if_then_else:SWIM (match_operand 1 "comparison_operator" "") + (match_operand:SWIM 2 "general_operand" "") + (match_operand:SWIM 3 "general_operand" "")))] + "" "if (ix86_expand_int_movcc (operands)) DONE; else FAIL;") -(define_insn "x86_movdicc_0_m1_rex64" - [(set (match_operand:DI 0 "register_operand" "=r") - (if_then_else:DI (match_operand 1 "ix86_carry_flag_operator" "") +;; Data flow gets confused by our desire for `sbbl reg,reg', and clearing +;; the register first winds up with `sbbl $0,reg', which is also weird. +;; So just document what we're doing explicitly. + +(define_insn "x86_mov<mode>cc_0_m1" + [(set (match_operand:SWI48 0 "register_operand" "=r") + (if_then_else:SWI48 (match_operand 1 "ix86_carry_flag_operator" "") (const_int -1) (const_int 0))) (clobber (reg:CC FLAGS_REG))] - "TARGET_64BIT" - "sbb{q}\t%0, %0" + "" + "sbb{<imodesuffix>}\t%0, %0" ; Since we don't have the proper number of operands for an alu insn, ; fill in all the blanks. [(set_attr "type" "alu") @@ -19456,134 +19511,56 @@ (set_attr "pent_pair" "pu") (set_attr "memory" "none") (set_attr "imm_disp" "false") - (set_attr "mode" "DI") - (set_attr "length_immediate" "0")]) - -(define_insn "*x86_movdicc_0_m1_se" - [(set (match_operand:DI 0 "register_operand" "=r") - (sign_extract:DI (match_operand 1 "ix86_carry_flag_operator" "") - (const_int 1) - (const_int 0))) - (clobber (reg:CC FLAGS_REG))] - "" - "sbb{q}\t%0, %0" - [(set_attr "type" "alu") - (set_attr "use_carry" "1") - (set_attr "pent_pair" "pu") - (set_attr "memory" "none") - (set_attr "imm_disp" "false") - (set_attr "mode" "DI") + (set_attr "mode" "<MODE>") (set_attr "length_immediate" "0")]) -(define_insn "*movdicc_c_rex64" - [(set (match_operand:DI 0 "register_operand" "=r,r") - (if_then_else:DI (match_operator 1 "ix86_comparison_operator" - [(reg FLAGS_REG) (const_int 0)]) - (match_operand:DI 2 "nonimmediate_operand" "rm,0") - (match_operand:DI 3 "nonimmediate_operand" "0,rm")))] - "TARGET_64BIT && TARGET_CMOVE - && !(MEM_P (operands[2]) && MEM_P (operands[3]))" - "@ - cmov%O2%C1\t{%2, %0|%0, %2} - cmov%O2%c1\t{%3, %0|%0, %3}" - [(set_attr "type" "icmov") - (set_attr "mode" "DI")]) - -(define_expand "movsicc" - [(set (match_operand:SI 0 "register_operand" "") - (if_then_else:SI (match_operand 1 "comparison_operator" "") - (match_operand:SI 2 "general_operand" "") - (match_operand:SI 3 "general_operand" "")))] - "" - "if (ix86_expand_int_movcc (operands)) DONE; else FAIL;") - -;; Data flow gets confused by our desire for `sbbl reg,reg', and clearing -;; the register first winds up with `sbbl $0,reg', which is also weird. -;; So just document what we're doing explicitly. - -(define_insn "x86_movsicc_0_m1" - [(set (match_operand:SI 0 "register_operand" "=r") - (if_then_else:SI (match_operand 1 "ix86_carry_flag_operator" "") - (const_int -1) - (const_int 0))) +(define_insn "*x86_mov<mode>cc_0_m1_se" + [(set (match_operand:SWI48 0 "register_operand" "=r") + (sign_extract:SWI48 (match_operand 1 "ix86_carry_flag_operator" "") + (const_int 1) + (const_int 0))) (clobber (reg:CC FLAGS_REG))] "" - "sbb{l}\t%0, %0" - ; Since we don't have the proper number of operands for an alu insn, - ; fill in all the blanks. + "sbb{<imodesuffix>}\t%0, %0" [(set_attr "type" "alu") (set_attr "use_carry" "1") (set_attr "pent_pair" "pu") (set_attr "memory" "none") (set_attr "imm_disp" "false") - (set_attr "mode" "SI") + (set_attr "mode" "<MODE>") (set_attr "length_immediate" "0")]) -(define_insn "*x86_movsicc_0_m1_se" - [(set (match_operand:SI 0 "register_operand" "=r") - (sign_extract:SI (match_operand 1 "ix86_carry_flag_operator" "") - (const_int 1) - (const_int 0))) - (clobber (reg:CC FLAGS_REG))] +(define_insn "*x86_mov<mode>cc_0_m1_neg" + [(set (match_operand:SWI48 0 "register_operand" "=r") + (neg:SWI48 (match_operand 1 "ix86_carry_flag_operator" "")))] "" - "sbb{l}\t%0, %0" + "sbb{<imodesuffix>}\t%0, %0" [(set_attr "type" "alu") (set_attr "use_carry" "1") (set_attr "pent_pair" "pu") (set_attr "memory" "none") (set_attr "imm_disp" "false") - (set_attr "mode" "SI") + (set_attr "mode" "<MODE>") (set_attr "length_immediate" "0")]) -(define_insn "*movsicc_noc" - [(set (match_operand:SI 0 "register_operand" "=r,r") - (if_then_else:SI (match_operator 1 "ix86_comparison_operator" - [(reg FLAGS_REG) (const_int 0)]) - (match_operand:SI 2 "nonimmediate_operand" "rm,0") - (match_operand:SI 3 "nonimmediate_operand" "0,rm")))] - "TARGET_CMOVE - && !(MEM_P (operands[2]) && MEM_P (operands[3]))" - "@ - cmov%O2%C1\t{%2, %0|%0, %2} - cmov%O2%c1\t{%3, %0|%0, %3}" - [(set_attr "type" "icmov") - (set_attr "mode" "SI")]) - -(define_expand "movhicc" - [(set (match_operand:HI 0 "register_operand" "") - (if_then_else:HI (match_operand 1 "comparison_operator" "") - (match_operand:HI 2 "general_operand" "") - (match_operand:HI 3 "general_operand" "")))] - "TARGET_HIMODE_MATH" - "if (ix86_expand_int_movcc (operands)) DONE; else FAIL;") - -(define_insn "*movhicc_noc" - [(set (match_operand:HI 0 "register_operand" "=r,r") - (if_then_else:HI (match_operator 1 "ix86_comparison_operator" - [(reg FLAGS_REG) (const_int 0)]) - (match_operand:HI 2 "nonimmediate_operand" "rm,0") - (match_operand:HI 3 "nonimmediate_operand" "0,rm")))] - "TARGET_CMOVE - && !(MEM_P (operands[2]) && MEM_P (operands[3]))" +(define_insn "*mov<mode>cc_noc" + [(set (match_operand:SWI248 0 "register_operand" "=r,r") + (if_then_else:SWI248 (match_operator 1 "ix86_comparison_operator" + [(reg FLAGS_REG) (const_int 0)]) + (match_operand:SWI248 2 "nonimmediate_operand" "rm,0") + (match_operand:SWI248 3 "nonimmediate_operand" "0,rm")))] + "TARGET_CMOVE && !(MEM_P (operands[2]) && MEM_P (operands[3]))" "@ cmov%O2%C1\t{%2, %0|%0, %2} cmov%O2%c1\t{%3, %0|%0, %3}" [(set_attr "type" "icmov") - (set_attr "mode" "HI")]) - -(define_expand "movqicc" - [(set (match_operand:QI 0 "register_operand" "") - (if_then_else:QI (match_operand 1 "comparison_operator" "") - (match_operand:QI 2 "general_operand" "") - (match_operand:QI 3 "general_operand" "")))] - "TARGET_QIMODE_MATH" - "if (ix86_expand_int_movcc (operands)) DONE; else FAIL;") + (set_attr "mode" "<MODE>")]) (define_insn_and_split "*movqicc_noc" [(set (match_operand:QI 0 "register_operand" "=r,r") (if_then_else:QI (match_operator 1 "ix86_comparison_operator" - [(match_operand 4 "flags_reg_operand" "") - (const_int 0)]) + [(match_operand 4 "flags_reg_operand" "") + (const_int 0)]) (match_operand:QI 2 "register_operand" "r,0") (match_operand:QI 3 "register_operand" "0,r")))] "TARGET_CMOVE && !TARGET_PARTIAL_REG_STALL" diff --git a/gcc/config/i386/sol2-unwind.h b/gcc/config/i386/sol2-unwind.h new file mode 100644 index 00000000000..41ffb03b6cd --- /dev/null +++ b/gcc/config/i386/sol2-unwind.h @@ -0,0 +1,208 @@ +/* DWARF2 EH unwinding support for AMD x86-64 and x86. + Copyright (C) 2009 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* Do code reading to identify a signal frame, and set the frame + state data appropriately. See unwind-dw2.c for the structs. */ + +#include <ucontext.h> + +#ifdef __x86_64__ + +#define MD_FALLBACK_FRAME_STATE_FOR x86_64_fallback_frame_state + +static _Unwind_Reason_Code +x86_64_fallback_frame_state (struct _Unwind_Context *context, + _Unwind_FrameState *fs) +{ + unsigned char *pc = context->ra; + mcontext_t *mctx; + long new_cfa; + + if (/* Solaris 2.10 + ------------ + <__sighndlr+0>: push %rbp + <__sighndlr+1>: mov %rsp,%rbp + <__sighndlr+4>: callq *%rcx + <__sighndlr+6>: leaveq <--- PC + <__sighndlr+7>: retq */ + *(unsigned long *)(pc - 6) == 0xc3c9d1ffe5894855) + /* We need to move up four frames (the kernel frame, the signal frame, + the call_user_handler frame and the __sighndlr frame). Two of them + have the minimum stack frame size (kernel and __sighndlr frames), + the signal frame has a stack frame size of 32 and there is another + with a stack frame size of 112 bytes (the call_user_handler frame). + The ucontext_t structure is after this offset. */ + { + int off = 16 + 16 + 32 + 112; + mctx = &((ucontext_t *) (context->cfa + off))->uc_mcontext; + } + else + return _URC_END_OF_STACK; + + new_cfa = mctx->gregs[REG_RSP]; + + fs->regs.cfa_how = CFA_REG_OFFSET; + fs->regs.cfa_reg = 7; + fs->regs.cfa_offset = new_cfa - (long) context->cfa; + + /* The SVR4 register numbering macros aren't usable in libgcc. */ + fs->regs.reg[0].how = REG_SAVED_OFFSET; + fs->regs.reg[0].loc.offset = (long)&mctx->gregs[REG_RAX] - new_cfa; + fs->regs.reg[1].how = REG_SAVED_OFFSET; + fs->regs.reg[1].loc.offset = (long)&mctx->gregs[REG_RDX] - new_cfa; + fs->regs.reg[2].how = REG_SAVED_OFFSET; + fs->regs.reg[2].loc.offset = (long)&mctx->gregs[REG_RCX] - new_cfa; + fs->regs.reg[3].how = REG_SAVED_OFFSET; + fs->regs.reg[3].loc.offset = (long)&mctx->gregs[REG_RBX] - new_cfa; + fs->regs.reg[4].how = REG_SAVED_OFFSET; + fs->regs.reg[4].loc.offset = (long)&mctx->gregs[REG_RSI] - new_cfa; + fs->regs.reg[5].how = REG_SAVED_OFFSET; + fs->regs.reg[5].loc.offset = (long)&mctx->gregs[REG_RDI] - new_cfa; + fs->regs.reg[6].how = REG_SAVED_OFFSET; + fs->regs.reg[6].loc.offset = (long)&mctx->gregs[REG_RBP] - new_cfa; + fs->regs.reg[8].how = REG_SAVED_OFFSET; + fs->regs.reg[8].loc.offset = (long)&mctx->gregs[REG_R8] - new_cfa; + fs->regs.reg[9].how = REG_SAVED_OFFSET; + fs->regs.reg[9].loc.offset = (long)&mctx->gregs[REG_R9] - new_cfa; + fs->regs.reg[10].how = REG_SAVED_OFFSET; + fs->regs.reg[10].loc.offset = (long)&mctx->gregs[REG_R10] - new_cfa; + fs->regs.reg[11].how = REG_SAVED_OFFSET; + fs->regs.reg[11].loc.offset = (long)&mctx->gregs[REG_R11] - new_cfa; + fs->regs.reg[12].how = REG_SAVED_OFFSET; + fs->regs.reg[12].loc.offset = (long)&mctx->gregs[REG_R12] - new_cfa; + fs->regs.reg[13].how = REG_SAVED_OFFSET; + fs->regs.reg[13].loc.offset = (long)&mctx->gregs[REG_R13] - new_cfa; + fs->regs.reg[14].how = REG_SAVED_OFFSET; + fs->regs.reg[14].loc.offset = (long)&mctx->gregs[REG_R14] - new_cfa; + fs->regs.reg[15].how = REG_SAVED_OFFSET; + fs->regs.reg[15].loc.offset = (long)&mctx->gregs[REG_R15] - new_cfa; + fs->regs.reg[16].how = REG_SAVED_OFFSET; + fs->regs.reg[16].loc.offset = (long)&mctx->gregs[REG_RIP] - new_cfa; + fs->retaddr_column = 16; + fs->signal_frame = 1; + + return _URC_NO_REASON; +} + +#else + +#define MD_FALLBACK_FRAME_STATE_FOR x86_fallback_frame_state + +static _Unwind_Reason_Code +x86_fallback_frame_state (struct _Unwind_Context *context, + _Unwind_FrameState *fs) +{ + unsigned char *pc = context->ra; + mcontext_t *mctx; + long new_cfa; + + if (/* Solaris 2.8 - single thread + ------------------------- + <sigacthandler+17>: mov 0x10(%ebp),%esi + <sigacthandler+20>: push %esi + <sigacthandler+21>: pushl 0xc(%ebp) + <sigacthandler+24>: mov 0x8(%ebp),%ecx + <sigacthandler+27>: push %ecx + <sigacthandler+28>: mov offset(%ebx),%eax + <sigacthandler+34>: call *(%eax,%ecx,4) + <sigacthandler+37>: add $0xc,%esp <--- PC + <sigacthandler+40>: push %esi ... */ + (*(unsigned long *)(pc - 20) == 0x5610758b + && *(unsigned long *)(pc - 16) == 0x8b0c75ff + && *(unsigned long *)(pc - 12) == 0x8b51084d + && *(unsigned char *)(pc - 8) == 0x83 + && *(unsigned long *)(pc - 4) == 0x8814ff00 + && *(unsigned long *)(pc - 0) == 0x560cc483) + + || /* Solaris 2.8 - multi thread + --------------------------- + <__sighndlr+0>: push %ebp + <__sighndlr+1>: mov %esp,%ebp + <__sighndlr+3>: pushl 0x10(%ebp) + <__sighndlr+6>: pushl 0xc(%ebp) + <__sighndlr+9>: pushl 0x8(%ebp) + <__sighndlr+12>: call *0x14(%ebp) + <__sighndlr+15>: leave <--- PC */ + (*(unsigned long *)(pc - 15) == 0xffec8b55 + && *(unsigned long *)(pc - 11) == 0x75ff1075 + && *(unsigned long *)(pc - 7) == 0x0875ff0c + && *(unsigned long *)(pc - 3) == 0xc91455ff) + + || /* Solaris 2.10 + ------------ + <__sighndlr+0>: push %ebp + <__sighndlr+1>: mov %esp,%ebp + <__sighndlr+3>: pushl 0x10(%ebp) + <__sighndlr+6>: pushl 0xc(%ebp) + <__sighndlr+9>: pushl 0x8(%ebp) + <__sighndlr+12>: call *0x14(%ebp) + <__sighndlr+15>: add $0xc,%esp <--- PC + <__sighndlr+18>: leave + <__sighndlr+19>: ret */ + (*(unsigned long *)(pc - 15) == 0xffec8b55 + && *(unsigned long *)(pc - 11) == 0x75ff1075 + && *(unsigned long *)(pc - 7) == 0x0875ff0c + && *(unsigned long *)(pc - 3) == 0x831455ff + && *(unsigned long *)(pc + 1) == 0xc3c90cc4)) + { + struct handler_args { + int signo; + siginfo_t *sip; + ucontext_t *ucontext; + } *handler_args = context->cfa; + mctx = &handler_args->ucontext->uc_mcontext; + } + else + return _URC_END_OF_STACK; + + new_cfa = mctx->gregs[UESP]; + + fs->regs.cfa_how = CFA_REG_OFFSET; + fs->regs.cfa_reg = 4; + fs->regs.cfa_offset = new_cfa - (long) context->cfa; + + /* The SVR4 register numbering macros aren't usable in libgcc. */ + fs->regs.reg[0].how = REG_SAVED_OFFSET; + fs->regs.reg[0].loc.offset = (long)&mctx->gregs[EAX] - new_cfa; + fs->regs.reg[3].how = REG_SAVED_OFFSET; + fs->regs.reg[3].loc.offset = (long)&mctx->gregs[EBX] - new_cfa; + fs->regs.reg[1].how = REG_SAVED_OFFSET; + fs->regs.reg[1].loc.offset = (long)&mctx->gregs[ECX] - new_cfa; + fs->regs.reg[2].how = REG_SAVED_OFFSET; + fs->regs.reg[2].loc.offset = (long)&mctx->gregs[EDX] - new_cfa; + fs->regs.reg[6].how = REG_SAVED_OFFSET; + fs->regs.reg[6].loc.offset = (long)&mctx->gregs[ESI] - new_cfa; + fs->regs.reg[7].how = REG_SAVED_OFFSET; + fs->regs.reg[7].loc.offset = (long)&mctx->gregs[EDI] - new_cfa; + fs->regs.reg[5].how = REG_SAVED_OFFSET; + fs->regs.reg[5].loc.offset = (long)&mctx->gregs[EBP] - new_cfa; + fs->regs.reg[8].how = REG_SAVED_OFFSET; + fs->regs.reg[8].loc.offset = (long)&mctx->gregs[EIP] - new_cfa; + fs->retaddr_column = 8; + fs->signal_frame = 1; + + return _URC_NO_REASON; +} + +#endif diff --git a/gcc/config/i386/sol2.h b/gcc/config/i386/sol2.h index 4c2dfe975cf..f062280fd18 100644 --- a/gcc/config/i386/sol2.h +++ b/gcc/config/i386/sol2.h @@ -118,3 +118,5 @@ along with GCC; see the file COPYING3. If not see #ifndef TARGET_GNU_LD #define USE_HIDDEN_LINKONCE 0 #endif + +#define MD_UNWIND_SUPPORT "config/i386/sol2-unwind.h" diff --git a/gcc/config/rs6000/40x.md b/gcc/config/rs6000/40x.md index e11c6539f68..eaf1222eca4 100644 --- a/gcc/config/rs6000/40x.md +++ b/gcc/config/rs6000/40x.md @@ -1,5 +1,5 @@ ;; Scheduling description for IBM PowerPC 403 and PowerPC 405 processors. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. @@ -38,7 +38,7 @@ (define_insn_reservation "ppc403-integer" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\ - var_shift_rotate,cntlz,exts") + var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "ppc403,ppc405")) "iu_40x") diff --git a/gcc/config/rs6000/440.md b/gcc/config/rs6000/440.md index b146222ac50..b329e7897cd 100644 --- a/gcc/config/rs6000/440.md +++ b/gcc/config/rs6000/440.md @@ -1,5 +1,5 @@ ;; Scheduling description for IBM PowerPC 440 processor. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. ;; @@ -55,7 +55,7 @@ (define_insn_reservation "ppc440-integer" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,\ - trap,var_shift_rotate,cntlz,exts") + trap,var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "ppc440")) "ppc440_issue,ppc440_i_pipe|ppc440_j_pipe") diff --git a/gcc/config/rs6000/476.md b/gcc/config/rs6000/476.md new file mode 100644 index 00000000000..3f50bafa03c --- /dev/null +++ b/gcc/config/rs6000/476.md @@ -0,0 +1,142 @@ +;; Scheduling description for IBM PowerPC 476 processor. +;; Copyright (C) 2009 +;; Free Software Foundation, Inc. +;; Contributed by Peter Bergner (bergner@vnet.ibm.com). +;; +;; This file is part of GCC. +;; +;; GCC is free software; you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 3, or (at your option) +;; any later version. +;; +;; GCC is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. +;; +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; <http://www.gnu.org/licenses/>. + +;; PPC476 Embedded PowerPC controller +;; 3 issue (476) / 4 issue (476fp) +;; +;; i_pipe - complex integer / compare +;; lj_pipe - load-store / simple integer arithmetic +;; b_pipe - branch pipe +;; f_pipe - floating point arithmetic + +(define_automaton "ppc476_core,ppc476_apu") + +(define_cpu_unit "ppc476_i_pipe,ppc476_lj_pipe,ppc476_b_pipe" "ppc476_core") +(define_cpu_unit "ppc476_issue_fp,ppc476_f_pipe" "ppc476_apu") +(define_cpu_unit "ppc476_issue_0,ppc476_issue_1,ppc476_issue_2" "ppc476_core") + +(define_reservation "ppc476_issue" "ppc476_issue_0|ppc476_issue_1|ppc476_issue_2") +(define_reservation "ppc476_issue2" "ppc476_issue_0+ppc476_issue_1\ + |ppc476_issue_0+ppc476_issue_2\ + |ppc476_issue_1+ppc476_issue_2") +(define_reservation "ppc476_issue3" "ppc476_issue_0+ppc476_issue_1+ppc476_issue_2") + +(define_insn_reservation "ppc476-load" 4 + (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\ + load_l,store_c,sync") + (eq_attr "cpu" "ppc476")) + "ppc476_issue,\ + ppc476_lj_pipe") + +(define_insn_reservation "ppc476-store" 4 + (and (eq_attr "type" "store,store_ux,store_u") + (eq_attr "cpu" "ppc476")) + "ppc476_issue,\ + ppc476_lj_pipe") + +(define_insn_reservation "ppc476-fpload" 4 + (and (eq_attr "type" "fpload,fpload_ux,fpload_u") + (eq_attr "cpu" "ppc476")) + "ppc476_issue,\ + ppc476_lj_pipe") + +(define_insn_reservation "ppc476-fpstore" 4 + (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u") + (eq_attr "cpu" "ppc476")) + "ppc476_issue,\ + ppc476_lj_pipe") + +(define_insn_reservation "ppc476-simple-integer" 1 + (and (eq_attr "type" "integer,insert_word,var_shift_rotate,exts,shift") + (eq_attr "cpu" "ppc476")) + "ppc476_issue,\ + ppc476_i_pipe|ppc476_lj_pipe") + +(define_insn_reservation "ppc476-complex-integer" 1 + (and (eq_attr "type" "cmp,cr_logical,delayed_cr,cntlz,isel,isync,sync,trap") + (eq_attr "cpu" "ppc476")) + "ppc476_issue,\ + ppc476_i_pipe") + +(define_insn_reservation "ppc476-compare" 4 + (and (eq_attr "type" "compare,delayed_compare,fast_compare,mfcr,mfcrf,\ + mtcr,mfjmpr,mtjmpr,var_delayed_compare") + (eq_attr "cpu" "ppc476")) + "ppc476_issue,\ + ppc476_i_pipe") + +(define_insn_reservation "ppc476-imul" 4 + (and (eq_attr "type" "imul,imul_compare,imul2,imul3") + (eq_attr "cpu" "ppc476")) + "ppc476_issue,\ + ppc476_i_pipe") + +(define_insn_reservation "ppc476-idiv" 11 + (and (eq_attr "type" "idiv") + (eq_attr "cpu" "ppc476")) + "ppc476_issue,\ + ppc476_i_pipe*11") + +(define_insn_reservation "ppc476-branch" 1 + (and (eq_attr "type" "branch,jmpreg") + (eq_attr "cpu" "ppc476")) + "ppc476_issue,\ + ppc476_b_pipe") + +(define_insn_reservation "ppc476-two" 2 + (and (eq_attr "type" "two") + (eq_attr "cpu" "ppc476")) + "ppc476_issue2,\ + ppc476_i_pipe|ppc476_lj_pipe,\ + ppc476_i_pipe|ppc476_lj_pipe") + +(define_insn_reservation "ppc476-three" 3 + (and (eq_attr "type" "three") + (eq_attr "cpu" "ppc476")) + "ppc476_issue3,\ + ppc476_i_pipe|ppc476_lj_pipe,\ + ppc476_i_pipe|ppc476_lj_pipe,\ + ppc476_i_pipe|ppc476_lj_pipe") + +(define_insn_reservation "ppc476-fpcompare" 6 + (and (eq_attr "type" "fpcompare") + (eq_attr "cpu" "ppc476")) + "ppc476_issue+ppc476_issue_fp,\ + ppc476_f_pipe+ppc476_i_pipe") + +(define_insn_reservation "ppc476-fp" 6 + (and (eq_attr "type" "fp,dmul") + (eq_attr "cpu" "ppc476")) + "ppc476_issue_fp,\ + ppc476_f_pipe") + +(define_insn_reservation "ppc476-sdiv" 19 + (and (eq_attr "type" "sdiv") + (eq_attr "cpu" "ppc476")) + "ppc476_issue_fp, + ppc476_f_pipe*19") + +(define_insn_reservation "ppc476-ddiv" 33 + (and (eq_attr "type" "ddiv") + (eq_attr "cpu" "ppc476")) + "ppc476_issue_fp,\ + ppc476_f_pipe*33") + diff --git a/gcc/config/rs6000/603.md b/gcc/config/rs6000/603.md index c5fea314819..a042729a1da 100644 --- a/gcc/config/rs6000/603.md +++ b/gcc/config/rs6000/603.md @@ -1,5 +1,5 @@ ;; Scheduling description for PowerPC 603 processor. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. @@ -59,7 +59,7 @@ (define_insn_reservation "ppc603-integer" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\ - var_shift_rotate,cntlz,exts") + var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "ppc603")) "iu_603") diff --git a/gcc/config/rs6000/6xx.md b/gcc/config/rs6000/6xx.md index 88c15ae39ec..b0de9731525 100644 --- a/gcc/config/rs6000/6xx.md +++ b/gcc/config/rs6000/6xx.md @@ -1,6 +1,6 @@ ;; Scheduling description for PowerPC 604, PowerPC 604e, PowerPC 620, ;; and PowerPC 630 processors. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. @@ -74,7 +74,7 @@ (define_insn_reservation "ppc604-integer" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\ - var_shift_rotate,cntlz,exts") + var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "ppc604,ppc604e,ppc620,ppc630")) "iu1_6xx|iu2_6xx") diff --git a/gcc/config/rs6000/7450.md b/gcc/config/rs6000/7450.md index 6f2775744d4..ccaa3b20da3 100644 --- a/gcc/config/rs6000/7450.md +++ b/gcc/config/rs6000/7450.md @@ -1,5 +1,5 @@ ;; Scheduling description for Motorola PowerPC 7450 processor. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. @@ -75,7 +75,7 @@ (define_insn_reservation "ppc7450-integer" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,\ - trap,var_shift_rotate,cntlz,exts") + trap,var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "ppc7450")) "ppc7450_du,iu1_7450|iu2_7450|iu3_7450") diff --git a/gcc/config/rs6000/7xx.md b/gcc/config/rs6000/7xx.md index 0129048c07c..edbde75c22a 100644 --- a/gcc/config/rs6000/7xx.md +++ b/gcc/config/rs6000/7xx.md @@ -1,5 +1,5 @@ ;; Scheduling description for Motorola PowerPC 750 and PowerPC 7400 processors. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. @@ -65,7 +65,7 @@ (define_insn_reservation "ppc750-integer" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,\ - trap,var_shift_rotate,cntlz,exts") + trap,var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "ppc750,ppc7400")) "ppc750_du,iu1_7xx|iu2_7xx") diff --git a/gcc/config/rs6000/8540.md b/gcc/config/rs6000/8540.md index 2d44b3af94b..4096dff432c 100644 --- a/gcc/config/rs6000/8540.md +++ b/gcc/config/rs6000/8540.md @@ -1,5 +1,5 @@ ;; Pipeline description for Motorola PowerPC 8540 processor. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. @@ -86,7 +86,7 @@ (define_insn_reservation "ppc8540_su" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,cmp,compare,\ delayed_compare,var_delayed_compare,fast_compare,\ - shift,trap,var_shift_rotate,cntlz,exts") + shift,trap,var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "ppc8540")) "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire") diff --git a/gcc/config/rs6000/cell.md b/gcc/config/rs6000/cell.md index 3fffd2740f9..dac9da94320 100644 --- a/gcc/config/rs6000/cell.md +++ b/gcc/config/rs6000/cell.md @@ -1,5 +1,5 @@ ;; Scheduling description for cell processor. -;; Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007 +;; Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009 ;; Free Software Foundation, Inc. ;; Contributed by Sony Computer Entertainment, Inc., @@ -157,7 +157,7 @@ ;; Integer latency is 2 cycles (define_insn_reservation "cell-integer" 2 (and (eq_attr "type" "integer,insert_dword,shift,trap,\ - var_shift_rotate,cntlz,exts") + var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "cell")) "slot01,fxu_cell") diff --git a/gcc/config/rs6000/e500mc.md b/gcc/config/rs6000/e500mc.md index 86434f95fe1..99a4b80ecf6 100644 --- a/gcc/config/rs6000/e500mc.md +++ b/gcc/config/rs6000/e500mc.md @@ -72,7 +72,7 @@ (define_insn_reservation "e500mc_su" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,cmp,compare,\ delayed_compare,var_delayed_compare,fast_compare,\ - shift,trap,var_shift_rotate,cntlz,exts") + shift,trap,var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "ppce500mc")) "e500mc_decode,e500mc_issue+e500mc_su_stage0+e500mc_retire") diff --git a/gcc/config/rs6000/mpc.md b/gcc/config/rs6000/mpc.md index a839f936648..415c6887232 100644 --- a/gcc/config/rs6000/mpc.md +++ b/gcc/config/rs6000/mpc.md @@ -1,5 +1,5 @@ ;; Scheduling description for Motorola PowerPC processor cores. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. ;; @@ -43,7 +43,7 @@ (define_insn_reservation "mpccore-integer" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\ - var_shift_rotate,cntlz,exts") + var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "mpccore")) "iu_mpc") diff --git a/gcc/config/rs6000/power4.md b/gcc/config/rs6000/power4.md index 0214c98b139..60dbffd58c9 100644 --- a/gcc/config/rs6000/power4.md +++ b/gcc/config/rs6000/power4.md @@ -1,5 +1,5 @@ ;; Scheduling description for IBM Power4 and PowerPC 970 processors. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. ;; @@ -188,7 +188,7 @@ ; Integer latency is 2 cycles (define_insn_reservation "power4-integer" 2 (and (eq_attr "type" "integer,insert_dword,shift,trap,\ - var_shift_rotate,cntlz,exts") + var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "power4")) "iq_power4") diff --git a/gcc/config/rs6000/power5.md b/gcc/config/rs6000/power5.md index 83ffabcfb3a..b6db0931219 100644 --- a/gcc/config/rs6000/power5.md +++ b/gcc/config/rs6000/power5.md @@ -1,5 +1,5 @@ ;; Scheduling description for IBM POWER5 processor. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. ;; @@ -142,7 +142,7 @@ ; Integer latency is 2 cycles (define_insn_reservation "power5-integer" 2 (and (eq_attr "type" "integer,insert_dword,shift,trap,\ - var_shift_rotate,cntlz,exts") + var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "power5")) "iq_power5") diff --git a/gcc/config/rs6000/power6.md b/gcc/config/rs6000/power6.md index ba6524cfa65..8d54c812963 100644 --- a/gcc/config/rs6000/power6.md +++ b/gcc/config/rs6000/power6.md @@ -1,5 +1,5 @@ ;; Scheduling description for IBM POWER6 processor. -;; Copyright (C) 2006, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2006, 2007, 2009 Free Software Foundation, Inc. ;; Contributed by Peter Steinmetz (steinmtz@us.ibm.com) ;; ;; This file is part of GCC. @@ -201,6 +201,11 @@ (eq_attr "cpu" "power6")) "FXU_power6") +(define_insn_reservation "power6-isel" 1 + (and (eq_attr "type" "isel") + (eq_attr "cpu" "power6")) + "FXU_power6") + (define_insn_reservation "power6-exts" 1 (and (eq_attr "type" "exts") (eq_attr "cpu" "power6")) diff --git a/gcc/config/rs6000/power7.md b/gcc/config/rs6000/power7.md index 3b6a95e284e..148a7a52a8a 100644 --- a/gcc/config/rs6000/power7.md +++ b/gcc/config/rs6000/power7.md @@ -150,7 +150,7 @@ ; FX Unit (define_insn_reservation "power7-integer" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\ - var_shift_rotate,exts") + var_shift_rotate,exts,isel") (eq_attr "cpu" "power7")) "DU_power7,FXU_power7") diff --git a/gcc/config/rs6000/rios1.md b/gcc/config/rs6000/rios1.md index be2262d1281..9ad9ce3e161 100644 --- a/gcc/config/rs6000/rios1.md +++ b/gcc/config/rs6000/rios1.md @@ -1,5 +1,5 @@ ;; Scheduling description for IBM POWER processor. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. @@ -52,7 +52,7 @@ (define_insn_reservation "rios1-integer" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,\ - trap,var_shift_rotate,cntlz,exts") + trap,var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "rios1,ppc601")) "iu_rios1") diff --git a/gcc/config/rs6000/rios2.md b/gcc/config/rs6000/rios2.md index 24fbc15b9ad..96633af2f8e 100644 --- a/gcc/config/rs6000/rios2.md +++ b/gcc/config/rs6000/rios2.md @@ -1,5 +1,5 @@ ;; Scheduling description for IBM Power2 processor. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. @@ -40,7 +40,7 @@ (define_insn_reservation "rios2-integer" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\ - var_shift_rotate,cntlz,exts") + var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "rios2")) "iu1_rios2|iu2_rios2") diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 333babc255f..dea4a5334b0 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -511,6 +511,25 @@ struct processor_costs ppc440_cost = { 1, /* streams */ }; +/* Instruction costs on PPC476 processors. */ +static const +struct processor_costs ppc476_cost = { + COSTS_N_INSNS (4), /* mulsi */ + COSTS_N_INSNS (4), /* mulsi_const */ + COSTS_N_INSNS (4), /* mulsi_const9 */ + COSTS_N_INSNS (4), /* muldi */ + COSTS_N_INSNS (11), /* divsi */ + COSTS_N_INSNS (11), /* divdi */ + COSTS_N_INSNS (6), /* fp */ + COSTS_N_INSNS (6), /* dmul */ + COSTS_N_INSNS (19), /* sdiv */ + COSTS_N_INSNS (33), /* ddiv */ + 32, /* l1 cache line size */ + 32, /* l1 cache */ + 512, /* l2 cache */ + 1, /* streams */ +}; + /* Instruction costs on PPC601 processors. */ static const struct processor_costs ppc601_cost = { @@ -947,6 +966,8 @@ static bool rs6000_builtin_support_vector_misalignment (enum static void def_builtin (int, const char *, tree, int); static bool rs6000_vector_alignment_reachable (const_tree, bool); static void rs6000_init_builtins (void); +static tree rs6000_builtin_decl (unsigned, bool); + static rtx rs6000_expand_unop_builtin (enum insn_code, tree, rtx); static rtx rs6000_expand_binop_builtin (enum insn_code, tree, rtx); static rtx rs6000_expand_ternop_builtin (enum insn_code, tree, rtx); @@ -1332,6 +1353,8 @@ static const struct attribute_spec rs6000_attribute_table[] = #undef TARGET_INIT_BUILTINS #define TARGET_INIT_BUILTINS rs6000_init_builtins +#undef TARGET_BUILTIN_DECL +#define TARGET_BUILTIN_DECL rs6000_builtin_decl #undef TARGET_EXPAND_BUILTIN #define TARGET_EXPAND_BUILTIN rs6000_expand_builtin @@ -2140,6 +2163,12 @@ rs6000_override_options (const char *default_cpu) POWERPC_BASE_MASK | MASK_SOFT_FLOAT | MASK_MULHW | MASK_DLMZB}, {"464fp", PROCESSOR_PPC440, POWERPC_BASE_MASK | MASK_MULHW | MASK_DLMZB}, + {"476", PROCESSOR_PPC476, + POWERPC_BASE_MASK | MASK_SOFT_FLOAT | MASK_PPC_GFXOPT | MASK_MFCRF + | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_MULHW | MASK_DLMZB}, + {"476fp", PROCESSOR_PPC476, + POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_MFCRF | MASK_POPCNTB + | MASK_FPRND | MASK_CMPB | MASK_MULHW | MASK_DLMZB}, {"505", PROCESSOR_MPCCORE, POWERPC_BASE_MASK}, {"601", PROCESSOR_PPC601, MASK_POWER | POWERPC_BASE_MASK | MASK_MULTIPLE | MASK_STRING}, @@ -2669,6 +2698,10 @@ rs6000_override_options (const char *default_cpu) rs6000_cost = &ppc440_cost; break; + case PROCESSOR_PPC476: + rs6000_cost = &ppc476_cost; + break; + case PROCESSOR_PPC601: rs6000_cost = &ppc601_cost; break; @@ -11144,6 +11177,17 @@ rs6000_init_builtins (void) #endif } +/* Returns the rs6000 builtin decl for CODE. */ + +static tree +rs6000_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED) +{ + if (code >= RS6000_BUILTIN_COUNT) + return error_mark_node; + + return rs6000_builtin_decls[code]; +} + /* Search through a set of builtins and enable the mask bits. DESC is an array of builtins. SIZE is the total number of builtins. @@ -21780,6 +21824,7 @@ rs6000_issue_rate (void) case CPU_PPCE500MC: return 2; case CPU_RIOS2: + case CPU_PPC476: case CPU_PPC604: case CPU_PPC604E: case CPU_PPC620: diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index a5ce9dd0f7f..c8ab4369a39 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -83,6 +83,12 @@ #define ASM_CPU_POWER7_SPEC "-mpower4 -maltivec" #endif +#ifdef HAVE_AS_DCI +#define ASM_CPU_476_SPEC "-m476" +#else +#define ASM_CPU_476_SPEC "-mpower4" +#endif + /* Common ASM definitions used by ASM_SPEC among the various targets for handling -mcpu=xxx switches. There is a parallel list in driver-rs6000.c to provide the default assembler options if the user uses -mcpu=native, so if @@ -123,6 +129,8 @@ %{mcpu=440fp: -m440} \ %{mcpu=464: -m440} \ %{mcpu=464fp: -m440} \ +%{mcpu=476: %(asm_cpu_476)} \ +%{mcpu=476fp: %(asm_cpu_476)} \ %{mcpu=505: -mppc} \ %{mcpu=601: -m601} \ %{mcpu=602: -mppc} \ @@ -178,6 +186,7 @@ { "asm_cpu_power5", ASM_CPU_POWER5_SPEC }, \ { "asm_cpu_power6", ASM_CPU_POWER6_SPEC }, \ { "asm_cpu_power7", ASM_CPU_POWER7_SPEC }, \ + { "asm_cpu_476", ASM_CPU_476_SPEC }, \ SUBTARGET_EXTRA_SPECS /* -mcpu=native handling only makes sense with compiler running on @@ -318,6 +327,7 @@ enum processor_type PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC440, + PROCESSOR_PPC476, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604, diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 7b3de2ad230..7ff1b3c1a47 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -117,7 +117,7 @@ ;; Define an insn type attribute. This is used in function unit delay ;; computations. -(define_attr "type" "integer,two,three,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr" +(define_attr "type" "integer,two,three,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel" (const_string "integer")) ;; Define floating point instruction sub-types for use with Xfpu.md @@ -139,7 +139,7 @@ ;; Processor type -- this attribute must exactly match the processor_type ;; enumeration in rs6000.h. -(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc405,ppc440,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,ppce300c2,ppce300c3,ppce500mc,power4,power5,power6,power7,cell,ppca2" +(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc405,ppc440,ppc476,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,ppce300c2,ppce300c3,ppce500mc,power4,power5,power6,power7,cell,ppca2" (const (symbol_ref "rs6000_cpu_attr"))) @@ -158,6 +158,7 @@ (include "mpc.md") (include "40x.md") (include "440.md") +(include "476.md") (include "603.md") (include "6xx.md") (include "7xx.md") @@ -975,7 +976,7 @@ [(set_attr "type" "compare") (set_attr "length" "4,8")]) -;; IBM 405, 440 and 464 half-word multiplication operations. +;; IBM 405, 440, 464 and 476 half-word multiplication operations. (define_insn "*macchwc" [(set (match_operand:CC 3 "cc_reg_operand" "=x") @@ -1439,7 +1440,7 @@ "mullhwu %0, %1, %2" [(set_attr "type" "imul3")]) -;; IBM 405, 440 and 464 string-search dlmzb instruction support. +;; IBM 405, 440, 464 and 476 string-search dlmzb instruction support. (define_insn "dlmzb" [(set (match_operand:CC 3 "cc_reg_operand" "=x") (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") @@ -6041,7 +6042,8 @@ "TARGET_ISEL<sel>" "* { return output_isel (operands); }" - [(set_attr "length" "4")]) + [(set_attr "type" "isel") + (set_attr "length" "4")]) (define_insn "isel_unsigned_<mode>" [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") @@ -6054,7 +6056,8 @@ "TARGET_ISEL<sel>" "* { return output_isel (operands); }" - [(set_attr "length" "4")]) + [(set_attr "type" "isel") + (set_attr "length" "4")]) (define_expand "movsfcc" [(set (match_operand:SF 0 "gpc_reg_operand" "") diff --git a/gcc/config/rs6000/rs64.md b/gcc/config/rs6000/rs64.md index f7234408ade..e221b52a370 100644 --- a/gcc/config/rs6000/rs64.md +++ b/gcc/config/rs6000/rs64.md @@ -1,5 +1,5 @@ ;; Scheduling description for IBM RS64 processors. -;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc. ;; ;; This file is part of GCC. @@ -47,7 +47,7 @@ (define_insn_reservation "rs64a-integer" 1 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\ - var_shift_rotate,cntlz,exts") + var_shift_rotate,cntlz,exts,isel") (eq_attr "cpu" "rs64a")) "iu_rs64") diff --git a/gcc/config/rs6000/t-fprules b/gcc/config/rs6000/t-fprules index 272e00c1ada..42d8fd77b5b 100644 --- a/gcc/config/rs6000/t-fprules +++ b/gcc/config/rs6000/t-fprules @@ -21,6 +21,7 @@ MULTILIB_MATCHES_FLOAT = msoft-float=mcpu?401 \ msoft-float=mcpu?405 \ msoft-float=mcpu?440 \ msoft-float=mcpu?464 \ + msoft-float=mcpu?476 \ msoft-float=mcpu?ec603e \ msoft-float=mcpu?801 \ msoft-float=mcpu?821 \ diff --git a/gcc/config/rs6000/vxworks.h b/gcc/config/rs6000/vxworks.h index cfd11eb6d79..c302ad2015d 100644 --- a/gcc/config/rs6000/vxworks.h +++ b/gcc/config/rs6000/vxworks.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Vxworks PowerPC version. - Copyright (C) 1996, 2000, 2002, 2003, 2004, 2005, 2007 + Copyright (C) 1996, 2000, 2002, 2003, 2004, 2005, 2007, 2009 Free Software Foundation, Inc. Contributed by CodeSourcery, LLC. @@ -68,6 +68,8 @@ along with GCC; see the file COPYING3. If not see %{mcpu=403 : -DCPU=PPC403 ; \ mcpu=405 : -DCPU=PPC405 ; \ mcpu=440 : -DCPU=PPC440 ; \ + mcpu=464 : -DCPU=PPC464 ; \ + mcpu=476 : -DCPU=PPC476 ; \ mcpu=603 : -DCPU=PPC603 ; \ mcpu=604 : -DCPU=PPC604 ; \ mcpu=860 : -DCPU=PPC860 ; \ diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index db326ee766c..90ed18b0f0d 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -8941,18 +8941,16 @@ ; (define_insn "prefetch" - [(prefetch (match_operand 0 "address_operand" "ZQZS,ZRZT,X") - (match_operand:SI 1 "const_int_operand" " n, n,n") - (match_operand:SI 2 "const_int_operand" " n, n,n"))] - "TARGET_ZARCH && s390_tune == PROCESSOR_2097_Z10" + [(prefetch (match_operand 0 "address_operand" "ZQZRZSZT,X") + (match_operand:SI 1 "const_int_operand" " n,n") + (match_operand:SI 2 "const_int_operand" " n,n"))] + "TARGET_Z10" { switch (which_alternative) { case 0: - return INTVAL (operands[1]) == 1 ? "stcmh\t2,0,%a0" : "stcmh\t1,0,%a0"; - case 1: return INTVAL (operands[1]) == 1 ? "pfd\t2,%a0" : "pfd\t1,%a0"; - case 2: + case 1: if (larl_operand (operands[0], Pmode)) return INTVAL (operands[1]) == 1 ? "pfdrl\t2,%a0" : "pfdrl\t1,%a0"; default: @@ -8963,10 +8961,9 @@ return ""; } } - [(set_attr "type" "store,load,larl") - (set_attr "op_type" "RSY,RXY,RIL") - (set_attr "z10prop" "z10_super") - (set_attr "cpu_facility" "*,z10,z10")]) + [(set_attr "type" "load,larl") + (set_attr "op_type" "RXY,RIL") + (set_attr "z10prop" "z10_super")]) ; diff --git a/gcc/config/sparc/sol2-unwind.h b/gcc/config/sparc/sol2-unwind.h new file mode 100644 index 00000000000..c98dc4dc088 --- /dev/null +++ b/gcc/config/sparc/sol2-unwind.h @@ -0,0 +1,458 @@ +/* DWARF2 EH unwinding support for SPARC Solaris. + Copyright (C) 2009 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* Do code reading to identify a signal frame, and set the frame + state data appropriately. See unwind-dw2.c for the structs. */ + +#include <ucontext.h> + +#if defined(__arch64__) + +#define MD_FALLBACK_FRAME_STATE_FOR sparc64_fallback_frame_state + +static _Unwind_Reason_Code +sparc64_fallback_frame_state (struct _Unwind_Context *context, + _Unwind_FrameState *fs) +{ + void *pc = context->ra; + void *this_cfa = context->cfa; + void *new_cfa, *ra_location, *shifted_ra_location; + int regs_off; + int fpu_save_off; + unsigned char fpu_save; + int i; + + /* This is the observed pattern for the sigacthandler in Solaris 8. */ + unsigned int sigacthandler_sol8_pattern [] + = {0x9401400f, 0xca5aafa0, 0x913e2000, 0x892a3003, + 0xe0590005, 0x9fc40000, 0x9410001a, 0x80a6e008}; + + /* This is the observed pattern for the sigacthandler in Solaris 9. */ + unsigned int sigacthandler_sol9_pattern [] + = {0xa33e2000, 0x00000000, 0x892c7003, 0x90100011, + 0xe0590005, 0x9fc40000, 0x9410001a, 0x80a46008}; + + /* This is the observed pattern for the __sighndlr. */ + unsigned int sighndlr_pattern [] + = {0x9de3bf50, 0x90100018, 0x92100019, 0x9fc6c000, + 0x9410001a, 0x81c7e008, 0x81e80000}; + + /* Deal with frame-less function from which a signal was raised. */ + if (_Unwind_IsSignalFrame (context)) + { + /* The CFA is by definition unmodified in this case. */ + fs->regs.cfa_how = CFA_REG_OFFSET; + fs->regs.cfa_reg = __builtin_dwarf_sp_column (); + fs->regs.cfa_offset = 0; + + /* This is the canonical RA column. */ + fs->retaddr_column = 15; + + return _URC_NO_REASON; + } + + /* Look for the sigacthandler pattern. The pattern changes slightly + in different versions of the operating system, so we skip the + comparison against pc-(4*6) for Solaris 9. */ + if (( *(unsigned int *)(pc-(4*7)) == sigacthandler_sol8_pattern[0] + && *(unsigned int *)(pc-(4*6)) == sigacthandler_sol8_pattern[1] + && *(unsigned int *)(pc-(4*5)) == sigacthandler_sol8_pattern[2] + && *(unsigned int *)(pc-(4*4)) == sigacthandler_sol8_pattern[3] + && *(unsigned int *)(pc-(4*3)) == sigacthandler_sol8_pattern[4] + && *(unsigned int *)(pc-(4*2)) == sigacthandler_sol8_pattern[5] + && *(unsigned int *)(pc-(4*1)) == sigacthandler_sol8_pattern[6] + && *(unsigned int *)(pc-(4*0)) == sigacthandler_sol8_pattern[7] ) || + ( *(unsigned int *)(pc-(4*7)) == sigacthandler_sol9_pattern[0] + /* skip pc-(4*6) */ + && *(unsigned int *)(pc-(4*5)) == sigacthandler_sol9_pattern[2] + && *(unsigned int *)(pc-(4*4)) == sigacthandler_sol9_pattern[3] + && *(unsigned int *)(pc-(4*3)) == sigacthandler_sol9_pattern[4] + && *(unsigned int *)(pc-(4*2)) == sigacthandler_sol9_pattern[5] + && *(unsigned int *)(pc-(4*1)) == sigacthandler_sol9_pattern[6] + && *(unsigned int *)(pc-(4*0)) == sigacthandler_sol9_pattern[7] ) ) + /* We need to move up two frames (the kernel frame and the handler + frame). Minimum stack frame size is 176 bytes (128 + 48): 128 + bytes for spilling register window (16 extended words for in + and local registers), and 6 extended words to store at least + 6 arguments to callees, The kernel frame and the sigacthandler + both have this minimal stack. The ucontext_t structure is after + this offset. */ + regs_off = 176 + 176; + + /* Look for the __sighndlr pattern. */ + else if ( *(unsigned int *)(pc-(4*5)) == sighndlr_pattern[0] + && *(unsigned int *)(pc-(4*4)) == sighndlr_pattern[1] + && *(unsigned int *)(pc-(4*3)) == sighndlr_pattern[2] + && *(unsigned int *)(pc-(4*2)) == sighndlr_pattern[3] + && *(unsigned int *)(pc-(4*1)) == sighndlr_pattern[4] + && *(unsigned int *)(pc-(4*0)) == sighndlr_pattern[5] + && *(unsigned int *)(pc+(4*1)) == sighndlr_pattern[6] ) + { + /* We have observed different calling frames among different + versions of the operating system, so that we need to + discriminate using the upper frame. We look for the return + address of the caller frame (there is an offset of 15 double + words between the frame address and the place where this return + address is stored) in order to do some more pattern matching. */ + unsigned int cuh_pattern + = *(unsigned int *)(*(unsigned long *)(this_cfa + 15*8) - 4); + + if (cuh_pattern == 0x9410001a || cuh_pattern == 0x94100013) + /* This matches the call_user_handler pattern for Solaris 9 and + for Solaris 8 running inside Solaris Containers respectively. + We need to move up four frames (the kernel frame, the signal + frame, the call_user_handler frame, the __sighndlr frame). + Three of them have the minimum stack frame size (kernel, + signal, and __sighndlr frames) of 176 bytes, and there is + another with a stack frame of 304 bytes (the call_user_handler + frame). The ucontext_t structure is after this offset. */ + regs_off = 176 + 176 + 176 + 304; + else + /* We need to move up three frames (the kernel frame, the + sigacthandler frame, and the __sighndlr frame). The kernel + frame has a stack frame size of 176, the __sighndlr frames of + 304 bytes, and there is a stack frame of 176 bytes for the + sigacthandler frame. The ucontext_t structure is after this + offset. */ + regs_off = 176 + 304 + 176; + } + + /* Exit if the pattern at the return address does not match the + previous three patterns. */ + else + return _URC_END_OF_STACK; + + /* FPU information can be extracted from the ucontext_t structure + that is the third argument for the signal handler, that is saved + in the stack. There are 64 bytes between the beginning of the + ucontext_t argument of the signal handler and the uc_mcontext + field. There are 176 bytes between the beginning of uc_mcontext + and the beginning of the fpregs field. */ + fpu_save_off = regs_off + (8*10) + 176; + + /* The fpregs field contains 32 extended words at the beginning that + contain the fpu state. Then there are 2 extended words and two + bytes. */ + fpu_save = *(unsigned char *)(this_cfa + fpu_save_off + (8*32) + (2*8) + 2); + + /* We need to get the frame pointer for the kernel frame that + executes when the signal is raised. This frame is just the + following to the application code that generated the signal, so + that the later's stack pointer is the former's frame pointer. + The stack pointer for the interrupted application code can be + calculated from the ucontext_t structure (third argument for the + signal handler) that is saved in the stack. There are 10 words + between the beginning of the ucontext_t argument of the signal + handler and the uc_mcontext.gregs field that contains the + registers saved by the signal handler. */ + new_cfa = *(void **)(this_cfa + regs_off + (8*10) + (REG_SP*8)); + /* The frame address is %sp + STACK_BIAS in 64-bit mode. */ + new_cfa += 2047; + fs->regs.cfa_how = CFA_REG_OFFSET; + fs->regs.cfa_reg = __builtin_dwarf_sp_column (); + fs->regs.cfa_offset = new_cfa - this_cfa; + + /* Restore global and out registers (in this order) from the + ucontext_t structure, uc_mcontext.gregs field. */ + for (i = 1; i < 16; i++) + { + /* We never restore %sp as everything is purely CFA-based. */ + if ((unsigned int) i == __builtin_dwarf_sp_column ()) + continue; + + /* First the global registers and then the out registers. */ + fs->regs.reg[i].how = REG_SAVED_OFFSET; + fs->regs.reg[i].loc.offset + = this_cfa + regs_off + (8*10) + ((REG_Y+i)*8) - new_cfa; + } + + /* Just above the stack pointer there are 16 extended words in which + the register window (in and local registers) was saved. */ + for (i = 0; i < 16; i++) + { + fs->regs.reg[i + 16].how = REG_SAVED_OFFSET; + fs->regs.reg[i + 16].loc.offset = i*8; + } + + /* Check whether we need to restore fpu registers. */ + if (fpu_save) + { + for (i = 0; i < 64; i++) + { + if (i > 32 && (i & 1)) + continue; + + fs->regs.reg[i + 32].how = REG_SAVED_OFFSET; + fs->regs.reg[i + 32].loc.offset + = this_cfa + fpu_save_off + (i*4) - new_cfa; + } + } + + /* State the rules to find the kernel's code "return address", which is + the address of the active instruction when the signal was caught. + On the SPARC, since RETURN_ADDR_OFFSET (essentially 8) is defined, we + need to preventively subtract it from the purported return address. */ + ra_location = this_cfa + regs_off + (8*10) + (REG_PC*8); + shifted_ra_location = this_cfa + regs_off + (8*10) + (REG_Y*8); + *(void **)shifted_ra_location = *(void **)ra_location - 8; + fs->retaddr_column = 0; + fs->regs.reg[0].how = REG_SAVED_OFFSET; + fs->regs.reg[0].loc.offset = shifted_ra_location - new_cfa; + fs->signal_frame = 1; + + return _URC_NO_REASON; +} + +#define MD_FROB_UPDATE_CONTEXT sparc64_frob_update_context + +static void +sparc64_frob_update_context (struct _Unwind_Context *context, + _Unwind_FrameState *fs) +{ + /* The column of %sp contains the old CFA, not the old value of %sp. + The CFA offset already comprises the stack bias so, when %sp is the + CFA register, we must avoid counting the stack bias twice. Do not + do that for signal frames as the offset is artificial for them. */ + if (fs->regs.cfa_reg == __builtin_dwarf_sp_column () + && fs->regs.cfa_how == CFA_REG_OFFSET + && fs->regs.cfa_offset != 0 + && !fs->signal_frame) + context->cfa -= 2047; +} + +#else + +#define MD_FALLBACK_FRAME_STATE_FOR sparc_fallback_frame_state + +static _Unwind_Reason_Code +sparc_fallback_frame_state (struct _Unwind_Context *context, + _Unwind_FrameState *fs) +{ + void *pc = context->ra; + void *this_cfa = context->cfa; + void *new_cfa, *ra_location, *shifted_ra_location; + int regs_off; + int fpu_save_off; + unsigned char fpu_save; + int i; + + /* This is the observed pattern for the sigacthandler. */ + unsigned int sigacthandler_pattern [] + = {0x9602400f, 0x92100019, 0x00000000, 0x912e2002, + 0xe002000a, 0x90100018, 0x9fc40000, 0x9410001a, + 0x80a62008}; + + /* This is the observed pattern for the __libthread_segvhdlr. */ + unsigned int segvhdlr_pattern [] + = {0x94102000, 0xe007bfe4, 0x9010001c, 0x92100019, + 0x9fc40000, 0x9410001a, 0x81c7e008, 0x81e80000, + 0x80a26000}; + + /* This is the observed pattern for the __sighndlr. */ + unsigned int sighndlr_pattern [] + = {0x9de3bfa0, 0x90100018, 0x92100019, 0x9fc6c000, + 0x9410001a, 0x81c7e008, 0x81e80000}; + + /* Deal with frame-less function from which a signal was raised. */ + if (_Unwind_IsSignalFrame (context)) + { + /* The CFA is by definition unmodified in this case. */ + fs->regs.cfa_how = CFA_REG_OFFSET; + fs->regs.cfa_reg = __builtin_dwarf_sp_column (); + fs->regs.cfa_offset = 0; + + /* This is the canonical RA column. */ + fs->retaddr_column = 15; + + return _URC_NO_REASON; + } + + /* Look for the sigacthandler pattern. The pattern changes slightly + in different versions of the operating system, so we skip the + comparison against pc-(4*6). */ + if ( *(unsigned int *)(pc-(4*8)) == sigacthandler_pattern[0] + && *(unsigned int *)(pc-(4*7)) == sigacthandler_pattern[1] + /* skip pc-(4*6) */ + && *(unsigned int *)(pc-(4*5)) == sigacthandler_pattern[3] + && *(unsigned int *)(pc-(4*4)) == sigacthandler_pattern[4] + && *(unsigned int *)(pc-(4*3)) == sigacthandler_pattern[5] + && *(unsigned int *)(pc-(4*2)) == sigacthandler_pattern[6] + && *(unsigned int *)(pc-(4*1)) == sigacthandler_pattern[7] + && *(unsigned int *)(pc-(4*0)) == sigacthandler_pattern[8] ) + /* We need to move up two frames (the kernel frame and the handler + frame). Minimum stack frame size is 96 bytes (64 + 4 + 24): 64 + bytes for spilling register window (16 words for in and local + registers), 4 bytes for a pointer to space for callees + returning structs, and 24 bytes to store at least six argument + to callees. The ucontext_t structure is after this offset. */ + regs_off = 96 + 96; + + /* Look for the __libthread_segvhdlr pattern. */ + else if ( *(unsigned int *)(pc-(4*6)) == segvhdlr_pattern[0] + && *(unsigned int *)(pc-(4*5)) == segvhdlr_pattern[1] + && *(unsigned int *)(pc-(4*4)) == segvhdlr_pattern[2] + && *(unsigned int *)(pc-(4*3)) == segvhdlr_pattern[3] + && *(unsigned int *)(pc-(4*2)) == segvhdlr_pattern[4] + && *(unsigned int *)(pc-(4*1)) == segvhdlr_pattern[5] + && *(unsigned int *)(pc-(4*0)) == segvhdlr_pattern[6] + && *(unsigned int *)(pc+(4*1)) == segvhdlr_pattern[7] + && *(unsigned int *)(pc+(4*2)) == segvhdlr_pattern[8] ) + /* We need to move up four frames (the kernel frame, the + sigacthandler frame, the __sighndlr frame, and the + __libthread_segvhdlr). Two of them have the minimum + stack frame size (kernel and __sighndlr frames) of 96 bytes, + other has a stack frame of 216 bytes (the sigacthandler frame), + and there is another with a stack frame of 128 bytes (the + __libthread_segvhdlr). The ucontext_t structure is after this + offset. */ + regs_off = 96 + 96 + 128 + 216; + + /* Look for the __sighndlr pattern. */ + else if ( *(unsigned int *)(pc-(4*5)) == sighndlr_pattern[0] + && *(unsigned int *)(pc-(4*4)) == sighndlr_pattern[1] + && *(unsigned int *)(pc-(4*3)) == sighndlr_pattern[2] + && *(unsigned int *)(pc-(4*2)) == sighndlr_pattern[3] + && *(unsigned int *)(pc-(4*1)) == sighndlr_pattern[4] + && *(unsigned int *)(pc-(4*0)) == sighndlr_pattern[5] + && *(unsigned int *)(pc+(4*1)) == sighndlr_pattern[6] ) + { + /* We have observed different calling frames among different + versions of the operating system, so that we need to + discriminate using the upper frame. We look for the return + address of the caller frame (there is an offset of 15 words + between the frame address and the place where this return + address is stored) in order to do some more pattern matching. */ + unsigned int cuh_pattern + = *(unsigned int *)(*(unsigned int *)(this_cfa + 15*4) - 4); + + if (cuh_pattern == 0xd407a04c) + /* This matches the call_user_handler pattern for Solaris 10. + We need to move up three frames (the kernel frame, the + call_user_handler frame, the __sighndlr frame). Two of them + have the minimum stack frame size (kernel and __sighndlr + frames) of 96 bytes, and there is another with a stack frame + of 160 bytes (the call_user_handler frame). The ucontext_t + structure is after this offset. */ + regs_off = 96 + 96 + 160; + else if (cuh_pattern == 0x9410001a || cuh_pattern == 0x9410001b) + /* This matches the call_user_handler pattern for Solaris 9 and + for Solaris 8 running inside Solaris Containers respectively. + We need to move up four frames (the kernel frame, the signal + frame, the call_user_handler frame, the __sighndlr frame). + Three of them have the minimum stack frame size (kernel, + signal, and __sighndlr frames) of 96 bytes, and there is + another with a stack frame of 160 bytes (the call_user_handler + frame). The ucontext_t structure is after this offset. */ + regs_off = 96 + 96 + 96 + 160; + else + /* We need to move up three frames (the kernel frame, the + sigacthandler frame, and the __sighndlr frame). Two of them + have the minimum stack frame size (kernel and __sighndlr + frames) of 96 bytes, and there is another with a stack frame + of 216 bytes (the sigacthandler frame). The ucontext_t + structure is after this offset. */ + regs_off = 96 + 96 + 216; + } + + /* Exit if the pattern at the return address does not match the + previous three patterns. */ + else + return _URC_END_OF_STACK; + + /* FPU information can be extracted from the ucontext_t structure + that is the third argument for the signal handler, that is saved + in the stack. There are 10 words between the beginning of the + ucontext_t argument of the signal handler and the uc_mcontext + field. There are 80 bytes between the beginning of uc_mcontext + and the beginning of the fpregs field. */ + fpu_save_off = regs_off + (4*10) + (4*20); + + /* The fpregs field contains 32 words at the beginning that contain + the fpu state. Then there are 2 words and two bytes. */ + fpu_save = *(unsigned char *)(this_cfa + fpu_save_off + (4*32) + (2*4) + 2); + + /* We need to get the frame pointer for the kernel frame that + executes when the signal is raised. This frame is just the + following to the application code that generated the signal, so + that the later's stack pointer is the former's frame pointer. + The stack pointer for the interrupted application code can be + calculated from the ucontext_t structure (third argument for the + signal handler) that is saved in the stack. There are 10 words + between the beginning of the ucontext_t argument of the signal + handler and the uc_mcontext.gregs field that contains the + registers saved by the signal handler. */ + new_cfa = *(void **)(this_cfa + regs_off + (4*10) + (REG_SP*4)); + fs->regs.cfa_how = CFA_REG_OFFSET; + fs->regs.cfa_reg = __builtin_dwarf_sp_column (); + fs->regs.cfa_offset = new_cfa - this_cfa; + + /* Restore global and out registers (in this order) from the + ucontext_t structure, uc_mcontext.gregs field. */ + for (i = 1; i < 16; i++) + { + /* We never restore %sp as everything is purely CFA-based. */ + if ((unsigned int) i == __builtin_dwarf_sp_column ()) + continue; + + /* First the global registers and then the out registers */ + fs->regs.reg[i].how = REG_SAVED_OFFSET; + fs->regs.reg[i].loc.offset + = this_cfa + regs_off + (4*10) + ((REG_Y+i)*4) - new_cfa; + } + + /* Just above the stack pointer there are 16 words in which the + register window (in and local registers) was saved. */ + for (i = 0; i < 16; i++) + { + fs->regs.reg[i + 16].how = REG_SAVED_OFFSET; + fs->regs.reg[i + 16].loc.offset = i*4; + } + + /* Check whether we need to restore fpu registers. */ + if (fpu_save) + { + for (i = 0; i < 32; i++) + { + fs->regs.reg[i + 32].how = REG_SAVED_OFFSET; + fs->regs.reg[i + 32].loc.offset + = this_cfa + fpu_save_off + (i*4) - new_cfa; + } + } + + /* State the rules to find the kernel's code "return address", which is + the address of the active instruction when the signal was caught. + On the SPARC, since RETURN_ADDR_OFFSET (essentially 8) is defined, we + need to preventively subtract it from the purported return address. */ + ra_location = this_cfa + regs_off + (4*10) + (REG_PC*4); + shifted_ra_location = this_cfa + regs_off + (4*10) + (REG_Y*4); + *(void **)shifted_ra_location = *(void **)ra_location - 8; + fs->retaddr_column = 0; + fs->regs.reg[0].how = REG_SAVED_OFFSET; + fs->regs.reg[0].loc.offset = shifted_ra_location - new_cfa; + fs->signal_frame = 1; + + return _URC_NO_REASON; +}; + +#endif diff --git a/gcc/config/sparc/sol2.h b/gcc/config/sparc/sol2.h index 139f5b39dff..a3f7647027b 100644 --- a/gcc/config/sparc/sol2.h +++ b/gcc/config/sparc/sol2.h @@ -194,3 +194,5 @@ along with GCC; see the file COPYING3. If not see (SIZE), (ALIGN) / BITS_PER_UNIT); \ } \ while (0) + +#define MD_UNWIND_SUPPORT "config/sparc/sol2-unwind.h" diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c index 316cc73d777..a05e1d804d7 100644 --- a/gcc/config/spu/spu.c +++ b/gcc/config/spu/spu.c @@ -150,6 +150,7 @@ char regs_ever_allocated[FIRST_PSEUDO_REGISTER]; /* Prototypes and external defs. */ static void spu_init_builtins (void); +static tree spu_builtin_decl (unsigned, bool); static unsigned char spu_scalar_mode_supported_p (enum machine_mode mode); static unsigned char spu_vector_mode_supported_p (enum machine_mode mode); static bool spu_legitimate_address_p (enum machine_mode, rtx, bool); @@ -283,6 +284,8 @@ static const struct attribute_spec spu_attribute_table[] = #undef TARGET_INIT_BUILTINS #define TARGET_INIT_BUILTINS spu_init_builtins +#undef TARGET_BUILTIN_DECL +#define TARGET_BUILTIN_DECL spu_builtin_decl #undef TARGET_EXPAND_BUILTIN #define TARGET_EXPAND_BUILTIN spu_expand_builtin @@ -5285,6 +5288,18 @@ struct spu_builtin_description spu_builtins[] = { #undef DEF_BUILTIN }; +/* Returns the rs6000 builtin decl for CODE. */ + +static tree +spu_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED) +{ + if (code >= NUM_SPU_BUILTINS) + return error_mark_node; + + return spu_builtins[code].fndecl; +} + + static void spu_init_builtins (void) { diff --git a/gcc/configure b/gcc/configure index b15da5e852e..d9bd245dcea 100755 --- a/gcc/configure +++ b/gcc/configure @@ -22923,6 +22923,37 @@ $as_echo "#define HAVE_AS_IX86_SAHF 1" >>confdefs.h fi + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for swap suffix" >&5 +$as_echo_n "checking assembler for swap suffix... " >&6; } +if test "${gcc_cv_as_ix86_swap+set}" = set; then : + $as_echo_n "(cached) " >&6 +else + gcc_cv_as_ix86_swap=no + if test x$gcc_cv_as != x; then + echo 'movl.s %esp, %ebp' > conftest.s + if { ac_try='$gcc_cv_as -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; } + then + gcc_cv_as_ix86_swap=yes + else + echo "configure: failed program was" >&5 + cat conftest.s >&5 + fi + rm -f conftest.o conftest.s + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_ix86_swap" >&5 +$as_echo "$gcc_cv_as_ix86_swap" >&6; } +if test $gcc_cv_as_ix86_swap = yes; then + +$as_echo "#define HAVE_AS_IX86_SWAP 1" >>confdefs.h + +fi + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for different section symbol subtraction" >&5 $as_echo_n "checking assembler for different section symbol subtraction... " >&6; } if test "${gcc_cv_as_ix86_diff_sect_delta+set}" = set; then : @@ -23521,6 +23552,50 @@ $as_echo "#define HAVE_AS_LWSYNC 1" >>confdefs.h fi + case $target in + *-*-aix*) conftest_s=' .machine "476" + .csect .text[PR] + dci 0';; + *) conftest_s=' .machine "476" + .text + dci 0';; + esac + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for data cache invalidate support" >&5 +$as_echo_n "checking assembler for data cache invalidate support... " >&6; } +if test "${gcc_cv_as_powerpc_dci+set}" = set; then : + $as_echo_n "(cached) " >&6 +else + gcc_cv_as_powerpc_dci=no + if test $in_tree_gas = yes; then + if test $gcc_cv_gas_vers -ge `expr \( \( 9 \* 1000 \) + 99 \) \* 1000 + 0` + then gcc_cv_as_powerpc_dci=yes +fi + elif test x$gcc_cv_as != x; then + echo "$conftest_s" > conftest.s + if { ac_try='$gcc_cv_as -a32 -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; } + then + gcc_cv_as_powerpc_dci=yes + else + echo "configure: failed program was" >&5 + cat conftest.s >&5 + fi + rm -f conftest.o conftest.s + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_powerpc_dci" >&5 +$as_echo "$gcc_cv_as_powerpc_dci" >&6; } +if test $gcc_cv_as_powerpc_dci = yes; then + +$as_echo "#define HAVE_AS_DCI 1" >>confdefs.h + +fi + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .gnu_attribute support" >&5 $as_echo_n "checking assembler for .gnu_attribute support... " >&6; } if test "${gcc_cv_as_powerpc_gnu_attribute+set}" = set; then : @@ -25022,30 +25097,63 @@ rm -f core conftest.err conftest.$ac_objext \ fi # Check -ldl - LIBS="$LIBS -ldl" - { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -ldl" >&5 -$as_echo_n "checking for -ldl... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for library containing dlopen" >&5 +$as_echo_n "checking for library containing dlopen... " >&6; } +if test "${ac_cv_search_dlopen+set}" = set; then : + $as_echo_n "(cached) " >&6 +else + ac_func_search_save_LIBS=$LIBS +cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ -#include <dlfcn.h> + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char dlopen (); int main () { -volatile int f = 0; if (f) dlopen ("dummy", 0); +return dlopen (); ; return 0; } _ACEOF -if ac_fn_c_try_link "$LINENO"; then : - { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -$as_echo "yes" >&6; }; have_dl=yes -else - { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 -$as_echo "no" >&6; } +for ac_lib in '' dl; do + if test -z "$ac_lib"; then + ac_res="none required" + else + ac_res=-l$ac_lib + LIBS="-l$ac_lib $ac_func_search_save_LIBS" + fi + if ac_fn_c_try_link "$LINENO"; then : + ac_cv_search_dlopen=$ac_res fi rm -f core conftest.err conftest.$ac_objext \ - conftest$ac_exeext conftest.$ac_ext - if test x"$have_dl" = x"yes"; then + conftest$ac_exeext + if test "${ac_cv_search_dlopen+set}" = set; then : + break +fi +done +if test "${ac_cv_search_dlopen+set}" = set; then : + +else + ac_cv_search_dlopen=no +fi +rm conftest.$ac_ext +LIBS=$ac_func_search_save_LIBS +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_search_dlopen" >&5 +$as_echo "$ac_cv_search_dlopen" >&6; } +ac_res=$ac_cv_search_dlopen +if test "$ac_res" != no; then : + test "$ac_res" = "none required" || LIBS="$ac_res $LIBS" + +fi + + if test x"$ac_cv_search_dlopen" = x"-ldl"; then pluginlibs="$pluginlibs -ldl" fi @@ -25073,7 +25181,7 @@ $as_echo "no" >&6; }; have_pic_shared=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext - if test x"$have_pic_shared" != x"yes"; then + if test x"$have_pic_shared" != x"yes" -o x"$ac_cv_search_dlopen" = x"no"; then pluginlibs= enable_plugin=no fi diff --git a/gcc/configure.ac b/gcc/configure.ac index ab6fb22421a..b509ad44652 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -3047,6 +3047,12 @@ foo: nop [AC_DEFINE(HAVE_AS_IX86_SAHF, 1, [Define if your assembler supports the sahf mnemonic.])]) + gcc_GAS_CHECK_FEATURE([swap suffix], + gcc_cv_as_ix86_swap,,, + [movl.s %esp, %ebp],, + [AC_DEFINE(HAVE_AS_IX86_SWAP, 1, + [Define if your assembler supports the swap suffix.])]) + gcc_GAS_CHECK_FEATURE([different section symbol subtraction], gcc_cv_as_ix86_diff_sect_delta,,, [.section .rodata @@ -3249,6 +3255,21 @@ LCF0: [AC_DEFINE(HAVE_AS_LWSYNC, 1, [Define if your assembler supports LWSYNC instructions.])]) + case $target in + *-*-aix*) conftest_s=' .machine "476" + .csect .text[[PR]] + dci 0';; + *) conftest_s=' .machine "476" + .text + dci 0';; + esac + + gcc_GAS_CHECK_FEATURE([data cache invalidate support], + gcc_cv_as_powerpc_dci, [9,99,0], -a32, + [$conftest_s],, + [AC_DEFINE(HAVE_AS_DCI, 1, + [Define if your assembler supports the DCI/ICI instructions.])]) + gcc_GAS_CHECK_FEATURE([.gnu_attribute support], gcc_cv_as_powerpc_gnu_attribute, [2,18,0],, [.gnu_attribute 4,1],, @@ -4256,14 +4277,8 @@ if test x"$enable_plugin" = x"yes"; then fi # Check -ldl - LIBS="$LIBS -ldl" - AC_MSG_CHECKING([for -ldl]) - AC_TRY_LINK( - [#include <dlfcn.h>], - [volatile int f = 0; if (f) dlopen ("dummy", 0);], - [AC_MSG_RESULT([yes]); have_dl=yes], - [AC_MSG_RESULT([no])]) - if test x"$have_dl" = x"yes"; then + AC_SEARCH_LIBS([dlopen], [dl]) + if test x"$ac_cv_search_dlopen" = x"-ldl"; then pluginlibs="$pluginlibs -ldl" fi @@ -4274,7 +4289,7 @@ if test x"$enable_plugin" = x"yes"; then [extern int X;],[return X == 0;], [AC_MSG_RESULT([yes]); have_pic_shared=yes], [AC_MSG_RESULT([no]); have_pic_shared=no]) - if test x"$have_pic_shared" != x"yes"; then + if test x"$have_pic_shared" != x"yes" -o x"$ac_cv_search_dlopen" = x"no"; then pluginlibs= enable_plugin=no fi diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 063db183eb3..d2a46b2b1b2 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,13 @@ +2009-10-11 Jason Merrill <jason@redhat.com> + + PR c++/37204 + * typeck.c (build_reinterpret_cast_1): Handle rvalue refs + properly. + +2009-10-11 Richard Guenther <rguenther@suse.de> + + * tree.c (cp_free_lang_data): Drop anonymous aggregate names. + 2009-10-08 Jason Merrill <jason@redhat.com> PR c++/36816 diff --git a/gcc/cp/tree.c b/gcc/cp/tree.c index 156a09e25a6..76763735b97 100644 --- a/gcc/cp/tree.c +++ b/gcc/cp/tree.c @@ -3129,6 +3129,17 @@ cp_free_lang_data (tree t) DECL_EXTERNAL (t) = 1; TREE_STATIC (t) = 0; } + if (CP_AGGREGATE_TYPE_P (t) + && TYPE_NAME (t)) + { + tree name = TYPE_NAME (t); + if (TREE_CODE (name) == TYPE_DECL) + name = DECL_NAME (name); + /* Drop anonymous names. */ + if (name != NULL_TREE + && ANON_AGGRNAME_P (name)) + TYPE_NAME (t) = NULL_TREE; + } } diff --git a/gcc/cp/typeck.c b/gcc/cp/typeck.c index 526e7066a60..3392fac68a9 100644 --- a/gcc/cp/typeck.c +++ b/gcc/cp/typeck.c @@ -5599,12 +5599,17 @@ build_reinterpret_cast_1 (tree type, tree expr, bool c_cast_p, intype, type); expr = cp_build_unary_op (ADDR_EXPR, expr, 0, complain); + + if (warn_strict_aliasing > 2) + strict_aliasing_warning (TREE_TYPE (expr), type, expr); + if (expr != error_mark_node) expr = build_reinterpret_cast_1 (build_pointer_type (TREE_TYPE (type)), expr, c_cast_p, valid_p, complain); if (expr != error_mark_node) - expr = cp_build_indirect_ref (expr, 0, complain); + /* cp_build_indirect_ref isn't right for rvalue refs. */ + expr = convert_from_reference (fold_convert (type, expr)); return expr; } diff --git a/gcc/doc/cpp.texi b/gcc/doc/cpp.texi index ce4c0c3ff5d..590630cee0d 100644 --- a/gcc/doc/cpp.texi +++ b/gcc/doc/cpp.texi @@ -3609,8 +3609,6 @@ These directives are not part of the C standard, but they are not official GNU extensions either. What historical information we have been able to find, suggests they originated with System V@. -Both @samp{#ident} and @samp{#sccs} are deprecated extensions. - @cindex null directive The @dfn{null directive} consists of a @samp{#} followed by a newline, with only whitespace (including comments) in between. A null directive diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 6f0955577c3..da886a30f11 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -2679,6 +2679,14 @@ when targeting Windows. On all other systems, the default is the AMD ABI. Note, This feature is currently sorried out for Windows targets trying to +@item ms_hook_prologue +@cindex @code{ms_hook_prologue} attribute + +On 32 bit i[34567]86-*-* targets, you can use this function attribute to make +gcc generate the "hot-patching" function prologue used in Win32 API +functions in Microsoft Windows XP Service Pack 2 and newer. This requires +support for the swap suffix in the assembler. (GNU Binutils 2.19.51 or later) + @item naked @cindex function without a prologue/epilogue code Use this attribute on the ARM, AVR, IP2K and SPU ports to indicate that diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 6bf446b32fb..73d8dedaacf 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -2689,7 +2689,7 @@ incomplete or out of date. Send a note to @email{gcc@@gcc.gnu.org} detailing how the information should be changed. If you find a bug, please report it following the -@uref{../bugs.html,,bug reporting guidelines}. +@uref{../bugs/,,bug reporting guidelines}. If you want to print the GCC manuals, do @samp{cd @var{objdir}; make dvi}. You will need to have @command{texi2dvi} (version at least 4.7) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 97fd1691067..7fb53caa1a8 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -14611,9 +14611,9 @@ Set architecture type, register usage, choice of mnemonics, and instruction scheduling parameters for machine type @var{cpu_type}. Supported values for @var{cpu_type} are @samp{401}, @samp{403}, @samp{405}, @samp{405fp}, @samp{440}, @samp{440fp}, @samp{464}, @samp{464fp}, -@samp{505}, @samp{601}, @samp{602}, @samp{603}, @samp{603e}, @samp{604}, -@samp{604e}, @samp{620}, @samp{630}, @samp{740}, @samp{7400}, -@samp{7450}, @samp{750}, @samp{801}, @samp{821}, @samp{823}, +@samp{476}, @samp{476fp}, @samp{505}, @samp{601}, @samp{602}, @samp{603}, +@samp{603e}, @samp{604}, @samp{604e}, @samp{620}, @samp{630}, @samp{740}, +@samp{7400}, @samp{7450}, @samp{750}, @samp{801}, @samp{821}, @samp{823}, @samp{860}, @samp{970}, @samp{8540}, @samp{a2}, @samp{e300c2}, @samp{e300c3}, @samp{e500mc}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5}, @samp{power}, @samp{power2}, @samp{power3}, @samp{power4}, @@ -14959,7 +14959,7 @@ hardware floating is used. @opindex mmulhw @opindex mno-mulhw Generate code that uses (does not use) the half-word multiply and -multiply-accumulate instructions on the IBM 405, 440 and 464 processors. +multiply-accumulate instructions on the IBM 405, 440, 464 and 476 processors. These instructions are generated by default when targetting those processors. @@ -14968,7 +14968,7 @@ processors. @opindex mdlmzb @opindex mno-dlmzb Generate code that uses (does not use) the string-search @samp{dlmzb} -instruction on the IBM 405, 440 and 464 processors. This instruction is +instruction on the IBM 405, 440, 464 and 476 processors. This instruction is generated by default when targetting those processors. @item -mno-bit-align diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 27263d91c59..db42742e9e2 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -10532,6 +10532,16 @@ only language front ends that use those two functions will call @samp{TARGET_INIT_BUILTINS}. @end deftypefn +@deftypefn {Target Hook} tree TARGET_BUILTIN_FUNCTION (unsigned @var{code}, bool @var{initialize_p}) +Define this hook if you have any machine-specific built-in functions +that need to be defined. It should be a function that returns the +builtin function declaration for the builtin function code @var{code}. +If there is no such builtin and it cannot be initialized at this time +if @var{initialize_p} is true the function should return @code{NULL_TREE}. +If @var{code} is out of range the function should return +@code{error_mark_node}. +@end deftypefn + @deftypefn {Target Hook} rtx TARGET_EXPAND_BUILTIN (tree @var{exp}, rtx @var{target}, rtx @var{subtarget}, enum machine_mode @var{mode}, int @var{ignore}) Expand a call to a machine specific built-in function that was set up by diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c index 27f2c458ca0..a8d0048e17f 100644 --- a/gcc/dwarf2out.c +++ b/gcc/dwarf2out.c @@ -12353,13 +12353,10 @@ template_parameter_pack_die (tree parm_pack, dw_die_ref die; int j; - gcc_assert (parent_die - && parm_pack - && DECL_NAME (parm_pack)); + gcc_assert (parent_die && parm_pack); die = new_die (DW_TAG_GNU_template_parameter_pack, parent_die, parm_pack); - add_AT_string (die, DW_AT_name, IDENTIFIER_POINTER (DECL_NAME (parm_pack))); - + add_name_and_src_coords_attributes (die, parm_pack); for (j = 0; j < TREE_VEC_LENGTH (parm_pack_args); j++) generic_parameter_die (parm_pack, TREE_VEC_ELT (parm_pack_args, j), @@ -17207,12 +17204,10 @@ gen_formal_parameter_pack_die (tree parm_pack, gcc_assert (parm_pack && lang_hooks.function_parameter_pack_p (parm_pack) - && DECL_NAME (parm_pack) && subr_die); parm_pack_die = new_die (DW_TAG_GNU_formal_parameter_pack, subr_die, parm_pack); - add_AT_string (parm_pack_die, DW_AT_name, - IDENTIFIER_POINTER (DECL_NAME (parm_pack))); + add_src_coords_attributes (parm_pack_die, parm_pack); for (arg = pack_arg; arg; arg = TREE_CHAIN (arg)) { @@ -20351,15 +20346,13 @@ dwarf2out_init (const char *filename ATTRIBUTE_UNUSED) ASM_OUTPUT_LABEL (asm_out_file, cold_text_section_label); } -#ifdef HAVE_GAS_CFI_SECTIONS_DIRECTIVE - if (dwarf2out_do_cfi_asm ()) + if (HAVE_GAS_CFI_SECTIONS_DIRECTIVE && dwarf2out_do_cfi_asm ()) { #ifndef TARGET_UNWIND_INFO if (USING_SJLJ_EXCEPTIONS || (!flag_unwind_tables && !flag_exceptions)) #endif fprintf (asm_out_file, "\t.cfi_sections\t.debug_frame\n"); } -#endif } /* A helper function for dwarf2out_finish called through diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 9fac2a77322..5082c0a8d72 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,46 @@ +2009-10-11 Jerry DeLisle <jvdelisle@gcc.gnu.org> + + PR fortran/38439 + * io.c (check_format): Fix locus for error messages and fix a comment. + +2009-10-11 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/41583 + * decl.c (hash_value): New function. + (gfc_match_derived_decl): Call it. + +2009-10-09 Janus Weil <janus@gcc.gnu.org> + + PR fortran/41585 + * decl.c (build_struct): Bugfix for CLASS components. + +2009-10-09 Tobias Burnus <burnus@net-b.de> + + PR fortran/41582 + * decl.c (encapsulate_class_symbol): Save attr.abstract. + * resolve.c (resolve_allocate_expr): Reject class allocate + without typespec or source=. + * trans-stmt.c (gfc_trans_allocate): Change gfc_warning + into gfc_error for "not yet implemented". + +2009-10-09 Janus Weil <janus@gcc.gnu.org> + + PR fortran/41579 + * gfortran.h (gfc_select_type_stack): New struct, to be used as a stack + for SELECT TYPE statements. + (select_type_stack): New global variable. + (type_selector,select_type_tmp): Removed. + * match.c (type_selector,type_selector): Removed. + (select_type_stack): New variable, serving as a stack for + SELECT TYPE statements. + (select_type_push,select_type_set_tmp): New functions. + (gfc_match_select_type): Call select_type_push. + (gfc_match_type_is): Call select_type_set_tmp. + * parse.c (select_type_pop): New function. + (parse_select_type_block): Call select_type_pop. + * symbol.c (select_type_insert_tmp): New function. + (gfc_find_sym_tree): Call select_type_insert_tmp. + 2009-10-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> * arith.c (arith_power): Use mpc_pow_z. @@ -31,8 +74,8 @@ 2009-10-07 Paul Thomas <pault@gcc.gnu.org> - PR fortran/41613 - * resolve.c (check_class_members): Reset compcall.assign. + PR fortran/41613 + * resolve.c (check_class_members): Reset compcall.assign. 2009-10-05 Paul Thomas <pault@gcc.gnu.org> @@ -355,7 +398,6 @@ * parse.c (next_free): Improve error locus printing. (next_fixed): Change gfc_warn to gfc_warning_now, and improve locus reporting. - 2009-09-16 Michael Matz <matz@suse.de> diff --git a/gcc/fortran/decl.c b/gcc/fortran/decl.c index 82442042dcc..69449a32ce9 100644 --- a/gcc/fortran/decl.c +++ b/gcc/fortran/decl.c @@ -1077,6 +1077,7 @@ encapsulate_class_symbol (gfc_typespec *ts, symbol_attribute *attr, c->attr.pointer = attr->pointer || attr->dummy; c->attr.allocatable = attr->allocatable; c->attr.dimension = attr->dimension; + c->attr.abstract = ts->u.derived->attr.abstract; c->as = (*as); c->initializer = gfc_get_expr (); c->initializer->expr_type = EXPR_NULL; @@ -1463,9 +1464,9 @@ build_struct (const char *name, gfc_charlen *cl, gfc_expr **init, { gfc_component *c; - /* If the current symbol is of the same derived type that we're + /* F03:C438/C439. If the current symbol is of the same derived type that we're constructing, it must have the pointer attribute. */ - if (current_ts.type == BT_DERIVED + if ((current_ts.type == BT_DERIVED || current_ts.type == BT_CLASS) && current_ts.u.derived == gfc_current_block () && current_attr.pointer == 0) { @@ -6746,8 +6747,44 @@ gfc_get_type_attr_spec (symbol_attribute *attr, char *name) } -/* Counter for assigning a unique vindex number to each derived type. */ -static int vindex_counter = 0; +/* Assign a hash value for a derived type. The algorithm is that of + SDBM. The hashed string is '[module_name #] derived_name'. */ +static unsigned int +hash_value (gfc_symbol *sym) +{ + unsigned int hash = 0; + const char *c; + int i, len; + + /* Hash of the module or procedure name. */ + if (sym->module != NULL) + c = sym->module; + else if (sym->ns && sym->ns->proc_name + && sym->ns->proc_name->attr.flavor == FL_MODULE) + c = sym->ns->proc_name->name; + else + c = NULL; + + if (c) + { + len = strlen (c); + for (i = 0; i < len; i++, c++) + hash = (hash << 6) + (hash << 16) - hash + (*c); + + /* Disambiguate between 'a' in 'aa' and 'aa' in 'a'. */ + hash = (hash << 6) + (hash << 16) - hash + '#'; + } + + /* Hash of the derived type name. */ + len = strlen (sym->name); + c = sym->name; + for (i = 0; i < len; i++, c++) + hash = (hash << 6) + (hash << 16) - hash + (*c); + + /* Return the hash but take the modulus for the sake of module read, + even though this slightly increases the chance of collision. */ + return (hash % 100000000); +} /* Match the beginning of a derived type declaration. If a type name @@ -6871,8 +6908,8 @@ gfc_match_derived_decl (void) } if (!sym->vindex) - /* Set the vindex for this type and increment the counter. */ - sym->vindex = ++vindex_counter; + /* Set the vindex for this type. */ + sym->vindex = hash_value (sym); /* Take over the ABSTRACT attribute. */ sym->attr.abstract = attr.abstract; diff --git a/gcc/fortran/gfortran.h b/gcc/fortran/gfortran.h index d6ad992dda7..c602600165b 100644 --- a/gcc/fortran/gfortran.h +++ b/gcc/fortran/gfortran.h @@ -2208,6 +2208,18 @@ iterator_stack; extern iterator_stack *iter_stack; +/* Used for (possibly nested) SELECT TYPE statements. */ +typedef struct gfc_select_type_stack +{ + gfc_symbol *selector; /* Current selector variable. */ + gfc_symtree *tmp; /* Current temporary variable. */ + struct gfc_select_type_stack *prev; /* Previous element on stack. */ +} +gfc_select_type_stack; +extern gfc_select_type_stack *select_type_stack; +#define gfc_get_select_type_stack() XCNEW (gfc_select_type_stack) + + /* Node in the linked list used for storing finalizer procedures. */ typedef struct gfc_finalizer @@ -2566,10 +2578,6 @@ void gfc_free_equiv (gfc_equiv *); void gfc_free_data (gfc_data *); void gfc_free_case_list (gfc_case *); -/* Used for SELECT TYPE statements. */ -extern gfc_symbol *type_selector; -extern gfc_symtree *select_type_tmp; - /* matchexp.c -- FIXME too? */ gfc_expr *gfc_get_parentheses (gfc_expr *); diff --git a/gcc/fortran/io.c b/gcc/fortran/io.c index abd370f5048..d6b64c4120c 100644 --- a/gcc/fortran/io.c +++ b/gcc/fortran/io.c @@ -643,6 +643,8 @@ format_item_1: case FMT_X: /* X requires a prior number if we're being pedantic. */ + if (mode != MODE_FORMAT) + format_locus.nextc += format_string_pos; if (gfc_notify_std (GFC_STD_GNU, "Extension: X descriptor " "requires leading space count at %L", &format_locus) == FAILURE) @@ -722,7 +724,7 @@ data_desc: break; case FMT_P: - /* Comma after P is allowed only for F, E, EN, ES, D, or G. + /* No comma after P allowed only for F, E, EN, ES, D, or G. 10.1.1 (1). */ t = format_lex (); if (t == FMT_ERROR) @@ -1052,7 +1054,7 @@ between_desc: default: if (mode != MODE_FORMAT) - format_locus.nextc += format_string_pos; + format_locus.nextc += format_string_pos - 1; if (gfc_notify_std (GFC_STD_GNU, "Extension: Missing comma at %L", &format_locus) == FAILURE) return FAILURE; diff --git a/gcc/fortran/match.c b/gcc/fortran/match.c index d2c3ef021f4..3542944a50b 100644 --- a/gcc/fortran/match.c +++ b/gcc/fortran/match.c @@ -29,9 +29,8 @@ along with GCC; see the file COPYING3. If not see int gfc_matching_procptr_assignment = 0; bool gfc_matching_prefix = false; -/* Used for SELECT TYPE statements. */ -gfc_symbol *type_selector; -gfc_symtree *select_type_tmp; +/* Stack of SELECT TYPE statements. */ +gfc_select_type_stack *select_type_stack = NULL; /* For debugging and diagnostic purposes. Return the textual representation of the intrinsic operator OP. */ @@ -4021,6 +4020,38 @@ gfc_match_select (void) } +/* Push the current selector onto the SELECT TYPE stack. */ + +static void +select_type_push (gfc_symbol *sel) +{ + gfc_select_type_stack *top = gfc_get_select_type_stack (); + top->selector = sel; + top->tmp = NULL; + top->prev = select_type_stack; + + select_type_stack = top; +} + + +/* Set the temporary for the current SELECT TYPE selector. */ + +static void +select_type_set_tmp (gfc_typespec *ts) +{ + char name[GFC_MAX_SYMBOL_LEN]; + gfc_symtree *tmp; + + sprintf (name, "tmp$%s", ts->u.derived->name); + gfc_get_sym_tree (name, gfc_current_ns, &tmp, false); + tmp->n.sym->ts = *ts; + tmp->n.sym->attr.referenced = 1; + tmp->n.sym->attr.pointer = 1; + + select_type_stack->tmp = tmp; +} + + /* Match a SELECT TYPE statement. */ match @@ -4082,7 +4113,7 @@ gfc_match_select_type (void) new_st.expr2 = expr2; new_st.ext.ns = gfc_current_ns; - type_selector = expr1->symtree->n.sym; + select_type_push (expr1->symtree->n.sym); return MATCH_YES; } @@ -4167,7 +4198,6 @@ gfc_match_type_is (void) { gfc_case *c = NULL; match m; - char name[GFC_MAX_SYMBOL_LEN]; if (gfc_current_state () != COMP_SELECT_TYPE) { @@ -4199,11 +4229,7 @@ gfc_match_type_is (void) new_st.ext.case_list = c; /* Create temporary variable. */ - sprintf (name, "tmp$%s", c->ts.u.derived->name); - gfc_get_sym_tree (name, gfc_current_ns, &select_type_tmp, false); - select_type_tmp->n.sym->ts = c->ts; - select_type_tmp->n.sym->attr.referenced = 1; - select_type_tmp->n.sym->attr.pointer = 1; + select_type_set_tmp (&c->ts); return MATCH_YES; diff --git a/gcc/fortran/parse.c b/gcc/fortran/parse.c index 770c7efe9f6..49d449cfdc8 100644 --- a/gcc/fortran/parse.c +++ b/gcc/fortran/parse.c @@ -2887,6 +2887,17 @@ parse_select_block (void) } +/* Pop the current selector from the SELECT TYPE stack. */ + +static void +select_type_pop (void) +{ + gfc_select_type_stack *old = select_type_stack; + select_type_stack = old->prev; + gfc_free (old); +} + + /* Parse a SELECT TYPE construct (F03:R821). */ static void @@ -2959,6 +2970,7 @@ done: pop_state (); accept_statement (st); gfc_current_ns = gfc_current_ns->parent; + select_type_pop (); } diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c index 1aee540969c..5ea41c9bdf8 100644 --- a/gcc/fortran/resolve.c +++ b/gcc/fortran/resolve.c @@ -5840,7 +5840,7 @@ gfc_expr_to_initialize (gfc_expr *e) static gfc_try resolve_allocate_expr (gfc_expr *e, gfc_code *code) { - int i, pointer, allocatable, dimension, check_intent_in; + int i, pointer, allocatable, dimension, check_intent_in, is_abstract; symbol_attribute attr; gfc_ref *ref, *ref2; gfc_array_ref *ar; @@ -5862,6 +5862,9 @@ resolve_allocate_expr (gfc_expr *e, gfc_code *code) if (e->symtree) sym = e->symtree->n.sym; + /* Check whether ultimate component is abstract and CLASS. */ + is_abstract = 0; + if (e->expr_type != EXPR_VARIABLE) { allocatable = 0; @@ -5876,6 +5879,7 @@ resolve_allocate_expr (gfc_expr *e, gfc_code *code) allocatable = sym->ts.u.derived->components->attr.allocatable; pointer = sym->ts.u.derived->components->attr.pointer; dimension = sym->ts.u.derived->components->attr.dimension; + is_abstract = sym->ts.u.derived->components->attr.abstract; } else { @@ -5903,12 +5907,14 @@ resolve_allocate_expr (gfc_expr *e, gfc_code *code) allocatable = c->ts.u.derived->components->attr.allocatable; pointer = c->ts.u.derived->components->attr.pointer; dimension = c->ts.u.derived->components->attr.dimension; + is_abstract = c->ts.u.derived->components->attr.abstract; } else { allocatable = c->attr.allocatable; pointer = c->attr.pointer; dimension = c->attr.dimension; + is_abstract = c->attr.abstract; } break; @@ -5927,6 +5933,14 @@ resolve_allocate_expr (gfc_expr *e, gfc_code *code) return FAILURE; } + if (is_abstract && !code->expr3 && code->ext.alloc.ts.type == BT_UNKNOWN) + { + gcc_assert (e->ts.type == BT_CLASS); + gfc_error ("Allocating %s of ABSTRACT base type at %L requires a " + "type-spec or SOURCE=", sym->name, &e->where); + return FAILURE; + } + if (check_intent_in && sym->attr.intent == INTENT_IN) { gfc_error ("Cannot allocate INTENT(IN) variable '%s' at %L", diff --git a/gcc/fortran/symbol.c b/gcc/fortran/symbol.c index befa90b8c49..2641df82b35 100644 --- a/gcc/fortran/symbol.c +++ b/gcc/fortran/symbol.c @@ -2461,6 +2461,19 @@ ambiguous_symbol (const char *name, gfc_symtree *st) } +/* If we're in a SELECT TYPE block, check if the variable 'st' matches any + selector on the stack. If yes, replace it by the corresponding temporary. */ + +static void +select_type_insert_tmp (gfc_symtree **st) +{ + gfc_select_type_stack *stack = select_type_stack; + for (; stack; stack = stack->prev) + if ((*st)->n.sym == stack->selector) + *st = stack->tmp; +} + + /* Search for a symtree starting in the current namespace, resorting to any parent namespaces if requested by a nonzero parent_flag. Returns nonzero if the name is ambiguous. */ @@ -2479,11 +2492,7 @@ gfc_find_sym_tree (const char *name, gfc_namespace *ns, int parent_flag, st = gfc_find_symtree (ns->sym_root, name); if (st != NULL) { - /* Special case: If we're in a SELECT TYPE block, - replace the selector variable by a temporary. */ - if (gfc_current_state () == COMP_SELECT_TYPE - && st && st->n.sym == type_selector) - st = select_type_tmp; + select_type_insert_tmp (&st); *result = st; /* Ambiguous generic interfaces are permitted, as long diff --git a/gcc/fortran/trans-stmt.c b/gcc/fortran/trans-stmt.c index 05ed23e4c05..110534d2a5e 100644 --- a/gcc/fortran/trans-stmt.c +++ b/gcc/fortran/trans-stmt.c @@ -4025,8 +4025,8 @@ gfc_trans_allocate (gfc_code * code) gfc_typespec *ts; /* TODO: Size must be determined at run time, since it must equal the size of the dynamic type of SOURCE, not the declared type. */ - gfc_warning ("Dynamic size allocation at %L not supported yet, " - "using size of declared type", &code->loc); + gfc_error ("Using SOURCE= with a class variable at %L not " + "supported yet", &code->loc); ts = &code->expr3->ts.u.derived->components->ts; tmp = TYPE_SIZE_UNIT (gfc_typenode_for_spec (ts)); } diff --git a/gcc/gimple.c b/gcc/gimple.c index 88353196f9c..29eec519b7d 100644 --- a/gcc/gimple.c +++ b/gcc/gimple.c @@ -3591,21 +3591,6 @@ iterative_hash_type_name (tree type, hashval_t v) if (!name) return v; gcc_assert (TREE_CODE (name) == IDENTIFIER_NODE); - /* Do not hash names of anonymous unions. At least the C++ FE insists - to have a non-NULL TYPE_NAME for them. See cp/cp-tree.h for all - the glory. */ -#ifndef NO_DOT_IN_LABEL - if (IDENTIFIER_POINTER (name)[0] == '.') - return v; -#else -#ifndef NO_DOLLAR_IN_LABEL - if (IDENTIFIER_POINTER (name)[0] == '$') - return v; -#else - if (!strncmp (IDENTIFIER_POINTER (name), "__anon_", sizeof ("__anon_") - 1)) - return v; -#endif -#endif return iterative_hash_object (IDENTIFIER_HASH_VALUE (name), v); } diff --git a/gcc/lto-streamer-in.c b/gcc/lto-streamer-in.c index f41aa75b823..d9c207d0b7f 100644 --- a/gcc/lto-streamer-in.c +++ b/gcc/lto-streamer-in.c @@ -2377,13 +2377,22 @@ lto_get_builtin_tree (struct lto_input_block *ib, struct data_in *data_in) gcc_assert (fclass == BUILT_IN_NORMAL || fclass == BUILT_IN_MD); fcode = (enum built_in_function) lto_input_uleb128 (ib); - gcc_assert (fcode < END_BUILTINS); ix = lto_input_sleb128 (ib); gcc_assert (ix == (int) ix); - result = built_in_decls[fcode]; - gcc_assert (result); + if (fclass == BUILT_IN_NORMAL) + { + gcc_assert (fcode < END_BUILTINS); + result = built_in_decls[fcode]; + gcc_assert (result); + } + else if (fclass == BUILT_IN_MD) + { + result = targetm.builtin_decl (fcode, true); + if (!result || result == error_mark_node) + fatal_error ("target specific builtin not available"); + } asmname = input_string (data_in, ib); if (asmname) diff --git a/gcc/lto-streamer-out.c b/gcc/lto-streamer-out.c index 499734f4988..9d097f0b503 100644 --- a/gcc/lto-streamer-out.c +++ b/gcc/lto-streamer-out.c @@ -1165,16 +1165,10 @@ lto_output_tree_pointers (struct output_block *ob, tree expr, bool ref_p) } if (CODE_CONTAINS_STRUCT (code, TS_OPTIMIZATION)) - { - /* FIXME lto. Not handled yet. */ - gcc_unreachable (); - } + sorry ("gimple bytecode streams do not support the optimization attribute"); if (CODE_CONTAINS_STRUCT (code, TS_TARGET_OPTION)) - { - /* FIXME lto. Not handled yet. */ - gcc_unreachable (); - } + sorry ("gimple bytecode streams do not support the target attribute"); } @@ -1234,6 +1228,11 @@ lto_output_builtin_tree (struct output_block *ob, tree expr, int ix) { gcc_assert (lto_stream_as_builtin_p (expr)); + if (DECL_BUILT_IN_CLASS (expr) == BUILT_IN_MD + && !targetm.builtin_decl) + sorry ("gimple bytecode streams do not support machine specific builtin " + "functions on this target"); + output_record_start (ob, LTO_builtin_decl); output_uleb128 (ob, DECL_BUILT_IN_CLASS (expr)); output_uleb128 (ob, DECL_FUNCTION_CODE (expr)); diff --git a/gcc/lto-streamer.h b/gcc/lto-streamer.h index c4d66b7a65a..4d90ecb0d0c 100644 --- a/gcc/lto-streamer.h +++ b/gcc/lto-streamer.h @@ -806,10 +806,6 @@ extern void lto_check_version (int, int); /* In lto-streamer-in.c */ -extern void lto_input_function_body (struct lto_file_decl_data *, tree, - const char *); -extern void lto_input_constructors_and_inits (struct lto_file_decl_data *, - const char *); extern void lto_input_cgraph (struct lto_file_decl_data *, const char *); extern void lto_init_reader (void); extern tree lto_input_tree (struct lto_input_block *, struct data_in *); diff --git a/gcc/lto-wrapper.c b/gcc/lto-wrapper.c index 228a0a4bb10..cddd4156a35 100644 --- a/gcc/lto-wrapper.c +++ b/gcc/lto-wrapper.c @@ -55,6 +55,26 @@ enum lto_mode_d { /* Current LTO mode. */ static enum lto_mode_d lto_mode = LTO_MODE_NONE; +static char *ltrans_output_file; +static char *flto_out; +static char *args_name; + +static void maybe_unlink_file (const char *); + +/* Delete tempfiles and exit function. */ + +static void +lto_wrapper_exit (int status) +{ + if (ltrans_output_file) + maybe_unlink_file (ltrans_output_file); + if (flto_out) + maybe_unlink_file (flto_out); + if (args_name) + maybe_unlink_file (args_name); + exit (status); +} + /* Just die. CMSGID is the error message. */ static void __attribute__ ((format (printf, 1, 2))) @@ -68,7 +88,7 @@ fatal (const char * cmsgid, ...) fprintf (stderr, "\n"); va_end (ap); - exit (FATAL_EXIT_CODE); + lto_wrapper_exit (FATAL_EXIT_CODE); } @@ -86,7 +106,7 @@ fatal_perror (const char *cmsgid, ...) fprintf (stderr, ": %s\n", xstrerror (e)); va_end (ap); - exit (FATAL_EXIT_CODE); + lto_wrapper_exit (FATAL_EXIT_CODE); } @@ -190,11 +210,13 @@ fork_execute (char **argv) { struct pex_obj *pex; char *new_argv[3]; - char *args_name = make_temp_file (".args"); - char *at_args = concat ("@", args_name, NULL); - FILE *args = fopen (args_name, "w"); + char *at_args; + FILE *args; int status; + args_name = make_temp_file (".args"); + at_args = concat ("@", args_name, NULL); + args = fopen (args_name, "w"); if (args == NULL) fatal ("failed to open %s", args_name); @@ -213,7 +235,6 @@ fork_execute (char **argv) collect_wait (new_argv[0], pex); maybe_unlink_file (args_name); - free (args_name); free (at_args); } @@ -227,8 +248,6 @@ run_gcc (unsigned argc, char *argv[]) unsigned new_argc = argc; const char **new_argv; const char **argv_ptr; - char *ltrans_output_file = NULL; - char *flto_out = NULL; char *list_option_full = NULL; new_argc += 8; @@ -320,7 +339,6 @@ run_gcc (unsigned argc, char *argv[]) putc (c, stdout); fclose (stream); maybe_unlink_file (ltrans_output_file); - free (ltrans_output_file); free (list_option_full); } else diff --git a/gcc/lto/ChangeLog b/gcc/lto/ChangeLog index f2eb1a2c8b8..82b8bec7a47 100644 --- a/gcc/lto/ChangeLog +++ b/gcc/lto/ChangeLog @@ -1,3 +1,12 @@ +2009-10-09 Richard Guenther <rguenther@suse.de> + + PR lto/41635 + PR lto/41636 + * lto.c (read_cgraph_and_symbols): Do not assert we can open + a file. + * lto-elf.c (init_shdr##BITS): Fix i18n problems. + (init_ehdr##BITS): Likewise. + 2009-10-08 Joseph Myers <joseph@codesourcery.com> * lto-elf.c (init_shdr##BITS, lto_elf_begin_section_with_type, diff --git a/gcc/lto/lto-elf.c b/gcc/lto/lto-elf.c index 28c26c768b6..190430b646c 100644 --- a/gcc/lto/lto-elf.c +++ b/gcc/lto/lto-elf.c @@ -235,7 +235,12 @@ init_shdr##BITS (Elf_Scn *scn, size_t sh_name, size_t sh_type) \ \ shdr = elf##BITS##_getshdr (scn); \ if (!shdr) \ - fatal_error ("elf"#BITS"_getshdr() failed: %s", elf_errmsg (-1));\ + { \ + if (BITS == 32) \ + fatal_error ("elf32_getshdr() failed: %s", elf_errmsg (-1)); \ + else \ + fatal_error ("elf64_getshdr() failed: %s", elf_errmsg (-1)); \ + } \ \ shdr->sh_name = sh_name; \ shdr->sh_type = sh_type; \ @@ -486,7 +491,12 @@ init_ehdr##BITS (lto_elf_file *elf_file) \ \ ehdr = elf##BITS##_newehdr (elf_file->elf); \ if (!ehdr) \ - fatal_error ("elf"#BITS"_newehdr() failed: %s", elf_errmsg (-1));\ + { \ + if (BITS == 32) \ + fatal_error ("elf32_newehdr() failed: %s", elf_errmsg (-1)); \ + else \ + fatal_error ("elf64_newehdr() failed: %s", elf_errmsg (-1)); \ + } \ \ memcpy (ehdr->e_ident, cached_file_attrs.elf_ident, \ sizeof cached_file_attrs.elf_ident); \ diff --git a/gcc/lto/lto.c b/gcc/lto/lto.c index cc400917272..2b674c176ac 100644 --- a/gcc/lto/lto.c +++ b/gcc/lto/lto.c @@ -1779,7 +1779,10 @@ read_cgraph_and_symbols (unsigned nfiles, const char **fnames) unsigned num_objects; resolution = fopen (resolution_file_name, "r"); - gcc_assert (resolution != NULL); + if (resolution == NULL) + fatal_error ("could not open symbol resolution file: %s", + xstrerror (errno)); + t = fscanf (resolution, "%u", &num_objects); gcc_assert (t == 1); diff --git a/gcc/plugin.c b/gcc/plugin.c index 414d5783fa5..18b7c8aecad 100644 --- a/gcc/plugin.c +++ b/gcc/plugin.c @@ -408,7 +408,7 @@ try_init_one_plugin (struct plugin_name_args *plugin) { void *dl_handle; plugin_init_func plugin_init; - char *err; + const char *err; PTR_UNION_TYPE (plugin_init_func) plugin_init_union; /* We use RTLD_NOW to accelerate binding and detect any mismatch diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 0450ea083f4..4e87d04abaf 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -365,8 +365,8 @@ simplify_replace_rtx (rtx x, const_rtx old_rtx, rtx new_rtx) to build a new expression substituting recursively. If we can't do anything, return our input. */ - if (x == old_rtx) - return new_rtx; + if (rtx_equal_p (x, old_rtx)) + return copy_rtx (new_rtx); switch (GET_RTX_CLASS (code)) { @@ -445,11 +445,6 @@ simplify_replace_rtx (rtx x, const_rtx old_rtx, rtx new_rtx) return x; return gen_rtx_LO_SUM (mode, op0, op1); } - else if (code == REG) - { - if (rtx_equal_p (x, old_rtx)) - return new_rtx; - } break; default: diff --git a/gcc/target-def.h b/gcc/target-def.h index 45b7ab7430e..96b43eb9a9d 100644 --- a/gcc/target-def.h +++ b/gcc/target-def.h @@ -437,6 +437,7 @@ #define TARGET_EXPAND_BUILTIN default_expand_builtin #define TARGET_RESOLVE_OVERLOADED_BUILTIN NULL #define TARGET_FOLD_BUILTIN hook_tree_tree_tree_bool_null +#define TARGET_BUILTIN_DECL NULL /* In tree-ssa-math-opts.c */ #define TARGET_BUILTIN_RECIPROCAL default_builtin_reciprocal @@ -880,6 +881,7 @@ TARGET_ALIGN_ANON_BITFIELD, \ TARGET_NARROW_VOLATILE_BITFIELD, \ TARGET_INIT_BUILTINS, \ + TARGET_BUILTIN_DECL, \ TARGET_EXPAND_BUILTIN, \ TARGET_RESOLVE_OVERLOADED_BUILTIN, \ TARGET_FOLD_BUILTIN, \ diff --git a/gcc/target.h b/gcc/target.h index f964b6975f8..c65063cbfc6 100644 --- a/gcc/target.h +++ b/gcc/target.h @@ -562,6 +562,12 @@ struct gcc_target /* Set up target-specific built-in functions. */ void (* init_builtins) (void); + /* Initialize (if INITIALIZE_P is true) and return the target-specific + built-in function decl for CODE. + Return NULL if that is not possible. Return error_mark_node if CODE + is outside of the range of valid target builtin function codes. */ + tree (* builtin_decl) (unsigned code, bool initialize_p); + /* Expand a target-specific builtin. */ rtx (* expand_builtin) (tree exp, rtx target, rtx subtarget, enum machine_mode mode, int ignore); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f7872c97995..6f07c4bfbf5 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,125 @@ +2009-10-12 Janis Johnson <janis187@us.ibm.com> + + PR testsuite/41659 + * gcc.dg/lto/20090914-2.c: Use dg-skip-if to skip test. + * lib/lto.exp (lto-get-options-main): Report error for using "target" + or "xfail" with dg-lto-do. + +2009-10-12 Stefan Dösinger <stefan@codeweavers.com> + + * gcc.target/i386/ms_hook_prologue.c: New testcase. + +2009-10-12 Michael Matz <matz@suse.de> + + * gcc.dg/plugin/one_time_plugin.c: Update test to use the cfg + pass. + +2009-10-12 Jakub Jelinek <jakub@redhat.com> + + PR target/41680 + * g++.dg/torture/pr41680.C: New test. + +2009-10-12 Dodji Seketeli <dodji@redhat.com> + + PR c++/41570 + * gcc/testsuite/g++.dg/debug/dwarf2/template-params-7.C: New test. + +2009-10-12 Alexandre Oliva <aoliva@redhat.com> + + PR debug/41616 + * gcc.dg/guality/pr41616-1.c: New. + +2009-10-11 Jason Merrill <jason@redhat.com> + + PR c++/37204 + * g++.dg/cpp0x/rv-reinterpret.C: New. + +2009-10-11 Jerry DeLisle <jvdelisle@gcc.gnu.org> + + PR libgfortran/38439 + * gfortran.dg/fmt_error_9.f: New test. + * gfortran.dg/fmt_error_10.f: New test. + +2009-10-11 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/41583 + * gfortran.dg/class_4a.f03: New test with class_4b,c and d.f03. + * gfortran.dg/class_4b.f03: As above. + * gfortran.dg/class_4c.f03: As above. + * gfortran.dg/class_4d.f03: As above. + +2009-10-11 Richard Guenther <rguenther@suse.de> + + PR tree-optimization/41555 + * gcc.dg/torture/pr41555.c: New testcase. + +2009-10-10 Jerry DeLisle <jvdelisle@gcc.gnu.org> + + PR libgfortran/35862 + * gfortran.dg/round_2.f03: Eliminate possible compile error. Use max + function correctly. + +2009-10-10 Jerry DeLisle <jvdelisle@gcc.gnu.org> + + PR libgfortran/35862 + * gfortran.dg/round_2.f03: Update test to also test for smaller kind. + Add conditions to avoid runtime errors if not supported. + +2009-10-10 Richard Guenther <rguenther@suse.de> + + PR tree-optimization/41654 + * gfortran.fortran-torture/compile/pr41654.f90: New testcase. + +2009-10-09 Jason Merrill <jason@redhat.com> + + * g++.dg/cpp/ucn-1.C: New. + +2009-10-09 Janus Weil <janus@gcc.gnu.org> + + PR fortran/41585 + * gfortran.dg/class_2.f03: Extended test case. + +2009-10-09 Tobias Burnus <burnus@net-b.de> + + PR fortran/41582 + * gfortran.dg/class_allocate_1.f03: Modify code such that + it compiles with the gfc_warning->gfc_error change. + * gfortran.dg/class_allocate_1.f03: New test. + +2009-10-09 Janus Weil <janus@gcc.gnu.org> + + PR fortran/41579 + * gfortran.dg/select_type_6.f03: New test. + +2009-10-09 Jakub Jelinek <jakub@redhat.com> + + PR preprocessor/41445 + * gcc.dg/cpp/separate-1.c: Adjust. + * gcc.dg/cpp/spacing1.c: Add -P to dg-options. + * gcc.dg/debug/dwarf2/pr41445-1.c: New test. + * gcc.dg/debug/dwarf2/pr41445-2.c: New test. + * gcc.dg/debug/dwarf2/pr41445-3.c: New test. + * gcc.dg/debug/dwarf2/pr41445-4.c: New test. + * gcc.dg/debug/dwarf2/pr41445-5.c: New test. + * gcc.dg/debug/dwarf2/pr41445-6.c: New test. + + PR rtl-optimization/41646 + * gcc.c-torture/compile/pr41646.c: New test. + +2009-10-09 Richard Guenther <rguenther@suse.de> + + PR tree-optimization/41634 + * gcc.c-torture/compile/pr41634.c: New testcase. + +2009-10-09 Uros Bizjak <ubizjak@gmail.com> + + * gfortran.dg/block_2.f08: Cleanup "original" tree dump. + +2009-10-09 Eric Botcazou <ebotcazou@adacore.com> + + * gnat.dg/opt3.adb: New test. + * gnat.dg/opt3_pkg.ads: New helper. + 2009-10-08 Doug Kwan <dougkwan@google.com> PR rtl-optimization/41574 @@ -14,6 +136,7 @@ 2009-10-08 Jason Merrill <jason@redhat.com> + PR c++/36816 * g++.dg/cpp0x/rv-deduce.C: New. PR c++/37177 @@ -414,7 +537,7 @@ 2009-10-02 Jack Howarth <howarth@bromo.med.uc.edu> - * gcc.dg/guality/guality.exp: Disable on darwin. + * gcc.dg/guality/guality.exp: Disable on darwin. 2009-10-02 Janis Johnson <janis187@us.ibm.com> @@ -5509,7 +5632,7 @@ 2009-05-12 David Billinghurst <billingd@gcc.gnu.org> * lib/target-supports.exp (check_profiling_available): Return - false for -p on *-*-cygwin* targets. + false for -p on *-*-cygwin* targets. 2009-05-11 H.J. Lu <hongjiu.lu@intel.com> diff --git a/gcc/testsuite/g++.dg/cpp/ucn-1.C b/gcc/testsuite/g++.dg/cpp/ucn-1.C new file mode 100644 index 00000000000..354e1d976b0 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp/ucn-1.C @@ -0,0 +1,13 @@ +// http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2007/n2170.html +// { dg-options "-std=c++0x -fextended-identifiers" } + +int main() +{ + "\u0041"; // 'A' UCN is OK in string literal + '\u0041'; // also OK in character literal + + int c\u0041c; // { dg-error "not valid in an identifier" } + int c\u0024c; // $ is OK; not part of basic source char set + + U"\uD800"; // { dg-error "not a valid universal character" } +} diff --git a/gcc/testsuite/g++.dg/cpp0x/rv-reinterpret.C b/gcc/testsuite/g++.dg/cpp0x/rv-reinterpret.C new file mode 100644 index 00000000000..5b6e4c3d126 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/rv-reinterpret.C @@ -0,0 +1,11 @@ +// { dg-options -std=c++0x } +// { dg-do run } + +void f(int &); +void f(int &&ir) { ir = 42; } +int main() +{ + int x; + f(reinterpret_cast<int&&>(x)); + return (x != 42); +} diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/template-params-7.C b/gcc/testsuite/g++.dg/debug/dwarf2/template-params-7.C new file mode 100644 index 00000000000..d021d96f54f --- /dev/null +++ b/gcc/testsuite/g++.dg/debug/dwarf2/template-params-7.C @@ -0,0 +1,21 @@ +// Contributed by Dodji Seketeli <dodji@redhat.com> +// Origin PR debug/30161 +// { dg-options "-std=c++0x -g -dA -fno-merge-debug-strings" } + +// The type M<> should have one DW_TAG_GNU_template_parameter_pack DIE, +// with no DW_AT_name attribute. We don't test the fact that it has no +// DW_AT_name though. +// { dg-final { scan-assembler-times "DIE \\(0x.*?\\) DW_TAG_GNU_template_parameter_pack" 1 } } + + +template <typename...> +struct M +{ +}; + +struct R : + M<> +{ +}; + +R r; diff --git a/gcc/testsuite/g++.dg/torture/pr41680.C b/gcc/testsuite/g++.dg/torture/pr41680.C new file mode 100644 index 00000000000..7faab0d5fbc --- /dev/null +++ b/gcc/testsuite/g++.dg/torture/pr41680.C @@ -0,0 +1,23 @@ +// PR target/41680 +// { dg-do compile } + +extern void baz (float); + +inline bool +bar (float x) +{ + union { float f; int i; } u; + u.f = x; + return (u.i & 1); +} + +void +foo (float *x) +{ + for (int i = 0; i < 10; i++) + { + float f = x[i]; + if (!bar (f)) + baz (f); + } +} diff --git a/gcc/testsuite/gcc.c-torture/compile/pr41634.c b/gcc/testsuite/gcc.c-torture/compile/pr41634.c new file mode 100644 index 00000000000..976e463e2ba --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr41634.c @@ -0,0 +1,19 @@ +extern int _xgetw(); +extern int foo(char*); + +void test_readmode( int ascii_mode ) +{ + static const char outbuffer[] + = "0,1,2,3,4,5,6,7,8,9\r\n\r\nA,B,C,D,E\r\nX,Y,Z"; + char buffer[2*512 +256]; + int i, j, ao; + unsigned int fp; + + foo(buffer); + + for (i=0, j=0; i<6; i++) { + if (ao==0 || outbuffer[fp-3+i] != '\r') + buffer[j++] = outbuffer[fp-3+i]; + } + _xgetw(); +} diff --git a/gcc/testsuite/gcc.c-torture/compile/pr41646.c b/gcc/testsuite/gcc.c-torture/compile/pr41646.c new file mode 100644 index 00000000000..f07b6ba19f4 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr41646.c @@ -0,0 +1,28 @@ +/* PR rtl-optimization/41646 */ + +struct A { unsigned long a; }; +struct B { unsigned short b, c, d; }; +struct B bar (unsigned long); + +char * +foo (char *a, struct A *x) +{ + struct B b = bar (x->a); + unsigned char c; + unsigned short d; + a[3] = ((unsigned char) (b.b % 10) + 48); + d = b.b / 10; + a[2] = ((unsigned char) (d % 10) + 48); + d = d / 10; + a[1] = ((unsigned char) (d % 10) + 48); + a[0] = ((unsigned char) ((d / 10) % 10) + 48); + a[4] = 46; + c = (unsigned char) b.c; + a[6] = (c % 10 + 48); + a[5] = ((c / 10) % 10 + 48); + a[7] = 46; + c = b.d; + a[9] = (c % 10 + 48); + a[8] = ((c / 10) % 10 + 48); + return a + 10; +} diff --git a/gcc/testsuite/gcc.dg/cpp/separate-1.c b/gcc/testsuite/gcc.dg/cpp/separate-1.c index 6814a0fa2d0..33d910b3c00 100644 --- a/gcc/testsuite/gcc.dg/cpp/separate-1.c +++ b/gcc/testsuite/gcc.dg/cpp/separate-1.c @@ -8,8 +8,8 @@ #define FOO() -int FOO( /* { dg-error "parse error|syntax error|expected" "error on this line" } */ - ), bar; +int FOO( + ), bar; /* { dg-error "parse error|syntax error|expected" "error on this line" } */ int baz FOO /* { dg-error "parse error|syntax error|expected" "error on this line" } */ ; diff --git a/gcc/testsuite/gcc.dg/cpp/spacing1.c b/gcc/testsuite/gcc.dg/cpp/spacing1.c index 2d70f869d21..c21a6b5159b 100644 --- a/gcc/testsuite/gcc.dg/cpp/spacing1.c +++ b/gcc/testsuite/gcc.dg/cpp/spacing1.c @@ -1,6 +1,7 @@ /* Copyright (C) 2000, 2001, 2003 Free Software Foundation, Inc. */ /* { dg-do preprocess } */ +/* { dg-options "-P" } */ /* This tests correct spacing of macro expansion output, as well as the line it falls on. This is quite subtle; it involves newlines diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-1.c b/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-1.c new file mode 100644 index 00000000000..452c0f6808f --- /dev/null +++ b/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-1.c @@ -0,0 +1,18 @@ +/* PR preprocessor/41445 */ +/* Test that token after multi-line function-like macro use + gets correct locus even when preprocessing separately. */ +/* { dg-do compile } */ +/* { dg-options "-save-temps -g -O0 -dA -fno-merge-debug-strings" } */ + +#define A(a,b) +int varh;A(1, + + + + 2)int vari; +int varj; + +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varh\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0x)?8\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"vari\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xc|12)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varj\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xd|13)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-2.c b/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-2.c new file mode 100644 index 00000000000..d2ee408ac9d --- /dev/null +++ b/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-2.c @@ -0,0 +1,9 @@ +/* PR preprocessor/41445 */ +/* { dg-do compile } */ +/* { dg-options "-g -O0 -dA -fno-merge-debug-strings" } */ + +#include "pr41445-1.c" + +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varh\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0x)?8\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"vari\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xc|12)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varj\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xd|13)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-3.c b/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-3.c new file mode 100644 index 00000000000..2a74dc5e3d4 --- /dev/null +++ b/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-3.c @@ -0,0 +1,18 @@ +/* PR preprocessor/41445 */ +/* Test that token after multi-line function-like macro use + gets correct locus even when preprocessing separately. */ +/* { dg-do compile } */ +/* { dg-options "-save-temps -g -O0 -dA -fno-merge-debug-strings" } */ + +#define A(a,b) +int varh;/* + +Some multi-line comment. + + */int vari; +int varj; + +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varh\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0x)?8\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"vari\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xc|12)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varj\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xd|13)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-4.c b/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-4.c new file mode 100644 index 00000000000..8aa92de5dd4 --- /dev/null +++ b/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-4.c @@ -0,0 +1,9 @@ +/* PR preprocessor/41445 */ +/* { dg-do compile } */ +/* { dg-options "-g -O0 -dA -fno-merge-debug-strings" } */ + +#include "pr41445-3.c" + +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varh\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0x)?8\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"vari\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xc|12)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varj\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xd|13)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-5.c b/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-5.c new file mode 100644 index 00000000000..03af604a7c0 --- /dev/null +++ b/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-5.c @@ -0,0 +1,14 @@ +/* PR preprocessor/41445 */ +/* Test that token after multi-line function-like macro use + gets correct locus even when preprocessing separately. */ +/* { dg-do compile } */ +/* { dg-options "-save-temps -g -O0 -dA -fno-merge-debug-strings" } */ + +#define A(x) vari x +#define vari(x) +#define B , varj +int A(B) ; + +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"vari\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0x)?7\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varj\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xa|10)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-6.c b/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-6.c new file mode 100644 index 00000000000..8aa37d1c1a6 --- /dev/null +++ b/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-6.c @@ -0,0 +1,8 @@ +/* PR preprocessor/41445 */ +/* { dg-do compile } */ +/* { dg-options "-g -O0 -dA -fno-merge-debug-strings" } */ + +#include "pr41445-5.c" + +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"vari\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0x)?7\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ +/* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varj\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xa|10)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */ diff --git a/gcc/testsuite/gcc.dg/guality/pr41616-1.c b/gcc/testsuite/gcc.dg/guality/pr41616-1.c new file mode 100644 index 00000000000..c38d76b7c9e --- /dev/null +++ b/gcc/testsuite/gcc.dg/guality/pr41616-1.c @@ -0,0 +1,20 @@ +/* { dg-do run { xfail *-*-* } } */ +/* { dg-options "-g -O2" } */ + +#include "guality.h" + +inline int f(int *a) +{ + return *a; +} + +int +main(int argc, char *argv[]) +{ + int b = -1; + GUALCHKVAL (b); + if (argc > 0) + b = -f(&b); + GUALCHKVAL (b); + return b; +} diff --git a/gcc/testsuite/gcc.dg/lto/20090914-2_0.c b/gcc/testsuite/gcc.dg/lto/20090914-2_0.c index f78ecf8899f..908af697ff8 100644 --- a/gcc/testsuite/gcc.dg/lto/20090914-2_0.c +++ b/gcc/testsuite/gcc.dg/lto/20090914-2_0.c @@ -1,4 +1,5 @@ -/* { dg-lto-do run { target x86_64-*-* i?86-*-* } } */ +/* { dg-lto-do run */ +/* { dg-skip-if "x86 only" { ! { x86_64-*-* i?86-*-* } } { "*" } { "" } } /* Doesn't work without this dummy function with -fwhopr. */ int foo(void) { } diff --git a/gcc/testsuite/gcc.dg/plugin/one_time_plugin.c b/gcc/testsuite/gcc.dg/plugin/one_time_plugin.c index ee805174aea..4a6a8a61969 100644 --- a/gcc/testsuite/gcc.dg/plugin/one_time_plugin.c +++ b/gcc/testsuite/gcc.dg/plugin/one_time_plugin.c @@ -31,7 +31,7 @@ struct gimple_opt_pass one_pass = { { GIMPLE_PASS, - "useless", /* name */ + "cfg", /* name */ one_pass_gate, /* gate */ one_pass_exec, /* execute */ NULL, /* sub */ @@ -53,7 +53,7 @@ int plugin_init (struct plugin_name_args *plugin_info, struct register_pass_info p; p.pass = &one_pass.pass; - p.reference_pass_name = "useless"; + p.reference_pass_name = "cfg"; p.ref_pass_instance_number = 1; p.pos_op = PASS_POS_INSERT_AFTER; diff --git a/gcc/testsuite/gcc.dg/torture/pr41555.c b/gcc/testsuite/gcc.dg/torture/pr41555.c new file mode 100644 index 00000000000..219b34275b7 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr41555.c @@ -0,0 +1,118 @@ +/* { dg-do run } */ + +#include <stdint.h> +#include <limits.h> + +extern void abort (void); + +static uint64_t safe_div_func_uint64_t_u_u (uint64_t _ui1, uint64_t _ui2) +{ + if (_ui2==0) return _ui1; + return _ui1 / _ui2; +} + +static int64_t safe_div_func_int64_t_s_s (int64_t _si1, int64_t _si2) +{ + if (_si2==0 || (_si1==INT64_MIN && _si2==-1)) return _si1; + return _si1 / _si2; +} + +#define safe_add_macro_int8_t_s_s(si1,si2) \ + ((((((int8_t)(si1))>((int8_t)0)) && (((int8_t)(si2))>((int8_t)0)) && (((int8_t)(si1)) > ((INT8_MAX)-((int8_t)(si2))))) \ + || ((((int8_t)(si1))<((int8_t)0)) && (((int8_t)(si2))<((int8_t)0)) && (((int8_t)(si1)) < ((INT8_MIN)-((int8_t)(si2)))))) \ + ? ((int8_t)(si1)) \ + : (((int8_t)(si1)) + ((int8_t)(si2))) \ + ) + +static int8_t +safe_add_func_int8_t_s_s(int8_t _si1, int8_t _si2) +{ + return safe_add_macro_int8_t_s_s(_si1,_si2); +} + +#define safe_rshift_macro_uint64_t_u_s(left,right) \ + (((((int)(right)) < ((uint64_t)0)) \ + || (((int)(right)) >= sizeof(uint64_t)*CHAR_BIT)) \ + ? ((uint64_t)(left)) \ + : (((uint64_t)(left)) >> ((int)(right)))) + +static uint64_t +safe_rshift_func_uint64_t_u_s(uint64_t _left, int _right) +{ + return safe_rshift_macro_uint64_t_u_s(_left,_right); +} + +#define safe_mul_macro_int32_t_s_s(si1,si2) \ + ((((((int32_t)(si1)) > ((int32_t)0)) && (((int32_t)(si2)) > ((int32_t)0)) && (((int32_t)(si1)) > ((INT32_MAX) / ((int32_t)(si2))))) || \ + ((((int32_t)(si1)) > ((int32_t)0)) && (((int32_t)(si2)) <= ((int32_t)0)) && (((int32_t)(si2)) < ((INT32_MIN) / ((int32_t)(si1))))) || \ + ((((int32_t)(si1)) <= ((int32_t)0)) && (((int32_t)(si2)) > ((int32_t)0)) && (((int32_t)(si1)) < ((INT32_MIN) / ((int32_t)(si2))))) || \ + ((((int32_t)(si1)) <= ((int32_t)0)) && (((int32_t)(si2)) <= ((int32_t)0)) && (((int32_t)(si1)) != ((int32_t)0)) && (((int32_t)(si2)) < ((INT32_MAX) / ((int32_t)(si1)))))) \ + ? ((int32_t)(si1)) \ + : ((int32_t)(si1)) * ((int32_t)(si2))) + +static int32_t +safe_mul_func_int32_t_s_s (int32_t _si1, int32_t _si2) +{ + return safe_mul_macro_int32_t_s_s(_si1,_si2); +} + +static int8_t g_39; +static volatile uint8_t g_46; +static uint8_t g_47; +static uint8_t *g_62; +static uint8_t g_79; +static int8_t g_101 = -1L; +static uint8_t *g_114; +static uint8_t *g_126; +static uint8_t g_133; + +static uint16_t func_35 (int32_t * p_36, uint64_t p_37, uint32_t p_38); +static uint16_t func_35 (int32_t * p_36, uint64_t p_37, uint32_t p_38) +{ + if (g_62 != 0) + abort (); + for (g_39 = 1; g_39 < 0; g_39 = 1) + { + } + return 1; +} + +static int32_t func_19 (int32_t p_20); +static int32_t func_19 (int32_t p_20) +{ + if (1 != + safe_div_func_uint64_t_u_u ((safe_div_func_int64_t_s_s (p_20, 1)), + g_101)) + { + func_35 (0, 1 <= (safe_add_func_int8_t_s_s (g_47, g_46)) > p_20 < 1, 1); + g_133 = 1; + if (g_114 != 0) + abort (); + if (g_126 != 0) + abort (); + } + return 1; +} + +static uint8_t func_2 (int32_t p_6); +static uint8_t func_2 (int32_t p_6) +{ + for (1; p_6 > 1; 1) + return 0; + func_19 (g_79); + if (safe_mul_func_int32_t_s_s + ((0, 1 < (safe_rshift_func_uint64_t_u_s (1 ^ p_6, 1))), + (func_35 (&p_6, 1, 1) < 1))) + { + } + return 1; +} + +int main (void) +{ + func_2 (1); + if (g_133 != 1) + abort (); + return 0; +} + diff --git a/gcc/testsuite/gcc.target/i386/ms_hook_prologue.c b/gcc/testsuite/gcc.target/i386/ms_hook_prologue.c new file mode 100644 index 00000000000..19438e7583f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/ms_hook_prologue.c @@ -0,0 +1,29 @@ +/* Test that the ms_hook_prologue attribute generates the correct code. */ + +/* { dg-do run } */ +/* { dg-require-effective-target ilp32 } */ +/* { dg-options "-O2 -fomit-frame-pointer" } */ + +int __attribute__ ((__ms_hook_prologue__)) foo () +{ + unsigned char *ptr = (unsigned char *) foo; + + /* The NOP mov must not be optimized away by optimizations. + The push %ebp, mov %esp, %ebp must not be removed by + -fomit-frame-pointer */ + + /* movl.s %edi, %edi */ + if(*ptr++ != 0x8b) return 1; + if(*ptr++ != 0xff) return 1; + /* push %ebp */ + if(*ptr++ != 0x55) return 1; + /* movl.s %esp, %ebp */ + if(*ptr++ != 0x8b) return 1; + if(*ptr++ != 0xec) return 1; + return 0; +} + +int main () +{ + return foo(); +} diff --git a/gcc/testsuite/gfortran.dg/block_2.f08 b/gcc/testsuite/gfortran.dg/block_2.f08 index a2ba2d5caea..484b6ce72fb 100644 --- a/gcc/testsuite/gfortran.dg/block_2.f08 +++ b/gcc/testsuite/gfortran.dg/block_2.f08 @@ -36,3 +36,4 @@ PROGRAM main END BLOCK END PROGRAM main ! { dg-final { scan-tree-dump-times "free \\(\\(void \\*\\) alloc_arr\\.data" 1 "original" } } +! { dg-final { cleanup-tree-dump "original" } } diff --git a/gcc/testsuite/gfortran.dg/class_2.f03 b/gcc/testsuite/gfortran.dg/class_2.f03 index 070d3f76fdd..3a75d55682c 100644 --- a/gcc/testsuite/gfortran.dg/class_2.f03 +++ b/gcc/testsuite/gfortran.dg/class_2.f03 @@ -34,6 +34,11 @@ abstract interface end subroutine end interface +type t6 + integer :: i + class(t6), allocatable :: foo ! { dg-error "must have the POINTER attribute" } +end type t6 + class(t1) :: o1 ! { dg-error "must be dummy, allocatable or pointer" } diff --git a/gcc/testsuite/gfortran.dg/class_4a.f03 b/gcc/testsuite/gfortran.dg/class_4a.f03 new file mode 100644 index 00000000000..3cf0b7abf51 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/class_4a.f03 @@ -0,0 +1,14 @@ +! { dg-do compile } +! +! Test the fix for PR41583, in which the different source files +! would generate the same 'vindex' for different class declared +! types. +! +! The test comprises class_4a, class_4b class_4c and class_4d.f03 + +! Contributed by Tobias Burnus <burnus@gcc.gnu.org> +! +module m + type t + end type t +end module m diff --git a/gcc/testsuite/gfortran.dg/class_4b.f03 b/gcc/testsuite/gfortran.dg/class_4b.f03 new file mode 100644 index 00000000000..4658b8cf3f5 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/class_4b.f03 @@ -0,0 +1,15 @@ +! { dg-do compile } +! +! Test the fix for PR41583, in which the different source files +! would generate the same 'vindex' for different class declared +! types. +! +! The test comprises class_4a, class_4b class_4c and class_4d.f03 +! +! Contributed by Tobias Burnus <burnus@gcc.gnu.org> +! +module m2 + use m + type, extends(t) :: t2 + end type t2 +end module m2 diff --git a/gcc/testsuite/gfortran.dg/class_4c.f03 b/gcc/testsuite/gfortran.dg/class_4c.f03 new file mode 100644 index 00000000000..7909c0eeda0 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/class_4c.f03 @@ -0,0 +1,28 @@ +! { dg-do run } +! +! Test the fix for PR41583, in which the different source files +! would generate the same 'vindex' for different class declared +! types. +! +! The test comprises class_4a, class_4b class_4c and class_4d.f03 +! +! Contributed by Tobias Burnus <burnus@gcc.gnu.org> +! + use m + use m2 + type,extends(t) :: t3 + end type t3 + + integer :: i + class(t), allocatable :: a + allocate(t3 :: a) + select type(a) + type is(t) + i = 1 + type is(t2) + i = 2 + type is(t3) + i = 3 + end select + print *, i +end diff --git a/gcc/testsuite/gfortran.dg/class_4d.f03 b/gcc/testsuite/gfortran.dg/class_4d.f03 new file mode 100644 index 00000000000..7a962aa01b9 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/class_4d.f03 @@ -0,0 +1,15 @@ +! { dg-do compile } +! +! Test the fix for PR41583, in which the different source files +! would generate the same 'vindex' for different class declared +! types. +! +! This file does nothing other than clean up the modules. +! +! Contributed by Tobias Burnus <burnus@gcc.gnu.org> +! +module m + type t + end type t +end module m +! { dg-final { cleanup-modules "m m2" } } diff --git a/gcc/testsuite/gfortran.dg/class_allocate_1.f03 b/gcc/testsuite/gfortran.dg/class_allocate_1.f03 index 844e1447fbf..719d90cf8f9 100644 --- a/gcc/testsuite/gfortran.dg/class_allocate_1.f03 +++ b/gcc/testsuite/gfortran.dg/class_allocate_1.f03 @@ -20,6 +20,7 @@ end type class(t1),pointer :: cp, cp2 + type(t2),pointer :: cp3 type(t3) :: x integer :: i @@ -67,7 +68,10 @@ i = 0 allocate(t2 :: cp2) - allocate(cp, source = cp2) ! { dg-warning "not supported yet" } +! FIXME: Not yet supported: source=<class> +! allocate(cp, source = cp2) + allocate(t2 :: cp3) + allocate(cp, source=cp3) select type (cp) type is (t1) i = 1 diff --git a/gcc/testsuite/gfortran.dg/class_allocate_2.f03 b/gcc/testsuite/gfortran.dg/class_allocate_2.f03 new file mode 100644 index 00000000000..d6a5d78bd75 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/class_allocate_2.f03 @@ -0,0 +1,23 @@ +! { dg-do compile } +! +! PR fortran/41582 +! +subroutine test() +type :: t +end type t +class(t), allocatable :: c,d +allocate(t :: d) +allocate(c,source=d) ! { dg-error "not supported yet" } +end + +type, abstract :: t +end type t +type t2 + class(t), pointer :: t +end type t2 + +class(t), allocatable :: a,c,d +type(t2) :: b +allocate(a) ! { dg-error "requires a type-spec or SOURCE" } +allocate(b%t) ! { dg-error "requires a type-spec or SOURCE" } +end diff --git a/gcc/testsuite/gfortran.dg/fmt_error_10.f b/gcc/testsuite/gfortran.dg/fmt_error_10.f new file mode 100644 index 00000000000..c2a9117bb68 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/fmt_error_10.f @@ -0,0 +1,29 @@ +! { dg-do run } +! { dg-options "-std=legacy" } +! PR38439 I/O PD edit descriptor inconsistency +! Test case prepared by Jerry DeLisle <jvdelisle@gcc.gnu.org> + character(len=25) :: str + character(len=132) :: msg, line + str = '(1pd24.15e6)' + line = "initial string" + x = 555.25 + + write (line,str,iostat=istat, iomsg=msg) 1.0d0, 1.234 + if (istat.ne.0) call abort + if (line.ne." 1.000000000000000D+001.E+00") call abort + + write (line,'(1pd24.15e6)',iostat=istat, iomsg=msg) 1.0d0, 1.234 ! { dg-warning "Period required" } + if (istat.ne.0) call abort + if (line.ne." 1.000000000000000D+001.E+00") call abort + + str = '(1pd0.15)' + write (line,str,iostat=istat, iomsg=msg) 1.0d0 + if (istat.ne.5006 .or. msg(1:15).ne."Positive width ") call abort + read (*,str,iostat=istat, iomsg=msg) x + if (istat.ne.5006 .or. msg(1:15).ne."Positive width ") call abort + if (x.ne.555.25) call abort + + write (line,'(1pd24.15e11.3)') 1.0d0, 1.234 + if (line.ne." 1.000000000000000D+00 1.234E+00") call abort + + end diff --git a/gcc/testsuite/gfortran.dg/fmt_error_9.f b/gcc/testsuite/gfortran.dg/fmt_error_9.f new file mode 100644 index 00000000000..0f2b63b6d32 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/fmt_error_9.f @@ -0,0 +1,25 @@ +! { dg-do run } +! { dg-options "-std=gnu" } +! PR38439 I/O PD edit descriptor inconsistency +! Test case prepared by Jerry DeLisle <jvdelisle@gcc.gnu.org> + character(len=25) :: str + character(len=132) :: msg, line + str = '(1pd24.15e6)' + line = "initial string" + x = 555.25 + + write (line,str,iostat=istat, iomsg=msg) 1.0d0, 1.234 + if (istat.ne.5006 .or. msg(1:15).ne."Period required") call abort + if (line.ne."initial string") call abort + + str = '(1pf0.15)' + write (line,str,iostat=istat, iomsg=msg) 1.0d0 + if (istat.ne.0) call abort + read (*,str,iostat=istat, iomsg=msg) x + if (istat.ne.5006 .or. msg(1:15).ne."Positive width ") call abort + if (x.ne.555.25) call abort + + write (line,'(1pd24.15e11.3)') 1.0d0, 1.234 + if (line.ne." 1.000000000000000D+00 1.234E+00") call abort + + end diff --git a/gcc/testsuite/gfortran.dg/round_2.f03 b/gcc/testsuite/gfortran.dg/round_2.f03 index aa04bbe3260..62190d71673 100644 --- a/gcc/testsuite/gfortran.dg/round_2.f03 +++ b/gcc/testsuite/gfortran.dg/round_2.f03 @@ -1,17 +1,24 @@ ! { dg-do run } ! PR35962 Implement F2003 rounding modes. ! Test case prepared by Jerry Delisle <jvdelisle@gcc.gnu.org> -integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1) +integer,parameter :: j = max(4, selected_real_kind (precision (0.0_4) + 1)) +integer,parameter :: k = max(4, selected_real_kind (precision (0.0_8) + 1)) character(64) :: line -write(line, '(RN, 4F10.3)') 0.0625_k, 0.1875_k -if (line.ne." 0.062 0.188") call abort + write(line, '(RN, 4F10.3)') 0.0625_j, 0.1875_j + if (line.ne." 0.062 0.188") call abort + write(line, '(RN, 4F10.2)') 0.125_j, 0.375_j, 1.125_j, 1.375_j + if (line.ne." 0.12 0.38 1.12 1.38") call abort + write(line, '(RN, 4F10.1)') 0.25_j, 0.75_j, 1.25_j, 1.75_j + if (line.ne." 0.2 0.8 1.2 1.8") call abort + write(line, '(RN, 4F10.0)') 0.5_j, 1.5_j, 2.5_j, 3.5_j + if (line.ne." 0. 2. 2. 4.") call abort -write(line, '(RN, 4F10.2)') 0.125_k, 0.375_k, 1.125_k, 1.375_k -if (line.ne." 0.12 0.38 1.12 1.38") call abort - -write(line, '(RN, 4F10.1)') 0.25_k, 0.75_k, 1.25_k, 1.75_k -if (line.ne." 0.2 0.8 1.2 1.8") call abort - -write(line, '(RN, 4F10.0)') 0.5_k, 1.5_k, 2.5_k, 3.5_k -if (line.ne." 0. 2. 2. 4.") call abort + write(line, '(RN, 4F10.3)') 0.0625_k, 0.1875_k + if (line.ne." 0.062 0.188") call abort + write(line, '(RN, 4F10.2)') 0.125_k, 0.375_k, 1.125_k, 1.375_k + if (line.ne." 0.12 0.38 1.12 1.38") call abort + write(line, '(RN, 4F10.1)') 0.25_k, 0.75_k, 1.25_k, 1.75_k + if (line.ne." 0.2 0.8 1.2 1.8") call abort + write(line, '(RN, 4F10.0)') 0.5_k, 1.5_k, 2.5_k, 3.5_k + if (line.ne." 0. 2. 2. 4.") call abort end diff --git a/gcc/testsuite/gfortran.dg/select_type_6.f03 b/gcc/testsuite/gfortran.dg/select_type_6.f03 new file mode 100644 index 00000000000..3b3c08e2296 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/select_type_6.f03 @@ -0,0 +1,38 @@ +! { dg-do run } +! +! PR 41579: [OOP/Polymorphism] Nesting of SELECT TYPE +! +! Contributed by Tobias Burnus <burnus@gcc.gnu.org> + + type t1 + end type t1 + + type, extends(t1) :: t2 + integer :: i + end type t2 + + type, extends(t1) :: t3 + integer :: j + end type t3 + + class(t1), allocatable :: mt2, mt3 + allocate(t2 :: mt2) + allocate(t3 :: mt3) + + select type (mt2) + type is(t2) + mt2%i = 5 + print *,mt2%i + select type(mt3) + type is(t3) + mt3%j = 2*mt2%i + print *,mt3%j + if (mt3%j /= 10) call abort() + class default + call abort() + end select + class default + call abort() + end select + +end diff --git a/gcc/testsuite/gfortran.fortran-torture/compile/pr41654.f90 b/gcc/testsuite/gfortran.fortran-torture/compile/pr41654.f90 new file mode 100644 index 00000000000..aa61905deaf --- /dev/null +++ b/gcc/testsuite/gfortran.fortran-torture/compile/pr41654.f90 @@ -0,0 +1,15 @@ +SUBROUTINE SCANBUFR (LBUFRIGNOREERROR, LBOPRPRO, LLSPLIT) +LOGICAL :: LBUFRIGNOREERROR, LBOPRPRO, LLSPLIT +INTEGER :: IBOTYP, IBSTYP +IF ((IBOTYP.eq.0).AND.(IBSTYP.eq.1)) GO TO 251 +IF ((IBOTYP.eq.0).AND.(IBSTYP.eq.3)) GO TO 251 +IF(LBUFRIGNOREERROR) THEN + goto 360 +ENDIF +251 CONTINUE +IF(LBOPRPRO.AND.LLSPLIT) THEN + CALL OBSCREEN +ENDIF +360 CONTINUE +END SUBROUTINE SCANBUFR + diff --git a/gcc/testsuite/gnat.dg/opt3.adb b/gcc/testsuite/gnat.dg/opt3.adb new file mode 100644 index 00000000000..b8ca2c7fba6 --- /dev/null +++ b/gcc/testsuite/gnat.dg/opt3.adb @@ -0,0 +1,11 @@ +-- { dg-do compile } +-- { dg-options "-O3" } + +with Opt3_Pkg; use Opt3_Pkg; + +procedure Opt3 is + type Buffer_Type is array (Integer range <> ) of Short_Integer; + B : Buffer_Type (1 .. 256) := (others => 0); +begin + F (B(1)); +end; diff --git a/gcc/testsuite/gnat.dg/opt3_pkg.ads b/gcc/testsuite/gnat.dg/opt3_pkg.ads new file mode 100644 index 00000000000..458a98be2de --- /dev/null +++ b/gcc/testsuite/gnat.dg/opt3_pkg.ads @@ -0,0 +1,5 @@ +package Opt3_Pkg is + + procedure F (I : Short_Integer); + +end Opt3_Pkg; diff --git a/gcc/testsuite/lib/lto.exp b/gcc/testsuite/lib/lto.exp index 7f2d7ecec83..cccd64220bc 100644 --- a/gcc/testsuite/lib/lto.exp +++ b/gcc/testsuite/lib/lto.exp @@ -191,6 +191,16 @@ proc lto-get-options-main { src } { || ![string compare "dg-options" $cmd] } { warning "lto.exp does not support $cmd in primary source file" } elseif { ![string compare "dg-lto-do" $cmd] } { + if { [llength $op] > 3 } { + set kw [lindex [lindex $op 3] 0] + if [string match "target" $kw] { + perror "$src: dg-lto-do does not support \"target\"" + } elseif [string match "xfail" $kw] { + perror "$src: dg-lto-do does not support \"xfail\"" + } else { + perror "$src: dg-lto-do takes a single argument" + } + } set dgdo [lindex $op 2] verbose "dg-lto-do command for \"$op\" is $dgdo" if { ![string compare "assemble" $dgdo] } { diff --git a/gcc/tree-into-ssa.c b/gcc/tree-into-ssa.c index 031e50e59df..8672a5e6317 100644 --- a/gcc/tree-into-ssa.c +++ b/gcc/tree-into-ssa.c @@ -1121,9 +1121,12 @@ insert_phi_nodes_for (tree var, bitmap phi_insertion_points, bool update_p) else { tree tracked_var; + gcc_assert (DECL_P (var)); phi = create_phi_node (var, bb); - if (!update_p && (tracked_var = target_for_debug_bind (var))) + + tracked_var = target_for_debug_bind (var); + if (tracked_var) { gimple note = gimple_build_debug_bind (tracked_var, PHI_RESULT (phi), @@ -1818,7 +1821,8 @@ maybe_replace_use_in_debug_stmt (use_operand_p use_p) DEF_P. */ static inline void -maybe_register_def (def_operand_p def_p, gimple stmt) +maybe_register_def (def_operand_p def_p, gimple stmt, + gimple_stmt_iterator gsi) { tree def = DEF_FROM_PTR (def_p); tree sym = DECL_P (def) ? def : SSA_NAME_VAR (def); @@ -1829,8 +1833,17 @@ maybe_register_def (def_operand_p def_p, gimple stmt) { if (DECL_P (def)) { + tree tracked_var; + def = make_ssa_name (def, stmt); SET_DEF (def_p, def); + + tracked_var = target_for_debug_bind (sym); + if (tracked_var) + { + gimple note = gimple_build_debug_bind (tracked_var, def, stmt); + gsi_insert_after (&gsi, note, GSI_SAME_STMT); + } } register_new_update_single (def, sym); @@ -1858,7 +1871,7 @@ maybe_register_def (def_operand_p def_p, gimple stmt) in OLD_SSA_NAMES. */ static void -rewrite_update_stmt (gimple stmt) +rewrite_update_stmt (gimple stmt, gimple_stmt_iterator gsi) { use_operand_p use_p; def_operand_p def_p; @@ -1920,7 +1933,7 @@ rewrite_update_stmt (gimple stmt) marked for renaming. */ if (register_defs_p (stmt)) FOR_EACH_SSA_DEF_OPERAND (def_p, stmt, iter, SSA_OP_ALL_DEFS) - maybe_register_def (def_p, stmt); + maybe_register_def (def_p, stmt, gsi); } @@ -2079,11 +2092,11 @@ rewrite_update_enter_block (struct dom_walk_data *walk_data ATTRIBUTE_UNUSED, /* Step 2. Rewrite every variable used in each statement in the block. */ if (TEST_BIT (interesting_blocks, bb->index)) - { - gcc_assert (bitmap_bit_p (blocks_to_update, bb->index)); + { + gcc_assert (bitmap_bit_p (blocks_to_update, bb->index)); for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi)) - rewrite_update_stmt (gsi_stmt (gsi)); - } + rewrite_update_stmt (gsi_stmt (gsi), gsi); + } /* Step 3. Update PHI nodes. */ rewrite_update_phi_arguments (bb); diff --git a/gcc/tree-ssa-dom.c b/gcc/tree-ssa-dom.c index 4bad3ddaf48..1e2c8f23ce8 100644 --- a/gcc/tree-ssa-dom.c +++ b/gcc/tree-ssa-dom.c @@ -816,24 +816,25 @@ remove_local_expressions_from_table (void) /* Remove all the expressions made available in this block. */ while (VEC_length (expr_hash_elt_t, avail_exprs_stack) > 0) { - struct expr_hash_elt element; expr_hash_elt_t victim = VEC_pop (expr_hash_elt_t, avail_exprs_stack); + void **slot; if (victim == NULL) break; - element = *victim; - /* This must precede the actual removal from the hash table, as ELEMENT and the table entry may share a call argument vector which will be freed during removal. */ if (dump_file && (dump_flags & TDF_DETAILS)) { fprintf (dump_file, "<<<< "); - print_expr_hash_elt (dump_file, &element); + print_expr_hash_elt (dump_file, victim); } - htab_remove_elt_with_hash (avail_exprs, &element, element.hash); + slot = htab_find_slot_with_hash (avail_exprs, + victim, victim->hash, NO_INSERT); + gcc_assert (slot && *slot == (void *) victim); + htab_clear_slot (avail_exprs, slot); } } @@ -2137,8 +2138,6 @@ optimize_stmt (basic_block bb, gimple_stmt_iterator si) if (may_optimize_p) { - eliminate_redundant_computations (&si); - stmt = gsi_stmt (si); if (gimple_code (stmt) == GIMPLE_CALL) { /* Resolve __builtin_constant_p. If it hasn't been @@ -2153,6 +2152,10 @@ optimize_stmt (basic_block bb, gimple_stmt_iterator si) stmt = gsi_stmt (si); } } + + update_stmt_if_modified (stmt); + eliminate_redundant_computations (&si); + stmt = gsi_stmt (si); } /* Record any additional equivalences created by this statement. */ @@ -2188,7 +2191,7 @@ optimize_stmt (basic_block bb, gimple_stmt_iterator si) { tree val = NULL; - update_stmt (stmt); + update_stmt_if_modified (stmt); if (gimple_code (stmt) == GIMPLE_COND) val = fold_binary_loc (gimple_location (stmt), diff --git a/gcc/tree-ssa-ifcombine.c b/gcc/tree-ssa-ifcombine.c index 1d2d85b7a8f..335b4fd95fc 100644 --- a/gcc/tree-ssa-ifcombine.c +++ b/gcc/tree-ssa-ifcombine.c @@ -340,6 +340,9 @@ ifcombine_ifandif (basic_block inner_cond_bb, basic_block outer_cond_bb) t2 = force_gimple_operand_gsi (&gsi, t2, true, NULL_TREE, true, GSI_SAME_STMT); t = fold_build2 (EQ_EXPR, boolean_type_node, t2, t); + t = canonicalize_cond_expr_cond (t); + if (!t) + return false; gimple_cond_set_condition_from_tree (inner_cond, t); update_stmt (inner_cond); @@ -488,6 +491,9 @@ ifcombine_iforif (basic_block inner_cond_bb, basic_block outer_cond_bb) true, GSI_SAME_STMT); t = fold_build2 (NE_EXPR, boolean_type_node, t, build_int_cst (TREE_TYPE (t), 0)); + t = canonicalize_cond_expr_cond (t); + if (!t) + return false; gimple_cond_set_condition_from_tree (inner_cond, t); update_stmt (inner_cond); diff --git a/gcc/tree-vect-data-refs.c b/gcc/tree-vect-data-refs.c index bc18f0272f8..c3570d31948 100644 --- a/gcc/tree-vect-data-refs.c +++ b/gcc/tree-vect-data-refs.c @@ -2369,9 +2369,20 @@ vect_create_data_ref_ptr (gimple stmt, struct loop *at_loop, vect_ptr_type = build_pointer_type (vectype); vect_ptr = vect_get_new_vect_var (vect_ptr_type, vect_pointer_var, get_name (base_name)); - /* If any of the data-references in the stmt group does not conflict - with the created vector data-reference use a ref-all pointer instead. */ - if (STMT_VINFO_DR_GROUP_SIZE (stmt_info) > 1) + + /* Vector types inherit the alias set of their component type by default so + we need to use a ref-all pointer if the data reference does not conflict + with the created vector data reference because it is not addressable. */ + if (!alias_sets_conflict_p (get_deref_alias_set (vect_ptr), + get_alias_set (DR_REF (dr)))) + { + vect_ptr_type = build_pointer_type_for_mode (vectype, ptr_mode, true); + vect_ptr = vect_get_new_vect_var (vect_ptr_type, vect_pointer_var, + get_name (base_name)); + } + + /* Likewise for any of the data references in the stmt group. */ + else if (STMT_VINFO_DR_GROUP_SIZE (stmt_info) > 1) { gimple orig_stmt = STMT_VINFO_DR_GROUP_FIRST_DR (stmt_info); do @@ -2380,10 +2391,11 @@ vect_create_data_ref_ptr (gimple stmt, struct loop *at_loop, if (!alias_sets_conflict_p (get_deref_alias_set (vect_ptr), get_alias_set (lhs))) { - vect_ptr_type = build_pointer_type_for_mode (vectype, - ptr_mode, true); - vect_ptr = vect_get_new_vect_var (vect_ptr_type, vect_pointer_var, - get_name (base_name)); + vect_ptr_type + = build_pointer_type_for_mode (vectype, ptr_mode, true); + vect_ptr + = vect_get_new_vect_var (vect_ptr_type, vect_pointer_var, + get_name (base_name)); break; } |