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authorRichard Earnshaw <rearnsha@arm.com>2012-03-22 15:14:46 +0000
committerRichard Earnshaw <rearnsha@gcc.gnu.org>2012-03-22 15:14:46 +0000
commit06ea73711d68c2d07372df7e38843104886f9c45 (patch)
tree39a882858a7cf76c5d913f7ea5e8f9711726bb3f /libgcc/config/arm/lib1funcs.S
parentb4e93f4518eccf83c79145c0b74e6c72ce9bbc0f (diff)
downloadgcc-06ea73711d68c2d07372df7e38843104886f9c45.tar.gz
lib1funcs.asm (ctzsi2): New function.
* arm/lib1funcs.asm (ctzsi2): New function. * arm/t-elf (LIB1ASMFUNCS): Add _ctzsi2. * arm/t-linux (LIB1ASMFUNCS): Likewise. * arm/t-strongarm-elf (LIB1ASMFUNCS): Likewise. * arm/t-symbian (LIB1ASMFUNCS): Likewise. * arm/t-vxworks (LIB1ASMFUNCS): Likewise. * arm/t-wince-pe (LIB1ASMFUNCS): Likewise. From-SVN: r185698
Diffstat (limited to 'libgcc/config/arm/lib1funcs.S')
-rw-r--r--libgcc/config/arm/lib1funcs.S64
1 files changed, 64 insertions, 0 deletions
diff --git a/libgcc/config/arm/lib1funcs.S b/libgcc/config/arm/lib1funcs.S
index 094d79afad6..45c3251bd70 100644
--- a/libgcc/config/arm/lib1funcs.S
+++ b/libgcc/config/arm/lib1funcs.S
@@ -1594,6 +1594,70 @@ ARM_FUNC_START clzdi2
#endif
#endif /* L_clzdi2 */
+#ifdef L_ctzsi2
+#if defined(__ARM_ARCH_6M__)
+FUNC_START ctzsi2
+ neg r1, r0
+ and r0, r0, r1
+ mov r1, #28
+ mov r3, #1
+ lsl r3, r3, #16
+ cmp r0, r3 /* 0x10000 */
+ bcc 2f
+ lsr r0, r0, #16
+ sub r1, r1, #16
+2: lsr r3, r3, #8
+ cmp r0, r3 /* #0x100 */
+ bcc 2f
+ lsr r0, r0, #8
+ sub r1, r1, #8
+2: lsr r3, r3, #4
+ cmp r0, r3 /* #0x10 */
+ bcc 2f
+ lsr r0, r0, #4
+ sub r1, r1, #4
+2: adr r2, 1f
+ ldrb r0, [r2, r0]
+ sub r0, r0, r1
+ bx lr
+.align 2
+1:
+.byte 27, 28, 29, 29, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31
+ FUNC_END ctzsi2
+#else
+ARM_FUNC_START ctzsi2
+ rsb r1, r0, #0
+ and r0, r0, r1
+# if defined(HAVE_ARM_CLZ)
+ clz r0, r0
+ rsb r0, r0, #31
+ RET
+# else
+ mov r1, #28
+ cmp r0, #0x10000
+ do_it cs, t
+ movcs r0, r0, lsr #16
+ subcs r1, r1, #16
+ cmp r0, #0x100
+ do_it cs, t
+ movcs r0, r0, lsr #8
+ subcs r1, r1, #8
+ cmp r0, #0x10
+ do_it cs, t
+ movcs r0, r0, lsr #4
+ subcs r1, r1, #4
+ adr r2, 1f
+ ldrb r0, [r2, r0]
+ sub r0, r0, r1
+ RET
+.align 2
+1:
+.byte 27, 28, 29, 29, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31
+# endif /* !HAVE_ARM_CLZ */
+ FUNC_END ctzsi2
+#endif
+#endif /* L_clzsi2 */
+
/* ------------------------------------------------------------------------ */
/* These next two sections are here despite the fact that they contain Thumb
assembler because their presence allows interworked code to be linked even