summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--gcc/testsuite/ChangeLog15
-rw-r--r--gcc/testsuite/gcc.dg/20001013-1.c2
-rw-r--r--gcc/testsuite/gcc.dg/20001101-1.c2
-rw-r--r--gcc/testsuite/gcc.dg/20001102-1.c2
-rw-r--r--gcc/testsuite/gcc.dg/ultrasp10.c2
-rw-r--r--gcc/testsuite/gcc.dg/ultrasp9.c2
-rw-r--r--gcc/testsuite/gcc.dg/vect/vect.exp6
-rw-r--r--gcc/testsuite/gcc.target/sparc/pdist-3.c1
-rw-r--r--gcc/testsuite/lib/target-supports.exp45
9 files changed, 71 insertions, 6 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 49e718eabaf..9a1145a2064 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,18 @@
+2007-07-12 Nathan Froyd <froydnj@codesourcery.com>
+
+ * lib/target-support.exp (check_ultrasparc_hw_available):
+ New function.
+ (is-effective-target): Check $arg for ultrasparc_hw.
+ (is-effective-target-keyword): Likewise.
+ * gcc.dg/vect/vect.exp: Call check_effective_target_ultrasparc_hw
+ when determining what to do on sparc platforms.
+ * gcc.dg/20001013-1.c: Check for an ultrasparc_hw target.
+ * gcc.dg/20001101-1.c: Likewise.
+ * gcc.dg/20001101-2.c: Likewise.
+ * gcc.dg/ultrasp9.c: Likewise.
+ * gcc.dg/ultrasp10.c: Likewise.
+ * gcc.target/sparc/pdist-3.c: Likewise.
+
2007-07-12 Daniel Jacobowitz <dan@codesourcery.com>
* gcc.target/mips/save-restore-5.c: Add -mno-abicalls.
diff --git a/gcc/testsuite/gcc.dg/20001013-1.c b/gcc/testsuite/gcc.dg/20001013-1.c
index 371672cab75..8634a192820 100644
--- a/gcc/testsuite/gcc.dg/20001013-1.c
+++ b/gcc/testsuite/gcc.dg/20001013-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target sparc*-*-* } } */
+/* { dg-do run { target { sparc*-*-* && ultrasparc_hw } } } */
/* { dg-options "-O2 -mcpu=ultrasparc -mvis" } */
extern void abort (void);
diff --git a/gcc/testsuite/gcc.dg/20001101-1.c b/gcc/testsuite/gcc.dg/20001101-1.c
index d0eb6e23ce0..151a6cc19de 100644
--- a/gcc/testsuite/gcc.dg/20001101-1.c
+++ b/gcc/testsuite/gcc.dg/20001101-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target sparc*-*-* } } */
+/* { dg-do run { target { sparc*-*-* && ultrasparc_hw } } } */
/* { dg-options "-O2 -mcpu=ultrasparc -mvis" } */
extern void abort (void);
diff --git a/gcc/testsuite/gcc.dg/20001102-1.c b/gcc/testsuite/gcc.dg/20001102-1.c
index c976dad45b2..62266a38164 100644
--- a/gcc/testsuite/gcc.dg/20001102-1.c
+++ b/gcc/testsuite/gcc.dg/20001102-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target sparc*-*-* } } */
+/* { dg-do run { target { sparc*-*-* && ultrasparc_hw } } } */
/* { dg-options "-O2 -mcpu=ultrasparc -mvis" } */
extern void abort (void);
diff --git a/gcc/testsuite/gcc.dg/ultrasp10.c b/gcc/testsuite/gcc.dg/ultrasp10.c
index ffa3229fa4f..7cc5c93aaf7 100644
--- a/gcc/testsuite/gcc.dg/ultrasp10.c
+++ b/gcc/testsuite/gcc.dg/ultrasp10.c
@@ -1,6 +1,6 @@
/* PR target/11965 */
/* Originator: <jk@tools.de> */
-/* { dg-do run { target sparc*-*-* } } */
+/* { dg-do run { target { sparc*-*-* && ultrasparc_hw } } } */
/* { dg-options "-O -mcpu=ultrasparc" } */
/* This used to fail on 32-bit Ultrasparc because GCC emitted
diff --git a/gcc/testsuite/gcc.dg/ultrasp9.c b/gcc/testsuite/gcc.dg/ultrasp9.c
index 885420e0509..0af2c7e8601 100644
--- a/gcc/testsuite/gcc.dg/ultrasp9.c
+++ b/gcc/testsuite/gcc.dg/ultrasp9.c
@@ -1,6 +1,6 @@
/* PR optimization/11018 */
/* Originator: <partain@dcs.gla.ac.uk> */
-/* { dg-do run { target sparc*-*-* } } */
+/* { dg-do run { target { sparc*-*-* && ultrasparc_hw } } } */
/* { dg-options "-O2 -mcpu=ultrasparc" } */
/* This used to fail on 32-bit Ultrasparc because
diff --git a/gcc/testsuite/gcc.dg/vect/vect.exp b/gcc/testsuite/gcc.dg/vect/vect.exp
index 6f3303a85e6..6ad377bdcdf 100644
--- a/gcc/testsuite/gcc.dg/vect/vect.exp
+++ b/gcc/testsuite/gcc.dg/vect/vect.exp
@@ -63,7 +63,11 @@ if [istarget "powerpc*-*-*"] {
set dg-do-what-default run
} elseif [istarget "sparc*-*-*"] {
lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
- set dg-do-what-default run
+ if [check_effective_target_ultrasparc_hw] {
+ set dg-do-what-default run
+ } else {
+ set dg-do-what-default compile
+ }
} elseif [istarget "alpha*-*-*"] {
# Alpha's vectorization capabilities are extremely limited.
# It's more effort than its worth disabling all of the tests
diff --git a/gcc/testsuite/gcc.target/sparc/pdist-3.c b/gcc/testsuite/gcc.target/sparc/pdist-3.c
index e4d6cb53ed0..03df4d96dc4 100644
--- a/gcc/testsuite/gcc.target/sparc/pdist-3.c
+++ b/gcc/testsuite/gcc.target/sparc/pdist-3.c
@@ -1,4 +1,5 @@
/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_hw } */
/* { dg-options "-mcpu=ultrasparc -mvis -O1" } */
typedef long long int64_t;
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index ccb6356ccf9..028cb34e56d 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1528,6 +1528,51 @@ proc check_effective_target_powerpc_altivec { } {
}
}
+# The VxWorks SPARC simulator accepts only EM_SPARC executables and
+# chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
+# test environment appears to run executables on such a simulator.
+
+proc check_effective_target_ultrasparc_hw { } {
+ global et_ultrasparc_hw_saved
+ global tool
+
+ if [info exists et_ultrasparc_hw_saved] {
+ verbose "check_ultrasparc_hw_available returning saved $et_ultrasparc_hw_saved" 2
+ } else {
+ set et_ultrasparc_hw_saved 0
+
+ # Set up, compile, and execute a simple test program. The
+ # program will be compiled with -mcpu=ultrasparc to instruct the
+ # assembler to produce EM_SPARC32PLUS executables.
+ set src svect[pid].c
+ set exe svect[pid].x
+
+ set f [open $src "w"]
+ puts $f "int main() { return 0; }"
+ close $f
+
+ verbose "check_ultrasparc_hw_available compiling testfile $src" 2
+ set lines [${tool}_target_compile $src $exe executable "additional_flags=-mcpu=ultrasparc"]
+ file delete $src
+
+ if [string match "" $lines] then {
+ # No error message, compilation succeeded.
+ set result [${tool}_load "./$exe" "" ""]
+ set status [lindex $result 0]
+ remote_file build delete $exe
+ verbose "check_ultrasparc_hw_available testfile status is <$status>" 2
+
+ if { $status == "pass" } then {
+ set et_ultrasparc_hw_saved 1
+ }
+ } else {
+ verbose "check_ultrasparc_hw_available testfile compilation failed" 2
+ }
+ }
+
+ return $et_ultrasparc_hw_saved
+}
+
# Return 1 if the target supports hardware vector shift operation.
proc check_effective_target_vect_shift { } {