diff options
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 4 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 3 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/bmi-bextr-3.c | 31 |
4 files changed, 40 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 74cf1b40565..ee0130ebe05 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,6 +1,10 @@ 2013-06-27 Jakub Jelinek <jakub@redhat.com> PR target/57623 + * config/i386/i386.md (bmi_bextr_<mode>): Swap predicates and + constraints of operand 1 and 2. + + PR target/57623 * config/i386/i386.md (bmi2_bzhi_<mode>3): Swap AND arguments to match RTL canonicalization. Swap predicates and constraints of operand 1 and 2. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index e0e1a63fa5f..a6e2946584b 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -11679,8 +11679,8 @@ (define_insn "bmi_bextr_<mode>" [(set (match_operand:SWI48 0 "register_operand" "=r,r") - (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r,r") - (match_operand:SWI48 2 "nonimmediate_operand" "r,m")] + (unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "r,m") + (match_operand:SWI48 2 "register_operand" "r,r")] UNSPEC_BEXTR)) (clobber (reg:CC FLAGS_REG))] "TARGET_BMI" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 43f6caf630c..7bf618df1af 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,6 +1,9 @@ 2013-06-27 Jakub Jelinek <jakub@redhat.com> PR target/57623 + * gcc.target/i386/bmi-bextr-3.c: New test. + + PR target/57623 * gcc.target/i386/bmi2-bzhi-1.c: New test. 2013-06-27 Marc Glisse <marc.glisse@inria.fr> diff --git a/gcc/testsuite/gcc.target/i386/bmi-bextr-3.c b/gcc/testsuite/gcc.target/i386/bmi-bextr-3.c new file mode 100644 index 00000000000..fe342b9e0ad --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/bmi-bextr-3.c @@ -0,0 +1,31 @@ +/* PR target/57623 */ +/* { dg-do assemble { target bmi } } */ +/* { dg-options "-O2 -mbmi" } */ + +#include <x86intrin.h> + +unsigned int +f1 (unsigned int x, unsigned int *y) +{ + return __bextr_u32 (x, *y); +} + +unsigned int +f2 (unsigned int *x, unsigned int y) +{ + return __bextr_u32 (*x, y); +} + +#ifdef __x86_64__ +unsigned long long +f3 (unsigned long long x, unsigned long long *y) +{ + return __bextr_u64 (x, *y); +} + +unsigned long long +f4 (unsigned long long *x, unsigned long long y) +{ + return __bextr_u64 (*x, y); +} +#endif |