diff options
| -rw-r--r-- | gcc/ChangeLog | 21 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 25 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 27 |
3 files changed, 52 insertions, 21 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4dd16725e0f..71c859e7b8d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,17 @@ +2009-02-11 Uros Bizjak <ubizjak@gmail.com> + Jakub Jelinek <jakub@redhat.com> + + PR target/39118 + * config/i386/i386.md (UNSPEC_MEMORY_BLOCKAGE): New constant. + (memory_blockage): New expander. + (*memory_blockage): New insn pattern. + * config/i386/i386.c (ix86_expand_prologue): Use memory_blockage + instead of general blockage at the end of function prologue when + frame pointer is used to access red zone area. Do not emit blockage + when profiling, it is emitted in generic code. + (ix86_expand_epilogue): Emit memory_blockage at the beginning of + function epilogue when frame pointer is used to access red zone area. + 2009-02-11 Paolo Bonzini <bonzini@gnu.org> * config/i386/i386.md: Add two new peephole2 to avoid mov followed @@ -32,8 +46,7 @@ cancel_loop_tree, not before it. PR target/39139 - * function.h (struct function): Add has_local_explicit_reg_vars - bit. + * function.h (struct function): Add has_local_explicit_reg_vars bit. * gimplify.c (gimplify_bind_expr): Set it if local DECL_HARD_REGISTER VAR_DECLs were seen. * tree-ssa-live.c (remove_unused_locals): Recompute @@ -89,8 +102,8 @@ 2009-02-09 Sebastian Pop <sebastian.pop@amd.com> PR middle-end/38953 - * graphite.c (if_region_set_false_region): After moving a region - in the false branch of a condition, remove the empty dummy basic block. + * graphite.c (if_region_set_false_region): After moving a region in + the false branch of a condition, remove the empty dummy basic block. (gloog): Remove wrong fix for PR38953. 2009-02-09 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index e64bcc65575..3e02102284f 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -7997,7 +7997,6 @@ ix86_expand_prologue (void) { rtx insn; bool pic_reg_used; - bool emit_blockage = false; struct ix86_frame frame; HOST_WIDE_INT allocate; @@ -8209,14 +8208,12 @@ ix86_expand_prologue (void) insn = emit_insn (gen_set_got (pic_offset_table_rtx)); } - /* Prevent function calls from being scheduled before the call to mcount. - In the pic_reg_used case, make sure that the got load isn't deleted. */ - if (crtl->profile) - { - if (pic_reg_used) - emit_insn (gen_prologue_use (pic_offset_table_rtx)); - emit_blockage = true; - } + /* In the pic_reg_used case, make sure that the got load isn't deleted + when mcount needs it. Blockage to avoid call movement across mcount + call is emitted in generic code after the NOTE_INSN_PROLOGUE_END + note. */ + if (crtl->profile && pic_reg_used) + emit_insn (gen_prologue_use (pic_offset_table_rtx)); if (crtl->drap_reg && !crtl->stack_realign_needed) { @@ -8235,10 +8232,7 @@ ix86_expand_prologue (void) prologue, and moving instructions that access redzone area via frame pointer inside push sequence violates this assumption. */ if (frame_pointer_needed && frame.red_zone_size) - emit_blockage = true; - - if (emit_blockage) - emit_insn (gen_blockage ()); + emit_insn (gen_memory_blockage ()); /* Emit cld instruction if stringops are used in the function. */ if (TARGET_CLD && ix86_current_function_needs_cld) @@ -8326,6 +8320,11 @@ ix86_expand_epilogue (int style) ix86_compute_frame_layout (&frame); + /* See the comment about red zone and frame + pointer usage in ix86_expand_prologue. */ + if (frame_pointer_needed && frame.red_zone_size) + emit_insn (gen_memory_blockage ()); + /* Calculate start of saved registers relative to ebp. Special care must be taken for the normal return case of a function using eh_return: the eax and edx registers are marked as saved, but not diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 7a4511fc07f..1516237ae69 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -68,12 +68,13 @@ (UNSPEC_DEF_CFA 15) (UNSPEC_SET_RIP 16) (UNSPEC_SET_GOT_OFFSET 17) + (UNSPEC_MEMORY_BLOCKAGE 18) ; TLS support - (UNSPEC_TP 18) - (UNSPEC_TLS_GD 19) - (UNSPEC_TLS_LD_BASE 20) - (UNSPEC_TLSDESC 21) + (UNSPEC_TP 20) + (UNSPEC_TLS_GD 21) + (UNSPEC_TLS_LD_BASE 22) + (UNSPEC_TLSDESC 23) ; Other random patterns (UNSPEC_SCAS 30) @@ -15175,6 +15176,24 @@ "" [(set_attr "length" "0")]) +;; Do not schedule instructions accessing memory across this point. + +(define_expand "memory_blockage" + [(set (match_dup 0) + (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BLOCKAGE))] + "" +{ + operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode)); + MEM_VOLATILE_P (operands[0]) = 1; +}) + +(define_insn "*memory_blockage" + [(set (match_operand:BLK 0 "" "") + (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BLOCKAGE))] + "" + "" + [(set_attr "length" "0")]) + ;; As USE insns aren't meaningful after reload, this is used instead ;; to prevent deleting instructions setting registers for PIC code (define_insn "prologue_use" |