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-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/doc/invoke.texi11
-rw-r--r--gcc/opts.c4
3 files changed, 19 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0ee2d0592f8..ce73996a710 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2003-10-17 Jan Hubicka <jh@suse.cz>
+
+ * opts.c (common_handle_option): Handle OPT_fweb
+ * invoke.texi (-fweb): Add missing parts of documentation.
+
2003-10-17 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
* config/mips/linux.h (FUNCTION_NAME_ALREADY_DECLARED): Undef
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index fd2040034a8..c8398386701 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -3687,7 +3687,7 @@ also turns on the following optimization flags:
-fpeephole2 @gol
-freorder-blocks -freorder-functions @gol
-fstrict-aliasing @gol
--funit-at-a-time @gol
+-funit-at-a-time -fweb @gol
-falign-functions -falign-jumps @gol
-falign-loops -falign-labels}
@@ -4378,6 +4378,15 @@ will most benefit processors with lots of registers. It can, however,
make debugging impossible, since variables will no longer stay in
a ``home register''.
+@item -fweb
+@opindex fweb
+Constructs webs as commonly used for register allocation purposes and assign
+each web individual pseudo register. This allows our register allocation pass
+to operate on pseudos directly, but also strengthens several other optimization
+passes, such as CSE, loop optimizer and trivial dead code remover. It can,
+however, make debugging impossible, since variables will no longer stay in a
+``home register''.
+
Enabled at levels @option{-O3}.
@item -fno-cprop-registers
diff --git a/gcc/opts.c b/gcc/opts.c
index 8418d1a96c2..e4c9ad45494 100644
--- a/gcc/opts.c
+++ b/gcc/opts.c
@@ -1412,6 +1412,10 @@ common_handle_option (size_t scode, const char *arg,
case OPT_fverbose_asm:
flag_verbose_asm = value;
break;
+
+ case OPT_fweb:
+ flag_web = value;
+ break;
case OPT_fwrapv:
flag_wrapv = value;