diff options
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/doc/extend.texi | 240 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 221 | ||||
| -rw-r--r-- | gcc/doc/sourcebuild.texi | 5 |
4 files changed, 251 insertions, 223 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5e6c588e190..20fe7a7c0da 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2002-01-14 Joseph S. Myers <jsm28@cam.ac.uk> + + * doc/extend.texi: Move documentation of X86 built-in functions + here. + * doc/invoke.texi: From here. + * doc/sourcebuild.texi: Document location of documentation for + machine built-in functions. + 2002-01-13 Christopher Faylor <cgf@redhat.com> * cppfiles.c (TEST_THRESHOLD): New macro. diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 5b2802ca347..bf2948ba192 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -1,4 +1,4 @@ -@c Copyright (C) 1988,1989,1992,1993,1994,1996,1998,1999,2000,2001 Free Software Foundation, Inc. +@c Copyright (C) 1988,1989,1992,1993,1994,1996,1998,1999,2000,2001,2002 Free Software Foundation, Inc. @c This is part of the GCC manual. @c For copying conditions, see the file gcc.texi. @@ -429,6 +429,7 @@ extensions, accepted by GCC in C89 mode and in C++. * Return Address:: Getting the return or frame address of a function. * Vector Extensions:: Using vector instructions through built-in functions. * Other Builtins:: Other built-in functions. +* Target Builtins:: Built-in functions specific to particular targets. * Pragmas:: Pragmas accepted by GCC. * Unnamed Fields:: Unnamed struct/union fields within structs/unions. @end menu @@ -4638,6 +4639,243 @@ is evaluated if it includes side effects but no other code is generated and GCC does not issue a warning. @end deftypefn +@node Target Builtins +@section Built-in Functions Specific to Particular Target Machines + +On some target machines, GCC supports many built-in functions specific +to those machines. Generally these generate calls to specific machine +instructions, but allow the compiler to schedule those calls. + +@menu +* X86 Built-in Functions:: +@end menu + +@node X86 Built-in Functions +@subsection X86 Built-in Functions + +These built-in functions are available for the i386 and x86-64 family +of computers, depending on the command-line switches used. + +The following machine modes are available for use with MMX built-in functions +(@pxref{Vector Extensions}): @code{V2SI} for a vector of two 32 bit integers, +@code{V4HI} for a vector of four 16 bit integers, and @code{V8QI} for a +vector of eight 8 bit integers. Some of the built-in functions operate on +MMX registers as a whole 64 bit entity, these use @code{DI} as their mode. + +If 3Dnow extensions are enabled, @code{V2SF} is used as a mode for a vector +of two 32 bit floating point values. + +If SSE extensions are enabled, @code{V4SF} is used for a vector of four 32 bit +floating point values. Some instructions use a vector of four 32 bit +integers, these use @code{V4SI}. Finally, some instructions operate on an +entire vector register, interpreting it as a 128 bit integer, these use mode +@code{TI}. + +The following built-in functions are made available by @option{-mmmx}. +All of them generate the machine instruction that is part of the name. + +@example +v8qi __builtin_ia32_paddb (v8qi, v8qi) +v4hi __builtin_ia32_paddw (v4hi, v4hi) +v2si __builtin_ia32_paddd (v2si, v2si) +v8qi __builtin_ia32_psubb (v8qi, v8qi) +v4hi __builtin_ia32_psubw (v4hi, v4hi) +v2si __builtin_ia32_psubd (v2si, v2si) +v8qi __builtin_ia32_paddsb (v8qi, v8qi) +v4hi __builtin_ia32_paddsw (v4hi, v4hi) +v8qi __builtin_ia32_psubsb (v8qi, v8qi) +v4hi __builtin_ia32_psubsw (v4hi, v4hi) +v8qi __builtin_ia32_paddusb (v8qi, v8qi) +v4hi __builtin_ia32_paddusw (v4hi, v4hi) +v8qi __builtin_ia32_psubusb (v8qi, v8qi) +v4hi __builtin_ia32_psubusw (v4hi, v4hi) +v4hi __builtin_ia32_pmullw (v4hi, v4hi) +v4hi __builtin_ia32_pmulhw (v4hi, v4hi) +di __builtin_ia32_pand (di, di) +di __builtin_ia32_pandn (di,di) +di __builtin_ia32_por (di, di) +di __builtin_ia32_pxor (di, di) +v8qi __builtin_ia32_pcmpeqb (v8qi, v8qi) +v4hi __builtin_ia32_pcmpeqw (v4hi, v4hi) +v2si __builtin_ia32_pcmpeqd (v2si, v2si) +v8qi __builtin_ia32_pcmpgtb (v8qi, v8qi) +v4hi __builtin_ia32_pcmpgtw (v4hi, v4hi) +v2si __builtin_ia32_pcmpgtd (v2si, v2si) +v8qi __builtin_ia32_punpckhbw (v8qi, v8qi) +v4hi __builtin_ia32_punpckhwd (v4hi, v4hi) +v2si __builtin_ia32_punpckhdq (v2si, v2si) +v8qi __builtin_ia32_punpcklbw (v8qi, v8qi) +v4hi __builtin_ia32_punpcklwd (v4hi, v4hi) +v2si __builtin_ia32_punpckldq (v2si, v2si) +v8qi __builtin_ia32_packsswb (v4hi, v4hi) +v4hi __builtin_ia32_packssdw (v2si, v2si) +v8qi __builtin_ia32_packuswb (v4hi, v4hi) +@end example + +The following built-in functions are made available either with +@option{-msse}, or with a combination of @option{-m3dnow} and +@option{-march=athlon}. All of them generate the machine +instruction that is part of the name. + +@example +v4hi __builtin_ia32_pmulhuw (v4hi, v4hi) +v8qi __builtin_ia32_pavgb (v8qi, v8qi) +v4hi __builtin_ia32_pavgw (v4hi, v4hi) +v4hi __builtin_ia32_psadbw (v8qi, v8qi) +v8qi __builtin_ia32_pmaxub (v8qi, v8qi) +v4hi __builtin_ia32_pmaxsw (v4hi, v4hi) +v8qi __builtin_ia32_pminub (v8qi, v8qi) +v4hi __builtin_ia32_pminsw (v4hi, v4hi) +int __builtin_ia32_pextrw (v4hi, int) +v4hi __builtin_ia32_pinsrw (v4hi, int, int) +int __builtin_ia32_pmovmskb (v8qi) +void __builtin_ia32_maskmovq (v8qi, v8qi, char *) +void __builtin_ia32_movntq (di *, di) +void __builtin_ia32_sfence (void) +@end example + +The following built-in functions are available when @option{-msse} is used. +All of them generate the machine instruction that is part of the name. + +@example +int __builtin_ia32_comieq (v4sf, v4sf) +int __builtin_ia32_comineq (v4sf, v4sf) +int __builtin_ia32_comilt (v4sf, v4sf) +int __builtin_ia32_comile (v4sf, v4sf) +int __builtin_ia32_comigt (v4sf, v4sf) +int __builtin_ia32_comige (v4sf, v4sf) +int __builtin_ia32_ucomieq (v4sf, v4sf) +int __builtin_ia32_ucomineq (v4sf, v4sf) +int __builtin_ia32_ucomilt (v4sf, v4sf) +int __builtin_ia32_ucomile (v4sf, v4sf) +int __builtin_ia32_ucomigt (v4sf, v4sf) +int __builtin_ia32_ucomige (v4sf, v4sf) +v4sf __builtin_ia32_addps (v4sf, v4sf) +v4sf __builtin_ia32_subps (v4sf, v4sf) +v4sf __builtin_ia32_mulps (v4sf, v4sf) +v4sf __builtin_ia32_divps (v4sf, v4sf) +v4sf __builtin_ia32_addss (v4sf, v4sf) +v4sf __builtin_ia32_subss (v4sf, v4sf) +v4sf __builtin_ia32_mulss (v4sf, v4sf) +v4sf __builtin_ia32_divss (v4sf, v4sf) +v4si __builtin_ia32_cmpeqps (v4sf, v4sf) +v4si __builtin_ia32_cmpltps (v4sf, v4sf) +v4si __builtin_ia32_cmpleps (v4sf, v4sf) +v4si __builtin_ia32_cmpgtps (v4sf, v4sf) +v4si __builtin_ia32_cmpgeps (v4sf, v4sf) +v4si __builtin_ia32_cmpunordps (v4sf, v4sf) +v4si __builtin_ia32_cmpneqps (v4sf, v4sf) +v4si __builtin_ia32_cmpnltps (v4sf, v4sf) +v4si __builtin_ia32_cmpnleps (v4sf, v4sf) +v4si __builtin_ia32_cmpngtps (v4sf, v4sf) +v4si __builtin_ia32_cmpngeps (v4sf, v4sf) +v4si __builtin_ia32_cmpordps (v4sf, v4sf) +v4si __builtin_ia32_cmpeqss (v4sf, v4sf) +v4si __builtin_ia32_cmpltss (v4sf, v4sf) +v4si __builtin_ia32_cmpless (v4sf, v4sf) +v4si __builtin_ia32_cmpgtss (v4sf, v4sf) +v4si __builtin_ia32_cmpgess (v4sf, v4sf) +v4si __builtin_ia32_cmpunordss (v4sf, v4sf) +v4si __builtin_ia32_cmpneqss (v4sf, v4sf) +v4si __builtin_ia32_cmpnlts (v4sf, v4sf) +v4si __builtin_ia32_cmpnless (v4sf, v4sf) +v4si __builtin_ia32_cmpngtss (v4sf, v4sf) +v4si __builtin_ia32_cmpngess (v4sf, v4sf) +v4si __builtin_ia32_cmpordss (v4sf, v4sf) +v4sf __builtin_ia32_maxps (v4sf, v4sf) +v4sf __builtin_ia32_maxss (v4sf, v4sf) +v4sf __builtin_ia32_minps (v4sf, v4sf) +v4sf __builtin_ia32_minss (v4sf, v4sf) +v4sf __builtin_ia32_andps (v4sf, v4sf) +v4sf __builtin_ia32_andnps (v4sf, v4sf) +v4sf __builtin_ia32_orps (v4sf, v4sf) +v4sf __builtin_ia32_xorps (v4sf, v4sf) +v4sf __builtin_ia32_movss (v4sf, v4sf) +v4sf __builtin_ia32_movhlps (v4sf, v4sf) +v4sf __builtin_ia32_movlhps (v4sf, v4sf) +v4sf __builtin_ia32_unpckhps (v4sf, v4sf) +v4sf __builtin_ia32_unpcklps (v4sf, v4sf) +v4sf __builtin_ia32_cvtpi2ps (v4sf, v2si) +v4sf __builtin_ia32_cvtsi2ss (v4sf, int) +v2si __builtin_ia32_cvtps2pi (v4sf) +int __builtin_ia32_cvtss2si (v4sf) +v2si __builtin_ia32_cvttps2pi (v4sf) +int __builtin_ia32_cvttss2si (v4sf) +v4sf __builtin_ia32_rcpps (v4sf) +v4sf __builtin_ia32_rsqrtps (v4sf) +v4sf __builtin_ia32_sqrtps (v4sf) +v4sf __builtin_ia32_rcpss (v4sf) +v4sf __builtin_ia32_rsqrtss (v4sf) +v4sf __builtin_ia32_sqrtss (v4sf) +v4sf __builtin_ia32_shufps (v4sf, v4sf, int) +void __builtin_ia32_movntps (float *, v4sf) +int __builtin_ia32_movmskps (v4sf) +@end example + +The following built-in functions are available when @option{-msse} is used. + +@table @code +@item v4sf __builtin_ia32_loadaps (float *) +Generates the @code{movaps} machine instruction as a load from memory. +@item void __builtin_ia32_storeaps (float *, v4sf) +Generates the @code{movaps} machine instruction as a store to memory. +@item v4sf __builtin_ia32_loadups (float *) +Generates the @code{movups} machine instruction as a load from memory. +@item void __builtin_ia32_storeups (float *, v4sf) +Generates the @code{movups} machine instruction as a store to memory. +@item v4sf __builtin_ia32_loadsss (float *) +Generates the @code{movss} machine instruction as a load from memory. +@item void __builtin_ia32_storess (float *, v4sf) +Generates the @code{movss} machine instruction as a store to memory. +@item v4sf __builtin_ia32_loadhps (v4sf, v2si *) +Generates the @code{movhps} machine instruction as a load from memory. +@item v4sf __builtin_ia32_loadlps (v4sf, v2si *) +Generates the @code{movlps} machine instruction as a load from memory +@item void __builtin_ia32_storehps (v4sf, v2si *) +Generates the @code{movhps} machine instruction as a store to memory. +@item void __builtin_ia32_storelps (v4sf, v2si *) +Generates the @code{movlps} machine instruction as a store to memory. +@end table + +The following built-in functions are available when @option{-m3dnow} is used. +All of them generate the machine instruction that is part of the name. + +@example +void __builtin_ia32_femms (void) +v8qi __builtin_ia32_pavgusb (v8qi, v8qi) +v2si __builtin_ia32_pf2id (v2sf) +v2sf __builtin_ia32_pfacc (v2sf, v2sf) +v2sf __builtin_ia32_pfadd (v2sf, v2sf) +v2si __builtin_ia32_pfcmpeq (v2sf, v2sf) +v2si __builtin_ia32_pfcmpge (v2sf, v2sf) +v2si __builtin_ia32_pfcmpgt (v2sf, v2sf) +v2sf __builtin_ia32_pfmax (v2sf, v2sf) +v2sf __builtin_ia32_pfmin (v2sf, v2sf) +v2sf __builtin_ia32_pfmul (v2sf, v2sf) +v2sf __builtin_ia32_pfrcp (v2sf) +v2sf __builtin_ia32_pfrcpit1 (v2sf, v2sf) +v2sf __builtin_ia32_pfrcpit2 (v2sf, v2sf) +v2sf __builtin_ia32_pfrsqrt (v2sf) +v2sf __builtin_ia32_pfrsqrtit1 (v2sf, v2sf) +v2sf __builtin_ia32_pfsub (v2sf, v2sf) +v2sf __builtin_ia32_pfsubr (v2sf, v2sf) +v2sf __builtin_ia32_pi2fd (v2si) +v4hi __builtin_ia32_pmulhrw (v4hi, v4hi) +@end example + +The following built-in functions are available when both @option{-m3dnow} +and @option{-march=athlon} are used. All of them generate the machine +instruction that is part of the name. + +@example +v2si __builtin_ia32_pf2iw (v2sf) +v2sf __builtin_ia32_pfnacc (v2sf, v2sf) +v2sf __builtin_ia32_pfpnacc (v2sf, v2sf) +v2sf __builtin_ia32_pi2fw (v2si) +v2sf __builtin_ia32_pswapdsf (v2sf) +v2si __builtin_ia32_pswapdsi (v2si) +@end example + @node Pragmas @section Pragmas Accepted by GCC @cindex pragmas diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 894921058ac..ef990b0c1c7 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -7735,225 +7735,8 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. These switches enable or disable the use of built-in functions that allow direct access to the MMX, SSE and 3Dnow extensions of the instruction set. -The following machine modes are available for use with MMX built-in functions -(@pxref{Vector Extensions}): @code{V2SI} for a vector of two 32 bit integers, -@code{V4HI} for a vector of four 16 bit integers, and @code{V8QI} for a -vector of eight 8 bit integers. Some of the built-in functions operate on -MMX registers as a whole 64 bit entity, these use @code{DI} as their mode. - -If 3Dnow extensions are enabled, @code{V2SF} is used as a mode for a vector -of two 32 bit floating point values. - -If SSE extensions are enabled, @code{V4SF} is used for a vector of four 32 bit -floating point values. Some instructions use a vector of four 32 bit -integers, these use @code{V4SI}. Finally, some instructions operate on an -entire vector register, interpreting it as a 128 bit integer, these use mode -@code{TI}. - -The following built-in functions are made available by @option{-mmmx}. -All of them generate the machine instruction that is part of the name. - -@example -v8qi __builtin_ia32_paddb (v8qi, v8qi) -v4hi __builtin_ia32_paddw (v4hi, v4hi) -v2si __builtin_ia32_paddd (v2si, v2si) -v8qi __builtin_ia32_psubb (v8qi, v8qi) -v4hi __builtin_ia32_psubw (v4hi, v4hi) -v2si __builtin_ia32_psubd (v2si, v2si) -v8qi __builtin_ia32_paddsb (v8qi, v8qi) -v4hi __builtin_ia32_paddsw (v4hi, v4hi) -v8qi __builtin_ia32_psubsb (v8qi, v8qi) -v4hi __builtin_ia32_psubsw (v4hi, v4hi) -v8qi __builtin_ia32_paddusb (v8qi, v8qi) -v4hi __builtin_ia32_paddusw (v4hi, v4hi) -v8qi __builtin_ia32_psubusb (v8qi, v8qi) -v4hi __builtin_ia32_psubusw (v4hi, v4hi) -v4hi __builtin_ia32_pmullw (v4hi, v4hi) -v4hi __builtin_ia32_pmulhw (v4hi, v4hi) -di __builtin_ia32_pand (di, di) -di __builtin_ia32_pandn (di,di) -di __builtin_ia32_por (di, di) -di __builtin_ia32_pxor (di, di) -v8qi __builtin_ia32_pcmpeqb (v8qi, v8qi) -v4hi __builtin_ia32_pcmpeqw (v4hi, v4hi) -v2si __builtin_ia32_pcmpeqd (v2si, v2si) -v8qi __builtin_ia32_pcmpgtb (v8qi, v8qi) -v4hi __builtin_ia32_pcmpgtw (v4hi, v4hi) -v2si __builtin_ia32_pcmpgtd (v2si, v2si) -v8qi __builtin_ia32_punpckhbw (v8qi, v8qi) -v4hi __builtin_ia32_punpckhwd (v4hi, v4hi) -v2si __builtin_ia32_punpckhdq (v2si, v2si) -v8qi __builtin_ia32_punpcklbw (v8qi, v8qi) -v4hi __builtin_ia32_punpcklwd (v4hi, v4hi) -v2si __builtin_ia32_punpckldq (v2si, v2si) -v8qi __builtin_ia32_packsswb (v4hi, v4hi) -v4hi __builtin_ia32_packssdw (v2si, v2si) -v8qi __builtin_ia32_packuswb (v4hi, v4hi) -@end example - -The following built-in functions are made available either with -@option{-msse}, or with a combination of @option{-m3dnow} and -@option{-march=athlon}. All of them generate the machine -instruction that is part of the name. - -@example -v4hi __builtin_ia32_pmulhuw (v4hi, v4hi) -v8qi __builtin_ia32_pavgb (v8qi, v8qi) -v4hi __builtin_ia32_pavgw (v4hi, v4hi) -v4hi __builtin_ia32_psadbw (v8qi, v8qi) -v8qi __builtin_ia32_pmaxub (v8qi, v8qi) -v4hi __builtin_ia32_pmaxsw (v4hi, v4hi) -v8qi __builtin_ia32_pminub (v8qi, v8qi) -v4hi __builtin_ia32_pminsw (v4hi, v4hi) -int __builtin_ia32_pextrw (v4hi, int) -v4hi __builtin_ia32_pinsrw (v4hi, int, int) -int __builtin_ia32_pmovmskb (v8qi) -void __builtin_ia32_maskmovq (v8qi, v8qi, char *) -void __builtin_ia32_movntq (di *, di) -void __builtin_ia32_sfence (void) -@end example - -The following built-in functions are available when @option{-msse} is used. -All of them generate the machine instruction that is part of the name. - -@example -int __builtin_ia32_comieq (v4sf, v4sf) -int __builtin_ia32_comineq (v4sf, v4sf) -int __builtin_ia32_comilt (v4sf, v4sf) -int __builtin_ia32_comile (v4sf, v4sf) -int __builtin_ia32_comigt (v4sf, v4sf) -int __builtin_ia32_comige (v4sf, v4sf) -int __builtin_ia32_ucomieq (v4sf, v4sf) -int __builtin_ia32_ucomineq (v4sf, v4sf) -int __builtin_ia32_ucomilt (v4sf, v4sf) -int __builtin_ia32_ucomile (v4sf, v4sf) -int __builtin_ia32_ucomigt (v4sf, v4sf) -int __builtin_ia32_ucomige (v4sf, v4sf) -v4sf __builtin_ia32_addps (v4sf, v4sf) -v4sf __builtin_ia32_subps (v4sf, v4sf) -v4sf __builtin_ia32_mulps (v4sf, v4sf) -v4sf __builtin_ia32_divps (v4sf, v4sf) -v4sf __builtin_ia32_addss (v4sf, v4sf) -v4sf __builtin_ia32_subss (v4sf, v4sf) -v4sf __builtin_ia32_mulss (v4sf, v4sf) -v4sf __builtin_ia32_divss (v4sf, v4sf) -v4si __builtin_ia32_cmpeqps (v4sf, v4sf) -v4si __builtin_ia32_cmpltps (v4sf, v4sf) -v4si __builtin_ia32_cmpleps (v4sf, v4sf) -v4si __builtin_ia32_cmpgtps (v4sf, v4sf) -v4si __builtin_ia32_cmpgeps (v4sf, v4sf) -v4si __builtin_ia32_cmpunordps (v4sf, v4sf) -v4si __builtin_ia32_cmpneqps (v4sf, v4sf) -v4si __builtin_ia32_cmpnltps (v4sf, v4sf) -v4si __builtin_ia32_cmpnleps (v4sf, v4sf) -v4si __builtin_ia32_cmpngtps (v4sf, v4sf) -v4si __builtin_ia32_cmpngeps (v4sf, v4sf) -v4si __builtin_ia32_cmpordps (v4sf, v4sf) -v4si __builtin_ia32_cmpeqss (v4sf, v4sf) -v4si __builtin_ia32_cmpltss (v4sf, v4sf) -v4si __builtin_ia32_cmpless (v4sf, v4sf) -v4si __builtin_ia32_cmpgtss (v4sf, v4sf) -v4si __builtin_ia32_cmpgess (v4sf, v4sf) -v4si __builtin_ia32_cmpunordss (v4sf, v4sf) -v4si __builtin_ia32_cmpneqss (v4sf, v4sf) -v4si __builtin_ia32_cmpnlts (v4sf, v4sf) -v4si __builtin_ia32_cmpnless (v4sf, v4sf) -v4si __builtin_ia32_cmpngtss (v4sf, v4sf) -v4si __builtin_ia32_cmpngess (v4sf, v4sf) -v4si __builtin_ia32_cmpordss (v4sf, v4sf) -v4sf __builtin_ia32_maxps (v4sf, v4sf) -v4sf __builtin_ia32_maxss (v4sf, v4sf) -v4sf __builtin_ia32_minps (v4sf, v4sf) -v4sf __builtin_ia32_minss (v4sf, v4sf) -v4sf __builtin_ia32_andps (v4sf, v4sf) -v4sf __builtin_ia32_andnps (v4sf, v4sf) -v4sf __builtin_ia32_orps (v4sf, v4sf) -v4sf __builtin_ia32_xorps (v4sf, v4sf) -v4sf __builtin_ia32_movss (v4sf, v4sf) -v4sf __builtin_ia32_movhlps (v4sf, v4sf) -v4sf __builtin_ia32_movlhps (v4sf, v4sf) -v4sf __builtin_ia32_unpckhps (v4sf, v4sf) -v4sf __builtin_ia32_unpcklps (v4sf, v4sf) -v4sf __builtin_ia32_cvtpi2ps (v4sf, v2si) -v4sf __builtin_ia32_cvtsi2ss (v4sf, int) -v2si __builtin_ia32_cvtps2pi (v4sf) -int __builtin_ia32_cvtss2si (v4sf) -v2si __builtin_ia32_cvttps2pi (v4sf) -int __builtin_ia32_cvttss2si (v4sf) -v4sf __builtin_ia32_rcpps (v4sf) -v4sf __builtin_ia32_rsqrtps (v4sf) -v4sf __builtin_ia32_sqrtps (v4sf) -v4sf __builtin_ia32_rcpss (v4sf) -v4sf __builtin_ia32_rsqrtss (v4sf) -v4sf __builtin_ia32_sqrtss (v4sf) -v4sf __builtin_ia32_shufps (v4sf, v4sf, int) -void __builtin_ia32_movntps (float *, v4sf) -int __builtin_ia32_movmskps (v4sf) -@end example - -The following built-in functions are available when @option{-msse} is used. - -@table @code -@item v4sf __builtin_ia32_loadaps (float *) -Generates the @code{movaps} machine instruction as a load from memory. -@item void __builtin_ia32_storeaps (float *, v4sf) -Generates the @code{movaps} machine instruction as a store to memory. -@item v4sf __builtin_ia32_loadups (float *) -Generates the @code{movups} machine instruction as a load from memory. -@item void __builtin_ia32_storeups (float *, v4sf) -Generates the @code{movups} machine instruction as a store to memory. -@item v4sf __builtin_ia32_loadsss (float *) -Generates the @code{movss} machine instruction as a load from memory. -@item void __builtin_ia32_storess (float *, v4sf) -Generates the @code{movss} machine instruction as a store to memory. -@item v4sf __builtin_ia32_loadhps (v4sf, v2si *) -Generates the @code{movhps} machine instruction as a load from memory. -@item v4sf __builtin_ia32_loadlps (v4sf, v2si *) -Generates the @code{movlps} machine instruction as a load from memory -@item void __builtin_ia32_storehps (v4sf, v2si *) -Generates the @code{movhps} machine instruction as a store to memory. -@item void __builtin_ia32_storelps (v4sf, v2si *) -Generates the @code{movlps} machine instruction as a store to memory. -@end table - -The following built-in functions are available when @option{-m3dnow} is used. -All of them generate the machine instruction that is part of the name. - -@example -void __builtin_ia32_femms (void) -v8qi __builtin_ia32_pavgusb (v8qi, v8qi) -v2si __builtin_ia32_pf2id (v2sf) -v2sf __builtin_ia32_pfacc (v2sf, v2sf) -v2sf __builtin_ia32_pfadd (v2sf, v2sf) -v2si __builtin_ia32_pfcmpeq (v2sf, v2sf) -v2si __builtin_ia32_pfcmpge (v2sf, v2sf) -v2si __builtin_ia32_pfcmpgt (v2sf, v2sf) -v2sf __builtin_ia32_pfmax (v2sf, v2sf) -v2sf __builtin_ia32_pfmin (v2sf, v2sf) -v2sf __builtin_ia32_pfmul (v2sf, v2sf) -v2sf __builtin_ia32_pfrcp (v2sf) -v2sf __builtin_ia32_pfrcpit1 (v2sf, v2sf) -v2sf __builtin_ia32_pfrcpit2 (v2sf, v2sf) -v2sf __builtin_ia32_pfrsqrt (v2sf) -v2sf __builtin_ia32_pfrsqrtit1 (v2sf, v2sf) -v2sf __builtin_ia32_pfsub (v2sf, v2sf) -v2sf __builtin_ia32_pfsubr (v2sf, v2sf) -v2sf __builtin_ia32_pi2fd (v2si) -v4hi __builtin_ia32_pmulhrw (v4hi, v4hi) -@end example - -The following built-in functions are available when both @option{-m3dnow} -and @option{-march=athlon} are used. All of them generate the machine -instruction that is part of the name. - -@example -v2si __builtin_ia32_pf2iw (v2sf) -v2sf __builtin_ia32_pfnacc (v2sf, v2sf) -v2sf __builtin_ia32_pfpnacc (v2sf, v2sf) -v2sf __builtin_ia32_pi2fw (v2si) -v2sf __builtin_ia32_pswapdsf (v2sf) -v2si __builtin_ia32_pswapdsi (v2si) -@end example +@xref{X86 Built-in Functions}, for details of the functions enabled +and disabled by these switches. @item -mpush-args @itemx -mno-push-args diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index b18f7f29605..d073a1b984b 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -692,9 +692,8 @@ enumerated in the manual. Documentation in @file{gcc/doc/extend.texi} for any target-specific pragmas supported. @item -Documentation of any target-specific built-in functions supported. -FIXME: where should this documentation be? For MMX built-in functions -it is currently in @file{gcc/doc/invoke.texi}. +Documentation in @file{gcc/doc/extend.texi} of any target-specific +built-in functions supported. @item Documentation in @file{gcc/doc/md.texi} of any target-specific constraint letters (@pxref{Machine Constraints, , Constraints for |