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-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/doc/sourcebuild.texi5
-rw-r--r--gcc/testsuite/ChangeLog6
-rw-r--r--gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c2
-rw-r--r--gcc/testsuite/lib/target-supports.exp13
5 files changed, 31 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c74db97fa1d..af268f45caa 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-07-24 Julian Brown <julian@codesourcery.com>
+
+ * doc/sourcebuild.texi (arm_hf_eabi): Document effective-target
+ check.
+
2012-07-24 Steven Bosscher <steven@gcc.gnu.org>
* sbitmap.h (SBITMAP_ELT_BITS): Use "1u" trick as for BITMAP_WORD_BITS.
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 84fcc23e55a..44c284246f9 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1497,6 +1497,11 @@ ARM target generates 32-bit code.
@item arm_eabi
ARM target adheres to the ABI for the ARM Architecture.
+@item arm_hf_eabi
+ARM target adheres to the VFP and Advanced SIMD Register Arguments
+variant of the ABI for the ARM Architecture (as selected with
+@code{-mfloat-abi=hard}).
+
@item arm_hard_vfp_ok
ARM target supports @code{-mfpu=vfp -mfloat-abi=hard}.
Some multilibs may be incompatible with these options.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 40576ab9905..b436965bef7 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2012-07-24 Julian Brown <julian@codesourcery.com>
+
+ * lib/target-supports.exp (check_effective_target_arm_hf_eabi): New.
+ * gcc.dg/torture/stackalign/builtin-apply-2.c: Skip for
+ hard-float ARM.
+
2012-07-23 Paul Brook <paul@codesourcery.com>
* g++.dg/other/armv7m-1.c: New test.
diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
index 89c71a99d5b..6ba5871885a 100644
--- a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
@@ -5,6 +5,8 @@
with pre-pushed arguments (e.g. SPARC). */
/* { dg-do run } */
+
+/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { arm_hf_eabi } } */
#define INTEGER_ARG 5
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index bc5baa76622..dbe4086a193 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2341,6 +2341,19 @@ proc check_effective_target_arm_eabi { } {
}]
}
+# Return 1 if this is an ARM target that adheres to the hard-float variant of
+# the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
+
+proc check_effective_target_arm_hf_eabi { } {
+ return [check_no_compiler_messages arm_hf_eabi object {
+ #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
+ #error not hard-float EABI
+ #else
+ int dummy;
+ #endif
+ }]
+}
+
# Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
# Some multilibs may be incompatible with this option.