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-rw-r--r--gcc/ChangeLog87
-rw-r--r--gcc/config/i386/i386.c4
-rw-r--r--gcc/testsuite/ChangeLog34
-rw-r--r--gcc/testsuite/gcc.target/i386/builtin_target.c8
-rw-r--r--gcc/testsuite/gcc.target/i386/funcspec-56.inc4
-rw-r--r--libgcc/ChangeLog5
-rw-r--r--libgcc/config/i386/cpuinfo.c8
7 files changed, 149 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f997b96b671..6132cdcf177 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,90 @@
+2016-11-17 Andrew Senkevich <andrew.senkevich@intel.com>
+
+ * config/i386/i386.c (processor_features): Add F_AVX5124VNNIW,
+ F_AVX5124FMAPS.
+ (isa_names_table): Handle new features.
+
+2016-11-17 Kirill Yukhin <kirill.yukhin@gmail.com>
+ Andrew Senkevich <andrew.senkevich@intel.com>
+
+ * common/config/i386/i386-common.c
+ (OPTION_MASK_ISA_AVX5124FMAPS_SET,
+ OPTION_MASK_ISA_AVX5124FMAPS_UNSET,
+ OPTION_MASK_ISA_AVX5124VNNIW_SET,
+ OPTION_MASK_ISA_AVX5124VNNIW_UNSET): New.
+ (ix86_handle_option): Handle OPT_mavx5124fmaps,
+ OPT_mavx5124vnniw.
+ * config.gcc: Add avx5124fmapsintrin.h, avx5124vnniwintrin.h.
+ * config/i386/avx5124fmapsintrin.h: New file.
+ * config/i386/avx5124vnniwintrin.h: Ditto.
+ * config/i386/constraints.md (h): New constraint.
+ * config/i386/cpuid.h: (bit_AVX5124VNNIW,
+ bit_AVX5124FMAPS): New.
+ * config/i386/driver-i386.c (host_detect_local_cpu):
+ Detect avx5124fmaps, avx5124vnniw.
+ * config/i386/i386-builtin-types.def: Add types
+ V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF_V16SF_UHI,
+ V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF,
+ V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF,
+ V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF_V4SF_UQI,
+ V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI,
+ V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI.
+ * config/i386/i386-builtin.def (__builtin_ia32_4fmaddps_mask,
+ __builtin_ia32_4fmaddps, __builtin_ia32_4fmaddss,
+ __builtin_ia32_4fmaddss_mask, __builtin_ia32_4fnmaddps_mask,
+ __builtin_ia32_4fnmaddps, __builtin_ia32_4fnmaddss,
+ __builtin_ia32_4fnmaddss_mask, __builtin_ia32_vp4dpwssd,
+ __builtin_ia32_vp4dpwssd_mask, __builtin_ia32_vp4dpwssds,
+ __builtin_ia32_vp4dpwssds_mask): New.
+ * config/i386/i386-c.c (ix86_target_macros_internal):
+ Define __AVX5124FMAPS__, __AVX5124VNNIW__.
+ * config/i386/i386-modes.def: Fixed comment typos, added new
+ modes (VECTOR_MODES (FLOAT, 256), VECTOR_MODE (INT, SI, 64)).
+ * config/i386/i386.c (ix86_target_string): Add -mavx5124fmaps,
+ -mavx5124vnniw.
+ (PTA_AVX5124FMAPS, PTA_AVX5124VNNIW): Define.
+ (ix86_option_override_internal): Handle new options.
+ (ix86_valid_target_attribute_inner_p): Add avx5124fmaps,
+ avx5124vnniw.
+ (ix86_expand_builtin): Handle new builtins.
+ (ix86_additional_allocno_class_p): New.
+ * config/i386/i386.h (TARGET_AVX5124FMAPS,
+ TARGET_AVX5124FMAPS_P,
+ TARGET_AVX5124VNNIW,
+ TARGET_AVX5124VNNIW_P): Define.
+ (reg_class): Add MOD4_SSE_REGS.
+ (MOD4_SSE_REG_P, MOD4_SSE_REGNO_P): New.
+ * config/i386/i386.opt: Add mavx5124fmaps, mavx5124vnniw.
+ * config/i386/immintrin.h: Include avx5124fmapsintrin.h,
+ avx5124vnniwintrin.h.
+ * config/i386/sse.md (unspec): Add UNSPEC_VP4FMADD,
+ UNSPEC_VP4FNMADD,
+ UNSPEC_VP4DPWSSD, UNSPEC_VP4DPWSSDS.
+ (define_mode_iterator IMOD4): New.
+ (define_mode_attr imod4_narrow): Ditto.
+ (define_insn "mov<mode>"): Ditto.
+ (define_insn "avx5124fmaddps_4fmaddps"): Ditto.
+ (define_insn "avx5124fmaddps_4fmaddps_mask"): Ditto.
+ (define_insn "avx5124fmaddps_4fmaddps_maskz"): Ditto.
+ (define_insn "avx5124fmaddps_4fmaddss"): Ditto.
+ (define_insn "avx5124fmaddps_4fmaddss_mask"): Ditto.
+ (define_insn "avx5124fmaddps_4fmaddss_maskz"): Ditto.
+ (define_insn "avx5124fmaddps_4fnmaddps"): Ditto.
+ (define_insn "avx5124fmaddps_4fnmaddps_mask"): Ditto.
+ (define_insn "avx5124fmaddps_4fnmaddps_maskz"): Ditto.
+ (define_insn "avx5124fmaddps_4fnmaddss"): Ditto.
+ (define_insn "avx5124fmaddps_4fnmaddss_mask"): Ditto.
+ (define_insn "avx5124fmaddps_4fnmaddss_maskz"): Ditto.
+ (define_insn "avx5124vnniw_vp4dpwssd"): Ditto.
+ (define_insn "avx5124vnniw_vp4dpwssd_mask"): Ditto.
+ (define_insn "avx5124vnniw_vp4dpwssd_maskz"): Ditto.
+ (define_insn "avx5124vnniw_vp4dpwssds"): Ditto.
+ (define_insn "avx5124vnniw_vp4dpwssds_mask"): Ditto.
+ (define_insn "avx5124vnniw_vp4dpwssds_maskz"): Ditto.
+ * init-regs.c (initialize_uninitialized_regs): Add emit_clobber call.
+ * genmodes.c (mode_size_inline): Extend return type.
+ * machmode.h (mode_size, mode_base_align): Extend type.
+
2016-11-17 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78101
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 1da1abcaa49..823930d07f9 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -33205,6 +33205,8 @@ fold_builtin_cpu (tree fndecl, tree *args)
F_AVX512PF,
F_AVX512VBMI,
F_AVX512IFMA,
+ F_AVX5124VNNIW,
+ F_AVX5124FMAPS,
F_MAX
};
@@ -33317,6 +33319,8 @@ fold_builtin_cpu (tree fndecl, tree *args)
{"avx512pf",F_AVX512PF},
{"avx512vbmi",F_AVX512VBMI},
{"avx512ifma",F_AVX512IFMA},
+ {"avx5124vnniw",F_AVX5124VNNIW},
+ {"avx5124fmaps",F_AVX5124FMAPS},
};
tree __processor_model_type = build_processor_model_struct ();
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ed6b9a72bac..e84613fe5f7 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,37 @@
+2016-11-17 Andrew Senkevich <andrew.senkevich@intel.com>
+
+ * gcc.target/i386/builtin_target.c: Handle new "avx5124vnniw",
+ "avx5124fmaps".
+ * gcc.target/i386/funcspec-56.inc: Test new attributes.
+
+2016-11-17 Kirill Yukhin <kirill.yukhin@gmail.com>
+ Andrew Senkevich <andrew.senkevich@intel.com>
+
+ * gcc.target/i386/avx5124fmadd-v4fmaddps-1.c: New test.
+ * gcc.target/i386/avx5124fmadd-v4fmaddps-2.c: Ditto.
+ * gcc.target/i386/avx5124fmadd-v4fmaddss-1.c: Ditto.
+ * gcc.target/i386/avx5124fmadd-v4fnmaddps-1.c: Ditto.
+ * gcc.target/i386/avx5124fmadd-v4fnmaddps-2.c: Ditto.
+ * gcc.target/i386/avx5124fmadd-v4fnmaddss-1.c: Ditto.
+ * gcc.target/i386/avx5124fmaps-check.h: Ditto.
+ * gcc.target/i386/avx5124vnniw-check.h: Ditto.
+ * gcc.target/i386/avx5124vnniw-vp4dpwssd-1.c: Ditto.
+ * gcc.target/i386/avx5124vnniw-vp4dpwssd-2.c: Ditto.
+ * gcc.target/i386/avx5124vnniw-vp4dpwssds-1.c: Ditto.
+ * gcc.target/i386/avx5124vnniw-vp4dpwssds-2.c: Ditto.
+ * gcc.target/i386/avx512f-helper.h: Add avx5124fmaps-check.h,
+ avx5124vnniw-check.h.
+ * gcc.target/i386/i386.exp (check_effective_target_avx5124fmaps,
+ check_effective_target_avx5124vnniw): New.
+ * gcc.target/i386/m128-check.h (ESP_FLOAT, ESP_DOUBLE):
+ Set under ifndef.
+ * gcc.target/i386/sse-12.c: Add -mavx5124fmaps, -mavx5124vnniw.
+ * gcc.target/i386/sse-13.c: Ditto.
+ * g++.dg/other/i386-2.C: Ditto.
+ * g++.dg/other/i386-3.C: Ditto.
+ * gcc.target/i386/sse-22.c: Ditto.
+ * gcc.target/i386/sse-23.c: Ditto.
+
2016-11-17 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/55080
diff --git a/gcc/testsuite/gcc.target/i386/builtin_target.c b/gcc/testsuite/gcc.target/i386/builtin_target.c
index 8d45d83c89a..c620a7415ac 100644
--- a/gcc/testsuite/gcc.target/i386/builtin_target.c
+++ b/gcc/testsuite/gcc.target/i386/builtin_target.c
@@ -213,6 +213,10 @@ check_features (unsigned int ecx, unsigned int edx,
assert (__builtin_cpu_supports ("avx512ifma"));
if (ecx & bit_AVX512VBMI)
assert (__builtin_cpu_supports ("avx512vbmi"));
+ if (edx & bit_AVX5124VNNIW)
+ assert (__builtin_cpu_supports ("avx5124vnniw"));
+ if (edx & bit_AVX5124FMAPS)
+ assert (__builtin_cpu_supports ("avx5124fmaps"));
}
}
@@ -311,6 +315,10 @@ quick_check ()
assert (__builtin_cpu_supports ("avx512f") >= 0);
+ assert (__builtin_cpu_supports ("avx5124vnniw") >= 0);
+
+ assert (__builtin_cpu_supports ("avx5124fmaps") >= 0);
+
/* Check CPU type. */
assert (__builtin_cpu_is ("amd") >= 0);
diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc
index 521ac8a5df8..9334e9e3a27 100644
--- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc
+++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc
@@ -28,6 +28,8 @@ extern void test_avx512dq(void) __attribute__((__target__("avx512dq")));
extern void test_avx512er(void) __attribute__((__target__("avx512er")));
extern void test_avx512pf(void) __attribute__((__target__("avx512pf")));
extern void test_avx512cd(void) __attribute__((__target__("avx512cd")));
+extern void test_avx5124fmaps(void) __attribute__((__target__("avx5124fmaps")));
+extern void test_avx5124vnniw(void) __attribute__((__target__("avx5124vnniw")));
extern void test_bmi (void) __attribute__((__target__("bmi")));
extern void test_bmi2 (void) __attribute__((__target__("bmi2")));
@@ -59,6 +61,8 @@ extern void test_no_avx512dq(void) __attribute__((__target__("no-avx512dq")));
extern void test_no_avx512er(void) __attribute__((__target__("no-avx512er")));
extern void test_bo_avx512pf(void) __attribute__((__target__("no-avx512pf")));
extern void test_no_avx512cd(void) __attribute__((__target__("no-avx512cd")));
+extern void test_no_avx5124fmaps(void) __attribute__((__target__("no-avx5124fmaps")));
+extern void test_no_avx5124vnniw(void) __attribute__((__target__("no-avx5124vnniw")));
extern void test_no_bmi (void) __attribute__((__target__("no-bmi")));
extern void test_no_bmi2 (void) __attribute__((__target__("no-bmi2")));
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index b03a47c07f5..aff110d7916 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-11-17 Andrew Senkevich <andrew.senkevich@intel.com>
+
+ * config/i386/cpuinfo.c (processor_features): Add
+ FEATURE_AVX5124VNNIW, FEATURE_AVX5124FMAPS.
+
2016-11-17 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/dp-hack.h (ARC_OPTFPE): Define.
diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
index af203f2a37e..4a0ad254cd9 100644
--- a/libgcc/config/i386/cpuinfo.c
+++ b/libgcc/config/i386/cpuinfo.c
@@ -115,7 +115,9 @@ enum processor_features
FEATURE_AVX512ER,
FEATURE_AVX512PF,
FEATURE_AVX512VBMI,
- FEATURE_AVX512IFMA
+ FEATURE_AVX512IFMA,
+ FEATURE_AVX5124VNNIW,
+ FEATURE_AVX5124FMAPS
};
struct __processor_model
@@ -359,6 +361,10 @@ get_available_features (unsigned int ecx, unsigned int edx,
features |= (1 << FEATURE_AVX512IFMA);
if (ecx & bit_AVX512VBMI)
features |= (1 << FEATURE_AVX512VBMI);
+ if (edx & bit_AVX5124VNNIW)
+ features |= (1 << FEATURE_AVX5124VNNIW);
+ if (edx & bit_AVX5124FMAPS)
+ features |= (1 << FEATURE_AVX5124FMAPS);
}
unsigned int ext_level;