diff options
Diffstat (limited to 'gcc/config/arm/thumb2.md')
| -rw-r--r-- | gcc/config/arm/thumb2.md | 97 |
1 files changed, 97 insertions, 0 deletions
diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index d84938f304e..10bc8b1c530 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -1370,6 +1370,103 @@ (set_attr "type" "alu_reg")] ) +; Constants for op 2 will never be given to these patterns. +(define_insn_and_split "*iordi_notdi_di" + [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") + (ior:DI (not:DI (match_operand:DI 1 "s_register_operand" "0,r")) + (match_operand:DI 2 "s_register_operand" "r,0")))] + "TARGET_THUMB2" + "#" + "TARGET_THUMB2 && reload_completed" + [(set (match_dup 0) (ior:SI (not:SI (match_dup 1)) (match_dup 2))) + (set (match_dup 3) (ior:SI (not:SI (match_dup 4)) (match_dup 5)))] + " + { + operands[3] = gen_highpart (SImode, operands[0]); + operands[0] = gen_lowpart (SImode, operands[0]); + operands[4] = gen_highpart (SImode, operands[1]); + operands[1] = gen_lowpart (SImode, operands[1]); + operands[5] = gen_highpart (SImode, operands[2]); + operands[2] = gen_lowpart (SImode, operands[2]); + }" + [(set_attr "length" "8") + (set_attr "predicable" "yes") + (set_attr "predicable_short_it" "no") + (set_attr "type" "multiple")] +) + +(define_insn_and_split "*iordi_notzesidi_di" + [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") + (ior:DI (not:DI (zero_extend:DI + (match_operand:SI 2 "s_register_operand" "r,r"))) + (match_operand:DI 1 "s_register_operand" "0,?r")))] + "TARGET_THUMB2" + "#" + ; (not (zero_extend...)) means operand0 will always be 0xffffffff + "TARGET_THUMB2 && reload_completed" + [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1))) + (set (match_dup 3) (const_int -1))] + " + { + operands[3] = gen_highpart (SImode, operands[0]); + operands[0] = gen_lowpart (SImode, operands[0]); + operands[1] = gen_lowpart (SImode, operands[1]); + }" + [(set_attr "length" "4,8") + (set_attr "predicable" "yes") + (set_attr "predicable_short_it" "no") + (set_attr "type" "multiple")] +) + +(define_insn_and_split "*iordi_notdi_zesidi" + [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") + (ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "0,?r")) + (zero_extend:DI + (match_operand:SI 1 "s_register_operand" "r,r"))))] + "TARGET_THUMB2" + "#" + "TARGET_THUMB2 && reload_completed" + [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1))) + (set (match_dup 3) (not:SI (match_dup 4)))] + " + { + operands[3] = gen_highpart (SImode, operands[0]); + operands[0] = gen_lowpart (SImode, operands[0]); + operands[1] = gen_lowpart (SImode, operands[1]); + operands[4] = gen_highpart (SImode, operands[2]); + operands[2] = gen_lowpart (SImode, operands[2]); + }" + [(set_attr "length" "8") + (set_attr "predicable" "yes") + (set_attr "predicable_short_it" "no") + (set_attr "type" "multiple")] +) + +(define_insn_and_split "*iordi_notsesidi_di" + [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") + (ior:DI (not:DI (sign_extend:DI + (match_operand:SI 2 "s_register_operand" "r,r"))) + (match_operand:DI 1 "s_register_operand" "0,r")))] + "TARGET_THUMB2" + "#" + "TARGET_THUMB2 && reload_completed" + [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1))) + (set (match_dup 3) (ior:SI (not:SI + (ashiftrt:SI (match_dup 2) (const_int 31))) + (match_dup 4)))] + " + { + operands[3] = gen_highpart (SImode, operands[0]); + operands[0] = gen_lowpart (SImode, operands[0]); + operands[4] = gen_highpart (SImode, operands[1]); + operands[1] = gen_lowpart (SImode, operands[1]); + }" + [(set_attr "length" "8") + (set_attr "predicable" "yes") + (set_attr "predicable_short_it" "no") + (set_attr "type" "multiple")] +) + (define_insn "*orsi_notsi_si" [(set (match_operand:SI 0 "s_register_operand" "=r") (ior:SI (not:SI (match_operand:SI 2 "s_register_operand" "r")) |