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-rw-r--r--gcc/config/i386/i386.md18
1 files changed, 9 insertions, 9 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 55175ca1659..5479fc19b85 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2363,7 +2363,7 @@
(set_attr "mode" "DI")])
;; Convert impossible pushes of immediate to existing instructions.
-;; First try to get scratch register and go trought it. In case this
+;; First try to get scratch register and go through it. In case this
;; fails, push sign extended lower part first and then overwrite
;; upper part by 32bit move.
(define_peephole2
@@ -2575,7 +2575,7 @@
(set_attr "mode" "DI")])
;; Convert impossible stores of immediate to existing instructions.
-;; First try to get scratch register and go trought it. In case this
+;; First try to get scratch register and go through it. In case this
;; fails, move by 32bit parts.
(define_peephole2
[(match_scratch:DI 2 "r")
@@ -8106,7 +8106,7 @@
(const_int 0)))]
"TARGET_64BIT
&& ix86_match_ccmode (insn, CCNOmode)
- /* The code bellow cannot deal with constants outside HOST_WIDE_INT. */
+ /* The code below cannot deal with constants outside HOST_WIDE_INT. */
&& INTVAL (operands[1]) + INTVAL (operands[2]) < HOST_BITS_PER_WIDE_INT
/* Ensure that resulting mask is zero or sign extended operand. */
&& (INTVAL (operands[1]) + INTVAL (operands[2]) <= 32
@@ -16198,7 +16198,7 @@
;; Misc patterns (?)
-;; This pattern exists to put a dependancy on all ebp-based memory accesses.
+;; This pattern exists to put a dependency on all ebp-based memory accesses.
;; Otherwise there will be nothing to keep
;;
;; [(set (reg ebp) (reg esp))]
@@ -16904,7 +16904,7 @@
;; "and imm, reg" if reg dies. The "and" form is also shorter (one
;; byte opcode instead of two, have a short form for byte operands),
;; so do it for other CPUs as well. Given that the value was dead,
-;; this should not create any new dependancies. Pass on the sub-word
+;; this should not create any new dependencies. Pass on the sub-word
;; versions if we're concerned about partial register stalls.
(define_peephole2
@@ -17147,12 +17147,12 @@
;; The ESP adjustments can be done by the push and pop instructions. Resulting
;; code is shorter, since push is only 1 byte, while add imm, %esp 3 bytes. On
;; many CPUs it is also faster, since special hardware to avoid esp
-;; dependancies is present.
+;; dependencies is present.
;; While some of these converisons may be done using splitters, we use peepholes
;; in order to allow combine_stack_adjustments pass to see nonobfuscated RTL.
-;; Convert prologue esp substractions to push.
+;; Convert prologue esp subtractions to push.
;; We need register to push. In order to keep verify_flow_info happy we have
;; two choices
;; - use scratch and clobber it in order to avoid dependencies
@@ -17184,7 +17184,7 @@
(parallel [(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 0))
(clobber (mem:BLK (scratch)))])])
-;; Convert esp substractions to push.
+;; Convert esp subtractions to push.
(define_peephole2
[(match_scratch:SI 0 "r")
(parallel [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -4)))
@@ -17362,7 +17362,7 @@
(parallel [(set (mem:DI (pre_dec:DI (reg:DI 7))) (match_dup 0))
(clobber (mem:BLK (scratch)))])])
-;; Convert esp substractions to push.
+;; Convert esp subtractions to push.
(define_peephole2
[(match_scratch:DI 0 "r")
(parallel [(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -8)))