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-rw-r--r--gcc/config/i386/i386.c12
-rw-r--r--gcc/config/i386/i386.h2
-rw-r--r--gcc/config/i386/i386.md18
-rw-r--r--gcc/config/i386/xm-djgpp.h2
4 files changed, 17 insertions, 17 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 39a55ad3f46..8fe70a2a71c 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1616,7 +1616,7 @@ classify_argument (mode, type, classes, bit_offset)
mode_alignment = 128;
else if (mode == XCmode)
mode_alignment = 256;
- /* Missalignmed fields are always returned in memory. */
+ /* Misaligned fields are always returned in memory. */
if (bit_offset % mode_alignment)
return 0;
}
@@ -1678,7 +1678,7 @@ classify_argument (mode, type, classes, bit_offset)
}
/* Examine the argument and return set number of register required in each
- class. Return 0 ifif parameter should be passed in memory. */
+ class. Return 0 iff parameter should be passed in memory. */
static int
examine_argument (mode, type, in_return, int_nregs, sse_nregs)
enum machine_mode mode;
@@ -2060,7 +2060,7 @@ ix86_function_value (valtype)
return gen_rtx_REG (TYPE_MODE (valtype), VALUE_REGNO (TYPE_MODE (valtype)));
}
-/* Return false ifif type is returned in memory. */
+/* Return false iff type is returned in memory. */
int
ix86_return_in_memory (type)
tree type;
@@ -2853,7 +2853,7 @@ incdec_operand (op, mode)
register rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
- /* On Pentium4, the inc and dec operations causes extra dependancy on flag
+ /* On Pentium4, the inc and dec operations causes extra dependency on flag
registers, since carry flag is not set. */
if (TARGET_PENTIUM4 && !optimize_size)
return 0;
@@ -4174,7 +4174,7 @@ ix86_expand_epilogue (style)
}
if (frame_pointer_needed)
{
- /* Leave results in shorter depdendancy chains on CPUs that are
+ /* Leave results in shorter dependency chains on CPUs that are
able to grok it fast. */
if (TARGET_USE_LEAVE)
emit_insn (TARGET_64BIT ? gen_leave_rex64 () : gen_leave ());
@@ -9908,7 +9908,7 @@ ix86_flags_dependant (insn, dep_insn, insn_type)
if (GET_CODE (set) != REG || REGNO (set) != FLAGS_REG)
return 0;
- /* This test is true if the dependant insn reads the flags but
+ /* This test is true if the dependent insn reads the flags but
not any other potentially set register. */
if (!reg_overlap_mentioned_p (set, PATTERN (insn)))
return 0;
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index fda362059bf..a23644a605a 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -167,7 +167,7 @@ extern int target_flags;
#define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
/* Long double is 128bit instead of 96bit, even when only 80bits are used.
- This mode wastes cache, but avoid missaligned data accesses and simplifies
+ This mode wastes cache, but avoid misaligned data accesses and simplifies
address calculations. */
#define TARGET_128BIT_LONG_DOUBLE (target_flags & MASK_128BIT_LONG_DOUBLE)
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 55175ca1659..5479fc19b85 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2363,7 +2363,7 @@
(set_attr "mode" "DI")])
;; Convert impossible pushes of immediate to existing instructions.
-;; First try to get scratch register and go trought it. In case this
+;; First try to get scratch register and go through it. In case this
;; fails, push sign extended lower part first and then overwrite
;; upper part by 32bit move.
(define_peephole2
@@ -2575,7 +2575,7 @@
(set_attr "mode" "DI")])
;; Convert impossible stores of immediate to existing instructions.
-;; First try to get scratch register and go trought it. In case this
+;; First try to get scratch register and go through it. In case this
;; fails, move by 32bit parts.
(define_peephole2
[(match_scratch:DI 2 "r")
@@ -8106,7 +8106,7 @@
(const_int 0)))]
"TARGET_64BIT
&& ix86_match_ccmode (insn, CCNOmode)
- /* The code bellow cannot deal with constants outside HOST_WIDE_INT. */
+ /* The code below cannot deal with constants outside HOST_WIDE_INT. */
&& INTVAL (operands[1]) + INTVAL (operands[2]) < HOST_BITS_PER_WIDE_INT
/* Ensure that resulting mask is zero or sign extended operand. */
&& (INTVAL (operands[1]) + INTVAL (operands[2]) <= 32
@@ -16198,7 +16198,7 @@
;; Misc patterns (?)
-;; This pattern exists to put a dependancy on all ebp-based memory accesses.
+;; This pattern exists to put a dependency on all ebp-based memory accesses.
;; Otherwise there will be nothing to keep
;;
;; [(set (reg ebp) (reg esp))]
@@ -16904,7 +16904,7 @@
;; "and imm, reg" if reg dies. The "and" form is also shorter (one
;; byte opcode instead of two, have a short form for byte operands),
;; so do it for other CPUs as well. Given that the value was dead,
-;; this should not create any new dependancies. Pass on the sub-word
+;; this should not create any new dependencies. Pass on the sub-word
;; versions if we're concerned about partial register stalls.
(define_peephole2
@@ -17147,12 +17147,12 @@
;; The ESP adjustments can be done by the push and pop instructions. Resulting
;; code is shorter, since push is only 1 byte, while add imm, %esp 3 bytes. On
;; many CPUs it is also faster, since special hardware to avoid esp
-;; dependancies is present.
+;; dependencies is present.
;; While some of these converisons may be done using splitters, we use peepholes
;; in order to allow combine_stack_adjustments pass to see nonobfuscated RTL.
-;; Convert prologue esp substractions to push.
+;; Convert prologue esp subtractions to push.
;; We need register to push. In order to keep verify_flow_info happy we have
;; two choices
;; - use scratch and clobber it in order to avoid dependencies
@@ -17184,7 +17184,7 @@
(parallel [(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 0))
(clobber (mem:BLK (scratch)))])])
-;; Convert esp substractions to push.
+;; Convert esp subtractions to push.
(define_peephole2
[(match_scratch:SI 0 "r")
(parallel [(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -4)))
@@ -17362,7 +17362,7 @@
(parallel [(set (mem:DI (pre_dec:DI (reg:DI 7))) (match_dup 0))
(clobber (mem:BLK (scratch)))])])
-;; Convert esp substractions to push.
+;; Convert esp subtractions to push.
(define_peephole2
[(match_scratch:DI 0 "r")
(parallel [(set (reg:DI 7) (plus:DI (reg:DI 7) (const_int -8)))
diff --git a/gcc/config/i386/xm-djgpp.h b/gcc/config/i386/xm-djgpp.h
index 2e5260e3e23..b8367acc912 100644
--- a/gcc/config/i386/xm-djgpp.h
+++ b/gcc/config/i386/xm-djgpp.h
@@ -30,7 +30,7 @@ Boston, MA 02111-1307, USA. */
/* Allow test for DOS drive names. */
#define HAVE_DOS_BASED_FILE_SYSTEM
-/* System dependant initialization for collect2
+/* System dependent initialization for collect2
to tell system() to act like Unix. */
#define COLLECT2_HOST_INITIALIZATION \
do { __system_flags |= (__system_allow_multiple_cmds \