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-rw-r--r--gcc/config/i960/i960.md32
1 files changed, 22 insertions, 10 deletions
diff --git a/gcc/config/i960/i960.md b/gcc/config/i960/i960.md
index 55b6ebf511a..43cb7ba5bee 100644
--- a/gcc/config/i960/i960.md
+++ b/gcc/config/i960/i960.md
@@ -1,5 +1,5 @@
;;- Machine description for Intel 80960 chip for GNU C compiler
-;; Copyright (C) 1992, 1995 Free Software Foundation, Inc.
+;; Copyright (C) 1992, 1995, 1998 Free Software Foundation, Inc.
;; Contributed by Steven McGeady, Intel Corp.
;; Additional work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson
;; Converted to GCC 2.0 by Jim Wilson and Michael Tiemann, Cygnus Support.
@@ -867,17 +867,20 @@
[(set_attr "type" "move,move,load,load,store")])
(define_insn "*store_unaligned_di_reg"
- [(set (match_operand:DI 0 "memory_operand" "=m")
- (match_operand:DI 1 "register_operand" "d"))
- (clobber (match_scratch:SI 2 "=&d"))]
+ [(set (match_operand:DI 0 "general_operand" "=d,m")
+ (match_operand:DI 1 "register_operand" "d,d"))
+ (clobber (match_scratch:SI 2 "=X,&d"))]
""
"*
{
+ if (which_alternative == 0)
+ return i960_output_move_double (operands[0], operands[1]);
+
operands[3] = gen_rtx (MEM, word_mode, operands[2]);
operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD);
return \"lda %0,%2\;st %1,%3\;st %D1,%4\";
}"
- [(set_attr "type" "store")])
+ [(set_attr "type" "move,store")])
(define_expand "movti"
[(set (match_operand:TI 0 "general_operand" "")
@@ -946,19 +949,22 @@
[(set_attr "type" "move,move,load,load,store")])
(define_insn "*store_unaligned_ti_reg"
- [(set (match_operand:TI 0 "memory_operand" "=m")
- (match_operand:TI 1 "register_operand" "d"))
- (clobber (match_scratch:SI 2 "=&d"))]
+ [(set (match_operand:TI 0 "general_operand" "=d,m")
+ (match_operand:TI 1 "register_operand" "d,d"))
+ (clobber (match_scratch:SI 2 "=X,&d"))]
""
"*
{
+ if (which_alternative == 0)
+ return i960_output_move_quad (operands[0], operands[1]);
+
operands[3] = gen_rtx (MEM, word_mode, operands[2]);
operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD);
operands[5] = adj_offsettable_operand (operands[4], UNITS_PER_WORD);
operands[6] = adj_offsettable_operand (operands[5], UNITS_PER_WORD);
return \"lda %0,%2\;st %1,%3\;st %D1,%4\;st %E1,%5\;st %F1,%6\";
}"
- [(set_attr "type" "store")])
+ [(set_attr "type" "move,store")])
(define_expand "store_multiple"
[(set (match_operand:SI 0 "" "") ;;- dest
@@ -2209,7 +2215,13 @@
[(set (pc) (match_operand:SI 0 "register_operand" "d"))
(use (label_ref (match_operand 1 "" "")))]
""
- "bx (%0)"
+ "*
+{
+ if (flag_pic)
+ return \"bx %l1(%0)\";
+ else
+ return \"bx (%0)\";
+}"
[(set_attr "type" "branch")])
;;- jump to subroutine