diff options
Diffstat (limited to 'gcc/config/rs6000/rs6000.c')
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 48 |
1 files changed, 39 insertions, 9 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 31b46ea4c82..4bb42213c87 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -457,6 +457,7 @@ struct processor_costs { const int l2_cache_size; /* size of l2 cache, in kilobytes. */ const int simultaneous_prefetches; /* number of parallel prefetch operations. */ + const int sfdf_convert; /* cost of SF->DF conversion. */ }; const struct processor_costs *rs6000_cost; @@ -476,10 +477,11 @@ struct processor_costs size32_cost = { COSTS_N_INSNS (1), /* dmul */ COSTS_N_INSNS (1), /* sdiv */ COSTS_N_INSNS (1), /* ddiv */ - 32, - 0, - 0, - 0, + 32, /* cache line size */ + 0, /* l1 cache */ + 0, /* l2 cache */ + 0, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction size costs on 64bit processors. */ @@ -495,10 +497,11 @@ struct processor_costs size64_cost = { COSTS_N_INSNS (1), /* dmul */ COSTS_N_INSNS (1), /* sdiv */ COSTS_N_INSNS (1), /* ddiv */ - 128, - 0, - 0, - 0, + 128, /* cache line size */ + 0, /* l1 cache */ + 0, /* l2 cache */ + 0, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on RS64A processors. */ @@ -518,6 +521,7 @@ struct processor_costs rs64a_cost = { 128, /* l1 cache */ 2048, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on MPCCORE processors. */ @@ -537,6 +541,7 @@ struct processor_costs mpccore_cost = { 4, /* l1 cache */ 16, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC403 processors. */ @@ -556,6 +561,7 @@ struct processor_costs ppc403_cost = { 4, /* l1 cache */ 16, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC405 processors. */ @@ -575,6 +581,7 @@ struct processor_costs ppc405_cost = { 16, /* l1 cache */ 128, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC440 processors. */ @@ -594,6 +601,7 @@ struct processor_costs ppc440_cost = { 32, /* l1 cache */ 256, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC476 processors. */ @@ -613,6 +621,7 @@ struct processor_costs ppc476_cost = { 32, /* l1 cache */ 512, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC601 processors. */ @@ -632,6 +641,7 @@ struct processor_costs ppc601_cost = { 32, /* l1 cache */ 256, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC603 processors. */ @@ -651,6 +661,7 @@ struct processor_costs ppc603_cost = { 8, /* l1 cache */ 64, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC604 processors. */ @@ -670,6 +681,7 @@ struct processor_costs ppc604_cost = { 16, /* l1 cache */ 512, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC604e processors. */ @@ -689,6 +701,7 @@ struct processor_costs ppc604e_cost = { 32, /* l1 cache */ 1024, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC620 processors. */ @@ -708,6 +721,7 @@ struct processor_costs ppc620_cost = { 32, /* l1 cache */ 1024, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC630 processors. */ @@ -727,6 +741,7 @@ struct processor_costs ppc630_cost = { 64, /* l1 cache */ 1024, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on Cell processor. */ @@ -747,6 +762,7 @@ struct processor_costs ppccell_cost = { 32, /* l1 cache */ 512, /* l2 cache */ 6, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC750 and PPC7400 processors. */ @@ -766,6 +782,7 @@ struct processor_costs ppc750_cost = { 32, /* l1 cache */ 512, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC7450 processors. */ @@ -785,6 +802,7 @@ struct processor_costs ppc7450_cost = { 32, /* l1 cache */ 1024, /* l2 cache */ 1, /* streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on PPC8540 processors. */ @@ -804,6 +822,7 @@ struct processor_costs ppc8540_cost = { 32, /* l1 cache */ 256, /* l2 cache */ 1, /* prefetch streams /*/ + 0, /* SF->DF convert */ }; /* Instruction costs on E300C2 and E300C3 cores. */ @@ -823,6 +842,7 @@ struct processor_costs ppce300c2c3_cost = { 16, /* l1 cache */ 16, /* l2 cache */ 1, /* prefetch streams /*/ + 0, /* SF->DF convert */ }; /* Instruction costs on PPCE500MC processors. */ @@ -842,6 +862,7 @@ struct processor_costs ppce500mc_cost = { 32, /* l1 cache */ 128, /* l2 cache */ 1, /* prefetch streams /*/ + 0, /* SF->DF convert */ }; /* Instruction costs on PPCE500MC64 processors. */ @@ -861,6 +882,7 @@ struct processor_costs ppce500mc64_cost = { 32, /* l1 cache */ 128, /* l2 cache */ 1, /* prefetch streams /*/ + 0, /* SF->DF convert */ }; /* Instruction costs on PPCE5500 processors. */ @@ -880,6 +902,7 @@ struct processor_costs ppce5500_cost = { 32, /* l1 cache */ 128, /* l2 cache */ 1, /* prefetch streams /*/ + 0, /* SF->DF convert */ }; /* Instruction costs on PPCE6500 processors. */ @@ -899,6 +922,7 @@ struct processor_costs ppce6500_cost = { 32, /* l1 cache */ 128, /* l2 cache */ 1, /* prefetch streams /*/ + 0, /* SF->DF convert */ }; /* Instruction costs on AppliedMicro Titan processors. */ @@ -918,6 +942,7 @@ struct processor_costs titan_cost = { 32, /* l1 cache */ 512, /* l2 cache */ 1, /* prefetch streams /*/ + 0, /* SF->DF convert */ }; /* Instruction costs on POWER4 and POWER5 processors. */ @@ -937,6 +962,7 @@ struct processor_costs power4_cost = { 32, /* l1 cache */ 1024, /* l2 cache */ 8, /* prefetch streams /*/ + 0, /* SF->DF convert */ }; /* Instruction costs on POWER6 processors. */ @@ -956,6 +982,7 @@ struct processor_costs power6_cost = { 64, /* l1 cache */ 2048, /* l2 cache */ 16, /* prefetch streams */ + 0, /* SF->DF convert */ }; /* Instruction costs on POWER7 processors. */ @@ -975,6 +1002,7 @@ struct processor_costs power7_cost = { 32, /* l1 cache */ 256, /* l2 cache */ 12, /* prefetch streams */ + COSTS_N_INSNS (3), /* SF->DF convert */ }; /* Instruction costs on POWER8 processors. */ @@ -994,6 +1022,7 @@ struct processor_costs power8_cost = { 32, /* l1 cache */ 256, /* l2 cache */ 12, /* prefetch streams */ + COSTS_N_INSNS (3), /* SF->DF convert */ }; /* Instruction costs on POWER A2 processors. */ @@ -1013,6 +1042,7 @@ struct processor_costs ppca2_cost = { 16, /* l1 cache */ 2048, /* l2 cache */ 16, /* prefetch streams */ + 0, /* SF->DF convert */ }; @@ -30480,7 +30510,7 @@ rs6000_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, case FLOAT_EXTEND: if (mode == DFmode) - *total = 0; + *total = rs6000_cost->sfdf_convert; else *total = rs6000_cost->fp; return false; |