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-rw-r--r--gcc/config/rs6000/rs6000.md76
1 files changed, 31 insertions, 45 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 6fb83723bff..ac7008f8699 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1,5 +1,5 @@
;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler
-;; Copyright (C) 1990, 91-97, 1998 Free Software Foundation, Inc.
+;; Copyright (C) 1990, 91-98, 1999 Free Software Foundation, Inc.
;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
;; This file is part of GNU CC.
@@ -40,7 +40,7 @@
;; Processor type -- this attribute must exactly match the processor_type
;; enumeration in rs6000.h.
-(define_attr "cpu" "rios1,rios2,mpccore,ppc403,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc750"
+(define_attr "cpu" "rios1,rios2,mpccore,ppc403,ppc601,ppc603,ppc604,ppc604e,ppc620"
(const (symbol_ref "rs6000_cpu_attr")))
; (define_function_unit NAME MULTIPLICITY SIMULTANEITY
@@ -50,17 +50,17 @@
; (POWER and 601 use Integer Unit)
(define_function_unit "lsu" 1 0
(and (eq_attr "type" "load")
- (eq_attr "cpu" "mpccore,ppc603,ppc604,ppc604e,ppc620,ppc750"))
+ (eq_attr "cpu" "mpccore,ppc603,ppc604,ppc604e,ppc620"))
2 1)
(define_function_unit "lsu" 1 0
(and (eq_attr "type" "store,fpstore")
- (eq_attr "cpu" "mpccore,ppc603,ppc604,ppc604e,ppc620,ppc750"))
+ (eq_attr "cpu" "mpccore,ppc603,ppc604,ppc604e,ppc620"))
1 1)
(define_function_unit "lsu" 1 0
(and (eq_attr "type" "fpload")
- (eq_attr "cpu" "mpccore,ppc603,ppc750"))
+ (eq_attr "cpu" "mpccore,ppc603"))
2 1)
(define_function_unit "lsu" 1 0
@@ -68,31 +68,6 @@
(eq_attr "cpu" "ppc604,ppc604e,ppc620"))
3 1)
-; PPC750 has two integer units: a primary one which can perform all
-; operations and a secondary one which is fed in lock step with the first
-; and can perform "simple" integer operations.
-; To catch this we define a 'dummy' imuldiv-unit that is also needed
-; for the complex insns.
-(define_function_unit "iu2" 2 0
- (and (eq_attr "type" "integer")
- (eq_attr "cpu" "ppc750"))
- 1 1)
-
-(define_function_unit "iu2" 2 0
- (and (eq_attr "type" "imul")
- (eq_attr "cpu" "ppc750"))
- 4 2)
-
-(define_function_unit "imuldiv" 1 0
- (and (eq_attr "type" "imul")
- (eq_attr "cpu" "ppc750"))
- 4 2)
-
-(define_function_unit "imuldiv" 1 0
- (and (eq_attr "type" "idiv")
- (eq_attr "cpu" "ppc750"))
- 19 19)
-
(define_function_unit "iu" 1 0
(and (eq_attr "type" "load")
(eq_attr "cpu" "rios1,ppc403,ppc601"))
@@ -243,7 +218,7 @@
(define_function_unit "iu" 1 0
(and (eq_attr "type" "compare,delayed_compare")
- (eq_attr "cpu" "mpccore,ppc403,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc750"))
+ (eq_attr "cpu" "mpccore,ppc403,ppc601,ppc603,ppc604,ppc604e,ppc620"))
3 1)
(define_function_unit "iu2" 2 0
@@ -253,7 +228,7 @@
(define_function_unit "iu2" 2 0
(and (eq_attr "type" "compare,delayed_compare")
- (eq_attr "cpu" "ppc604,ppc604e,ppc620,ppc750"))
+ (eq_attr "cpu" "ppc604,ppc604e,ppc620"))
1 1)
; fp compare uses fp unit
@@ -280,7 +255,7 @@
; fp compare uses fp unit
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "fpcompare")
- (eq_attr "cpu" "ppc601,ppc603,ppc604,ppc604e,ppc620,ppc750"))
+ (eq_attr "cpu" "ppc601,ppc603,ppc604,ppc604e,ppc620"))
5 1)
(define_function_unit "fpu" 1 0
@@ -295,7 +270,7 @@
(define_function_unit "bpu" 1 0
(and (eq_attr "type" "mtjmpr")
- (eq_attr "cpu" "mpccore,ppc403,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc750"))
+ (eq_attr "cpu" "mpccore,ppc403,ppc601,ppc603,ppc604,ppc604e,ppc620"))
4 1)
; all jumps/branches are executing on the bpu, in 1 cycle, for all machines.
@@ -325,7 +300,7 @@
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "fp")
- (eq_attr "cpu" "ppc603,ppc604,ppc604e,ppc620,ppc750"))
+ (eq_attr "cpu" "ppc603,ppc604,ppc604e,ppc620"))
3 1)
(define_function_unit "fpu" 1 0
@@ -341,7 +316,7 @@
; is this true?
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "dmul")
- (eq_attr "cpu" "ppc603,ppc750"))
+ (eq_attr "cpu" "ppc603"))
4 2)
(define_function_unit "fpu" 1 0
@@ -376,7 +351,7 @@
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "ddiv")
- (eq_attr "cpu" "ppc601,ppc604,ppc604e,ppc620,ppc750"))
+ (eq_attr "cpu" "ppc601,ppc604,ppc604e,ppc620"))
31 31)
(define_function_unit "fpu" 1 0
@@ -5424,6 +5399,14 @@
if (GET_CODE (operands[1]) == CONST_DOUBLE)
operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
+ /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */
+ if (GET_CODE (operands[1]) == CONST
+ && GET_CODE (XEXP (operands[1], 0)) == CONSTANT_P_RTX)
+ {
+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
+ DONE;
+ }
+
/* Use default pattern for address of ELF small data */
if (TARGET_ELF
&& (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
@@ -5445,8 +5428,7 @@
&& !flag_pic
&& CONSTANT_P (operands[1])
&& GET_CODE (operands[1]) != HIGH
- && GET_CODE (operands[1]) != CONST_INT
- && GET_CODE (operands[1]) != CONSTANT_P_RTX)
+ && GET_CODE (operands[1]) != CONST_INT)
{
rtx target = (reload_completed || reload_in_progress)
? operands[0] : gen_reg_rtx (SImode);
@@ -5500,7 +5482,6 @@
if ((!TARGET_WINDOWS_NT || DEFAULT_ABI != ABI_NT)
&& CONSTANT_P (operands[1])
&& GET_CODE (operands[1]) != CONST_INT
- && GET_CODE (operands[1]) != CONSTANT_P_RTX
&& GET_CODE (operands[1]) != HIGH
&& ! LEGITIMATE_CONSTANT_POOL_ADDRESS_P (operands[1]))
{
@@ -5599,8 +5580,7 @@
operands[1] = force_reg (HImode, operands[1]);
if (CONSTANT_P (operands[1])
- && GET_CODE (operands[1]) != CONST_INT
- && GET_CODE (operands[1]) != CONSTANT_P_RTX)
+ && GET_CODE (operands[1]) != CONST_INT)
{
operands[1] = force_const_mem (HImode, operands[1]);
if (! memory_address_p (HImode, XEXP (operands[1], 0))
@@ -5636,8 +5616,7 @@
operands[1] = force_reg (QImode, operands[1]);
if (CONSTANT_P (operands[1])
- && GET_CODE (operands[1]) != CONST_INT
- && GET_CODE (operands[1]) != CONSTANT_P_RTX)
+ && GET_CODE (operands[1]) != CONST_INT)
{
operands[1] = force_const_mem (QImode, operands[1]);
if (! memory_address_p (QImode, XEXP (operands[1], 0))
@@ -6037,11 +6016,18 @@
)
operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
+ /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */
+ if (GET_CODE (operands[1]) == CONST
+ && GET_CODE (XEXP (operands[1], 0)) == CONSTANT_P_RTX)
+ {
+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
+ DONE;
+ }
+
if (TARGET_64BIT
&& CONSTANT_P (operands[1])
#if HOST_BITS_PER_WIDE_INT == 32
&& GET_CODE (operands[1]) != CONST_INT
- && GET_CODE (operands[1]) != CONSTANT_P_RTX
#endif
&& ! easy_fp_constant (operands[1], DImode)
&& ! LEGITIMATE_CONSTANT_POOL_ADDRESS_P (operands[1]))