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-rw-r--r--gcc/config/sh/crt1.asm1369
-rw-r--r--gcc/config/sh/crti.asm125
-rw-r--r--gcc/config/sh/crtn.asm77
-rw-r--r--gcc/config/sh/lib1funcs-4-300.asm936
-rw-r--r--gcc/config/sh/lib1funcs-Os-4-200.asm322
-rw-r--r--gcc/config/sh/t-elf10
-rw-r--r--gcc/config/sh/t-linux2
-rw-r--r--gcc/config/sh/t-linux641
-rw-r--r--gcc/config/sh/t-netbsd2
-rw-r--r--gcc/config/sh/t-sh46
-rw-r--r--gcc/config/sh/t-superh33
-rw-r--r--gcc/config/sh/t-vxworks3
12 files changed, 0 insertions, 2926 deletions
diff --git a/gcc/config/sh/crt1.asm b/gcc/config/sh/crt1.asm
deleted file mode 100644
index e2857904f86..00000000000
--- a/gcc/config/sh/crt1.asm
+++ /dev/null
@@ -1,1369 +0,0 @@
-/* Copyright (C) 2000, 2001, 2003, 2004, 2005, 2006, 2009
- Free Software Foundation, Inc.
- This file was pretty much copied from newlib.
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify it
-under the terms of the GNU General Public License as published by the
-Free Software Foundation; either version 3, or (at your option) any
-later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-General Public License for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-
-#ifdef MMU_SUPPORT
- /* Section used for exception/timer interrupt stack area */
- .section .data.vbr.stack,"aw"
- .align 4
- .global __ST_VBR
-__ST_VBR:
- .zero 1024 * 2 /* ; 2k for VBR handlers */
-/* Label at the highest stack address where the stack grows from */
-__timer_stack:
-#endif /* MMU_SUPPORT */
-
- /* ;----------------------------------------
- Normal newlib crt1.asm */
-
-#ifdef __SH5__
- .section .data,"aw"
- .global ___data
-___data:
-
- .section .rodata,"a"
- .global ___rodata
-___rodata:
-
-#define ICCR_BASE 0x01600000
-#define OCCR_BASE 0x01e00000
-#define MMUIR_BASE 0x00000000
-#define MMUDR_BASE 0x00800000
-
-#define PTE_ENABLED 1
-#define PTE_DISABLED 0
-
-#define PTE_SHARED (1 << 1)
-#define PTE_NOT_SHARED 0
-
-#define PTE_CB_UNCACHEABLE 0
-#define PTE_CB_DEVICE 1
-#define PTE_CB_CACHEABLE_WB 2
-#define PTE_CB_CACHEABLE_WT 3
-
-#define PTE_SZ_4KB (0 << 3)
-#define PTE_SZ_64KB (1 << 3)
-#define PTE_SZ_1MB (2 << 3)
-#define PTE_SZ_512MB (3 << 3)
-
-#define PTE_PRR (1 << 6)
-#define PTE_PRX (1 << 7)
-#define PTE_PRW (1 << 8)
-#define PTE_PRU (1 << 9)
-
-#define SR_MMU_BIT 31
-#define SR_BL_BIT 28
-
-#define ALIGN_4KB (0xfff)
-#define ALIGN_1MB (0xfffff)
-#define ALIGN_512MB (0x1fffffff)
-
-#define DYNACON_BASE 0x0f000000
-#define DM_CB_DLINK_BASE 0x0c000000
-#define DM_DB_DLINK_BASE 0x0b000000
-
-#define FEMI_AREA_0 0x00000000
-#define FEMI_AREA_1 0x04000000
-#define FEMI_AREA_2 0x05000000
-#define FEMI_AREA_3 0x06000000
-#define FEMI_AREA_4 0x07000000
-#define FEMI_CB 0x08000000
-
-#define EMI_BASE 0X80000000
-
-#define DMA_BASE 0X0e000000
-
-#define CPU_BASE 0X0d000000
-
-#define PERIPH_BASE 0X09000000
-#define DMAC_BASE 0x0e000000
-#define INTC_BASE 0x0a000000
-#define CPRC_BASE 0x0a010000
-#define TMU_BASE 0x0a020000
-#define SCIF_BASE 0x0a030000
-#define RTC_BASE 0x0a040000
-
-
-
-#define LOAD_CONST32(val, reg) \
- movi ((val) >> 16) & 65535, reg; \
- shori (val) & 65535, reg
-
-#define LOAD_PTEH_VAL(sym, align, bits, scratch_reg, reg) \
- LOAD_ADDR (sym, reg); \
- LOAD_CONST32 ((align), scratch_reg); \
- andc reg, scratch_reg, reg; \
- LOAD_CONST32 ((bits), scratch_reg); \
- or reg, scratch_reg, reg
-
-#define LOAD_PTEL_VAL(sym, align, bits, scratch_reg, reg) \
- LOAD_ADDR (sym, reg); \
- LOAD_CONST32 ((align), scratch_reg); \
- andc reg, scratch_reg, reg; \
- LOAD_CONST32 ((bits), scratch_reg); \
- or reg, scratch_reg, reg
-
-#define SET_PTE(pte_addr_reg, pteh_val_reg, ptel_val_reg) \
- putcfg pte_addr_reg, 0, r63; \
- putcfg pte_addr_reg, 1, ptel_val_reg; \
- putcfg pte_addr_reg, 0, pteh_val_reg
-
-#if __SH5__ == 64
- .section .text,"ax"
-#define LOAD_ADDR(sym, reg) \
- movi (sym >> 48) & 65535, reg; \
- shori (sym >> 32) & 65535, reg; \
- shori (sym >> 16) & 65535, reg; \
- shori sym & 65535, reg
-#else
- .mode SHmedia
- .section .text..SHmedia32,"ax"
-#define LOAD_ADDR(sym, reg) \
- movi (sym >> 16) & 65535, reg; \
- shori sym & 65535, reg
-#endif
- .global start
-start:
- LOAD_ADDR (_stack, r15)
-
-#ifdef MMU_SUPPORT
- ! Set up the VM using the MMU and caches
-
- ! .vm_ep is first instruction to execute
- ! after VM initialization
- pt/l .vm_ep, tr1
-
- ! Configure instruction cache (ICCR)
- movi 3, r2
- movi 0, r3
- LOAD_ADDR (ICCR_BASE, r1)
- putcfg r1, 0, r2
- putcfg r1, 1, r3
-
- ! movi 7, r2 ! write through
- ! Configure operand cache (OCCR)
- LOAD_ADDR (OCCR_BASE, r1)
- putcfg r1, 0, r2
- putcfg r1, 1, r3
-
- ! Disable all PTE translations
- LOAD_ADDR (MMUIR_BASE, r1)
- LOAD_ADDR (MMUDR_BASE, r2)
- movi 64, r3
- pt/l .disable_ptes_loop, tr0
-.disable_ptes_loop:
- putcfg r1, 0, r63
- putcfg r2, 0, r63
- addi r1, 16, r1
- addi r2, 16, r2
- addi r3, -1, r3
- bgt r3, r63, tr0
-
- LOAD_ADDR (MMUIR_BASE, r1)
-
- ! FEMI instruction mappings
- ! Area 0 - 1Mb cacheable at 0x00000000
- ! Area 1 - None
- ! Area 2 - 1Mb cacheable at 0x05000000
- ! - 1Mb cacheable at 0x05100000
- ! Area 3 - None
- ! Area 4 - None
-
- ! Map a 1Mb page for instructions at 0x00000000
- LOAD_PTEH_VAL (FEMI_AREA_0, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (FEMI_AREA_0, ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRX | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 1Mb page for instructions at 0x05000000
- addi r1, 16, r1
- LOAD_PTEH_VAL (FEMI_AREA_2, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (FEMI_AREA_2, ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRX | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 1Mb page for instructions at 0x05100000
- addi r1, 16, r1
- LOAD_PTEH_VAL ((FEMI_AREA_2+0x100000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL ((FEMI_AREA_2+0x100000), ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRX | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 512M page for instructions at EMI base
- addi r1, 16, r1
- LOAD_PTEH_VAL (EMI_BASE, ALIGN_512MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (EMI_BASE, ALIGN_512MB, PTE_CB_CACHEABLE_WB | PTE_SZ_512MB | PTE_PRX | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 4K page for instructions at DM_DB_DLINK_BASE
- addi r1, 16, r1
- LOAD_PTEH_VAL (DM_DB_DLINK_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (DM_DB_DLINK_BASE, ALIGN_4KB, PTE_CB_CACHEABLE_WB | PTE_SZ_4KB | PTE_PRX | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- LOAD_ADDR (MMUDR_BASE, r1)
-
- ! FEMI data mappings
- ! Area 0 - 1Mb cacheable at 0x00000000
- ! Area 1 - 1Mb device at 0x04000000
- ! Area 2 - 1Mb cacheable at 0x05000000
- ! - 1Mb cacheable at 0x05100000
- ! Area 3 - None
- ! Area 4 - None
- ! CB - 1Mb device at 0x08000000
-
- ! Map a 1Mb page for data at 0x00000000
- LOAD_PTEH_VAL (FEMI_AREA_0, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (FEMI_AREA_0, ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 1Mb page for data at 0x04000000
- addi r1, 16, r1
- LOAD_PTEH_VAL (FEMI_AREA_1, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (FEMI_AREA_1, ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 1Mb page for data at 0x05000000
- addi r1, 16, r1
- LOAD_PTEH_VAL (FEMI_AREA_2, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (FEMI_AREA_2, ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 1Mb page for data at 0x05100000
- addi r1, 16, r1
- LOAD_PTEH_VAL ((FEMI_AREA_2+0x100000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL ((FEMI_AREA_2+0x100000), ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 4K page for registers at 0x08000000
- addi r1, 16, r1
- LOAD_PTEH_VAL (FEMI_CB, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (FEMI_CB, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 512M page for data at EMI
- addi r1, 16, r1
- LOAD_PTEH_VAL (EMI_BASE, ALIGN_512MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (EMI_BASE, ALIGN_512MB, PTE_CB_CACHEABLE_WB | PTE_SZ_512MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 4K page for DYNACON at DYNACON_BASE
- addi r1, 16, r1
- LOAD_PTEH_VAL (DYNACON_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (DYNACON_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 4K page for instructions at DM_DB_DLINK_BASE
- addi r1, 16, r1
- LOAD_PTEH_VAL (DM_DB_DLINK_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (DM_DB_DLINK_BASE, ALIGN_4KB, PTE_CB_CACHEABLE_WB | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 4K page for data at DM_DB_DLINK_BASE+0x1000
- addi r1, 16, r1
- LOAD_PTEH_VAL ((DM_DB_DLINK_BASE+0x1000), ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL ((DM_DB_DLINK_BASE+0x1000), ALIGN_4KB, PTE_CB_UNCACHEABLE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 4K page for stack DM_DB_DLINK_BASE+0x2000
- addi r1, 16, r1
- LOAD_PTEH_VAL ((DM_DB_DLINK_BASE+0x2000), ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL ((DM_DB_DLINK_BASE+0x2000), ALIGN_4KB, PTE_CB_CACHEABLE_WB | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK
- ! 0x0c000000 - 0x0c0fffff
- addi r1, 16, r1
- LOAD_PTEH_VAL (DM_CB_DLINK_BASE, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (DM_CB_DLINK_BASE, ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK
- ! 0x0c100000 - 0x0c1fffff
- addi r1, 16, r1
- LOAD_PTEH_VAL ((DM_CB_DLINK_BASE+0x100000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL ((DM_CB_DLINK_BASE+0x100000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK
- ! 0x0c200000 - 0x0c2fffff
- addi r1, 16, r1
- LOAD_PTEH_VAL ((DM_CB_DLINK_BASE+0x200000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL ((DM_CB_DLINK_BASE+0x200000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK
- ! 0x0c400000 - 0x0c4fffff
- addi r1, 16, r1
- LOAD_PTEH_VAL ((DM_CB_DLINK_BASE+0x400000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL ((DM_CB_DLINK_BASE+0x400000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK
- ! 0x0c800000 - 0x0c8fffff
- addi r1, 16, r1
- LOAD_PTEH_VAL ((DM_CB_DLINK_BASE+0x800000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL ((DM_CB_DLINK_BASE+0x800000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map a 4K page for DMA control registers
- addi r1, 16, r1
- LOAD_PTEH_VAL (DMA_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (DMA_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map lots of 4K pages for peripherals
-
- ! /* peripheral */
- addi r1, 16, r1
- LOAD_PTEH_VAL (PERIPH_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (PERIPH_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
- ! /* dmac */
- addi r1, 16, r1
- LOAD_PTEH_VAL (DMAC_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (DMAC_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
- ! /* intc */
- addi r1, 16, r1
- LOAD_PTEH_VAL (INTC_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (INTC_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
- ! /* rtc */
- addi r1, 16, r1
- LOAD_PTEH_VAL (RTC_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (RTC_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
- ! /* dmac */
- addi r1, 16, r1
- LOAD_PTEH_VAL (TMU_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (TMU_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
- ! /* scif */
- addi r1, 16, r1
- LOAD_PTEH_VAL (SCIF_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (SCIF_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
- ! /* cprc */
- addi r1, 16, r1
- LOAD_PTEH_VAL (CPRC_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (CPRC_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Map CPU WPC registers
- addi r1, 16, r1
- LOAD_PTEH_VAL (CPU_BASE, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL (CPU_BASE, ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
- addi r1, 16, r1
-
- LOAD_PTEH_VAL ((CPU_BASE+0x100000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL ((CPU_BASE+0x100000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- addi r1, 16, r1
- LOAD_PTEH_VAL ((CPU_BASE+0x200000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL ((CPU_BASE+0x200000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- addi r1, 16, r1
- LOAD_PTEH_VAL ((CPU_BASE+0x400000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
- LOAD_PTEL_VAL ((CPU_BASE+0x400000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
- SET_PTE (r1, r2, r3)
-
- ! Switch over to virtual addressing and enabled cache
- getcon sr, r1
- movi 1, r2
- shlli r2, SR_BL_BIT, r2
- or r1, r2, r1
- putcon r1, ssr
- getcon sr, r1
- movi 1, r2
- shlli r2, SR_MMU_BIT, r2
- or r1, r2, r1
- putcon r1, ssr
- gettr tr1, r1
- putcon r1, spc
- synco
- rte
-
- ! VM entry point. From now on, we are in VM mode.
-.vm_ep:
-
- ! Install the trap handler, by seeding vbr with the
- ! correct value, and by assigning sr.bl = 0.
-
- LOAD_ADDR (vbr_start, r1)
- putcon r1, vbr
- movi ~(1<<28), r1
- getcon sr, r2
- and r1, r2, r2
- putcon r2, sr
-#endif /* MMU_SUPPORT */
-
- pt/l .Lzero_bss_loop, tr0
- pt/l _init, tr5
- pt/l ___setup_argv_and_call_main, tr6
- pt/l _exit, tr7
-
- ! zero out bss
- LOAD_ADDR (_edata, r0)
- LOAD_ADDR (_end, r1)
-.Lzero_bss_loop:
- stx.q r0, r63, r63
- addi r0, 8, r0
- bgt/l r1, r0, tr0
-
- LOAD_ADDR (___data, r26)
- LOAD_ADDR (___rodata, r27)
-
-#ifdef __SH_FPU_ANY__
- getcon sr, r0
- ! enable the FP unit, by resetting SR.FD
- ! also zero out SR.FR, SR.SZ and SR.PR, as mandated by the ABI
- movi 0, r1
- shori 0xf000, r1
- andc r0, r1, r0
- putcon r0, sr
-#if __SH5__ == 32
- pt/l ___set_fpscr, tr0
- movi 0, r4
- blink tr0, r18
-#endif
-#endif
-
- ! arrange for exit to call fini
- pt/l _atexit, tr1
- LOAD_ADDR (_fini, r2)
- blink tr1, r18
-
- ! call init
- blink tr5, r18
-
- ! call the mainline
- blink tr6, r18
-
- ! call exit
- blink tr7, r18
- ! We should never return from _exit but in case we do we would enter the
- ! the following tight loop. This avoids executing any data that might follow.
-limbo:
- pt/l limbo, tr0
- blink tr0, r63
-
-#ifdef MMU_SUPPORT
- ! All these traps are handled in the same place.
- .balign 256
-vbr_start:
- pt/l handler, tr0 ! tr0 trashed.
- blink tr0, r63
- .balign 256
-vbr_100:
- pt/l handler, tr0 ! tr0 trashed.
- blink tr0, r63
-vbr_100_end:
- .balign 256
-vbr_200:
- pt/l handler, tr0 ! tr0 trashed.
- blink tr0, r63
- .balign 256
-vbr_300:
- pt/l handler, tr0 ! tr0 trashed.
- blink tr0, r63
- .balign 256
-vbr_400: ! Should be at vbr+0x400
-handler:
- /* If the trap handler is there call it */
- LOAD_ADDR (__superh_trap_handler, r2)
- pta chandler,tr2
- beq r2, r63, tr2 /* If zero, ie not present branch around to chandler */
- /* Now call the trap handler with as much of the context unchanged as possible.
- Move trapping address into R18 to make it look like the trap point */
- getcon spc, r18
- pt/l __superh_trap_handler, tr0
- blink tr0, r7
-chandler:
- getcon spc, r62
- getcon expevt, r2
- pt/l _exit, tr0
- blink tr0, r63
-
- /* Simulated trap handler */
- .section .text..SHmedia32,"ax"
-gcc2_compiled.:
- .section .debug_abbrev
-.Ldebug_abbrev0:
- .section .text..SHmedia32
-.Ltext0:
- .section .debug_info
-.Ldebug_info0:
- .section .debug_line
-.Ldebug_line0:
- .section .text..SHmedia32,"ax"
- .align 5
- .global __superh_trap_handler
- .type __superh_trap_handler,@function
-__superh_trap_handler:
-.LFB1:
- ptabs r18, tr0
- addi.l r15, -8, r15
- st.l r15, 4, r14
- addi.l r15, -8, r15
- add.l r15, r63, r14
- st.l r14, 0, r2
- ptabs r7, tr0
- addi.l r14, 8, r14
- add.l r14, r63, r15
- ld.l r15, 4, r14
- addi.l r15, 8, r15
- blink tr0, r63
-.LFE1:
-.Lfe1:
- .size __superh_trap_handler,.Lfe1-__superh_trap_handler
-
- .section .text..SHmedia32
-.Letext0:
-
- .section .debug_info
- .ualong 0xa7
- .uaword 0x2
- .ualong .Ldebug_abbrev0
- .byte 0x4
- .byte 0x1
- .ualong .Ldebug_line0
- .ualong .Letext0
- .ualong .Ltext0
- .string "trap_handler.c"
-
- .string "xxxxxxxxxxxxxxxxxxxxxxxxxxxx"
-
- .string "GNU C 2.97-sh5-010522"
-
- .byte 0x1
- .byte 0x2
- .ualong 0x9a
- .byte 0x1
- .string "_superh_trap_handler"
-
- .byte 0x1
- .byte 0x2
- .byte 0x1
- .ualong .LFB1
- .ualong .LFE1
- .byte 0x1
- .byte 0x5e
- .byte 0x3
- .string "trap_reason"
-
- .byte 0x1
- .byte 0x1
- .ualong 0x9a
- .byte 0x2
- .byte 0x91
- .byte 0x0
- .byte 0x0
- .byte 0x4
- .string "unsigned int"
-
- .byte 0x4
- .byte 0x7
- .byte 0x0
-
- .section .debug_abbrev
- .byte 0x1
- .byte 0x11
- .byte 0x1
- .byte 0x10
- .byte 0x6
- .byte 0x12
- .byte 0x1
- .byte 0x11
- .byte 0x1
- .byte 0x3
- .byte 0x8
- .byte 0x1b
- .byte 0x8
- .byte 0x25
- .byte 0x8
- .byte 0x13
- .byte 0xb
- .byte 0,0
- .byte 0x2
- .byte 0x2e
- .byte 0x1
- .byte 0x1
- .byte 0x13
- .byte 0x3f
- .byte 0xc
- .byte 0x3
- .byte 0x8
- .byte 0x3a
- .byte 0xb
- .byte 0x3b
- .byte 0xb
- .byte 0x27
- .byte 0xc
- .byte 0x11
- .byte 0x1
- .byte 0x12
- .byte 0x1
- .byte 0x40
- .byte 0xa
- .byte 0,0
- .byte 0x3
- .byte 0x5
- .byte 0x0
- .byte 0x3
- .byte 0x8
- .byte 0x3a
- .byte 0xb
- .byte 0x3b
- .byte 0xb
- .byte 0x49
- .byte 0x13
- .byte 0x2
- .byte 0xa
- .byte 0,0
- .byte 0x4
- .byte 0x24
- .byte 0x0
- .byte 0x3
- .byte 0x8
- .byte 0xb
- .byte 0xb
- .byte 0x3e
- .byte 0xb
- .byte 0,0
- .byte 0
-
- .section .debug_pubnames
- .ualong 0x27
- .uaword 0x2
- .ualong .Ldebug_info0
- .ualong 0xab
- .ualong 0x5b
- .string "_superh_trap_handler"
-
- .ualong 0x0
-
- .section .debug_aranges
- .ualong 0x1c
- .uaword 0x2
- .ualong .Ldebug_info0
- .byte 0x4
- .byte 0x0
- .uaword 0x0,0
- .ualong .Ltext0
- .ualong .Letext0-.Ltext0
- .ualong 0x0
- .ualong 0x0
- .ident "GCC: (GNU) 2.97-sh5-010522"
-#endif /* MMU_SUPPORT */
-#else /* ! __SH5__ */
-
- ! make a place to keep any previous value of the vbr register
- ! this will only have a value if it has been set by redboot (for example)
- .section .bss
-old_vbr:
- .long 0
-#ifdef PROFILE
-profiling_enabled:
- .long 0
-#endif
-
-
- .section .text
- .global start
- .import ___rtos_profiler_start_timer
- .weak ___rtos_profiler_start_timer
-start:
- mov.l stack_k,r15
-
-#if defined (__SH3__) || (defined (__SH_FPU_ANY__) && ! defined (__SH2A__)) || defined (__SH4_NOFPU__)
-#define VBR_SETUP
- ! before zeroing the bss ...
- ! if the vbr is already set to vbr_start then the program has been restarted
- ! (i.e. it is not the first time the program has been run since reset)
- ! reset the vbr to its old value before old_vbr (in bss) is wiped
- ! this ensures that the later code does not create a circular vbr chain
- stc vbr, r1
- mov.l vbr_start_k, r2
- cmp/eq r1, r2
- bf 0f
- ! reset the old vbr value
- mov.l old_vbr_k, r1
- mov.l @r1, r2
- ldc r2, vbr
-0:
-#endif /* VBR_SETUP */
-
- ! zero out bss
- mov.l edata_k,r0
- mov.l end_k,r1
- mov #0,r2
-start_l:
- mov.l r2,@r0
- add #4,r0
- cmp/ge r0,r1
- bt start_l
-
-#if defined (__SH_FPU_ANY__)
- mov.l set_fpscr_k, r1
- mov #4,r4
- jsr @r1
- shll16 r4 ! Set DN bit (flush denormal inputs to zero)
- lds r3,fpscr ! Switch to default precision
-#endif /* defined (__SH_FPU_ANY__) */
-
-#ifdef VBR_SETUP
- ! save the existing contents of the vbr
- ! there will only be a prior value when using something like redboot
- ! otherwise it will be zero
- stc vbr, r1
- mov.l old_vbr_k, r2
- mov.l r1, @r2
- ! setup vbr
- mov.l vbr_start_k, r1
- ldc r1,vbr
-#endif /* VBR_SETUP */
-
- ! if an rtos is exporting a timer start fn,
- ! then pick up an SR which does not enable ints
- ! (the rtos will take care of this)
- mov.l rtos_start_fn, r0
- mov.l sr_initial_bare, r1
- tst r0, r0
- bt set_sr
-
- mov.l sr_initial_rtos, r1
-
-set_sr:
- ! Set status register (sr)
- ldc r1, sr
-
- ! arrange for exit to call fini
- mov.l atexit_k,r0
- mov.l fini_k,r4
- jsr @r0
- nop
-
-#ifdef PROFILE
- ! arrange for exit to call _mcleanup (via stop_profiling)
- mova stop_profiling,r0
- mov.l atexit_k,r1
- jsr @r1
- mov r0, r4
-
- ! Call profiler startup code
- mov.l monstartup_k, r0
- mov.l start_k, r4
- mov.l etext_k, r5
- jsr @r0
- nop
-
- ! enable profiling trap
- ! until now any trap 33s will have been ignored
- ! This means that all library functions called before this point
- ! (directly or indirectly) may have the profiling trap at the start.
- ! Therefore, only mcount itself may not have the extra header.
- mov.l profiling_enabled_k2, r0
- mov #1, r1
- mov.l r1, @r0
-#endif /* PROFILE */
-
- ! call init
- mov.l init_k,r0
- jsr @r0
- nop
-
- ! call the mainline
- mov.l main_k,r0
- jsr @r0
- nop
-
- ! call exit
- mov r0,r4
- mov.l exit_k,r0
- jsr @r0
- nop
-
- .balign 4
-#ifdef PROFILE
-stop_profiling:
- # stop mcount counting
- mov.l profiling_enabled_k2, r0
- mov #0, r1
- mov.l r1, @r0
-
- # call mcleanup
- mov.l mcleanup_k, r0
- jmp @r0
- nop
-
- .balign 4
-mcleanup_k:
- .long __mcleanup
-monstartup_k:
- .long ___monstartup
-profiling_enabled_k2:
- .long profiling_enabled
-start_k:
- .long _start
-etext_k:
- .long __etext
-#endif /* PROFILE */
-
- .align 2
-#if defined (__SH_FPU_ANY__)
-set_fpscr_k:
- .long ___set_fpscr
-#endif /* defined (__SH_FPU_ANY__) */
-
-stack_k:
- .long _stack
-edata_k:
- .long _edata
-end_k:
- .long _end
-main_k:
- .long ___setup_argv_and_call_main
-exit_k:
- .long _exit
-atexit_k:
- .long _atexit
-init_k:
- .long _init
-fini_k:
- .long _fini
-#ifdef VBR_SETUP
-old_vbr_k:
- .long old_vbr
-vbr_start_k:
- .long vbr_start
-#endif /* VBR_SETUP */
-
-sr_initial_rtos:
- ! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
- ! Whether profiling or not, keep interrupts masked,
- ! the RTOS will enable these if required.
- .long 0x600000f1
-
-rtos_start_fn:
- .long ___rtos_profiler_start_timer
-
-#ifdef PROFILE
-sr_initial_bare:
- ! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
- ! For bare machine, we need to enable interrupts to get profiling working
- .long 0x60000001
-#else
-
-sr_initial_bare:
- ! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
- ! Keep interrupts disabled - the application will enable as required.
- .long 0x600000f1
-#endif
-
- ! supplied for backward compatibility only, in case of linking
- ! code whose main() was compiled with an older version of GCC.
- .global ___main
-___main:
- rts
- nop
-#ifdef VBR_SETUP
-! Exception handlers
- .section .text.vbr, "ax"
-vbr_start:
-
- .org 0x100
-vbr_100:
-#ifdef PROFILE
- ! Note on register usage.
- ! we use r0..r3 as scratch in this code. If we are here due to a trapa for profiling
- ! then this is OK as we are just before executing any function code.
- ! The other r4..r7 we save explicityl on the stack
- ! Remaining registers are saved by normal ABI conventions and we assert we do not
- ! use floating point registers.
- mov.l expevt_k1, r1
- mov.l @r1, r1
- mov.l event_mask, r0
- and r0,r1
- mov.l trapcode_k, r2
- cmp/eq r1,r2
- bt 1f
- bra handler_100 ! if not a trapa, go to default handler
- nop
-1:
- mov.l trapa_k, r0
- mov.l @r0, r0
- shlr2 r0 ! trapa code is shifted by 2.
- cmp/eq #33, r0
- bt 2f
- bra handler_100
- nop
-2:
-
- ! If here then it looks like we have trap #33
- ! Now we need to call mcount with the following convention
- ! Save and restore r4..r7
- mov.l r4,@-r15
- mov.l r5,@-r15
- mov.l r6,@-r15
- mov.l r7,@-r15
- sts.l pr,@-r15
-
- ! r4 is frompc.
- ! r5 is selfpc
- ! r0 is the branch back address.
- ! The code sequence emitted by gcc for the profiling trap is
- ! .align 2
- ! trapa #33
- ! .align 2
- ! .long lab Where lab is planted by the compiler. This is the address
- ! of a datum that needs to be incremented.
- sts pr, r4 ! frompc
- stc spc, r5 ! selfpc
- mov #2, r2
- not r2, r2 ! pattern to align to 4
- and r2, r5 ! r5 now has aligned address
-! add #4, r5 ! r5 now has address of address
- mov r5, r2 ! Remember it.
-! mov.l @r5, r5 ! r5 has value of lable (lab in above example)
- add #8, r2
- ldc r2, spc ! our return address avoiding address word
-
- ! only call mcount if profiling is enabled
- mov.l profiling_enabled_k, r0
- mov.l @r0, r0
- cmp/eq #0, r0
- bt 3f
- ! call mcount
- mov.l mcount_k, r2
- jsr @r2
- nop
-3:
- lds.l @r15+,pr
- mov.l @r15+,r7
- mov.l @r15+,r6
- mov.l @r15+,r5
- mov.l @r15+,r4
- rte
- nop
- .balign 4
-event_mask:
- .long 0xfff
-trapcode_k:
- .long 0x160
-expevt_k1:
- .long 0xff000024 ! Address of expevt
-trapa_k:
- .long 0xff000020
-mcount_k:
- .long __call_mcount
-profiling_enabled_k:
- .long profiling_enabled
-#endif
- ! Non profiling case.
-handler_100:
- mov.l 2f, r0 ! load the old vbr setting (if any)
- mov.l @r0, r0
- cmp/eq #0, r0
- bf 1f
- ! no previous vbr - jump to own generic handler
- bra handler
- nop
-1: ! there was a previous handler - chain them
- add #0x7f, r0 ! 0x7f
- add #0x7f, r0 ! 0xfe
- add #0x2, r0 ! add 0x100 without corrupting another register
- jmp @r0
- nop
- .balign 4
-2:
- .long old_vbr
-
- .org 0x400
-vbr_400: ! Should be at vbr+0x400
- mov.l 2f, r0 ! load the old vbr setting (if any)
- mov.l @r0, r0
- cmp/eq #0, r0
- ! no previous vbr - jump to own generic handler
- bt handler
- ! there was a previous handler - chain them
- rotcr r0
- rotcr r0
- add #0x7f, r0 ! 0x1fc
- add #0x7f, r0 ! 0x3f8
- add #0x02, r0 ! 0x400
- rotcl r0
- rotcl r0 ! Add 0x400 without corrupting another register
- jmp @r0
- nop
- .balign 4
-2:
- .long old_vbr
-handler:
- /* If the trap handler is there call it */
- mov.l superh_trap_handler_k, r0
- cmp/eq #0, r0 ! True if zero.
- bf 3f
- bra chandler
- nop
-3:
- ! Here handler available, call it.
- /* Now call the trap handler with as much of the context unchanged as possible.
- Move trapping address into PR to make it look like the trap point */
- stc spc, r1
- lds r1, pr
- mov.l expevt_k, r4
- mov.l @r4, r4 ! r4 is value of expevt, first parameter.
- mov r1, r5 ! Remember trapping pc.
- mov r1, r6 ! Remember trapping pc.
- mov.l chandler_k, r1
- mov.l superh_trap_handler_k, r2
- ! jmp to trap handler to avoid disturbing pr.
- jmp @r2
- nop
-
- .org 0x600
-vbr_600:
-#ifdef PROFILE
- ! Should be at vbr+0x600
- ! Now we are in the land of interrupts so need to save more state.
- ! Save register state
- mov.l interrupt_stack_k, r15 ! r15 has been saved to sgr.
- mov.l r0,@-r15
- mov.l r1,@-r15
- mov.l r2,@-r15
- mov.l r3,@-r15
- mov.l r4,@-r15
- mov.l r5,@-r15
- mov.l r6,@-r15
- mov.l r7,@-r15
- sts.l pr,@-r15
- sts.l mach,@-r15
- sts.l macl,@-r15
-#if defined(__SH_FPU_ANY__)
- ! Save fpul and fpscr, save fr0-fr7 in 64 bit mode
- ! and set the pervading precision for the timer_handler
- mov #0,r0
- sts.l fpul,@-r15
- sts.l fpscr,@-r15
- lds r0,fpscr ! Clear fpscr
- fmov fr0,@-r15
- fmov fr1,@-r15
- fmov fr2,@-r15
- fmov fr3,@-r15
- mov.l pervading_precision_k,r0
- fmov fr4,@-r15
- fmov fr5,@-r15
- mov.l @r0,r0
- fmov fr6,@-r15
- fmov fr7,@-r15
- lds r0,fpscr
-#endif /* __SH_FPU_ANY__ */
- ! Pass interrupted pc to timer_handler as first parameter (r4).
- stc spc, r4
- mov.l timer_handler_k, r0
- jsr @r0
- nop
-#if defined(__SH_FPU_ANY__)
- mov #0,r0
- lds r0,fpscr ! Clear the fpscr
- fmov @r15+,fr7
- fmov @r15+,fr6
- fmov @r15+,fr5
- fmov @r15+,fr4
- fmov @r15+,fr3
- fmov @r15+,fr2
- fmov @r15+,fr1
- fmov @r15+,fr0
- lds.l @r15+,fpscr
- lds.l @r15+,fpul
-#endif /* __SH_FPU_ANY__ */
- lds.l @r15+,macl
- lds.l @r15+,mach
- lds.l @r15+,pr
- mov.l @r15+,r7
- mov.l @r15+,r6
- mov.l @r15+,r5
- mov.l @r15+,r4
- mov.l @r15+,r3
- mov.l @r15+,r2
- mov.l @r15+,r1
- mov.l @r15+,r0
- stc sgr, r15 ! Restore r15, destroyed by this sequence.
- rte
- nop
-#if defined(__SH_FPU_ANY__)
- .balign 4
-pervading_precision_k:
-#define CONCAT1(A,B) A##B
-#define CONCAT(A,B) CONCAT1(A,B)
- .long CONCAT(__USER_LABEL_PREFIX__,__fpscr_values)+4
-#endif
-#else
- mov.l 2f, r0 ! Load the old vbr setting (if any).
- mov.l @r0, r0
- cmp/eq #0, r0
- ! no previous vbr - jump to own handler
- bt chandler
- ! there was a previous handler - chain them
- rotcr r0
- rotcr r0
- add #0x7f, r0 ! 0x1fc
- add #0x7f, r0 ! 0x3f8
- add #0x7f, r0 ! 0x5f4
- add #0x03, r0 ! 0x600
- rotcl r0
- rotcl r0 ! Add 0x600 without corrupting another register
- jmp @r0
- nop
- .balign 4
-2:
- .long old_vbr
-#endif /* PROFILE code */
-chandler:
- mov.l expevt_k, r4
- mov.l @r4, r4 ! r4 is value of expevt hence making this the return code
- mov.l handler_exit_k,r0
- jsr @r0
- nop
- ! We should never return from _exit but in case we do we would enter the
- ! the following tight loop
-limbo:
- bra limbo
- nop
- .balign 4
-#ifdef PROFILE
-interrupt_stack_k:
- .long __timer_stack ! The high end of the stack
-timer_handler_k:
- .long __profil_counter
-#endif
-expevt_k:
- .long 0xff000024 ! Address of expevt
-chandler_k:
- .long chandler
-superh_trap_handler_k:
- .long __superh_trap_handler
-handler_exit_k:
- .long _exit
- .align 2
-! Simulated compile of trap handler.
- .section .debug_abbrev,"",@progbits
-.Ldebug_abbrev0:
- .section .debug_info,"",@progbits
-.Ldebug_info0:
- .section .debug_line,"",@progbits
-.Ldebug_line0:
- .text
-.Ltext0:
- .align 5
- .type __superh_trap_handler,@function
-__superh_trap_handler:
-.LFB1:
- mov.l r14,@-r15
-.LCFI0:
- add #-4,r15
-.LCFI1:
- mov r15,r14
-.LCFI2:
- mov.l r4,@r14
- lds r1, pr
- add #4,r14
- mov r14,r15
- mov.l @r15+,r14
- rts
- nop
-.LFE1:
-.Lfe1:
- .size __superh_trap_handler,.Lfe1-__superh_trap_handler
- .section .debug_frame,"",@progbits
-.Lframe0:
- .ualong .LECIE0-.LSCIE0
-.LSCIE0:
- .ualong 0xffffffff
- .byte 0x1
- .string ""
- .uleb128 0x1
- .sleb128 -4
- .byte 0x11
- .byte 0xc
- .uleb128 0xf
- .uleb128 0x0
- .align 2
-.LECIE0:
-.LSFDE0:
- .ualong .LEFDE0-.LASFDE0
-.LASFDE0:
- .ualong .Lframe0
- .ualong .LFB1
- .ualong .LFE1-.LFB1
- .byte 0x4
- .ualong .LCFI0-.LFB1
- .byte 0xe
- .uleb128 0x4
- .byte 0x4
- .ualong .LCFI1-.LCFI0
- .byte 0xe
- .uleb128 0x8
- .byte 0x8e
- .uleb128 0x1
- .byte 0x4
- .ualong .LCFI2-.LCFI1
- .byte 0xd
- .uleb128 0xe
- .align 2
-.LEFDE0:
- .text
-.Letext0:
- .section .debug_info
- .ualong 0xb3
- .uaword 0x2
- .ualong .Ldebug_abbrev0
- .byte 0x4
- .uleb128 0x1
- .ualong .Ldebug_line0
- .ualong .Letext0
- .ualong .Ltext0
- .string "trap_handler.c"
- .string "xxxxxxxxxxxxxxxxxxxxxxxxxxxx"
- .string "GNU C 3.2 20020529 (experimental)"
- .byte 0x1
- .uleb128 0x2
- .ualong 0xa6
- .byte 0x1
- .string "_superh_trap_handler"
- .byte 0x1
- .byte 0x2
- .byte 0x1
- .ualong .LFB1
- .ualong .LFE1
- .byte 0x1
- .byte 0x5e
- .uleb128 0x3
- .string "trap_reason"
- .byte 0x1
- .byte 0x1
- .ualong 0xa6
- .byte 0x2
- .byte 0x91
- .sleb128 0
- .byte 0x0
- .uleb128 0x4
- .string "unsigned int"
- .byte 0x4
- .byte 0x7
- .byte 0x0
- .section .debug_abbrev
- .uleb128 0x1
- .uleb128 0x11
- .byte 0x1
- .uleb128 0x10
- .uleb128 0x6
- .uleb128 0x12
- .uleb128 0x1
- .uleb128 0x11
- .uleb128 0x1
- .uleb128 0x3
- .uleb128 0x8
- .uleb128 0x1b
- .uleb128 0x8
- .uleb128 0x25
- .uleb128 0x8
- .uleb128 0x13
- .uleb128 0xb
- .byte 0x0
- .byte 0x0
- .uleb128 0x2
- .uleb128 0x2e
- .byte 0x1
- .uleb128 0x1
- .uleb128 0x13
- .uleb128 0x3f
- .uleb128 0xc
- .uleb128 0x3
- .uleb128 0x8
- .uleb128 0x3a
- .uleb128 0xb
- .uleb128 0x3b
- .uleb128 0xb
- .uleb128 0x27
- .uleb128 0xc
- .uleb128 0x11
- .uleb128 0x1
- .uleb128 0x12
- .uleb128 0x1
- .uleb128 0x40
- .uleb128 0xa
- .byte 0x0
- .byte 0x0
- .uleb128 0x3
- .uleb128 0x5
- .byte 0x0
- .uleb128 0x3
- .uleb128 0x8
- .uleb128 0x3a
- .uleb128 0xb
- .uleb128 0x3b
- .uleb128 0xb
- .uleb128 0x49
- .uleb128 0x13
- .uleb128 0x2
- .uleb128 0xa
- .byte 0x0
- .byte 0x0
- .uleb128 0x4
- .uleb128 0x24
- .byte 0x0
- .uleb128 0x3
- .uleb128 0x8
- .uleb128 0xb
- .uleb128 0xb
- .uleb128 0x3e
- .uleb128 0xb
- .byte 0x0
- .byte 0x0
- .byte 0x0
- .section .debug_pubnames,"",@progbits
- .ualong 0x27
- .uaword 0x2
- .ualong .Ldebug_info0
- .ualong 0xb7
- .ualong 0x67
- .string "_superh_trap_handler"
- .ualong 0x0
- .section .debug_aranges,"",@progbits
- .ualong 0x1c
- .uaword 0x2
- .ualong .Ldebug_info0
- .byte 0x4
- .byte 0x0
- .uaword 0x0
- .uaword 0x0
- .ualong .Ltext0
- .ualong .Letext0-.Ltext0
- .ualong 0x0
- .ualong 0x0
-#endif /* VBR_SETUP */
-#endif /* ! __SH5__ */
diff --git a/gcc/config/sh/crti.asm b/gcc/config/sh/crti.asm
deleted file mode 100644
index ef5cd719d82..00000000000
--- a/gcc/config/sh/crti.asm
+++ /dev/null
@@ -1,125 +0,0 @@
-/* Copyright (C) 2000, 2001, 2009 Free Software Foundation, Inc.
- This file was adapted from glibc sources.
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify it
-under the terms of the GNU General Public License as published by the
-Free Software Foundation; either version 3, or (at your option) any
-later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-General Public License for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-
-/* The code in sections .init and .fini is supposed to be a single
- regular function. The function in .init is called directly from
- start in crt1.asm. The function in .fini is atexit()ed in crt1.asm
- too.
-
- crti.asm contributes the prologue of a function to these sections,
- and crtn.asm comes up the epilogue. STARTFILE_SPEC should list
- crti.o before any other object files that might add code to .init
- or .fini sections, and ENDFILE_SPEC should list crtn.o after any
- such object files. */
-
- .section .init
-/* The alignment below can't be smaller, otherwise the mova below
- breaks. Yes, we might align just the label, but then we'd be
- exchanging an alignment here for one there, since the code fragment
- below ensures 4-byte alignment on __ELF__. */
-#ifdef __ELF__
- .p2align 2
-#else
- .p2align 1
-#endif
- .global _init
-_init:
-#if __SHMEDIA__
- addi r15, -16, r15
- st.q r15, 8, r14
- st.q r15, 0, r18
- add r15, r63, r14
-#elif __SH5__ && ! __SHMEDIA__
- mov r15,r0
- add #-8,r15
- mov.l r14,@-r0
- sts.l pr,@-r0
- mov r15,r14
- nop
-#else
-#ifdef __ELF__
- mov.l r12,@-r15
- mova 0f,r0
- mov.l 0f,r12
-#endif
- mov.l r14,@-r15
-#ifdef __ELF__
- add r0,r12
-#endif
- sts.l pr,@-r15
-#ifdef __ELF__
- bra 1f
-#endif
- mov r15,r14
-#ifdef __ELF__
-0: .long _GLOBAL_OFFSET_TABLE_
-1:
-#endif
-#endif /* __SHMEDIA__ */
-
- .section .fini
-/* The alignment below can't be smaller, otherwise the mova below
- breaks. Yes, we might align just the label, but then we'd be
- exchanging an alignment here for one there, since the code fragment
- below ensures 4-byte alignment on __ELF__. */
-#ifdef __ELF__
- .p2align 2
-#else
- .p2align 1
-#endif
- .global _fini
-_fini:
-#if __SHMEDIA__
- addi r15, -16, r15
- st.q r15, 8, r14
- st.q r15, 0, r18
- add r15, r63, r14
-#elif __SH5__ && ! __SHMEDIA__
- mov r15,r0
- add #-8,r15
- mov.l r14,@-r0
- sts.l pr,@-r0
- mov r15,r14
- nop
-#else
-#ifdef __ELF__
- mov.l r12,@-r15
- mova 0f,r0
- mov.l 0f,r12
-#endif
- mov.l r14,@-r15
-#ifdef __ELF__
- add r0,r12
-#endif
- sts.l pr,@-r15
-#ifdef __ELF__
- bra 1f
-#endif
- mov r15,r14
-#ifdef __ELF__
-0: .long _GLOBAL_OFFSET_TABLE_
-1:
-#endif
-#endif /* __SHMEDIA__ */
diff --git a/gcc/config/sh/crtn.asm b/gcc/config/sh/crtn.asm
deleted file mode 100644
index 670d90f7b6a..00000000000
--- a/gcc/config/sh/crtn.asm
+++ /dev/null
@@ -1,77 +0,0 @@
-/* Copyright (C) 2000, 2001, 2009 Free Software Foundation, Inc.
- This file was adapted from glibc sources.
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify it
-under the terms of the GNU General Public License as published by the
-Free Software Foundation; either version 3, or (at your option) any
-later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-General Public License for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-/* See an explanation about .init and .fini in crti.asm. */
-
- .section .init
-#if __SHMEDIA__
- add r14, r63, r15
- ld.q r15, 0, r18
- ptabs r18, tr0
- ld.q r15, 8, r14
- addi r15, 16, r15
- blink tr0, r63
-#elif __SH5__ && ! __SHMEDIA__
- mov r14,r15
- lds.l @r14+,pr
- mov.l @r14,r14
- rts
- add #8,r15
-#else
- mov r14,r15
- lds.l @r15+,pr
- mov.l @r15+,r14
- rts
-#ifdef __ELF__
- mov.l @r15+,r12
-#else
- nop
-#endif
-#endif /* __SHMEDIA__ */
-
- .section .fini
-#if __SHMEDIA__
- add r14, r63, r15
- ld.q r15, 0, r18
- ptabs r18, tr0
- ld.q r15, 8, r14
- addi r15, 16, r15
- blink tr0, r63
-#elif __SH5__ && ! __SHMEDIA__
- mov r14,r15
- lds.l @r14+,pr
- mov.l @r14,r14
- rts
- add #8,r15
-#else
- mov r14,r15
- lds.l @r15+,pr
- mov.l @r15+,r14
- rts
-#ifdef __ELF__
- mov.l @r15+,r12
-#else
- nop
-#endif
-#endif /* __SHMEDIA__ */
diff --git a/gcc/config/sh/lib1funcs-4-300.asm b/gcc/config/sh/lib1funcs-4-300.asm
deleted file mode 100644
index b131877f121..00000000000
--- a/gcc/config/sh/lib1funcs-4-300.asm
+++ /dev/null
@@ -1,936 +0,0 @@
-/* Copyright (C) 2004, 2006, 2009 Free Software Foundation, Inc.
-
-This file is free software; you can redistribute it and/or modify it
-under the terms of the GNU General Public License as published by the
-Free Software Foundation; either version 3, or (at your option) any
-later version.
-
-This file is distributed in the hope that it will be useful, but
-WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-General Public License for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-
-/* libgcc routines for the STMicroelectronics ST40-300 CPU.
- Contributed by J"orn Rennecke joern.rennecke@st.com. */
-
-#include "lib1funcs.h"
-
-#if !__SHMEDIA__
-#ifdef L_div_table
-#if defined (__SH3__) || defined (__SH3E__) || defined (__SH4__) || defined (__SH4_SINGLE__) || defined (__SH4_SINGLE_ONLY__) || defined (__SH4_NOFPU__)
-/* This code used shld, thus is not suitable for SH1 / SH2. */
-
-/* Signed / unsigned division without use of FPU, optimized for SH4-300.
- Uses a lookup table for divisors in the range -128 .. +127, and
- div1 with case distinction for larger divisors in three more ranges.
- The code is lumped together with the table to allow the use of mova. */
-#ifdef __LITTLE_ENDIAN__
-#define L_LSB 0
-#define L_LSWMSB 1
-#define L_MSWLSB 2
-#else
-#define L_LSB 3
-#define L_LSWMSB 2
-#define L_MSWLSB 1
-#endif
-
- .global GLOBAL(udivsi3_i4i)
- .global GLOBAL(sdivsi3_i4i)
- FUNC(GLOBAL(udivsi3_i4i))
- FUNC(GLOBAL(sdivsi3_i4i))
-
- .balign 4
-LOCAL(div_ge8m): ! 10 cycles up to here
- rotcr r1 ! signed shift must use original sign from r4
- div0s r5,r4
- mov #24,r7
- shld r7,r6
- shad r0,r1
- rotcl r6
- div1 r5,r1
- swap.w r5,r0 ! detect -0x80000000 : 0x800000
- rotcl r6
- swap.w r4,r7
- div1 r5,r1
- swap.b r7,r7
- rotcl r6
- or r7,r0
- div1 r5,r1
- swap.w r0,r7
- rotcl r6
- or r7,r0
- div1 r5,r1
- add #-0x80,r0
- rotcl r6
- extu.w r0,r0
- div1 r5,r1
- neg r0,r0
- rotcl r6
- swap.w r0,r0
- div1 r5,r1
- mov.l @r15+,r7
- and r6,r0
- rotcl r6
- div1 r5,r1
- shll2 r0
- rotcl r6
- exts.b r0,r0
- div1 r5,r1
- swap.w r0,r0
- exts.w r0,r1
- exts.b r6,r0
- mov.l @r15+,r6
- rotcl r0
- rts
- sub r1,r0
- ! 31 cycles up to here
-
- .balign 4
-LOCAL(udiv_ge64k): ! 3 cycles up to here
- mov r4,r0
- shlr8 r0
- div0u
- cmp/hi r0,r5
- bt LOCAL(udiv_r8)
- mov.l r5,@-r15
- shll8 r5
- ! 7 cycles up to here
- .rept 8
- div1 r5,r0
- .endr
- extu.b r4,r1 ! 15 cycles up to here
- extu.b r0,r6
- xor r1,r0
- xor r6,r0
- swap.b r6,r6
- .rept 8
- div1 r5,r0
- .endr ! 25 cycles up to here
- extu.b r0,r0
- mov.l @r15+,r5
- or r6,r0
- mov.l @r15+,r6
- rts
- rotcl r0 ! 28 cycles up to here
-
- .balign 4
-LOCAL(udiv_r8): ! 6 cycles up to here
- mov.l r4,@-r15
- shll16 r4
- shll8 r4
- !
- shll r4
- mov r0,r1
- div1 r5,r1
- mov r4,r0
- rotcl r0
- mov.l @r15+,r4
- div1 r5,r1
- ! 12 cycles up to here
- .rept 6
- rotcl r0; div1 r5,r1
- .endr
- mov.l @r15+,r6 ! 24 cycles up to here
- rts
- rotcl r0
-
- .balign 4
-LOCAL(div_ge32k): ! 6 cycles up to here
- mov.l r7,@-r15
- swap.w r5,r6
- exts.b r6,r7
- exts.w r6,r6
- cmp/eq r6,r7
- extu.b r1,r6
- bf/s LOCAL(div_ge8m)
- cmp/hi r1,r4 ! copy sign bit of r4 into T
- rotcr r1 ! signed shift must use original sign from r4
- div0s r5,r4
- shad r0,r1
- shll8 r5
- div1 r5,r1
- mov r5,r7 ! detect r4 == 0x80000000 && r5 == 0x8000(00)
- div1 r5,r1
- shlr8 r7
- div1 r5,r1
- swap.w r4,r0
- div1 r5,r1
- swap.b r0,r0
- div1 r5,r1
- or r0,r7
- div1 r5,r1
- add #-80,r7
- div1 r5,r1
- swap.w r7,r0
- div1 r5,r1
- or r0,r7
- extu.b r1,r0
- xor r6,r1
- xor r0,r1
- exts.b r0,r0
- div1 r5,r1
- extu.w r7,r7
- div1 r5,r1
- neg r7,r7 ! upper 16 bit of r7 == 0 if r4 == 0x80000000 && r5 == 0x8000
- div1 r5,r1
- and r0,r7
- div1 r5,r1
- swap.w r7,r7 ! 26 cycles up to here.
- div1 r5,r1
- shll8 r0
- div1 r5,r1
- exts.w r7,r7
- div1 r5,r1
- add r0,r0
- div1 r5,r1
- sub r7,r0
- extu.b r1,r1
- mov.l @r15+,r7
- rotcl r1
- mov.l @r15+,r6
- add r1,r0
- mov #-8,r1
- rts
- shad r1,r5 ! 34 cycles up to here
-
- .balign 4
-GLOBAL(udivsi3_i4i):
- mov.l r6,@-r15
- extu.w r5,r6
- cmp/eq r5,r6
- mov #0x7f,r0
- bf LOCAL(udiv_ge64k)
- cmp/hi r0,r5
- bf LOCAL(udiv_le128)
- mov r4,r1
- shlr8 r1
- div0u
- shlr r1
- shll16 r6
- div1 r6,r1
- extu.b r4,r0 ! 7 cycles up to here
- .rept 8
- div1 r6,r1
- .endr ! 15 cycles up to here
- xor r1,r0 ! xor dividend with result lsb
- .rept 6
- div1 r6,r1
- .endr
- mov.l r7,@-r15 ! 21 cycles up to here
- div1 r6,r1
- extu.b r0,r7
- div1 r6,r1
- shll8 r7
- extu.w r1,r0
- xor r7,r1 ! replace lsb of result with lsb of dividend
- div1 r6,r1
- mov #0,r7
- div1 r6,r1
- !
- div1 r6,r1
- bra LOCAL(div_end)
- div1 r6,r1 ! 28 cycles up to here
-
- /* This is link-compatible with a GLOBAL(sdivsi3) call,
- but we effectively clobber only r1, macl and mach */
- /* Because negative quotients are calculated as one's complements,
- -0x80000000 divided by the smallest positive number of a number
- range (0x80, 0x8000, 0x800000) causes saturation in the one's
- complement representation, and we have to suppress the
- one's -> two's complement adjustment. Since positive numbers
- don't get such an adjustment, it's OK to also compute one's -> two's
- complement adjustment suppression for a dividend of 0. */
- .balign 4
-GLOBAL(sdivsi3_i4i):
- mov.l r6,@-r15
- exts.b r5,r6
- cmp/eq r5,r6
- mov #-1,r1
- bt/s LOCAL(div_le128)
- cmp/pz r4
- addc r4,r1
- exts.w r5,r6
- cmp/eq r5,r6
- mov #-7,r0
- bf/s LOCAL(div_ge32k)
- cmp/hi r1,r4 ! copy sign bit of r4 into T
- rotcr r1
- shll16 r6 ! 7 cycles up to here
- shad r0,r1
- div0s r5,r4
- div1 r6,r1
- mov.l r7,@-r15
- div1 r6,r1
- mov r4,r0 ! re-compute adjusted dividend
- div1 r6,r1
- mov #-31,r7
- div1 r6,r1
- shad r7,r0
- div1 r6,r1
- add r4,r0 ! adjusted dividend
- div1 r6,r1
- mov.l r8,@-r15
- div1 r6,r1
- swap.w r4,r8 ! detect special case r4 = 0x80000000, r5 = 0x80
- div1 r6,r1
- swap.b r8,r8
- xor r1,r0 ! xor dividend with result lsb
- div1 r6,r1
- div1 r6,r1
- or r5,r8
- div1 r6,r1
- add #-0x80,r8 ! r8 is 0 iff there is a match
- div1 r6,r1
- swap.w r8,r7 ! or upper 16 bits...
- div1 r6,r1
- or r7,r8 !...into lower 16 bits
- div1 r6,r1
- extu.w r8,r8
- div1 r6,r1
- extu.b r0,r7
- div1 r6,r1
- shll8 r7
- exts.w r1,r0
- xor r7,r1 ! replace lsb of result with lsb of dividend
- div1 r6,r1
- neg r8,r8 ! upper 16 bits of r8 are now 0xffff iff we want end adjm.
- div1 r6,r1
- and r0,r8
- div1 r6,r1
- swap.w r8,r7
- div1 r6,r1
- mov.l @r15+,r8 ! 58 insns, 29 cycles up to here
-LOCAL(div_end):
- div1 r6,r1
- shll8 r0
- div1 r6,r1
- exts.w r7,r7
- div1 r6,r1
- add r0,r0
- div1 r6,r1
- sub r7,r0
- extu.b r1,r1
- mov.l @r15+,r7
- rotcl r1
- mov.l @r15+,r6
- rts
- add r1,r0
-
- .balign 4
-LOCAL(udiv_le128): ! 4 cycles up to here (or 7 for mispredict)
- mova LOCAL(div_table_inv),r0
- shll2 r6
- mov.l @(r0,r6),r1
- mova LOCAL(div_table_clz),r0
- lds r4,mach
- !
- !
- !
- tst r1,r1
- !
- bt 0f
- dmulu.l r1,r4
-0: mov.b @(r0,r5),r1
- clrt
- !
- !
- sts mach,r0
- addc r4,r0
- rotcr r0
- mov.l @r15+,r6
- rts
- shld r1,r0
-
- .balign 4
-LOCAL(div_le128): ! 3 cycles up to here (or 6 for mispredict)
- mova LOCAL(div_table_inv),r0
- shll2 r6
- mov.l @(r0,r6),r1
- mova LOCAL(div_table_clz),r0
- neg r4,r6
- bf 0f
- mov r4,r6
-0: lds r6,mach
- tst r1,r1
- bt 0f
- dmulu.l r1,r6
-0: div0s r4,r5
- mov.b @(r0,r5),r1
- bt/s LOCAL(le128_neg)
- clrt
- !
- sts mach,r0
- addc r6,r0
- rotcr r0
- mov.l @r15+,r6
- rts
- shld r1,r0
-
-/* Could trap divide by zero for the cost of one cycle more mispredict penalty:
-...
- dmulu.l r1,r6
-0: div0s r4,r5
- bt/s LOCAL(le128_neg)
- tst r5,r5
- bt LOCAL(div_by_zero)
- mov.b @(r0,r5),r1
- sts mach,r0
- addc r6,r0
-...
-LOCAL(div_by_zero):
- trapa #
- .balign 4
-LOCAL(le128_neg):
- bt LOCAL(div_by_zero)
- mov.b @(r0,r5),r1
- sts mach,r0
- addc r6,r0
-... */
-
- .balign 4
-LOCAL(le128_neg):
- sts mach,r0
- addc r6,r0
- rotcr r0
- mov.l @r15+,r6
- shad r1,r0
- rts
- neg r0,r0
- ENDFUNC(GLOBAL(udivsi3_i4i))
- ENDFUNC(GLOBAL(sdivsi3_i4i))
-
-/* This table has been generated by divtab-sh4.c. */
- .balign 4
- .byte -7
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -2
- .byte -2
- .byte -2
- .byte -2
- .byte -1
- .byte -1
- .byte 0
-LOCAL(div_table_clz):
- .byte 0
- .byte 0
- .byte -1
- .byte -1
- .byte -2
- .byte -2
- .byte -2
- .byte -2
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
-/* 1/-128 .. 1/127, normalized. There is an implicit leading 1 in bit 32,
- or in bit 33 for powers of two. */
- .balign 4
- .long 0x0
- .long 0x2040811
- .long 0x4104105
- .long 0x624DD30
- .long 0x8421085
- .long 0xA6810A7
- .long 0xC9714FC
- .long 0xECF56BF
- .long 0x11111112
- .long 0x135C8114
- .long 0x15B1E5F8
- .long 0x18118119
- .long 0x1A7B9612
- .long 0x1CF06ADB
- .long 0x1F7047DD
- .long 0x21FB7813
- .long 0x24924925
- .long 0x27350B89
- .long 0x29E4129F
- .long 0x2C9FB4D9
- .long 0x2F684BDB
- .long 0x323E34A3
- .long 0x3521CFB3
- .long 0x38138139
- .long 0x3B13B13C
- .long 0x3E22CBCF
- .long 0x41414142
- .long 0x446F8657
- .long 0x47AE147B
- .long 0x4AFD6A06
- .long 0x4E5E0A73
- .long 0x51D07EAF
- .long 0x55555556
- .long 0x58ED2309
- .long 0x5C9882BA
- .long 0x60581606
- .long 0x642C8591
- .long 0x68168169
- .long 0x6C16C16D
- .long 0x702E05C1
- .long 0x745D1746
- .long 0x78A4C818
- .long 0x7D05F418
- .long 0x81818182
- .long 0x86186187
- .long 0x8ACB90F7
- .long 0x8F9C18FA
- .long 0x948B0FCE
- .long 0x9999999A
- .long 0x9EC8E952
- .long 0xA41A41A5
- .long 0xA98EF607
- .long 0xAF286BCB
- .long 0xB4E81B4F
- .long 0xBACF914D
- .long 0xC0E07039
- .long 0xC71C71C8
- .long 0xCD856891
- .long 0xD41D41D5
- .long 0xDAE6076C
- .long 0xE1E1E1E2
- .long 0xE9131AC0
- .long 0xF07C1F08
- .long 0xF81F81F9
- .long 0x0
- .long 0x4104105
- .long 0x8421085
- .long 0xC9714FC
- .long 0x11111112
- .long 0x15B1E5F8
- .long 0x1A7B9612
- .long 0x1F7047DD
- .long 0x24924925
- .long 0x29E4129F
- .long 0x2F684BDB
- .long 0x3521CFB3
- .long 0x3B13B13C
- .long 0x41414142
- .long 0x47AE147B
- .long 0x4E5E0A73
- .long 0x55555556
- .long 0x5C9882BA
- .long 0x642C8591
- .long 0x6C16C16D
- .long 0x745D1746
- .long 0x7D05F418
- .long 0x86186187
- .long 0x8F9C18FA
- .long 0x9999999A
- .long 0xA41A41A5
- .long 0xAF286BCB
- .long 0xBACF914D
- .long 0xC71C71C8
- .long 0xD41D41D5
- .long 0xE1E1E1E2
- .long 0xF07C1F08
- .long 0x0
- .long 0x8421085
- .long 0x11111112
- .long 0x1A7B9612
- .long 0x24924925
- .long 0x2F684BDB
- .long 0x3B13B13C
- .long 0x47AE147B
- .long 0x55555556
- .long 0x642C8591
- .long 0x745D1746
- .long 0x86186187
- .long 0x9999999A
- .long 0xAF286BCB
- .long 0xC71C71C8
- .long 0xE1E1E1E2
- .long 0x0
- .long 0x11111112
- .long 0x24924925
- .long 0x3B13B13C
- .long 0x55555556
- .long 0x745D1746
- .long 0x9999999A
- .long 0xC71C71C8
- .long 0x0
- .long 0x24924925
- .long 0x55555556
- .long 0x9999999A
- .long 0x0
- .long 0x55555556
- .long 0x0
- .long 0x0
-LOCAL(div_table_inv):
- .long 0x0
- .long 0x0
- .long 0x0
- .long 0x55555556
- .long 0x0
- .long 0x9999999A
- .long 0x55555556
- .long 0x24924925
- .long 0x0
- .long 0xC71C71C8
- .long 0x9999999A
- .long 0x745D1746
- .long 0x55555556
- .long 0x3B13B13C
- .long 0x24924925
- .long 0x11111112
- .long 0x0
- .long 0xE1E1E1E2
- .long 0xC71C71C8
- .long 0xAF286BCB
- .long 0x9999999A
- .long 0x86186187
- .long 0x745D1746
- .long 0x642C8591
- .long 0x55555556
- .long 0x47AE147B
- .long 0x3B13B13C
- .long 0x2F684BDB
- .long 0x24924925
- .long 0x1A7B9612
- .long 0x11111112
- .long 0x8421085
- .long 0x0
- .long 0xF07C1F08
- .long 0xE1E1E1E2
- .long 0xD41D41D5
- .long 0xC71C71C8
- .long 0xBACF914D
- .long 0xAF286BCB
- .long 0xA41A41A5
- .long 0x9999999A
- .long 0x8F9C18FA
- .long 0x86186187
- .long 0x7D05F418
- .long 0x745D1746
- .long 0x6C16C16D
- .long 0x642C8591
- .long 0x5C9882BA
- .long 0x55555556
- .long 0x4E5E0A73
- .long 0x47AE147B
- .long 0x41414142
- .long 0x3B13B13C
- .long 0x3521CFB3
- .long 0x2F684BDB
- .long 0x29E4129F
- .long 0x24924925
- .long 0x1F7047DD
- .long 0x1A7B9612
- .long 0x15B1E5F8
- .long 0x11111112
- .long 0xC9714FC
- .long 0x8421085
- .long 0x4104105
- .long 0x0
- .long 0xF81F81F9
- .long 0xF07C1F08
- .long 0xE9131AC0
- .long 0xE1E1E1E2
- .long 0xDAE6076C
- .long 0xD41D41D5
- .long 0xCD856891
- .long 0xC71C71C8
- .long 0xC0E07039
- .long 0xBACF914D
- .long 0xB4E81B4F
- .long 0xAF286BCB
- .long 0xA98EF607
- .long 0xA41A41A5
- .long 0x9EC8E952
- .long 0x9999999A
- .long 0x948B0FCE
- .long 0x8F9C18FA
- .long 0x8ACB90F7
- .long 0x86186187
- .long 0x81818182
- .long 0x7D05F418
- .long 0x78A4C818
- .long 0x745D1746
- .long 0x702E05C1
- .long 0x6C16C16D
- .long 0x68168169
- .long 0x642C8591
- .long 0x60581606
- .long 0x5C9882BA
- .long 0x58ED2309
- .long 0x55555556
- .long 0x51D07EAF
- .long 0x4E5E0A73
- .long 0x4AFD6A06
- .long 0x47AE147B
- .long 0x446F8657
- .long 0x41414142
- .long 0x3E22CBCF
- .long 0x3B13B13C
- .long 0x38138139
- .long 0x3521CFB3
- .long 0x323E34A3
- .long 0x2F684BDB
- .long 0x2C9FB4D9
- .long 0x29E4129F
- .long 0x27350B89
- .long 0x24924925
- .long 0x21FB7813
- .long 0x1F7047DD
- .long 0x1CF06ADB
- .long 0x1A7B9612
- .long 0x18118119
- .long 0x15B1E5F8
- .long 0x135C8114
- .long 0x11111112
- .long 0xECF56BF
- .long 0xC9714FC
- .long 0xA6810A7
- .long 0x8421085
- .long 0x624DD30
- .long 0x4104105
- .long 0x2040811
- /* maximum error: 0.987342 scaled: 0.921875*/
-
-#endif /* SH3 / SH4 */
-
-#endif /* L_div_table */
-#endif /* !__SHMEDIA__ */
diff --git a/gcc/config/sh/lib1funcs-Os-4-200.asm b/gcc/config/sh/lib1funcs-Os-4-200.asm
deleted file mode 100644
index aae57ccd36c..00000000000
--- a/gcc/config/sh/lib1funcs-Os-4-200.asm
+++ /dev/null
@@ -1,322 +0,0 @@
-/* Copyright (C) 2006, 2009 Free Software Foundation, Inc.
-
-This file is free software; you can redistribute it and/or modify it
-under the terms of the GNU General Public License as published by the
-Free Software Foundation; either version 3, or (at your option) any
-later version.
-
-This file is distributed in the hope that it will be useful, but
-WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-General Public License for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-/* Moderately Space-optimized libgcc routines for the Renesas SH /
- STMicroelectronics ST40 CPUs.
- Contributed by J"orn Rennecke joern.rennecke@st.com. */
-
-#include "lib1funcs.h"
-
-#if !__SHMEDIA__
-#ifdef L_udivsi3_i4i
-
-/* 88 bytes; sh4-200 cycle counts:
- divisor >= 2G: 11 cycles
- dividend < 2G: 48 cycles
- dividend >= 2G: divisor != 1: 54 cycles
- dividend >= 2G, divisor == 1: 22 cycles */
-#if defined (__SH_FPU_DOUBLE__) || defined (__SH4_SINGLE_ONLY__)
-!! args in r4 and r5, result in r0, clobber r1
-
- .global GLOBAL(udivsi3_i4i)
- FUNC(GLOBAL(udivsi3_i4i))
-GLOBAL(udivsi3_i4i):
- mova L1,r0
- cmp/pz r5
- sts fpscr,r1
- lds.l @r0+,fpscr
- sts.l fpul,@-r15
- bf LOCAL(huge_divisor)
- mov.l r1,@-r15
- lds r4,fpul
- cmp/pz r4
-#ifdef FMOVD_WORKS
- fmov.d dr0,@-r15
- float fpul,dr0
- fmov.d dr2,@-r15
- bt LOCAL(dividend_adjusted)
- mov #1,r1
- fmov.d @r0,dr2
- cmp/eq r1,r5
- bt LOCAL(div_by_1)
- fadd dr2,dr0
-LOCAL(dividend_adjusted):
- lds r5,fpul
- float fpul,dr2
- fdiv dr2,dr0
-LOCAL(div_by_1):
- fmov.d @r15+,dr2
- ftrc dr0,fpul
- fmov.d @r15+,dr0
-#else /* !FMOVD_WORKS */
- fmov.s DR01,@-r15
- mov #1,r1
- fmov.s DR00,@-r15
- float fpul,dr0
- fmov.s DR21,@-r15
- bt/s LOCAL(dividend_adjusted)
- fmov.s DR20,@-r15
- cmp/eq r1,r5
- bt LOCAL(div_by_1)
- fmov.s @r0+,DR20
- fmov.s @r0,DR21
- fadd dr2,dr0
-LOCAL(dividend_adjusted):
- lds r5,fpul
- float fpul,dr2
- fdiv dr2,dr0
-LOCAL(div_by_1):
- fmov.s @r15+,DR20
- fmov.s @r15+,DR21
- ftrc dr0,fpul
- fmov.s @r15+,DR00
- fmov.s @r15+,DR01
-#endif /* !FMOVD_WORKS */
- lds.l @r15+,fpscr
- sts fpul,r0
- rts
- lds.l @r15+,fpul
-
-#ifdef FMOVD_WORKS
- .p2align 3 ! make double below 8 byte aligned.
-#endif
-LOCAL(huge_divisor):
- lds r1,fpscr
- add #4,r15
- cmp/hs r5,r4
- rts
- movt r0
-
- .p2align 2
-L1:
-#ifndef FMOVD_WORKS
- .long 0x80000
-#else
- .long 0x180000
-#endif
- .double 4294967296
-
- ENDFUNC(GLOBAL(udivsi3_i4i))
-#elif !defined (__sh1__) /* !__SH_FPU_DOUBLE__ */
-
-#if 0
-/* With 36 bytes, the following would probably be the most compact
- implementation, but with 139 cycles on an sh4-200, it is extremely slow. */
-GLOBAL(udivsi3_i4i):
- mov.l r2,@-r15
- mov #0,r1
- div0u
- mov r1,r2
- mov.l r3,@-r15
- mov r1,r3
- sett
- mov r4,r0
-LOCAL(loop):
- rotcr r2
- ;
- bt/s LOCAL(end)
- cmp/gt r2,r3
- rotcl r0
- bra LOCAL(loop)
- div1 r5,r1
-LOCAL(end):
- rotcl r0
- mov.l @r15+,r3
- rts
- mov.l @r15+,r2
-#endif /* 0 */
-
-/* Size: 186 bytes jointly for udivsi3_i4i and sdivsi3_i4i
- sh4-200 run times:
- udiv small divisor: 55 cycles
- udiv large divisor: 52 cycles
- sdiv small divisor, positive result: 59 cycles
- sdiv large divisor, positive result: 56 cycles
- sdiv small divisor, negative result: 65 cycles (*)
- sdiv large divisor, negative result: 62 cycles (*)
- (*): r2 is restored in the rts delay slot and has a lingering latency
- of two more cycles. */
- .balign 4
- .global GLOBAL(udivsi3_i4i)
- FUNC(GLOBAL(udivsi3_i4i))
- FUNC(GLOBAL(sdivsi3_i4i))
-GLOBAL(udivsi3_i4i):
- sts pr,r1
- mov.l r4,@-r15
- extu.w r5,r0
- cmp/eq r5,r0
- swap.w r4,r0
- shlr16 r4
- bf/s LOCAL(large_divisor)
- div0u
- mov.l r5,@-r15
- shll16 r5
-LOCAL(sdiv_small_divisor):
- div1 r5,r4
- bsr LOCAL(div6)
- div1 r5,r4
- div1 r5,r4
- bsr LOCAL(div6)
- div1 r5,r4
- xtrct r4,r0
- xtrct r0,r4
- bsr LOCAL(div7)
- swap.w r4,r4
- div1 r5,r4
- bsr LOCAL(div7)
- div1 r5,r4
- xtrct r4,r0
- mov.l @r15+,r5
- swap.w r0,r0
- mov.l @r15+,r4
- jmp @r1
- rotcl r0
-LOCAL(div7):
- div1 r5,r4
-LOCAL(div6):
- div1 r5,r4; div1 r5,r4; div1 r5,r4
- div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
-
-LOCAL(divx3):
- rotcl r0
- div1 r5,r4
- rotcl r0
- div1 r5,r4
- rotcl r0
- rts
- div1 r5,r4
-
-LOCAL(large_divisor):
- mov.l r5,@-r15
-LOCAL(sdiv_large_divisor):
- xor r4,r0
- .rept 4
- rotcl r0
- bsr LOCAL(divx3)
- div1 r5,r4
- .endr
- mov.l @r15+,r5
- mov.l @r15+,r4
- jmp @r1
- rotcl r0
- ENDFUNC(GLOBAL(udivsi3_i4i))
-
- .global GLOBAL(sdivsi3_i4i)
-GLOBAL(sdivsi3_i4i):
- mov.l r4,@-r15
- cmp/pz r5
- mov.l r5,@-r15
- bt/s LOCAL(pos_divisor)
- cmp/pz r4
- neg r5,r5
- extu.w r5,r0
- bt/s LOCAL(neg_result)
- cmp/eq r5,r0
- neg r4,r4
-LOCAL(pos_result):
- swap.w r4,r0
- bra LOCAL(sdiv_check_divisor)
- sts pr,r1
-LOCAL(pos_divisor):
- extu.w r5,r0
- bt/s LOCAL(pos_result)
- cmp/eq r5,r0
- neg r4,r4
-LOCAL(neg_result):
- mova LOCAL(negate_result),r0
- ;
- mov r0,r1
- swap.w r4,r0
- lds r2,macl
- sts pr,r2
-LOCAL(sdiv_check_divisor):
- shlr16 r4
- bf/s LOCAL(sdiv_large_divisor)
- div0u
- bra LOCAL(sdiv_small_divisor)
- shll16 r5
- .balign 4
-LOCAL(negate_result):
- neg r0,r0
- jmp @r2
- sts macl,r2
- ENDFUNC(GLOBAL(sdivsi3_i4i))
-#endif /* !__SH_FPU_DOUBLE__ */
-#endif /* L_udivsi3_i4i */
-
-#ifdef L_sdivsi3_i4i
-#if defined (__SH_FPU_DOUBLE__) || defined (__SH4_SINGLE_ONLY__)
-/* 48 bytes, 45 cycles on sh4-200 */
-!! args in r4 and r5, result in r0, clobber r1
-
- .global GLOBAL(sdivsi3_i4i)
- FUNC(GLOBAL(sdivsi3_i4i))
-GLOBAL(sdivsi3_i4i):
- sts.l fpscr,@-r15
- sts fpul,r1
- mova L1,r0
- lds.l @r0+,fpscr
- lds r4,fpul
-#ifdef FMOVD_WORKS
- fmov.d dr0,@-r15
- float fpul,dr0
- lds r5,fpul
- fmov.d dr2,@-r15
-#else
- fmov.s DR01,@-r15
- fmov.s DR00,@-r15
- float fpul,dr0
- lds r5,fpul
- fmov.s DR21,@-r15
- fmov.s DR20,@-r15
-#endif
- float fpul,dr2
- fdiv dr2,dr0
-#ifdef FMOVD_WORKS
- fmov.d @r15+,dr2
-#else
- fmov.s @r15+,DR20
- fmov.s @r15+,DR21
-#endif
- ftrc dr0,fpul
-#ifdef FMOVD_WORKS
- fmov.d @r15+,dr0
-#else
- fmov.s @r15+,DR00
- fmov.s @r15+,DR01
-#endif
- lds.l @r15+,fpscr
- sts fpul,r0
- rts
- lds r1,fpul
-
- .p2align 2
-L1:
-#ifndef FMOVD_WORKS
- .long 0x80000
-#else
- .long 0x180000
-#endif
-
- ENDFUNC(GLOBAL(sdivsi3_i4i))
-#endif /* __SH_FPU_DOUBLE__ */
-#endif /* L_sdivsi3_i4i */
-#endif /* !__SHMEDIA__ */
diff --git a/gcc/config/sh/t-elf b/gcc/config/sh/t-elf
deleted file mode 100644
index 333efb54e09..00000000000
--- a/gcc/config/sh/t-elf
+++ /dev/null
@@ -1,10 +0,0 @@
-EXTRA_MULTILIB_PARTS= crt1.o crti.o crtn.o \
- crtbegin.o crtend.o crtbeginS.o crtendS.o $(IC_EXTRA_PARTS) $(OPT_EXTRA_PARTS)
-
-# Compile crtbeginS.o and crtendS.o with pic.
-CRTSTUFF_T_CFLAGS_S = -fPIC
-
-# Don't compile libgcc with -fpic for now. It's unlikely that we'll
-# build shared libraries for embedded SH.
-# Linux / Netbsd will already have set TARGET_LIBGCC2_CFLAGS.
-# TARGET_LIBGCC2_CFLAGS = -fpic
diff --git a/gcc/config/sh/t-linux b/gcc/config/sh/t-linux
index 13ff848dd7c..a5c711618c6 100644
--- a/gcc/config/sh/t-linux
+++ b/gcc/config/sh/t-linux
@@ -4,5 +4,3 @@ LIB2FUNCS_EXTRA= $(srcdir)/config/sh/linux-atomic.asm
MULTILIB_DIRNAMES=
MULTILIB_MATCHES =
-
-EXTRA_MULTILIB_PARTS= crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o
diff --git a/gcc/config/sh/t-linux64 b/gcc/config/sh/t-linux64
deleted file mode 100644
index 126b0163754..00000000000
--- a/gcc/config/sh/t-linux64
+++ /dev/null
@@ -1 +0,0 @@
-EXTRA_MULTILIB_PARTS= crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o
diff --git a/gcc/config/sh/t-netbsd b/gcc/config/sh/t-netbsd
index 11bfe31458e..de172d3f73f 100644
--- a/gcc/config/sh/t-netbsd
+++ b/gcc/config/sh/t-netbsd
@@ -20,5 +20,3 @@ TARGET_LIBGCC2_CFLAGS = -fpic -mieee
LIB1ASMFUNCS_CACHE = _ic_invalidate
LIB2FUNCS_EXTRA=
-
-EXTRA_MULTILIB_PARTS=
diff --git a/gcc/config/sh/t-sh b/gcc/config/sh/t-sh
index e63131a5348..6eaf784e8ae 100644
--- a/gcc/config/sh/t-sh
+++ b/gcc/config/sh/t-sh
@@ -94,55 +94,9 @@ MULTILIB_OSDIRNAMES = \
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
-$(T)crt1.o: $(srcdir)/config/sh/crt1.asm $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crt1.o -x assembler-with-cpp $(srcdir)/config/sh/crt1.asm
-$(T)crti.o: $(srcdir)/config/sh/crti.asm $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/sh/crti.asm
-$(T)crtn.o: $(srcdir)/config/sh/crtn.asm $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/sh/crtn.asm
-
$(out_object_file): gt-sh.h
gt-sh.h : s-gtype ; @true
-# These are not suitable for COFF.
-# EXTRA_MULTILIB_PARTS= crt1.o crti.o crtn.o crtbegin.o crtend.o
-
-IC_EXTRA_PARTS= libic_invalidate_array_4-100.a libic_invalidate_array_4-200.a \
-libic_invalidate_array_4a.a
-OPT_EXTRA_PARTS= libgcc-Os-4-200.a libgcc-4-300.a
-EXTRA_MULTILIB_PARTS= $(IC_EXTRA_PARTS) $(OPT_EXTRA_PARTS)
-
-$(T)ic_invalidate_array_4-100.o: $(srcdir)/config/sh/lib1funcs.asm $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)ic_invalidate_array_4-100.o -DL_ic_invalidate_array -DWAYS=1 -DWAY_SIZE=0x2000 -x assembler-with-cpp $(srcdir)/config/sh/lib1funcs.asm
-$(T)libic_invalidate_array_4-100.a: $(T)ic_invalidate_array_4-100.o $(GCC_PASSES)
- $(AR_CREATE_FOR_TARGET) $(T)libic_invalidate_array_4-100.a $(T)ic_invalidate_array_4-100.o
-
-$(T)ic_invalidate_array_4-200.o: $(srcdir)/config/sh/lib1funcs.asm $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)ic_invalidate_array_4-200.o -DL_ic_invalidate_array -DWAYS=2 -DWAY_SIZE=0x2000 -x assembler-with-cpp $(srcdir)/config/sh/lib1funcs.asm
-$(T)libic_invalidate_array_4-200.a: $(T)ic_invalidate_array_4-200.o $(GCC_PASSES)
- $(AR_CREATE_FOR_TARGET) $(T)libic_invalidate_array_4-200.a $(T)ic_invalidate_array_4-200.o
-
-$(T)ic_invalidate_array_4a.o: $(srcdir)/config/sh/lib1funcs.asm $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)ic_invalidate_array_4a.o -DL_ic_invalidate_array -D__FORCE_SH4A__ -x assembler-with-cpp $(srcdir)/config/sh/lib1funcs.asm
-$(T)libic_invalidate_array_4a.a: $(T)ic_invalidate_array_4a.o $(GCC_PASSES)
- $(AR_CREATE_FOR_TARGET) $(T)libic_invalidate_array_4a.a $(T)ic_invalidate_array_4a.o
-
-$(T)sdivsi3_i4i-Os-4-200.o: $(srcdir)/config/sh/lib1funcs-Os-4-200.asm $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $@ -DL_sdivsi3_i4i -x assembler-with-cpp $<
-$(T)udivsi3_i4i-Os-4-200.o: $(srcdir)/config/sh/lib1funcs-Os-4-200.asm $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $@ -DL_udivsi3_i4i -x assembler-with-cpp $<
-$(T)unwind-dw2-Os-4-200.o: $(srcdir)/../libgcc/unwind-dw2.c $(srcdir)/../libgcc/unwind-generic.h $(srcdir)/../libgcc/unwind-pe.h $(srcdir)/../libgcc/unwind.inc $(srcdir)/../libgcc/unwind-dw2-fde.h $(srcdir)/../libgcc/unwind-dw2.h $(CONFIG_H) coretypes.h $(TM_H) $(MACHMODE_H) longlong.h config.status stmp-int-hdrs tsystem.h $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) $(LIBGCC2_CFLAGS) $(INCLUDES) $(vis_hide) -fexceptions -Os -c -o $@ $<
-OBJS_Os_4_200=$(T)sdivsi3_i4i-Os-4-200.o $(T)udivsi3_i4i-Os-4-200.o $(T)unwind-dw2-Os-4-200.o
-$(T)libgcc-Os-4-200.a: $(OBJS_Os_4_200) $(GCC_PASSES)
- $(AR_CREATE_FOR_TARGET) $@ $(OBJS_Os_4_200)
-
-$(T)div_table-4-300.o: $(srcdir)/config/sh/lib1funcs-4-300.asm $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $@ -DL_div_table -x assembler-with-cpp $<
-
-$(T)libgcc-4-300.a: $(T)div_table-4-300.o $(GCC_PASSES)
- $(AR_CREATE_FOR_TARGET) $@ $(T)div_table-4-300.o
-
# Local Variables:
# mode: Makefile
# End:
diff --git a/gcc/config/sh/t-superh b/gcc/config/sh/t-superh
deleted file mode 100644
index 4e2d83dcba0..00000000000
--- a/gcc/config/sh/t-superh
+++ /dev/null
@@ -1,33 +0,0 @@
-# Copyright (C) 2005, 2006 Free Software Foundation, Inc.
-#
-# This file is part of GCC.
-#
-# GCC is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3, or (at your option)
-# any later version.
-#
-# GCC is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with GCC; see the file COPYING3. If not see
-# <http://www.gnu.org/licenses/>.
-
-EXTRA_MULTILIB_PARTS= crt1.o crti.o crtn.o \
- crtbegin.o crtend.o crtbeginS.o crtendS.o \
- crt1-mmu.o gcrt1-mmu.o gcrt1.o $(IC_EXTRA_PARTS) $(OPT_EXTRA_PARTS)
-
-# Compile crt1-mmu.o as crt1.o with -DMMU_SUPPORT
-$(T)crt1-mmu.o: $(srcdir)/config/sh/crt1.asm $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crt1-mmu.o -DMMU_SUPPORT -x assembler-with-cpp $(srcdir)/config/sh/crt1.asm
-
-# Compile gcrt1-mmu.o as crt1-mmu.o with -DPROFILE
-$(T)gcrt1-mmu.o: $(srcdir)/config/sh/crt1.asm $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)gcrt1-mmu.o -DPROFILE -DMMU_SUPPORT -x assembler-with-cpp $(srcdir)/config/sh/crt1.asm
-
-# For sh4-400: Compile gcrt1.o as crt1.o with -DPROFILE
-$(T)gcrt1.o: $(srcdir)/config/sh/crt1.asm $(GCC_PASSES)
- $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)gcrt1.o -DPROFILE -x assembler-with-cpp $(srcdir)/config/sh/crt1.asm
diff --git a/gcc/config/sh/t-vxworks b/gcc/config/sh/t-vxworks
index 66aa7091ab1..d7ccc9b7f59 100644
--- a/gcc/config/sh/t-vxworks
+++ b/gcc/config/sh/t-vxworks
@@ -4,6 +4,3 @@ MULTILIB_OPTIONS = mrtp fPIC m2/m3/m4/m4a ml
# Don't build -fPIC without -mrtp, or -ml without -m3/-m4.
MULTILIB_EXCEPTIONS = fPIC* ml* mrtp/ml* mrtp/fPIC/ml* *m2/ml*
MULTILIB_MATCHES = m2=m4-nofpu fPIC=fpic
-
-# Restore a variable from t-vxworks clobbered by t-elf.
-EXTRA_MULTILIB_PARTS =
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