diff options
Diffstat (limited to 'gcc/config/tilegx/tilegx.md')
| -rw-r--r-- | gcc/config/tilegx/tilegx.md | 42 |
1 files changed, 16 insertions, 26 deletions
diff --git a/gcc/config/tilegx/tilegx.md b/gcc/config/tilegx/tilegx.md index 23c47f8d264..92a6d651eda 100644 --- a/gcc/config/tilegx/tilegx.md +++ b/gcc/config/tilegx/tilegx.md @@ -417,7 +417,7 @@ (ss_minus "") (us_minus "") ]) - + ;; <s> is the load/store extension suffix. (define_code_attr s [(zero_extend "u") (sign_extend "s")]) @@ -825,11 +825,11 @@ bit_width = INTVAL (operands[2]); bit_offset = INTVAL (operands[3]); - /* Reject bitfields that can be done with a normal load */ + /* Reject bitfields that can be done with a normal load. */ if (MEM_ALIGN (operands[1]) >= bit_offset + bit_width) FAIL; - /* The value in memory cannot span more than 8 bytes. */ + /* The value in memory cannot span more than 8 bytes. */ first_byte_offset = bit_offset / BITS_PER_UNIT; last_byte_offset = (bit_offset + bit_width - 1) / BITS_PER_UNIT; if (last_byte_offset - first_byte_offset > 7) @@ -854,7 +854,6 @@ HOST_WIDE_INT bit_width = INTVAL (operands[2]); HOST_WIDE_INT bit_offset = INTVAL (operands[3]); - if (MEM_P (operands[1])) { HOST_WIDE_INT first_byte_offset, last_byte_offset; @@ -862,11 +861,11 @@ if (GET_MODE (operands[1]) != QImode) FAIL; - /* Reject bitfields that can be done with a normal load */ + /* Reject bitfields that can be done with a normal load. */ if (MEM_ALIGN (operands[1]) >= bit_offset + bit_width) FAIL; - /* The value in memory cannot span more than 8 bytes. */ + /* The value in memory cannot span more than 8 bytes. */ first_byte_offset = bit_offset / BITS_PER_UNIT; last_byte_offset = (bit_offset + bit_width - 1) / BITS_PER_UNIT; if (last_byte_offset - first_byte_offset > 7) @@ -882,7 +881,7 @@ if (bit_offset == 0) { - /* Extracting the low bits is just a bitwise AND. */ + /* Extracting the low bits is just a bitwise AND. */ HOST_WIDE_INT mask = ((HOST_WIDE_INT)1 << bit_width) - 1; emit_insn (gen_anddi3 (operands[0], operands[1], GEN_INT (mask))); DONE; @@ -902,7 +901,7 @@ [(set (match_operand:DI 0 "register_operand" "") (const:DI (unspec:DI [(match_operand:DI 1 "symbolic_operand" "")] UNSPEC_HW2_LAST)))]) - + (define_expand "mov_address_step2" [(set (match_operand:DI 0 "register_operand" "") (unspec:DI @@ -954,7 +953,7 @@ "%1 = . + 8\n\tlnk\t%0" [(set_attr "type" "Y1")]) -;; First step of the 3-insn sequence to materialize a position +;; The next three patterns are used to to materialize a position ;; independent address by adding the difference of two labels to a ;; base label in the text segment, assuming that the difference fits ;; in 32 signed bits. @@ -966,10 +965,6 @@ UNSPEC_HW1_LAST_PCREL)))] "flag_pic") -;; Second step of the 3-insn sequence to materialize a position -;; independent address by adding the difference of two labels to a -;; base label in the text segment, assuming that the difference fits -;; in 32 signed bits. (define_expand "mov_pcrel_step2<bitsuffix>" [(set (match_operand:I48MODE 0 "register_operand" "") (unspec:I48MODE @@ -980,11 +975,7 @@ UNSPEC_HW0_PCREL))] UNSPEC_INSN_ADDR_SHL16INSLI))] "flag_pic") - -;; Third step of the 3-insn sequence to materialize a position -;; independent address by adding the difference of two labels to a base -;; label in the text segment, assuming that the difference fits in 32 -;; signed bits. + (define_insn "mov_pcrel_step3<bitsuffix>" [(set (match_operand:I48MODE 0 "register_operand" "=r") (unspec:I48MODE [(match_operand:I48MODE 1 "reg_or_0_operand" "rO") @@ -1442,7 +1433,6 @@ DONE; }) - (define_expand "subdf3" [(set (match_operand:DF 0 "register_operand" "") (minus:DF (match_operand:DF 1 "register_operand" "") @@ -1815,7 +1805,6 @@ "ctz\t%0, %r1" [(set_attr "type" "Y0")]) - (define_insn "popcount<mode>2" [(set (match_operand:I48MODE 0 "register_operand" "=r") (popcount:I48MODE (match_operand:DI 1 "reg_or_0_operand" "rO")))] @@ -2044,7 +2033,7 @@ (define_insn "*zero_extendsidi_truncdisi" [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI - (truncate:SI (match_operand:DI 1 "reg_or_0_operand" "0"))))] + (truncate:SI (match_operand:DI 1 "reg_or_0_operand" "rO"))))] "" "v4int_l\t%0, zero, %r1" [(set_attr "type" "X01")]) @@ -2115,7 +2104,7 @@ shruxi\t%0, %r1, %2 shrux\t%0, %r1, %r2" [(set_attr "type" "X01,X01")]) - + (define_insn "*lshrsi_truncdisi2" [(set (match_operand:SI 0 "register_operand" "=r") (lshiftrt:SI @@ -2320,7 +2309,8 @@ ;; Loops ;; -;; Define the subtract-one-and-jump insns so loop.c knows what to generate. +;; Define the subtract-one-and-jump insns so loop.c knows what to +;; generate. (define_expand "doloop_end" [(use (match_operand 0 "" "")) ;; loop pseudo (use (match_operand 1 "" "")) ;; iterations; zero if unknown @@ -2470,7 +2460,7 @@ tilegx_compute_pcrel_plt_address (addr, orig_addr); operands[1] = gen_rtx_MEM (DImode, addr); } - } + } }) (define_insn "*call_value_insn" @@ -2633,8 +2623,8 @@ [(set_attr "type" "*,*,X01")]) ;; Used for move sp, r52, to pop a stack frame. We need to make sure -;; that stack frame memory operations have been issued before we do this. -;; TODO: see above TODO. +;; that stack frame memory operations have been issued before we do +;; this. TODO: see above TODO. (define_insn "sp_restore<bitsuffix>" [(set (match_operand:I48MODE 0 "register_operand" "=r") (match_operand:I48MODE 1 "register_operand" "r")) |