diff options
Diffstat (limited to 'gcc/config')
46 files changed, 203 insertions, 446 deletions
diff --git a/gcc/config/alpha/elf.h b/gcc/config/alpha/elf.h index 04bd3350be9..d28847c44d9 100644 --- a/gcc/config/alpha/elf.h +++ b/gcc/config/alpha/elf.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for DEC Alpha w/ELF. - Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. Contributed by Richard Henderson (rth@tamu.edu). This file is part of GNU CC. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 6a0f593b9f3..e8d5f8453f4 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -1,5 +1,5 @@ /* Output routines for GCC for ARM/RISCiX. - Copyright (C) 1991, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1991, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl) and Martin Simmons (@harleqn.co.uk). More major hacks by Richard Earnshaw (rwe11@cl.cam.ac.uk) @@ -3271,6 +3271,16 @@ arm_reload_in_hi (operands) rtx base = find_replacement (&XEXP (operands[1], 0)); emit_insn (gen_zero_extendqisi2 (operands[2], gen_rtx (MEM, QImode, base))); + /* Handle the case where the address is too complex to be offset by 1. */ + if (GET_CODE (base) == MINUS + || (GET_CODE (base) == PLUS && GET_CODE (XEXP (base, 1)) != CONST_INT)) + { + rtx base_plus = gen_rtx (REG, SImode, REGNO (operands[0])); + + emit_insn (gen_rtx (SET, VOIDmode, base_plus, base)); + base = base_plus; + } + emit_insn (gen_zero_extendqisi2 (gen_rtx (SUBREG, SImode, operands[0], 0), gen_rtx (MEM, QImode, plus_constant (base, 1)))); @@ -3524,6 +3534,7 @@ find_barrier (from, max_count) { int count = 0; rtx found_barrier = 0; + rtx last = from; while (from && count < max_count) { @@ -3537,11 +3548,12 @@ find_barrier (from, max_count) && CONSTANT_POOL_ADDRESS_P (SET_SRC (PATTERN (from)))) { rtx src = SET_SRC (PATTERN (from)); - count += 2; + count += 8; } else count += get_attr_length (from); + last = from; from = NEXT_INSN (from); } @@ -3552,7 +3564,7 @@ find_barrier (from, max_count) rtx label = gen_label_rtx (); if (from) - from = PREV_INSN (from); + from = PREV_INSN (last); else from = get_last_insn (); diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index ec70983d6ee..ee4a9086ed7 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -1,5 +1,5 @@ ;;- Machine description for Advanced RISC Machines' ARM for GNU compiler -;; Copyright (C) 1991, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1991, 93-97, 1998 Free Software Foundation, Inc. ;; Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl) ;; and Martin Simmons (@harleqn.co.uk). ;; More major hacks by Richard Earnshaw (rwe11@cl.cam.ac.uk) diff --git a/gcc/config/arm/t-semi b/gcc/config/arm/t-semi index 74fdef49920..61c1c37c529 100644 --- a/gcc/config/arm/t-semi +++ b/gcc/config/arm/t-semi @@ -1,6 +1,6 @@ # Just for these, we omit the frame pointer since it makes such a big # difference. It is then pointless adding debugging. -LIBGCC2_CFLAGS=-O2 -fomit-frame-pointer $(LIBGCC2_INCLUDES) $(GCC_CFLAGS) -g0 +LIBGCC2_CFLAGS=-O2 -fomit-frame-pointer $(LIBGCC2_INCLUDES) $(GCC_CFLAGS) -g0 # Don't build enquire ENQUIRE= diff --git a/gcc/config/i386/cygwin32.h b/gcc/config/i386/cygwin32.h index 536b91c6ca0..15963bdb299 100644 --- a/gcc/config/i386/cygwin32.h +++ b/gcc/config/i386/cygwin32.h @@ -21,7 +21,6 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - #define YES_UNDERSCORES #define DBX_DEBUGGING_INFO @@ -150,10 +149,9 @@ do \ while (0) #endif -/* This macro gets just the user-specified name - out of the string in a SYMBOL_REF. Discard - trailing @[NUM] encoded by ENCODE_SECTION_INFO. - Do we need the stripping of leading '*'? */ +/* This macro gets just the user-specified name out of the string in a + SYMBOL_REF. Discard trailing @[NUM] encoded by ENCODE_SECTION_INFO. */ + #undef STRIP_NAME_ENCODING #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \ do { \ @@ -172,7 +170,6 @@ do { \ (VAR) = _name; \ } while (0) - /* Emit code to check the stack when allocating more that 4000 bytes in one go. */ diff --git a/gcc/config/i386/gnu.h b/gcc/config/i386/gnu.h index bdce3ed000b..971a5f880c2 100644 --- a/gcc/config/i386/gnu.h +++ b/gcc/config/i386/gnu.h @@ -4,7 +4,8 @@ #include <i386/linux.h> #undef CPP_PREDEFINES -#define CPP_PREDEFINES GNU_CPP_PREDEFINES("i386") +#define CPP_PREDEFINES "-Di386 -Acpu(i386) -Amachine(i386) \ +-Dunix -Asystem(unix) -DMACH -Asystem(mach) -D__GNU__ -Asystem(gnu)" #undef TARGET_VERSION #define TARGET_VERSION fprintf (stderr, " (i386 GNU)"); diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index b910e77fd65..adab26d549c 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler for Intel X86 (386, 486, Pentium). - Copyright (C) 1988, 92, 94-97, 1998 Free Software Foundation, Inc. + Copyright (C) 1988, 92, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -436,12 +436,6 @@ extern int ix86_arch; /* Required on the 386 since it doesn't have bitfield insns. */ #define PCC_BITFIELD_TYPE_MATTERS 1 -/* An integer expression for the size in bits of the largest integer - machine mode that should actually be used. All integer machine modes of - this size or smaller can be used for structures and unions with the - appropriate sizes. */ -#define MAX_FIXED_MODE_SIZE 32 - /* Maximum power of 2 that code can be aligned to. */ #define MAX_CODE_ALIGN 6 /* 64 byte alignment */ @@ -1870,6 +1864,7 @@ while (0) #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ case CONST_INT: \ + return (unsigned) INTVAL (RTX) < 256 ? 0 : 1; \ case CONST: \ case LABEL_REF: \ case SYMBOL_REF: \ diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 9de8a93e1fb..ea6a9c8a487 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1,5 +1,5 @@ ; GCC machine description for Intel X86. -;; Copyright (C) 1988, 94-97, 1998 Free Software Foundation, Inc. +;; Copyright (C) 1988, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. ;; Mostly by William Schelter. ;; This file is part of GNU CC. @@ -7378,11 +7378,10 @@ byte_xor_operation: (define_expand "movsicc" [(match_dup 4) - (parallel [(set (match_operand 0 "register_operand" "") + (set (match_operand 0 "register_operand" "") (if_then_else:SI (match_operand 1 "comparison_operator" "") - (match_operand:SI 2 "general_operand" "") - (match_operand:SI 3 "general_operand" ""))) - (clobber (match_scratch:SI 4 "=&r"))])] + (match_operand:SI 2 "nonimmediate_operand" "") + (match_operand:SI 3 "nonimmediate_operand" "")))] "TARGET_CMOVE" " { @@ -7391,11 +7390,10 @@ byte_xor_operation: (define_expand "movhicc" [(match_dup 4) - (parallel [(set (match_operand 0 "register_operand" "") + (set (match_operand 0 "register_operand" "") (if_then_else:HI (match_operand 1 "comparison_operator" "") - (match_operand:HI 2 "general_operand" "") - (match_operand:HI 3 "general_operand" ""))) - (clobber (match_scratch:SI 4 "=&r"))])] + (match_operand:HI 2 "nonimmediate_operand" "") + (match_operand:HI 3 "nonimmediate_operand" "")))] "TARGET_CMOVE" " { @@ -7403,146 +7401,80 @@ byte_xor_operation: }") (define_insn "movsicc_1" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,&r,rm") + [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,&r") (if_then_else:SI (match_operator 1 "comparison_operator" - [(cc0) (const_int 0)]) - (match_operand:SI 2 "general_operand" "rm,0,rm,g") - (match_operand:SI 3 "general_operand" "0,rm,rm,g"))) - (clobber (match_scratch:SI 4 "X,X,X,=&r"))] + [(cc0) (const_int 0)]) + (match_operand:SI 2 "nonimmediate_operand" "rm,0,rm") + (match_operand:SI 3 "nonimmediate_operand" "0,rm,rm")))] "TARGET_CMOVE" "* { - if (which_alternative == 0) + switch (which_alternative) { + case 0: /* r <- cond ? arg : r */ output_asm_insn (AS2 (cmov%C1,%2,%0), operands); - } - else if (which_alternative == 1) - { + break; + + case 1: /* r <- cond ? r : arg */ output_asm_insn (AS2 (cmov%c1,%3,%0), operands); - } - else if (which_alternative == 2) - { + break; + + case 2: /* r <- cond ? arg1 : arg2 */ output_asm_insn (AS2 (cmov%C1,%2,%0), operands); output_asm_insn (AS2 (cmov%c1,%3,%0), operands); + break; } - else if (which_alternative == 3) - { - /* r <- cond ? arg1 : arg2 */ - rtx xops[3]; - - xops[0] = gen_label_rtx (); - xops[1] = gen_label_rtx (); - xops[2] = operands[1]; - - output_asm_insn (\"j%c2 %l0\", xops); - if (! rtx_equal_p (operands[0], operands[2])) - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[2]) == MEM) - { - output_asm_insn (AS2 (mov%z2,%2,%4), operands); - output_asm_insn (AS2 (mov%z2,%4,%0), operands); - } - else - output_asm_insn (AS2 (mov%z0,%2,%0), operands); - output_asm_insn (\"jmp %l1\", xops); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (xops[0])); - if (! rtx_equal_p (operands[0], operands[3])) - { - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[3]) == MEM) - { - output_asm_insn (AS2 (mov%z3,%3,%4), operands); - output_asm_insn (AS2 (mov%z3,%4,%0), operands); - } - else - output_asm_insn (AS2 (mov%z0,%3,%0), operands); - } - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (xops[1])); - } + RET; }") (define_insn "movhicc_1" - [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,&r,rm") + [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,&r") (if_then_else:HI (match_operator 1 "comparison_operator" - [(cc0) (const_int 0)]) - (match_operand:HI 2 "general_operand" "rm,0,rm,g") - (match_operand:HI 3 "general_operand" "0,rm,rm,g"))) - (clobber (match_scratch:SI 4 "X,X,X,=&r"))] + [(cc0) (const_int 0)]) + (match_operand:HI 2 "nonimmediate_operand" "rm,0,rm") + (match_operand:HI 3 "nonimmediate_operand" "0,rm,rm")))] "TARGET_CMOVE" "* { - if (which_alternative == 0) + switch (which_alternative) { + case 0: /* r <- cond ? arg : r */ output_asm_insn (AS2 (cmov%C1,%2,%0), operands); - } - else if (which_alternative == 1) - { + break; + + case 1: /* r <- cond ? r : arg */ output_asm_insn (AS2 (cmov%c1,%3,%0), operands); - } - else if (which_alternative == 2) - { + break; + + case 2: /* r <- cond ? arg1 : arg2 */ output_asm_insn (AS2 (cmov%C1,%2,%0), operands); output_asm_insn (AS2 (cmov%c1,%3,%0), operands); + break; } - else if (which_alternative == 3) - { - /* r <- cond ? arg1 : arg2 */ - rtx xops[3]; - - xops[0] = gen_label_rtx (); - xops[1] = gen_label_rtx (); - xops[2] = operands[1]; - - output_asm_insn (\"j%c2 %l0\", xops); - if (! rtx_equal_p (operands[0], operands[2])) - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[2]) == MEM) - { - output_asm_insn (AS2 (mov%z2,%2,%4), operands); - output_asm_insn (AS2 (mov%z2,%4,%0), operands); - } - else - output_asm_insn (AS2 (mov%z0,%2,%0), operands); - output_asm_insn (\"jmp %l1\", xops); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (xops[0])); - if (! rtx_equal_p (operands[0], operands[3])) - { - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[3]) == MEM) - { - output_asm_insn (AS2 (mov%z3,%3,%4), operands); - output_asm_insn (AS2 (mov%z3,%4,%0), operands); - } - else - output_asm_insn (AS2 (mov%z0,%3,%0), operands); - } - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (xops[1])); - } + RET; }") +;; We need to disable the FP forms of these since they do not support +;; memory as written, but no input reloads are permitted for insns +;; that use cc0. Also, movxfcc is not present. + (define_expand "movsfcc" [(match_dup 4) - (set (match_operand 0 "general_operand" "") + (set (match_operand 0 "register_operand" "") (if_then_else:SF (match_operand 1 "comparison_operator" "") - (match_operand:SF 2 "general_operand" "") - (match_operand:SF 3 "general_operand" "")))] - "TARGET_CMOVE" + (match_operand:SF 2 "register_operand" "") + (match_operand:SF 3 "register_operand" "")))] + "0 && TARGET_CMOVE" " { - int i; - - for (i = 2; i <= 3; i++) - { - if ((reload_in_progress | reload_completed) == 0 - && CONSTANT_P (operands[i])) - { - operands[i] = force_const_mem (SFmode, operands[i]); - } - } operands[4] = i386_compare_gen (i386_compare_op0, i386_compare_op1); }") @@ -7550,211 +7482,85 @@ byte_xor_operation: [(match_dup 4) (set (match_operand 0 "register_operand" "t") (if_then_else:DF (match_operand 1 "comparison_operator" "") - (match_operand:DF 2 "general_operand" "") - (match_operand:DF 3 "general_operand" "")))] - "TARGET_CMOVE" + (match_operand:DF 2 "register_operand" "") + (match_operand:DF 3 "register_operand" "")))] + "0 && TARGET_CMOVE" " { - int i; - - for (i = 2; i <= 3; i++) - { - if ((reload_in_progress | reload_completed) == 0 - && CONSTANT_P (operands[i])) - { - operands[i] = force_const_mem (DFmode, operands[i]); - } - } operands[4] = i386_compare_gen (i386_compare_op0, i386_compare_op1); }") (define_expand "movxfcc" [(match_dup 4) - (set (match_operand 0 "register_operand" "t") + (set (match_operand 0 "register_operand" "") (if_then_else:XF (match_operand 1 "comparison_operator" "") - (match_operand:XF 2 "general_operand" "") - (match_operand:XF 3 "general_operand" "")))] - "TARGET_CMOVE" + (match_operand:XF 2 "register_operand" "") + (match_operand:XF 3 "register_operand" "")))] + "0 && TARGET_CMOVE" " { - int i; - - for (i = 2; i <= 3; i++) - { - if ((reload_in_progress | reload_completed) == 0 - && CONSTANT_P (operands[i])) - { - operands[i] = force_const_mem (XFmode, operands[i]); - } - } operands[4] = i386_compare_gen (i386_compare_op0, i386_compare_op1); }") (define_insn "movsfcc_1" - [(set (match_operand:SF 0 "general_operand" "=f,=f,=f,=f") + [(set (match_operand:SF 0 "general_operand" "=f,f,&f") (if_then_else:SF (match_operator 1 "comparison_operator" - [(cc0) (const_int 0)]) - (match_operand:SF 2 "general_operand" "0,f,f,fFm") - (match_operand:SF 3 "general_operand" "f,0,f,fFm")))] + [(cc0) (const_int 0)]) + (match_operand:SF 2 "register_operand" "0,f,f") + (match_operand:SF 3 "register_operand" "f,0,f")))] "TARGET_CMOVE" "* { - if (which_alternative == 0) + switch (which_alternative) { + case 0: /* r <- cond ? arg : r */ output_asm_insn (AS2 (fcmov%f1,%3,%0), operands); - } - else if (which_alternative == 1) - { + break; + + case 1: /* r <- cond ? r : arg */ output_asm_insn (AS2 (fcmov%F1,%2,%0), operands); - } - else if (which_alternative == 2) - { + break; + + case 2: /* r <- cond ? r : arg */ output_asm_insn (AS2 (fcmov%F1,%2,%0), operands); output_asm_insn (AS2 (fcmov%f1,%3,%0), operands); + break; } - else if (which_alternative == 3) - { - /* r <- cond ? arg1 : arg2 */ - rtx xops[3]; - - xops[0] = gen_label_rtx (); - xops[1] = gen_label_rtx (); - xops[2] = operands[1]; - output_asm_insn (\"j%f2 %l0\", xops); - if (STACK_REG_P (operands[2]) || GET_CODE (operands[2]) == MEM) - output_asm_insn (AS1 (fld%z2,%y2), operands); - else - { - operands[2] = XEXP (operands[2], 0); - output_asm_insn (AS1 (fld%z2,%y2), operands); - } - output_asm_insn (\"jmp %l1\", xops); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (xops[0])); - if (STACK_REG_P (operands[3]) || GET_CODE (operands[0]) == MEM) - output_asm_insn (AS1 (fld%z3,%y3), operands); - else - { - operands[3] = XEXP (operands[3], 0); - output_asm_insn (AS1 (fld%z3,%y3), operands); - } - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (xops[1])); -} RET; }") (define_insn "movdfcc_1" - [(set (match_operand:DF 0 "general_operand" "=f,=f,=f,=f") + [(set (match_operand:DF 0 "general_operand" "=f,f,&f") (if_then_else:DF (match_operator 1 "comparison_operator" - [(cc0) (const_int 0)]) - (match_operand:DF 2 "general_operand" "0,f,f,fFm") - (match_operand:DF 3 "general_operand" "f,0,f,fFm")))] + [(cc0) (const_int 0)]) + (match_operand:DF 2 "register_operand" "0,f,f") + (match_operand:DF 3 "register_operand" "f,0,f")))] "TARGET_CMOVE" "* { - if (which_alternative == 0) + switch (which_alternative) { + case 0: /* r <- cond ? arg : r */ output_asm_insn (AS2 (fcmov%f1,%3,%0), operands); - } - else if (which_alternative == 1) - { - /* r <- cond ? r : arg */ - output_asm_insn (AS2 (fcmov%F1,%2,%0), operands); - } - else if (which_alternative == 2) - { - /* r <- cond ? r : arg */ - output_asm_insn (AS2 (fcmov%F1,%2,%0), operands); - output_asm_insn (AS2 (fcmov%f1,%3,%0), operands); - } - else if (which_alternative == 3) - { - /* r <- cond ? arg1 : arg2 */ - rtx xops[3]; - - xops[0] = gen_label_rtx (); - xops[1] = gen_label_rtx (); - xops[2] = operands[1]; - - output_asm_insn (\"j%f2 %l0\", xops); - if (STACK_REG_P (operands[2]) || GET_CODE (operands[2]) == MEM) - output_asm_insn (AS1 (fld%z2,%y2), operands); - else - { - operands[2] = XEXP (operands[2], 0); - output_asm_insn (AS1 (fld%z2,%y2), operands); - } - output_asm_insn (\"jmp %l1\", xops); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (xops[0])); - if (STACK_REG_P (operands[3]) || GET_CODE (operands[0]) == MEM) - output_asm_insn (AS1 (fld%z3,%y3), operands); - else - { - operands[3] = XEXP (operands[3], 0); - output_asm_insn (AS1 (fld%z3,%y3), operands); - } - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (xops[1])); -} - RET; -}") + break; -(define_insn "movxfcc_1" - [(set (match_operand:XF 0 "register_operand" "=f,=f,=f,=f") - (if_then_else:XF (match_operator 1 "comparison_operator" - [(cc0) (const_int 0)]) - (match_operand:XF 2 "register_operand" "0,f,f,fFm") - (match_operand:XF 3 "register_operand" "f,0,f,fFm")))] - "TARGET_CMOVE" - "* -{ - if (which_alternative == 0) - { - /* r <- cond ? arg : r */ - output_asm_insn (AS2 (fcmov%f1,%3,%0), operands); - } - else if (which_alternative == 1) - { + case 1: /* r <- cond ? r : arg */ output_asm_insn (AS2 (fcmov%F1,%2,%0), operands); - } - else if (which_alternative == 2) - { + break; + + case 2: /* r <- cond ? r : arg */ output_asm_insn (AS2 (fcmov%F1,%2,%0), operands); output_asm_insn (AS2 (fcmov%f1,%3,%0), operands); + break; } - else if (which_alternative == 3) - { - /* r <- cond ? arg1 : arg2 */ - rtx xops[3]; - - xops[0] = gen_label_rtx (); - xops[1] = gen_label_rtx (); - xops[2] = operands[1]; - output_asm_insn (\"j%f2 %l0\", xops); - if (STACK_REG_P (operands[2]) || GET_CODE (operands[2]) == MEM) - output_asm_insn (AS1 (fld%z2,%y2), operands); - else - { - operands[2] = XEXP (operands[2], 0); - output_asm_insn (AS1 (fld%z2,%y2), operands); - } - output_asm_insn (\"jmp %l1\", xops); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (xops[0])); - if (STACK_REG_P (operands[3]) || GET_CODE (operands[0]) == MEM) - output_asm_insn (AS1 (fld%z3,%y3), operands); - else - { - operands[3] = XEXP (operands[3], 0); - output_asm_insn (AS1 (fld%z3,%y3), operands); - } - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (xops[1])); -} RET; }") diff --git a/gcc/config/i386/mingw32.h b/gcc/config/i386/mingw32.h index a1eb464b3b1..7c7a3bbc6fa 100644 --- a/gcc/config/i386/mingw32.h +++ b/gcc/config/i386/mingw32.h @@ -2,7 +2,7 @@ hosting on Windows32, using GNU tools and the Windows32 API Library, as distinct from winnt.h, which is used to build GCC for use with a windows style library and tool set and uses the Microsoft tools. - Copyright (C) 1997 Free Software Foundation, Inc. + Copyright (C) 1997, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -47,7 +47,7 @@ Boston, MA 02111-1307, USA. */ /* Include in the mingw32 libraries with libgcc */ #undef LIBGCC_SPEC -#define LIBGCC_SPEC "-lmingw32 -lgcc -lmoldname -lcrtdll" +#define LIBGCC_SPEC "-lmingw32 -lgcc -lmoldname -lmsvcrt" /* Specify a different entry point when linking a DLL */ #undef LINK_SPEC @@ -55,9 +55,9 @@ Boston, MA 02111-1307, USA. */ "%{mwindows:--subsystem windows} %{mdll:--dll -e _DllMainCRTStartup@12}" #undef STARTFILE_SPEC -#define STARTFILE_SPEC "%{mdll:dllcrt1%O%s} %{!mdll:crt1%O%s}" +#define STARTFILE_SPEC "%{mdll:dllcrt2%O%s} %{!mdll:crt2%O%s}" -#define MATH_LIBRARY "-lcrtdll" +#define MATH_LIBRARY "-lmsvcrt" /* Output STRING, a string representing a filename, to FILE. We canonicalize it to be in MS-DOS format. */ diff --git a/gcc/config/i386/xm-go32.h b/gcc/config/i386/xm-go32.h index e83bb4b12bb..3cfd6b39992 100644 --- a/gcc/config/i386/xm-go32.h +++ b/gcc/config/i386/xm-go32.h @@ -1,5 +1,5 @@ /* Configuration for GNU C-compiler for Intel 80386 running GO32. - Copyright (C) 1988, 1996 Free Software Foundation, Inc. + Copyright (C) 1988, 1996, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -33,4 +33,3 @@ Boston, MA 02111-1307, USA. */ #define DIR_SEPARATOR '\\' #define NO_SYS_SIGLIST 1 - diff --git a/gcc/config/i386/xm-mingw32.h b/gcc/config/i386/xm-mingw32.h index 47356f568d1..38c9b6d06b0 100644 --- a/gcc/config/i386/xm-mingw32.h +++ b/gcc/config/i386/xm-mingw32.h @@ -1,6 +1,6 @@ /* Configuration for GNU C-compiler for hosting on Windows32. using GNU tools and the Windows32 API Library. - Copyright (C) 1997 Free Software Foundation, Inc. + Copyright (C) 1997, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -34,7 +34,6 @@ Boston, MA 02111-1307, USA. */ #endif #define NO_SYS_SIGLIST 1 -#define link(a,b) -1 #define environ _environ /* Even though we support "/", allow "\" since everybody tests both. */ diff --git a/gcc/config/i386/xm-sco5.h b/gcc/config/i386/xm-sco5.h index 99bc53c2bc5..6b22b1d549f 100644 --- a/gcc/config/i386/xm-sco5.h +++ b/gcc/config/i386/xm-sco5.h @@ -1,18 +1,7 @@ /* Configuration for GCC for Intel i386 running SCO. */ -#include "i386/xm-sysv3.h" - /* Big buffers improve performance. */ #define IO_BUFFER_SIZE (0x8000 - 1024) -/* OpenServer provides no sys_siglist, - but does offer the same data under another name. */ -#define sys_siglist _sys_siglist -#undef SYS_SIGLIST_DECLARED -#define SYS_SIGLIST_DECLARED -/* If not compiled with GNU C, use the portable alloca. */ -#ifndef __GNUC__ -#define USE_C_ALLOCA -#endif diff --git a/gcc/config/i386/xm-sysv4.h b/gcc/config/i386/xm-sysv4.h index 49d52b4e7f3..1365064a5a6 100644 --- a/gcc/config/i386/xm-sysv4.h +++ b/gcc/config/i386/xm-sysv4.h @@ -1,16 +1,5 @@ /* Configuration for GCC for Intel i386 running System V Release 4. */ -#include "i386/xm-i386.h" -#include "xm-svr4.h" - -/* If not compiled with GNU C, use the portable alloca. */ -#ifndef __GNUC__ -#define USE_C_ALLOCA -#endif #ifdef __HIGHC__ #include <alloca.h> /* for MetaWare High-C on NCR System 3000 */ #endif - -/* Univel, at least, has a small ARG_MAX. Defining this is harmless - except for causing extra stat calls in the driver program. */ -#define SMALL_ARG_MAX diff --git a/gcc/config/i860/i860.c b/gcc/config/i860/i860.c index cedbeb1885a..31dd07e07a4 100644 --- a/gcc/config/i860/i860.c +++ b/gcc/config/i860/i860.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Intel 860 - Copyright (C) 1989, 1991, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 1991, 1997, 1998 Free Software Foundation, Inc. Derived from sparc.c. Written by Richard Stallman (rms@ai.mit.edu). @@ -1435,7 +1435,8 @@ output_delayed_branch (template, operands, insn) /* Now recognize the insn which we put in its delay slot. We must do this after outputting the branch insn, since operands may just be a pointer to `recog_operand'. */ - INSN_CODE (delay_insn) = insn_code_number = recog (pat, delay_insn); + INSN_CODE (delay_insn) = insn_code_number + = recog (pat, delay_insn, NULL_PTR); if (insn_code_number == -1) abort (); @@ -1489,7 +1490,7 @@ output_delay_insn (delay_insn) } #ifdef REGISTER_CONSTRAINTS - if (! constrain_operands (insn_code_number)) + if (! constrain_operands (insn_code_number, 1)) abort (); #endif diff --git a/gcc/config/i960/i960.c b/gcc/config/i960/i960.c index 32903afbaf0..11b2a21f9be 100644 --- a/gcc/config/i960/i960.c +++ b/gcc/config/i960/i960.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on intel 80960. - Copyright (C) 1992, 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1992, 1995, 1996, 1997, 1998 Free Software Foundation, Inc. Contributed by Steven McGeady, Intel Corp. Additional Work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson Converted to GCC 2.0 by Jim Wilson and Michael Tiemann, Cygnus Support. @@ -589,8 +589,13 @@ emit_move_sequence (operands, mode) adding 4 to the memory address may not yield a valid insn. */ /* ??? We don't always need the scratch, but that would complicate things. Maybe later. */ + /* ??? We must also handle stores to pseudos here, because the pseudo may be + replaced with a MEM later. This would be cleaner if we didn't have + a separate pattern for unaligned DImode/TImode stores. */ if (GET_MODE_SIZE (mode) > UNITS_PER_WORD - && GET_CODE (operands[0]) == MEM + && (GET_CODE (operands[0]) == MEM + || (GET_CODE (operands[0]) == REG + && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)) && GET_CODE (operands[1]) == REG && REGNO (operands[1]) < FIRST_PSEUDO_REGISTER && ! HARD_REGNO_MODE_OK (REGNO (operands[1]), mode)) diff --git a/gcc/config/i960/i960.md b/gcc/config/i960/i960.md index 55b6ebf511a..43cb7ba5bee 100644 --- a/gcc/config/i960/i960.md +++ b/gcc/config/i960/i960.md @@ -1,5 +1,5 @@ ;;- Machine description for Intel 80960 chip for GNU C compiler -;; Copyright (C) 1992, 1995 Free Software Foundation, Inc. +;; Copyright (C) 1992, 1995, 1998 Free Software Foundation, Inc. ;; Contributed by Steven McGeady, Intel Corp. ;; Additional work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson ;; Converted to GCC 2.0 by Jim Wilson and Michael Tiemann, Cygnus Support. @@ -867,17 +867,20 @@ [(set_attr "type" "move,move,load,load,store")]) (define_insn "*store_unaligned_di_reg" - [(set (match_operand:DI 0 "memory_operand" "=m") - (match_operand:DI 1 "register_operand" "d")) - (clobber (match_scratch:SI 2 "=&d"))] + [(set (match_operand:DI 0 "general_operand" "=d,m") + (match_operand:DI 1 "register_operand" "d,d")) + (clobber (match_scratch:SI 2 "=X,&d"))] "" "* { + if (which_alternative == 0) + return i960_output_move_double (operands[0], operands[1]); + operands[3] = gen_rtx (MEM, word_mode, operands[2]); operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD); return \"lda %0,%2\;st %1,%3\;st %D1,%4\"; }" - [(set_attr "type" "store")]) + [(set_attr "type" "move,store")]) (define_expand "movti" [(set (match_operand:TI 0 "general_operand" "") @@ -946,19 +949,22 @@ [(set_attr "type" "move,move,load,load,store")]) (define_insn "*store_unaligned_ti_reg" - [(set (match_operand:TI 0 "memory_operand" "=m") - (match_operand:TI 1 "register_operand" "d")) - (clobber (match_scratch:SI 2 "=&d"))] + [(set (match_operand:TI 0 "general_operand" "=d,m") + (match_operand:TI 1 "register_operand" "d,d")) + (clobber (match_scratch:SI 2 "=X,&d"))] "" "* { + if (which_alternative == 0) + return i960_output_move_quad (operands[0], operands[1]); + operands[3] = gen_rtx (MEM, word_mode, operands[2]); operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD); operands[5] = adj_offsettable_operand (operands[4], UNITS_PER_WORD); operands[6] = adj_offsettable_operand (operands[5], UNITS_PER_WORD); return \"lda %0,%2\;st %1,%3\;st %D1,%4\;st %E1,%5\;st %F1,%6\"; }" - [(set_attr "type" "store")]) + [(set_attr "type" "move,store")]) (define_expand "store_multiple" [(set (match_operand:SI 0 "" "") ;;- dest @@ -2209,7 +2215,13 @@ [(set (pc) (match_operand:SI 0 "register_operand" "d")) (use (label_ref (match_operand 1 "" "")))] "" - "bx (%0)" + "* +{ + if (flag_pic) + return \"bx %l1(%0)\"; + else + return \"bx (%0)\"; +}" [(set_attr "type" "branch")]) ;;- jump to subroutine diff --git a/gcc/config/linux.h b/gcc/config/linux.h index 64dc91a67de..b619d01cdf5 100644 --- a/gcc/config/linux.h +++ b/gcc/config/linux.h @@ -1,7 +1,7 @@ /* Definitions for Linux-based GNU systems with ELF format - Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc. Contributed by Eric Youngdale. - Modified for stabs-in-ELF by H.J. Lu. + Modified for stabs-in-ELF by H.J. Lu (hjl@lucon.org). This file is part of GNU CC. diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h index 5a9e0c0006c..90a65849c59 100644 --- a/gcc/config/m68k/m68k.h +++ b/gcc/config/m68k/m68k.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Sun 68000/68020 version. - Copyright (C) 1987, 88, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 93-97, 1998 Free Software Foundation, Inc. This file is part of GNU CC. diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 3a9f3310eec..881b2886c86 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler, Motorola 68000 Version -;; Copyright (C) 1987, 88, 93, 94, 95, 96, 97, 98 Free Software Foundation, Inc. +;; Copyright (C) 1987, 88, 93-97, 1998 Free Software Foundation, Inc. ;; This file is part of GNU CC. diff --git a/gcc/config/m68k/xm-mot3300.h b/gcc/config/m68k/xm-mot3300.h index c61bd293e25..ea3b5589dbe 100644 --- a/gcc/config/m68k/xm-mot3300.h +++ b/gcc/config/m68k/xm-mot3300.h @@ -22,13 +22,8 @@ Boston, MA 02111-1307, USA. */ #define USG 1 -#include "m68k/xm-m68k.h" - -#define NO_SYS_SIGLIST - /* do not use alloca from -lPW with cc, because function epilogues use %sp */ #ifndef __GNUC__ -#define USE_C_ALLOCA #ifdef __STDC__ extern void *alloca (); #else diff --git a/gcc/config/m88k/xm-sysv3.h b/gcc/config/m88k/xm-sysv3.h index 3e8ab39dc95..84110d7474d 100644 --- a/gcc/config/m88k/xm-sysv3.h +++ b/gcc/config/m88k/xm-sysv3.h @@ -19,8 +19,6 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#include "m88k/xm-m88k.h" - #define R_OK 4 #define W_OK 2 #define X_OK 1 diff --git a/gcc/config/mips/abi64.h b/gcc/config/mips/abi64.h index 4f6fccfafb9..188939497ce 100644 --- a/gcc/config/mips/abi64.h +++ b/gcc/config/mips/abi64.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. 64 bit ABI support. - Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1996, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -63,16 +63,10 @@ Boston, MA 02111-1307, USA. */ #define MAX_ARGS_IN_REGISTERS (mips_abi == ABI_32 ? 4 : 8) #undef REG_PARM_STACK_SPACE -#if 0 -/* ??? This is necessary in order for the ABI_32 support to work. However, - expr.c (emit_push_insn) has no support for a REG_PARM_STACK_SPACE - definition that returns zero. That would have to be fixed before this - can be enabled. */ #define REG_PARM_STACK_SPACE(FNDECL) \ (mips_abi == ABI_32 \ ? (MAX_ARGS_IN_REGISTERS*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL) \ : 0) -#endif #define FUNCTION_ARG_PADDING(MODE, TYPE) \ (! BYTES_BIG_ENDIAN \ @@ -184,8 +178,7 @@ extern struct rtx_def *mips_function_value (); } \ } -/* ??? Should disable for mips_abi == ABI32. */ -#define STRICT_ARGUMENT_NAMING +#define STRICT_ARGUMENT_NAMING (mips_abi != ABI_32) /* A C expression that indicates when an argument must be passed by reference. If nonzero for an argument, a copy of that argument is diff --git a/gcc/config/mips/ecoff.h b/gcc/config/mips/ecoff.h index 813f148009e..8da0ae6351e 100644 --- a/gcc/config/mips/ecoff.h +++ b/gcc/config/mips/ecoff.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. MIPS version with GOFAST floating point library. - Copyright (C) 1994, 1997 Free Software Foundation, Inc. + Copyright (C) 1994, 1998 Free Software Foundation, Inc. This file is part of GNU CC. diff --git a/gcc/config/mips/elf.h b/gcc/config/mips/elf.h index 334484169ae..334bd5b8363 100644 --- a/gcc/config/mips/elf.h +++ b/gcc/config/mips/elf.h @@ -29,6 +29,8 @@ Boston, MA 02111-1307, USA. */ #endif /* Mostly like ECOFF. */ +#include "mips/mips.h" +#include "gofast.h" #include "mips/ecoff.h" /* We need to use .esize and .etype instead of .size and .type to diff --git a/gcc/config/mips/iris5.h b/gcc/config/mips/iris5.h index af6868d90ec..f81fe1c0fda 100644 --- a/gcc/config/mips/iris5.h +++ b/gcc/config/mips/iris5.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Iris version 5. - Copyright (C) 1993, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1993, 1995, 1996, 1998 Free Software Foundation, Inc. This file is part of GNU CC. @@ -23,6 +23,8 @@ Boston, MA 02111-1307, USA. */ #endif #define ABICALLS_ASM_OP ".option pic2" +#include "mips/iris3.h" +#include "mips/mips.h" #include "mips/iris4.h" /* Irix 5 doesn't use COFF, so disable special COFF handling in collect2.c. */ diff --git a/gcc/config/mips/iris5gas.h b/gcc/config/mips/iris5gas.h index adc90e83223..f1c2c483f88 100644 --- a/gcc/config/mips/iris5gas.h +++ b/gcc/config/mips/iris5gas.h @@ -1,7 +1,5 @@ /* Definitions of target machine for GNU compiler. Irix version 5 with gas. */ -#include "mips/iris5.h" - /* Enable debugging. */ #define DBX_DEBUGGING_INFO #define SDB_DEBUGGING_INFO diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 82b0ce5316c..e2f03f92c96 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -5036,7 +5036,7 @@ mips_output_external (file, decl, name) #ifdef ASM_OUTPUT_UNDEF_FUNCTION if (TREE_CODE (decl) == FUNCTION_DECL /* ??? Don't include alloca, since gcc will always expand it - inline. If we don't do this, libg++ fails to build. */ + inline. If we don't do this, the C++ library fails to build. */ && strcmp (name, "alloca") /* ??? Don't include __builtin_next_arg, because then gcc will not bootstrap under Irix 5.1. */ @@ -6616,7 +6616,8 @@ mips_expand_prologue () } if (TARGET_ABICALLS && mips_abi != ABI_32) - emit_insn (gen_loadgp (XEXP (DECL_RTL (current_function_decl), 0))); + emit_insn (gen_loadgp (XEXP (DECL_RTL (current_function_decl), 0), + gen_rtx (REG, DImode, 25))); } /* If we are profiling, make sure no instructions are scheduled before diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 114ad10bd37..e6a750f812e 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -5639,10 +5639,11 @@ move\\t%0,%z4\\n\\ (define_insn "loadgp" [(set (reg:DI 28) - (unspec_volatile:DI [(match_operand:DI 0 "address_operand" "")] 2)) + (unspec_volatile:DI [(match_operand:DI 0 "address_operand" "") + (match_operand:DI 1 "register_operand" "")] 2)) (clobber (reg:DI 1))] "" - "%[lui\\t$1,%%hi(%%neg(%%gp_rel(%a0)))\\n\\taddiu\\t$1,$1,%%lo(%%neg(%%gp_rel(%a0)))\\n\\tdaddu\\t$gp,$1,$25%]" + "%[lui\\t$1,%%hi(%%neg(%%gp_rel(%a0)))\\n\\taddiu\\t$1,$1,%%lo(%%neg(%%gp_rel(%a0)))\\n\\tdaddu\\t$gp,$1,%1%]" [(set_attr "type" "move") (set_attr "mode" "DI") (set_attr "length" "3")]) diff --git a/gcc/config/mips/rtems64.h b/gcc/config/mips/rtems64.h index a321d0df576..42c7a65cb40 100644 --- a/gcc/config/mips/rtems64.h +++ b/gcc/config/mips/rtems64.h @@ -1,5 +1,5 @@ /* Definitions for rtems targeting a MIPS ORION using ecoff. - Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. Contributed by Joel Sherrill (joel@OARcorp.com). This file is part of GNU CC. @@ -19,8 +19,6 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#include "mips/elforion.h" - /* Specify predefined symbols in preprocessor. */ #undef CPP_PREDEFINES diff --git a/gcc/config/msdos/top.sed b/gcc/config/msdos/top.sed index f123c9ab90a..64027f55355 100644 --- a/gcc/config/msdos/top.sed +++ b/gcc/config/msdos/top.sed @@ -19,9 +19,9 @@ host_xm_file=config/i386/xm-dos.h /^xmake_file=/ d /^tmake_file=/ d /^version=/ c\ -version=2.8.0 +version=2.8.1 /^mainversion=/ c\ -mainversion=2.8.0 +mainversion=2.8.1 s/CC = cc/CC = gcc/ s/:\$/: \$/g s/^ \ *\.\// / diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index db906be0fa3..d98662ad750 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on IBM RS/6000. - Copyright (C) 1991, 93-7, 1998 Free Software Foundation, Inc. + Copyright (C) 1991, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GNU CC. diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index e50bf5d948f..7ac3cf60c9c 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for IBM RS/6000. - Copyright (C) 1992, 93-7, 1998 Free Software Foundation, Inc. + Copyright (C) 1992, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GNU CC. @@ -2054,8 +2054,8 @@ typedef struct rs6000_args /* Define the magic numbers that we recognize as COFF. AIX 4.3 adds U803XTOCMAGIC (0757) for 64-bit executables, but collect2.c - does not include files in the correct order to conditionally define - the symbolic name in this macro. */ + does not include these files in the right order to conditionally define + the value in the macro. */ #define MY_ISCOFF(magic) \ ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC \ diff --git a/gcc/config/rs6000/x-aix31 b/gcc/config/rs6000/x-aix31 index e5bbc191b99..9f171fc9926 100644 --- a/gcc/config/rs6000/x-aix31 +++ b/gcc/config/rs6000/x-aix31 @@ -1,5 +1,4 @@ # configuration for IBM rs6000 running aix - # Show we need to use the C version of ALLOCA ALLOCA=alloca.o diff --git a/gcc/config/rs6000/xm-cygwin32.h b/gcc/config/rs6000/xm-cygwin32.h index 677254b371c..ca548319c10 100644 --- a/gcc/config/rs6000/xm-cygwin32.h +++ b/gcc/config/rs6000/xm-cygwin32.h @@ -1,26 +1 @@ -/* Configuration for GNU C-compiler for hosting on Windows NT. - using a unix style C library. - Copyright (C) 1995, 1997 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -#define NO_STAB_H - -#include "rs6000/xm-rs6000.h" - #define EXECUTABLE_SUFFIX ".exe" diff --git a/gcc/config/rs6000/xm-sysv4.h b/gcc/config/rs6000/xm-sysv4.h index 7184d8892db..cf56eb4ad33 100644 --- a/gcc/config/rs6000/xm-sysv4.h +++ b/gcc/config/rs6000/xm-sysv4.h @@ -1,5 +1,5 @@ /* Configuration for GNU C-compiler for PowerPC running System V.4. - Copyright (C) 1995 Free Software Foundation, Inc. + Copyright (C) 1995, 1998 Free Software Foundation, Inc. Cloned from sparc/xm-sysv4.h by Michael Meissner (meissner@cygnus.com). @@ -48,8 +48,6 @@ Boston, MA 02111-1307, USA. */ #ifdef __linux__ #include "xm-linux.h" -#else -#include "xm-svr4.h" #endif /* if not compiled with GNU C, use the C alloca and use only int bitfields. */ diff --git a/gcc/config/sparc/linux.h b/gcc/config/sparc/linux.h index f9f869320c0..a5807ecc632 100644 --- a/gcc/config/sparc/linux.h +++ b/gcc/config/sparc/linux.h @@ -1,5 +1,5 @@ /* Definitions for SPARC running Linux-based GNU systems with ELF. - Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. Contributed by Eddie C. Dost (ecd@skynet.be) This file is part of GNU CC. diff --git a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h index aba0417c850..b676e72a50f 100644 --- a/gcc/config/sparc/linux64.h +++ b/gcc/config/sparc/linux64.h @@ -1,5 +1,5 @@ /* Definitions for 64-bit SPARC running Linux-based GNU systems with ELF. - Copyright 1996, 1997 Free Software Foundation, Inc. + Copyright 1996, 1997, 1998 Free Software Foundation, Inc. Contributed by David S. Miller (davem@caip.rutgers.edu) This file is part of GNU CC. diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 327ee2730b5..36ccb15095f 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -1505,6 +1505,10 @@ pic_setup_code () start_sequence (); + /* If -O0, show the PIC register remains live before this. */ + if (obey_regdecls) + emit_insn (gen_rtx (USE, VOIDmode, pic_offset_table_rtx)); + l1 = gen_label_rtx (); pic_pc_rtx = gen_rtx (CONST, Pmode, @@ -5124,14 +5128,14 @@ sparc_type_code (type) register tree type; { register unsigned long qualifiers = 0; - register unsigned shift = 6; + register unsigned shift; /* Only the first 30 bits of the qualifier are valid. We must refrain from setting more, since some assemblers will give an error for this. Also, we must be careful to avoid shifts of 32 bits or more to avoid getting unpredictable results. */ - for (;;) + for (shift = 6; shift < 30; shift += 2, type = TREE_TYPE (type)) { switch (TREE_CODE (type)) { @@ -5139,27 +5143,18 @@ sparc_type_code (type) return qualifiers; case ARRAY_TYPE: - if (shift < 30) - qualifiers |= (3 << shift); - shift += 2; - type = TREE_TYPE (type); + qualifiers |= (3 << shift); break; case FUNCTION_TYPE: case METHOD_TYPE: - if (shift < 30) - qualifiers |= (2 << shift); - shift += 2; - type = TREE_TYPE (type); + qualifiers |= (2 << shift); break; case POINTER_TYPE: case REFERENCE_TYPE: case OFFSET_TYPE: - if (shift < 30) - qualifiers |= (1 << shift); - shift += 2; - type = TREE_TYPE (type); + qualifiers |= (1 << shift); break; case RECORD_TYPE: @@ -5179,10 +5174,7 @@ sparc_type_code (type) /* If this is a range type, consider it to be the underlying type. */ if (TREE_TYPE (type) != 0) - { - type = TREE_TYPE (type); - break; - } + break; /* Carefully distinguish all the standard types of C, without messing up if the language is not C. We do this by @@ -5208,6 +5200,11 @@ sparc_type_code (type) return (qualifiers | (TREE_UNSIGNED (type) ? 15 : 5)); case REAL_TYPE: + /* If this is a range type, consider it to be the underlying + type. */ + if (TREE_TYPE (type) != 0) + break; + /* Carefully distinguish all the standard types of C, without messing up if the language is not C. */ @@ -5234,6 +5231,8 @@ sparc_type_code (type) abort (); /* Not a type! */ } } + + return qualifiers; } /* Nested function support. */ diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index ce57192135b..1659e68b22e 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for Sun SPARC. - Copyright (C) 1987, 88, 89, 92, 94-7, 1998 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 89, 92, 94-97, 1998 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@cygnus.com). 64 bit SPARC V9 support by Michael Tiemann, Jim Wilson, and Doug Evans, at Cygnus Support. @@ -2162,9 +2162,8 @@ extern struct rtx_def *sparc_builtin_saveregs (); is defined, then all arguments are treated as named. Otherwise, all named arguments except the last are treated as named. For the v9 we want NAMED to mean what it says it means. */ -/* ??? This needn't be set for v8, but I don't want to make this runtime - selectable if I don't have to. */ -#define STRICT_ARGUMENT_NAMING + +#define STRICT_ARGUMENT_NAMING TARGET_V9 /* Generate RTL to flush the register windows so as to make arbitrary frames available. */ diff --git a/gcc/config/sparc/sysv4.h b/gcc/config/sparc/sysv4.h index e8a9a603b6f..3a1a82d9fe9 100644 --- a/gcc/config/sparc/sysv4.h +++ b/gcc/config/sparc/sysv4.h @@ -1,7 +1,6 @@ /* Target definitions for GNU compiler for Sparc running System V.4 - Copyright (C) 1991, 1992, 1995, 1996, 1997 Free Software Foundation, Inc. - - Written by Ron Guilmette (rfg@netcom.com). + Copyright (C) 1991, 92, 95, 96, 97, 1998 Free Software Foundation, Inc. + Contributed by Ron Guilmette (rfg@monkeys.com). This file is part of GNU CC. @@ -136,10 +135,7 @@ do { ASM_OUTPUT_ALIGN ((FILE), Pmode == SImode ? 2 : 3); \ f0-f31 32-63 40-71 */ -#define DBX_REGISTER_NUMBER(REGNO) \ - (((REGNO) < 32) ? (REGNO) \ - : ((REGNO) < 63) ? ((REGNO) + 8) \ - : (abort (), 0)) +#define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 32 ? (REGNO) : (REGNO) + 8) /* A set of symbol definitions for assembly pseudo-ops which will get us switched to various sections of interest. These are used diff --git a/gcc/config/sparc/xm-linux.h b/gcc/config/sparc/xm-linux.h index f68f5715662..691c7d16784 100644 --- a/gcc/config/sparc/xm-linux.h +++ b/gcc/config/sparc/xm-linux.h @@ -24,5 +24,3 @@ Boston, MA 02111-1307, USA. */ #include <stdlib.h> #include <string.h> #endif - -#include <xm-linux.h> diff --git a/gcc/config/sparc/xm-sol2.h b/gcc/config/sparc/xm-sol2.h index a799f12b946..5613b086b57 100644 --- a/gcc/config/sparc/xm-sol2.h +++ b/gcc/config/sparc/xm-sol2.h @@ -1,5 +1,3 @@ -#include "sparc/xm-sysv4.h" - /* If not compiled with GNU C, include the system's <alloca.h> header. */ #ifndef __GNUC__ #include <alloca.h> diff --git a/gcc/config/t-svr4 b/gcc/config/t-svr4 index 7d34cc82995..e6be0c3b0c8 100644 --- a/gcc/config/t-svr4 +++ b/gcc/config/t-svr4 @@ -2,8 +2,7 @@ # crtstuff.c. This is only really needed when we are going to use gcc/g++ # to produce a shared library, but since we don't know ahead of time when # we will be doing that, we just always use -fPIC when compiling the -# routines in crtstuff.c. -# Similarly for TARGET_LIBGCC2_CFLAGS +# routines in crtstuff.c. Likewise for libgcc2.c. CRTSTUFF_T_CFLAGS = -fPIC TARGET_LIBGCC2_CFLAGS = -fPIC diff --git a/gcc/config/vax/vax.md b/gcc/config/vax/vax.md index fce9a8e0bff..25ca7bcce5d 100644 --- a/gcc/config/vax/vax.md +++ b/gcc/config/vax/vax.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler, Vax Version -;; Copyright (C) 1987, 88, 91, 94, 95, 1996 Free Software Foundation, Inc. +;; Copyright (C) 1987, 88, 91, 94-96, 1998 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -1837,9 +1837,12 @@ ;; Note that operand 1 is total size of args, in bytes, ;; and what the call insn wants is the number of words. +;; It is used in the call instruction as a byte, but in the addl2 as +;; a word. Since the only time we actually use it in the call instruction +;; is when it is a constant, SImode (for addl2) is the proper mode. (define_insn "call_pop" [(call (match_operand:QI 0 "memory_operand" "m") - (match_operand:QI 1 "general_operand" "g")) + (match_operand:SI 1 "general_operand" "g")) (set (reg:SI 14) (plus:SI (reg:SI 14) (match_operand:SI 3 "immediate_operand" "i")))] "" @@ -1854,7 +1857,7 @@ (define_insn "call_value_pop" [(set (match_operand 0 "" "=g") (call (match_operand:QI 1 "memory_operand" "m") - (match_operand:QI 2 "general_operand" "g"))) + (match_operand:SI 2 "general_operand" "g"))) (set (reg:SI 14) (plus:SI (reg:SI 14) (match_operand:SI 4 "immediate_operand" "i")))] "" @@ -1870,7 +1873,7 @@ ;; operands. In that case, combine may simplify the adjustment of sp. (define_insn "" [(call (match_operand:QI 0 "memory_operand" "m") - (match_operand:QI 1 "general_operand" "g")) + (match_operand:SI 1 "general_operand" "g")) (set (reg:SI 14) (reg:SI 14))] "" "* @@ -1884,7 +1887,7 @@ (define_insn "" [(set (match_operand 0 "" "=g") (call (match_operand:QI 1 "memory_operand" "m") - (match_operand:QI 2 "general_operand" "g"))) + (match_operand:SI 2 "general_operand" "g"))) (set (reg:SI 14) (reg:SI 14))] "" "* diff --git a/gcc/config/vax/vms.h b/gcc/config/vax/vms.h index 1dd3c7b0fa6..35c1665f05a 100644 --- a/gcc/config/vax/vms.h +++ b/gcc/config/vax/vms.h @@ -304,9 +304,9 @@ const_section () \ /* The following definitions are used in libgcc2.c with the __main function. The _SHR symbol is used when the sharable image library - for libg++ is used - this is picked up automatically by the linker - and this symbol points to the start of the __CTOR_LIST__ from libg++. - If libg++ is not being used, then __CTOR_LIST_SHR__ occurs just after + for the C++ library is used - this is picked up automatically by the linker + and this symbol points to the start of __CTOR_LIST__ from the C++ library. + If the C++ library is not used, then __CTOR_LIST_SHR__ occurs just after __CTOR_LIST__, and essentially points to the same list as __CTOR_LIST. */ #ifdef L__main diff --git a/gcc/config/winnt/config-nt.sed b/gcc/config/winnt/config-nt.sed index 995158e2244..9beceabf2ec 100644 --- a/gcc/config/winnt/config-nt.sed +++ b/gcc/config/winnt/config-nt.sed @@ -13,7 +13,7 @@ s/$(srcdir)\/c-gperf/c-gperf/g /^lang_specs_files=/ d /^lang_options_files=/ d /^version=/ c\ -version=2.8.0 +version=2.8.1 s/CC = cc/CC = cl/ s/^SHELL =.*/SHELL =/ s/CFLAGS = -g/CFLAGS =/ |