6 files changed, 105 insertions, 34 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index da2c63ef00b..af258d72faf 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -2919,6 +2919,13 @@ upon exit.  Reentrant functions cannot also have the @code{naked}
 or @code{critical} attributes.  They can have the @code{interrupt}
 attribute.
 
+@item wakeup
+@cindex @code{wakeup} attribute
+This attribute only applies to interrupt functions.  It is silently
+ignored if applied to a non-interrupt function.  A wakeup interrupt
+function will rouse the processor from any low-power state that it
+might be in when the function exits.
+
 @end table
 
 On Epiphany targets one or more optional parameters can be added like this:
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index a8f9f8a7980..71aa7fc9866 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -255,6 +255,22 @@ may need to use @option{--disable-stage1-checking}, though
 bootstrapping the compiler with such earlier compilers is strongly
 discouraged.
 
+@item C standard library and headers
+
+In order to build GCC, the C standard library and headers must be present
+for all target variants for which target libraries will be built (and not
+only the variant of the host C++ compiler).
+
+This affects the popular @samp{x86_64-unknown-linux-gnu} platform (among
+other multilib targets), for which 64-bit (@samp{x86_64}) and 32-bit
+(@samp{i386}) libc headers are usually packaged separately. If you do a
+build of a native compiler on @samp{x86_64-unknown-linux-gnu}, make sure you
+either have the 32-bit libc developer package properly installed (the exact
+name of the package depends on your distro) or you must build GCC as a
+64-bit only compiler by configuring with the option
+@option{--disable-multilib}.  Otherwise, you may encounter an error such as
+@samp{fatal error: gnu/stubs-32.h: No such file}
+
 @item GNAT
 
 In order to build the Ada compiler (GNAT) you must already have GNAT
@@ -3735,6 +3751,15 @@ removed and the system libunwind library will always be used.
 
 @html
 <hr />
+@end html
+@anchor{aarch64-x-x}
+@heading aarch64*-*-*
+Pre 2.24 binutils does not have support for selecting -mabi and does not
+support ILP32.  If GCC 4.9 or later is built with pre 2.24, GCC will not
+support option -mabi=ilp32.
+
+@html
+<hr />
 <!-- rs6000-ibm-aix*, powerpc-ibm-aix* -->
 @end html
 @anchor{x-ibm-aix}
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index b30e889764d..b655a6411b1 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -378,7 +378,7 @@ Objective-C and Objective-C++ Dialects}.
 -fira-region=@var{region} -fira-hoist-pressure @gol
 -fira-loop-pressure -fno-ira-share-save-slots @gol
 -fno-ira-share-spill-slots -fira-verbose=@var{n} @gol
--fisolate-erroneous-paths
+-fisolate-erroneous-paths-dereference -fisolate-erroneous-paths-attribute
 -fivopts -fkeep-inline-functions -fkeep-static-consts -flive-range-shrinkage @gol
 -floop-block -floop-interchange -floop-strip-mine -floop-nest-optimize @gol
 -floop-parallelize-all -flto -flto-compression-level @gol
@@ -959,7 +959,7 @@ See RS/6000 and PowerPC Options.
 -mindexed-addressing -mgettrcost=@var{number} -mpt-fixed @gol
 -maccumulate-outgoing-args -minvalid-symbols @gol
 -matomic-model=@var{atomic-model} @gol
--mbranch-cost=@var{num} -mzdcbranch -mno-zdcbranch -mcbranchdi -mcmpeqdi @gol
+-mbranch-cost=@var{num} -mzdcbranch -mno-zdcbranch @gol
 -mfused-madd -mno-fused-madd -mfsca -mno-fsca -mfsrra -mno-fsrra @gol
 -mpretend-cmove -mtas}
 
@@ -5363,6 +5363,19 @@ built with this option turned on will issue an error message
 when the end of a non-void function is reached without actually
 returning a value.  This option works in C++ only.
 
+@item -fsanitize=signed-integer-overflow
+@opindex fsanitize=signed-integer-overflow
+
+This option enables signed integer overflow checking.  We check that
+the result of @code{+}, @code{*}, and both unary and binary @code{-}
+does not overflow in the signed arithmetics.  Note, integer promotion
+rules must be taken into account.  That is, the following is not an
+overflow:
+@smallexample
+signed char a = SCHAR_MAX;
+a++;
+@end smallexample
+
 @end table
 
 While @option{-ftrapv} causes traps for signed overflows to be emitted,
@@ -6848,7 +6861,7 @@ also turns on the following optimization flags:
 -finline-small-functions @gol
 -findirect-inlining @gol
 -fipa-sra @gol
--fisolate-erroneous-paths @gol
+-fisolate-erroneous-paths-dereference @gol
 -foptimize-sibling-calls @gol
 -fpartial-inlining @gol
 -fpeephole2 @gol
@@ -7742,10 +7755,17 @@ it may significantly increase code size
 (see @option{--param ipcp-unit-growth=@var{value}}).
 This flag is enabled by default at @option{-O3}.
 
-@item -fisolate-erroneous-paths
-Detect paths which trigger erroneous or undefined behaviour.  Isolate those
-paths from the main control flow and turn the statement with erroneous or
-undefined behaviour into a trap.
+@item -fisolate-erroneous-paths-dereference
+Detect paths which trigger erroneous or undefined behaviour due to
+dereferencing a NULL pointer.  Isolate those paths from the main control
+flow and turn the statement with erroneous or undefined behaviour into a trap.
+
+@item -fisolate-erroneous-paths-attribute
+Detect paths which trigger erroneous or undefined behaviour due a NULL value
+being used in a way which is forbidden by a @code{returns_nonnull} or @code{nonnull}
+attribute.  Isolate those paths from the main control flow and turn the
+statement with erroneous or undefined behaviour into a trap.  This is not
+currently enabled, but may be enabled by @code{-O2} in the future.
 
 @item -ftree-sink
 @opindex ftree-sink
@@ -12136,9 +12156,10 @@ assembly code.  Permissible names are: @samp{arm2}, @samp{arm250},
 @samp{arm10e}, @samp{arm1020e}, @samp{arm1022e},
 @samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
 @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s},
-@samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9}, 
-@samp{cortex-a15}, @samp{cortex-a53}, @samp{cortex-r4}, @samp{cortex-r4f},
-@samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-m4}, @samp{cortex-m3},
+@samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9},
+@samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a53}, @samp{cortex-r4},
+@samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-m4},
+@samp{cortex-m3},
 @samp{cortex-m1},
 @samp{cortex-m0},
 @samp{cortex-m0plus},
@@ -14736,7 +14757,7 @@ then @option{-mtune=pentium4} generates code that is tuned for Pentium 4
 but still runs on i686 machines.
 
 The choices for @var{cpu-type} are the same as for @option{-march}.
-In addition, @option{-mtune} supports an extra choice for @var{cpu-type}:
+In addition, @option{-mtune} supports 2 extra choices for @var{cpu-type}:
 
 @table @samp
 @item generic
@@ -14757,6 +14778,26 @@ indicates the instruction set the compiler can use, and there is no
 generic instruction set applicable to all processors.  In contrast,
 @option{-mtune} indicates the processor (or, in this case, collection of
 processors) for which the code is optimized.
+
+@item intel
+Produce code optimized for the most current Intel processors, which are
+Haswell and Silvermont for this version of GCC.  If you know the CPU
+on which your code will run, then you should use the corresponding
+@option{-mtune} or @option{-march} option instead of @option{-mtune=intel}.
+But, if you want your application performs better on both Haswell and
+Silvermont, then you should use this option.
+
+As new Intel processors are deployed in the marketplace, the behavior of
+this option will change.  Therefore, if you upgrade to a newer version of
+GCC, code generation controlled by this option will change to reflect
+the most current Intel processors at the time that version of GCC is
+released.
+
+There is no @option{-march=intel} option because @option{-march} indicates
+the instruction set the compiler can use, and there is no common
+instruction set applicable to all processors.  In contrast,
+@option{-mtune} indicates the processor (or, in this case, collection of
+processors) for which the code is optimized.
 @end table
 
 @item -mcpu=@var{cpu-type}
@@ -20212,15 +20253,6 @@ compiler will try to prefer zero displacement branch code sequences.  This is
 enabled by default when generating code for SH4 and SH4A.  It can be explicitly
 disabled by specifying @option{-mno-zdcbranch}.
 
-@item -mcbranchdi
-@opindex mcbranchdi
-Enable the @code{cbranchdi4} instruction pattern.
-
-@item -mcmpeqdi
-@opindex mcmpeqdi
-Emit the @code{cmpeqdi_t} instruction pattern even when @option{-mcbranchdi}
-is in effect.
-
 @item -mfused-madd
 @itemx -mno-fused-madd
 @opindex mfused-madd
@@ -21969,6 +22001,12 @@ instruction, even though that accesses bytes that do not contain
 any portion of the bit-field, or memory-mapped registers unrelated to
 the one being updated.
 
+In some cases, such as when the @code{packed} attribute is applied to a 
+structure field, it may not be possible to access the field with a single
+read or write that is correctly aligned for the target machine.  In this
+case GCC falls back to generating multiple accesses rather than code that 
+will fault or truncate the result at run time.
+
 The default value of this option is determined by the application binary
 interface for the target processor.
 
diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi
index a7e98af4a86..995f1086cf5 100644
--- a/gcc/doc/rtl.texi
+++ b/gcc/doc/rtl.texi
@@ -1462,14 +1462,25 @@ Returns the number of units contained in a mode, i.e.,
 Returns the narrowest mode in mode class @var{c}.
 @end table
 
-The following 4 variables are defined on every target.   They can be
+The following 3 variables are defined on every target.   They can be
 used to allocate buffers that are guaranteed to be large enough to
-hold any value that can be represented on the target.   
+hold any value that can be represented on the target.   The first two
+can be overridden by defining them in the target's mode.def file,
+however, the value must be a constant that can determined very early
+in the compilation process.   The third symbol cannot be overridden.
 
 @table @code
+@findex BITS_PER_UNIT
+@item BITS_PER_UNIT
+The number of bits in an addressable storage unit (byte).  If you do
+not define this, the default is 8.
+
 @findex MAX_BITSIZE_MODE_ANY_INT
 @item MAX_BITSIZE_MODE_ANY_INT
-The maximum of MAX_BITSIZE_MODE_INT and MAX_BITSIZE_MODE_PARTIAL_INT.
+The maximum bitsize of any mode that is used in integer math.  This
+should be overridden by the target if it uses large integers as
+containers for larger vectors but otherwise never uses the contents to
+compute integer values.
 
 @findex MAX_BITSIZE_MODE_ANY_MODE
 @item MAX_BITSIZE_MODE_ANY_MODE
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index f3775a95573..4579ad954b4 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -879,11 +879,6 @@ You need not define this macro if the ordering is the same as for
 multi-word integers.
 @end defmac
 
-@defmac BITS_PER_UNIT
-Define this macro to be the number of bits in an addressable storage
-unit (byte).  If you do not define this macro the default is 8.
-@end defmac
-
 @defmac BITS_PER_WORD
 Number of bits in a word.  If you do not define this macro, the default
 is @code{BITS_PER_UNIT * UNITS_PER_WORD}.
@@ -4357,7 +4352,7 @@ with machine mode @var{mode}.  The default version of this
 hook returns true for both @code{ptr_mode} and @code{Pmode}.
 @end deftypefn
 
-@deftypefn {Target Hook} bool TARGET_REF_MAY_ALIAS_ERRNO (struct ao_ref_s *@var{ref})
+@deftypefn {Target Hook} bool TARGET_REF_MAY_ALIAS_ERRNO (struct ao_ref *@var{ref})
 Define this to return nonzero if the memory reference @var{ref}  may alias with the system C library errno location.  The default  version of this hook assumes the system C library errno location  is either a declaration of type int or accessed by dereferencing  a pointer to int.
 @end deftypefn
 
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 3d6a9d03dc1..26223122b11 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -853,11 +853,6 @@ You need not define this macro if the ordering is the same as for
 multi-word integers.
 @end defmac
 
-@defmac BITS_PER_UNIT
-Define this macro to be the number of bits in an addressable storage
-unit (byte).  If you do not define this macro the default is 8.
-@end defmac
-
 @defmac BITS_PER_WORD
 Number of bits in a word.  If you do not define this macro, the default
 is @code{BITS_PER_UNIT * UNITS_PER_WORD}.